iq31244.c 7.5 KB

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  1. /*
  2. * arch/arm/mach-iop32x/iq31244.c
  3. *
  4. * Board support code for the Intel EP80219 and IQ31244 platforms.
  5. *
  6. * Author: Rory Bolt <rorybolt@pacbell.net>
  7. * Copyright (C) 2002 Rory Bolt
  8. * Copyright 2003 (c) MontaVista, Software, Inc.
  9. * Copyright (C) 2004 Intel Corp.
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. #include <linux/mm.h>
  17. #include <linux/init.h>
  18. #include <linux/delay.h>
  19. #include <linux/kernel.h>
  20. #include <linux/pci.h>
  21. #include <linux/pm.h>
  22. #include <linux/string.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/io.h>
  28. #include <mach/hardware.h>
  29. #include <asm/cputype.h>
  30. #include <asm/irq.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/map.h>
  33. #include <asm/mach/pci.h>
  34. #include <asm/mach/time.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/page.h>
  37. #include <asm/pgtable.h>
  38. #include <mach/time.h>
  39. /*
  40. * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
  41. * same machine id, and the processor type was used to select board type.
  42. * However this assumption breaks for an iq80219 board which is an iop219
  43. * processor on an iq31244 board. The force_ep80219 flag has been added
  44. * for old boot loaders using the iq31244 machine id for an ep80219 platform.
  45. */
  46. static int force_ep80219;
  47. static int is_80219(void)
  48. {
  49. return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
  50. }
  51. static int is_ep80219(void)
  52. {
  53. if (machine_is_ep80219() || force_ep80219)
  54. return 1;
  55. else
  56. return 0;
  57. }
  58. /*
  59. * EP80219/IQ31244 timer tick configuration.
  60. */
  61. static void __init iq31244_timer_init(void)
  62. {
  63. if (is_ep80219()) {
  64. /* 33.333 MHz crystal. */
  65. iop_init_time(200000000);
  66. } else {
  67. /* 33.000 MHz crystal. */
  68. iop_init_time(198000000);
  69. }
  70. }
  71. static struct sys_timer iq31244_timer = {
  72. .init = iq31244_timer_init,
  73. };
  74. /*
  75. * IQ31244 I/O.
  76. */
  77. static struct map_desc iq31244_io_desc[] __initdata = {
  78. { /* on-board devices */
  79. .virtual = IQ31244_UART,
  80. .pfn = __phys_to_pfn(IQ31244_UART),
  81. .length = 0x00100000,
  82. .type = MT_DEVICE,
  83. },
  84. };
  85. void __init iq31244_map_io(void)
  86. {
  87. iop3xx_map_io();
  88. iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
  89. }
  90. /*
  91. * EP80219/IQ31244 PCI.
  92. */
  93. static int __init
  94. ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  95. {
  96. int irq;
  97. if (slot == 0) {
  98. /* CFlash */
  99. irq = IRQ_IOP32X_XINT1;
  100. } else if (slot == 1) {
  101. /* 82551 Pro 100 */
  102. irq = IRQ_IOP32X_XINT0;
  103. } else if (slot == 2) {
  104. /* PCI-X Slot */
  105. irq = IRQ_IOP32X_XINT3;
  106. } else if (slot == 3) {
  107. /* SATA */
  108. irq = IRQ_IOP32X_XINT2;
  109. } else {
  110. printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
  111. "device PCI:%d:%d:%d\n", dev->bus->number,
  112. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  113. irq = -1;
  114. }
  115. return irq;
  116. }
  117. static struct hw_pci ep80219_pci __initdata = {
  118. .swizzle = pci_std_swizzle,
  119. .nr_controllers = 1,
  120. .setup = iop3xx_pci_setup,
  121. .preinit = iop3xx_pci_preinit,
  122. .scan = iop3xx_pci_scan_bus,
  123. .map_irq = ep80219_pci_map_irq,
  124. };
  125. static int __init
  126. iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  127. {
  128. int irq;
  129. if (slot == 0) {
  130. /* CFlash */
  131. irq = IRQ_IOP32X_XINT1;
  132. } else if (slot == 1) {
  133. /* SATA */
  134. irq = IRQ_IOP32X_XINT2;
  135. } else if (slot == 2) {
  136. /* PCI-X Slot */
  137. irq = IRQ_IOP32X_XINT3;
  138. } else if (slot == 3) {
  139. /* 82546 GigE */
  140. irq = IRQ_IOP32X_XINT0;
  141. } else {
  142. printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
  143. "device PCI:%d:%d:%d\n", dev->bus->number,
  144. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  145. irq = -1;
  146. }
  147. return irq;
  148. }
  149. static struct hw_pci iq31244_pci __initdata = {
  150. .swizzle = pci_std_swizzle,
  151. .nr_controllers = 1,
  152. .setup = iop3xx_pci_setup,
  153. .preinit = iop3xx_pci_preinit,
  154. .scan = iop3xx_pci_scan_bus,
  155. .map_irq = iq31244_pci_map_irq,
  156. };
  157. static int __init iq31244_pci_init(void)
  158. {
  159. if (is_ep80219())
  160. pci_common_init(&ep80219_pci);
  161. else if (machine_is_iq31244()) {
  162. if (is_80219()) {
  163. printk("note: iq31244 board type has been selected\n");
  164. printk("note: to select ep80219 operation:\n");
  165. printk("\t1/ specify \"force_ep80219\" on the kernel"
  166. " command line\n");
  167. printk("\t2/ update boot loader to pass"
  168. " the ep80219 id: %d\n", MACH_TYPE_EP80219);
  169. }
  170. pci_common_init(&iq31244_pci);
  171. }
  172. return 0;
  173. }
  174. subsys_initcall(iq31244_pci_init);
  175. /*
  176. * IQ31244 machine initialisation.
  177. */
  178. static struct physmap_flash_data iq31244_flash_data = {
  179. .width = 2,
  180. };
  181. static struct resource iq31244_flash_resource = {
  182. .start = 0xf0000000,
  183. .end = 0xf07fffff,
  184. .flags = IORESOURCE_MEM,
  185. };
  186. static struct platform_device iq31244_flash_device = {
  187. .name = "physmap-flash",
  188. .id = 0,
  189. .dev = {
  190. .platform_data = &iq31244_flash_data,
  191. },
  192. .num_resources = 1,
  193. .resource = &iq31244_flash_resource,
  194. };
  195. static struct plat_serial8250_port iq31244_serial_port[] = {
  196. {
  197. .mapbase = IQ31244_UART,
  198. .membase = (char *)IQ31244_UART,
  199. .irq = IRQ_IOP32X_XINT1,
  200. .flags = UPF_SKIP_TEST,
  201. .iotype = UPIO_MEM,
  202. .regshift = 0,
  203. .uartclk = 1843200,
  204. },
  205. { },
  206. };
  207. static struct resource iq31244_uart_resource = {
  208. .start = IQ31244_UART,
  209. .end = IQ31244_UART + 7,
  210. .flags = IORESOURCE_MEM,
  211. };
  212. static struct platform_device iq31244_serial_device = {
  213. .name = "serial8250",
  214. .id = PLAT8250_DEV_PLATFORM,
  215. .dev = {
  216. .platform_data = iq31244_serial_port,
  217. },
  218. .num_resources = 1,
  219. .resource = &iq31244_uart_resource,
  220. };
  221. /*
  222. * This function will send a SHUTDOWN_COMPLETE message to the PIC
  223. * controller over I2C. We are not using the i2c subsystem since
  224. * we are going to power off and it may be removed
  225. */
  226. void ep80219_power_off(void)
  227. {
  228. /*
  229. * Send the Address byte w/ the start condition
  230. */
  231. *IOP3XX_IDBR1 = 0x60;
  232. *IOP3XX_ICR1 = 0xE9;
  233. mdelay(1);
  234. /*
  235. * Send the START_MSG byte w/ no start or stop condition
  236. */
  237. *IOP3XX_IDBR1 = 0x0F;
  238. *IOP3XX_ICR1 = 0xE8;
  239. mdelay(1);
  240. /*
  241. * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
  242. * stop condition
  243. */
  244. *IOP3XX_IDBR1 = 0x03;
  245. *IOP3XX_ICR1 = 0xE8;
  246. mdelay(1);
  247. /*
  248. * Send an ignored byte w/ stop condition
  249. */
  250. *IOP3XX_IDBR1 = 0x00;
  251. *IOP3XX_ICR1 = 0xEA;
  252. while (1)
  253. ;
  254. }
  255. static void __init iq31244_init_machine(void)
  256. {
  257. platform_device_register(&iop3xx_i2c0_device);
  258. platform_device_register(&iop3xx_i2c1_device);
  259. platform_device_register(&iq31244_flash_device);
  260. platform_device_register(&iq31244_serial_device);
  261. platform_device_register(&iop3xx_dma_0_channel);
  262. platform_device_register(&iop3xx_dma_1_channel);
  263. if (is_ep80219())
  264. pm_power_off = ep80219_power_off;
  265. if (!is_80219())
  266. platform_device_register(&iop3xx_aau_channel);
  267. }
  268. static int __init force_ep80219_setup(char *str)
  269. {
  270. force_ep80219 = 1;
  271. return 1;
  272. }
  273. __setup("force_ep80219", force_ep80219_setup);
  274. MACHINE_START(IQ31244, "Intel IQ31244")
  275. /* Maintainer: Intel Corp. */
  276. .boot_params = 0xa0000100,
  277. .map_io = iq31244_map_io,
  278. .init_irq = iop32x_init_irq,
  279. .timer = &iq31244_timer,
  280. .init_machine = iq31244_init_machine,
  281. MACHINE_END
  282. /* There should have been an ep80219 machine identifier from the beginning.
  283. * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
  284. * "force_ep80219" on the kernel command line, otherwise iq31244 operation
  285. * will be selected.
  286. */
  287. MACHINE_START(EP80219, "Intel EP80219")
  288. /* Maintainer: Intel Corp. */
  289. .boot_params = 0xa0000100,
  290. .map_io = iq31244_map_io,
  291. .init_irq = iop32x_init_irq,
  292. .timer = &iq31244_timer,
  293. .init_machine = iq31244_init_machine,
  294. MACHINE_END