mach-mx31_3ds.c 20 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/types.h>
  16. #include <linux/init.h>
  17. #include <linux/clk.h>
  18. #include <linux/irq.h>
  19. #include <linux/gpio.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/mfd/mc13783.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/l4f00242t03.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/usb/otg.h>
  26. #include <linux/usb/ulpi.h>
  27. #include <linux/memblock.h>
  28. #include <media/soc_camera.h>
  29. #include <mach/hardware.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/time.h>
  33. #include <asm/memory.h>
  34. #include <asm/mach/map.h>
  35. #include <mach/common.h>
  36. #include <mach/iomux-mx3.h>
  37. #include <mach/3ds_debugboard.h>
  38. #include <mach/ulpi.h>
  39. #include "devices-imx31.h"
  40. /* CPLD IRQ line for external uart, external ethernet etc */
  41. #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
  42. static int mx31_3ds_pins[] = {
  43. /* UART1 */
  44. MX31_PIN_CTS1__CTS1,
  45. MX31_PIN_RTS1__RTS1,
  46. MX31_PIN_TXD1__TXD1,
  47. MX31_PIN_RXD1__RXD1,
  48. IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  49. /*SPI0*/
  50. MX31_PIN_CSPI1_SCLK__SCLK,
  51. MX31_PIN_CSPI1_MOSI__MOSI,
  52. MX31_PIN_CSPI1_MISO__MISO,
  53. MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
  54. MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */
  55. /* SPI 1 */
  56. MX31_PIN_CSPI2_SCLK__SCLK,
  57. MX31_PIN_CSPI2_MOSI__MOSI,
  58. MX31_PIN_CSPI2_MISO__MISO,
  59. MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  60. MX31_PIN_CSPI2_SS0__SS0,
  61. MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  62. /* MC13783 IRQ */
  63. IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  64. /* USB OTG reset */
  65. IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  66. /* USB OTG */
  67. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  68. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  69. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  70. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  71. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  72. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  73. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  74. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  75. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  76. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  77. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  78. MX31_PIN_USBOTG_STP__USBOTG_STP,
  79. /*Keyboard*/
  80. MX31_PIN_KEY_ROW0_KEY_ROW0,
  81. MX31_PIN_KEY_ROW1_KEY_ROW1,
  82. MX31_PIN_KEY_ROW2_KEY_ROW2,
  83. MX31_PIN_KEY_COL0_KEY_COL0,
  84. MX31_PIN_KEY_COL1_KEY_COL1,
  85. MX31_PIN_KEY_COL2_KEY_COL2,
  86. MX31_PIN_KEY_COL3_KEY_COL3,
  87. /* USB Host 2 */
  88. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  89. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  90. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  91. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  92. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  93. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  94. IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
  95. IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
  96. IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
  97. IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
  98. IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
  99. IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
  100. /* USB Host2 reset */
  101. IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
  102. /* I2C1 */
  103. MX31_PIN_I2C_CLK__I2C1_SCL,
  104. MX31_PIN_I2C_DAT__I2C1_SDA,
  105. /* SDHC1 */
  106. MX31_PIN_SD1_DATA3__SD1_DATA3,
  107. MX31_PIN_SD1_DATA2__SD1_DATA2,
  108. MX31_PIN_SD1_DATA1__SD1_DATA1,
  109. MX31_PIN_SD1_DATA0__SD1_DATA0,
  110. MX31_PIN_SD1_CLK__SD1_CLK,
  111. MX31_PIN_SD1_CMD__SD1_CMD,
  112. MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
  113. MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
  114. /* Framebuffer */
  115. MX31_PIN_LD0__LD0,
  116. MX31_PIN_LD1__LD1,
  117. MX31_PIN_LD2__LD2,
  118. MX31_PIN_LD3__LD3,
  119. MX31_PIN_LD4__LD4,
  120. MX31_PIN_LD5__LD5,
  121. MX31_PIN_LD6__LD6,
  122. MX31_PIN_LD7__LD7,
  123. MX31_PIN_LD8__LD8,
  124. MX31_PIN_LD9__LD9,
  125. MX31_PIN_LD10__LD10,
  126. MX31_PIN_LD11__LD11,
  127. MX31_PIN_LD12__LD12,
  128. MX31_PIN_LD13__LD13,
  129. MX31_PIN_LD14__LD14,
  130. MX31_PIN_LD15__LD15,
  131. MX31_PIN_LD16__LD16,
  132. MX31_PIN_LD17__LD17,
  133. MX31_PIN_VSYNC3__VSYNC3,
  134. MX31_PIN_HSYNC__HSYNC,
  135. MX31_PIN_FPSHIFT__FPSHIFT,
  136. MX31_PIN_CONTRAST__CONTRAST,
  137. /* CSI */
  138. MX31_PIN_CSI_D6__CSI_D6,
  139. MX31_PIN_CSI_D7__CSI_D7,
  140. MX31_PIN_CSI_D8__CSI_D8,
  141. MX31_PIN_CSI_D9__CSI_D9,
  142. MX31_PIN_CSI_D10__CSI_D10,
  143. MX31_PIN_CSI_D11__CSI_D11,
  144. MX31_PIN_CSI_D12__CSI_D12,
  145. MX31_PIN_CSI_D13__CSI_D13,
  146. MX31_PIN_CSI_D14__CSI_D14,
  147. MX31_PIN_CSI_D15__CSI_D15,
  148. MX31_PIN_CSI_HSYNC__CSI_HSYNC,
  149. MX31_PIN_CSI_MCLK__CSI_MCLK,
  150. MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
  151. MX31_PIN_CSI_VSYNC__CSI_VSYNC,
  152. MX31_PIN_CSI_D5__GPIO3_5, /* CMOS PWDN */
  153. IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_GPIO), /* CMOS reset */
  154. };
  155. /*
  156. * Camera support
  157. */
  158. static phys_addr_t mx3_camera_base __initdata;
  159. #define MX31_3DS_CAMERA_BUF_SIZE SZ_8M
  160. #define MX31_3DS_GPIO_CAMERA_PW IOMUX_TO_GPIO(MX31_PIN_CSI_D5)
  161. #define MX31_3DS_GPIO_CAMERA_RST IOMUX_TO_GPIO(MX31_PIN_RI_DTE1)
  162. static struct gpio mx31_3ds_camera_gpios[] = {
  163. { MX31_3DS_GPIO_CAMERA_PW, GPIOF_OUT_INIT_HIGH, "camera-power" },
  164. { MX31_3DS_GPIO_CAMERA_RST, GPIOF_OUT_INIT_HIGH, "camera-reset" },
  165. };
  166. static const struct mx3_camera_pdata mx31_3ds_camera_pdata __initconst = {
  167. .flags = MX3_CAMERA_DATAWIDTH_10,
  168. .mclk_10khz = 2600,
  169. };
  170. static int __init mx31_3ds_init_camera(void)
  171. {
  172. int dma, ret = -ENOMEM;
  173. struct platform_device *pdev =
  174. imx31_alloc_mx3_camera(&mx31_3ds_camera_pdata);
  175. if (IS_ERR(pdev))
  176. return PTR_ERR(pdev);
  177. if (!mx3_camera_base)
  178. goto err;
  179. dma = dma_declare_coherent_memory(&pdev->dev,
  180. mx3_camera_base, mx3_camera_base,
  181. MX31_3DS_CAMERA_BUF_SIZE,
  182. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  183. if (!(dma & DMA_MEMORY_MAP))
  184. goto err;
  185. ret = platform_device_add(pdev);
  186. if (ret)
  187. err:
  188. platform_device_put(pdev);
  189. return ret;
  190. }
  191. static int mx31_3ds_camera_power(struct device *dev, int on)
  192. {
  193. /* enable or disable the camera */
  194. pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
  195. gpio_set_value(MX31_3DS_GPIO_CAMERA_PW, on ? 0 : 1);
  196. if (!on)
  197. goto out;
  198. /* If enabled, give a reset impulse */
  199. gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 0);
  200. msleep(20);
  201. gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 1);
  202. msleep(100);
  203. out:
  204. return 0;
  205. }
  206. static struct i2c_board_info mx31_3ds_i2c_camera = {
  207. I2C_BOARD_INFO("ov2640", 0x30),
  208. };
  209. static struct regulator_bulk_data mx31_3ds_camera_regs[] = {
  210. { .supply = "cmos_vcore" },
  211. { .supply = "cmos_2v8" },
  212. };
  213. static struct soc_camera_link iclink_ov2640 = {
  214. .bus_id = 0,
  215. .board_info = &mx31_3ds_i2c_camera,
  216. .i2c_adapter_id = 0,
  217. .power = mx31_3ds_camera_power,
  218. .regulators = mx31_3ds_camera_regs,
  219. .num_regulators = ARRAY_SIZE(mx31_3ds_camera_regs),
  220. };
  221. static struct platform_device mx31_3ds_ov2640 = {
  222. .name = "soc-camera-pdrv",
  223. .id = 0,
  224. .dev = {
  225. .platform_data = &iclink_ov2640,
  226. },
  227. };
  228. /*
  229. * FB support
  230. */
  231. static const struct fb_videomode fb_modedb[] = {
  232. { /* 480x640 @ 60 Hz */
  233. .name = "Epson-VGA",
  234. .refresh = 60,
  235. .xres = 480,
  236. .yres = 640,
  237. .pixclock = 41701,
  238. .left_margin = 20,
  239. .right_margin = 41,
  240. .upper_margin = 10,
  241. .lower_margin = 5,
  242. .hsync_len = 20,
  243. .vsync_len = 10,
  244. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
  245. .vmode = FB_VMODE_NONINTERLACED,
  246. .flag = 0,
  247. },
  248. };
  249. static struct ipu_platform_data mx3_ipu_data = {
  250. .irq_base = MXC_IPU_IRQ_START,
  251. };
  252. static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  253. .name = "Epson-VGA",
  254. .mode = fb_modedb,
  255. .num_modes = ARRAY_SIZE(fb_modedb),
  256. };
  257. /* LCD */
  258. static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
  259. .reset_gpio = IOMUX_TO_GPIO(MX31_PIN_LCS1),
  260. .data_enable_gpio = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
  261. .core_supply = "lcd_2v8",
  262. .io_supply = "vdd_lcdio",
  263. };
  264. /*
  265. * Support for SD card slot in personality board
  266. */
  267. #define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
  268. #define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
  269. static struct gpio mx31_3ds_sdhc1_gpios[] = {
  270. { MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
  271. { MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
  272. };
  273. static int mx31_3ds_sdhc1_init(struct device *dev,
  274. irq_handler_t detect_irq,
  275. void *data)
  276. {
  277. int ret;
  278. ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
  279. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  280. if (ret) {
  281. pr_warning("Unable to request the SD/MMC GPIOs.\n");
  282. return ret;
  283. }
  284. ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
  285. detect_irq, IRQF_DISABLED |
  286. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  287. "sdhc1-detect", data);
  288. if (ret) {
  289. pr_warning("Unable to request the SD/MMC card-detect IRQ.\n");
  290. goto gpio_free;
  291. }
  292. return 0;
  293. gpio_free:
  294. gpio_free_array(mx31_3ds_sdhc1_gpios,
  295. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  296. return ret;
  297. }
  298. static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
  299. {
  300. free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), data);
  301. gpio_free_array(mx31_3ds_sdhc1_gpios,
  302. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  303. }
  304. static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
  305. {
  306. /*
  307. * While the voltage stuff is done by the driver, activate the
  308. * Buffer Enable Pin only if there is a card in slot to fix the card
  309. * voltage issue caused by bi-directional chip TXB0108 on 3Stack.
  310. * Done here because at this stage we have for sure a debounced value
  311. * of the presence of the card, showed by the value of vdd.
  312. * 7 == ilog2(MMC_VDD_165_195)
  313. */
  314. if (vdd > 7)
  315. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
  316. else
  317. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
  318. }
  319. static struct imxmmc_platform_data sdhc1_pdata = {
  320. .init = mx31_3ds_sdhc1_init,
  321. .exit = mx31_3ds_sdhc1_exit,
  322. .setpower = mx31_3ds_sdhc1_setpower,
  323. };
  324. /*
  325. * Matrix keyboard
  326. */
  327. static const uint32_t mx31_3ds_keymap[] = {
  328. KEY(0, 0, KEY_UP),
  329. KEY(0, 1, KEY_DOWN),
  330. KEY(1, 0, KEY_RIGHT),
  331. KEY(1, 1, KEY_LEFT),
  332. KEY(1, 2, KEY_ENTER),
  333. KEY(2, 0, KEY_F6),
  334. KEY(2, 1, KEY_F8),
  335. KEY(2, 2, KEY_F9),
  336. KEY(2, 3, KEY_F10),
  337. };
  338. static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
  339. .keymap = mx31_3ds_keymap,
  340. .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
  341. };
  342. /* Regulators */
  343. static struct regulator_init_data pwgtx_init = {
  344. .constraints = {
  345. .boot_on = 1,
  346. .always_on = 1,
  347. },
  348. };
  349. static struct regulator_init_data gpo_init = {
  350. .constraints = {
  351. .boot_on = 1,
  352. .always_on = 1,
  353. }
  354. };
  355. static struct regulator_consumer_supply vmmc2_consumers[] = {
  356. REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"),
  357. };
  358. static struct regulator_init_data vmmc2_init = {
  359. .constraints = {
  360. .min_uV = 3000000,
  361. .max_uV = 3000000,
  362. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  363. REGULATOR_CHANGE_STATUS,
  364. },
  365. .num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
  366. .consumer_supplies = vmmc2_consumers,
  367. };
  368. static struct regulator_consumer_supply vmmc1_consumers[] = {
  369. REGULATOR_SUPPLY("lcd_2v8", NULL),
  370. REGULATOR_SUPPLY("cmos_2v8", "soc-camera-pdrv.0"),
  371. };
  372. static struct regulator_init_data vmmc1_init = {
  373. .constraints = {
  374. .min_uV = 2800000,
  375. .max_uV = 2800000,
  376. .apply_uV = 1,
  377. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  378. REGULATOR_CHANGE_STATUS,
  379. },
  380. .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
  381. .consumer_supplies = vmmc1_consumers,
  382. };
  383. static struct regulator_consumer_supply vgen_consumers[] = {
  384. REGULATOR_SUPPLY("vdd_lcdio", NULL),
  385. };
  386. static struct regulator_init_data vgen_init = {
  387. .constraints = {
  388. .min_uV = 1800000,
  389. .max_uV = 1800000,
  390. .apply_uV = 1,
  391. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  392. REGULATOR_CHANGE_STATUS,
  393. },
  394. .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
  395. .consumer_supplies = vgen_consumers,
  396. };
  397. static struct regulator_consumer_supply vvib_consumers[] = {
  398. REGULATOR_SUPPLY("cmos_vcore", "soc-camera-pdrv.0"),
  399. };
  400. static struct regulator_init_data vvib_init = {
  401. .constraints = {
  402. .min_uV = 1300000,
  403. .max_uV = 1300000,
  404. .apply_uV = 1,
  405. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  406. REGULATOR_CHANGE_STATUS,
  407. },
  408. .num_consumer_supplies = ARRAY_SIZE(vvib_consumers),
  409. .consumer_supplies = vvib_consumers,
  410. };
  411. static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
  412. {
  413. .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
  414. .init_data = &pwgtx_init,
  415. }, {
  416. .id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
  417. .init_data = &pwgtx_init,
  418. }, {
  419. .id = MC13783_REG_GPO1, /* Turn on 1.8V */
  420. .init_data = &gpo_init,
  421. }, {
  422. .id = MC13783_REG_GPO3, /* Turn on 3.3V */
  423. .init_data = &gpo_init,
  424. }, {
  425. .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
  426. .init_data = &vmmc2_init,
  427. }, {
  428. .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
  429. .init_data = &vmmc1_init,
  430. }, {
  431. .id = MC13783_REG_VGEN, /* Power LCD */
  432. .init_data = &vgen_init,
  433. }, {
  434. .id = MC13783_REG_VVIB, /* Power CMOS */
  435. .init_data = &vvib_init,
  436. },
  437. };
  438. /* MC13783 */
  439. static struct mc13xxx_platform_data mc13783_pdata = {
  440. .regulators = {
  441. .regulators = mx31_3ds_regulators,
  442. .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
  443. },
  444. .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN,
  445. };
  446. /* SPI */
  447. static int spi0_internal_chipselect[] = {
  448. MXC_SPI_CS(2),
  449. };
  450. static const struct spi_imx_master spi0_pdata __initconst = {
  451. .chipselect = spi0_internal_chipselect,
  452. .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
  453. };
  454. static int spi1_internal_chipselect[] = {
  455. MXC_SPI_CS(0),
  456. MXC_SPI_CS(2),
  457. };
  458. static const struct spi_imx_master spi1_pdata __initconst = {
  459. .chipselect = spi1_internal_chipselect,
  460. .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
  461. };
  462. static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
  463. {
  464. .modalias = "mc13783",
  465. .max_speed_hz = 1000000,
  466. .bus_num = 1,
  467. .chip_select = 1, /* SS2 */
  468. .platform_data = &mc13783_pdata,
  469. .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
  470. .mode = SPI_CS_HIGH,
  471. }, {
  472. .modalias = "l4f00242t03",
  473. .max_speed_hz = 5000000,
  474. .bus_num = 0,
  475. .chip_select = 0, /* SS2 */
  476. .platform_data = &mx31_3ds_l4f00242t03_pdata,
  477. },
  478. };
  479. /*
  480. * NAND Flash
  481. */
  482. static const struct mxc_nand_platform_data
  483. mx31_3ds_nand_board_info __initconst = {
  484. .width = 1,
  485. .hw_ecc = 1,
  486. #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
  487. .flash_bbt = 1,
  488. #endif
  489. };
  490. /*
  491. * USB OTG
  492. */
  493. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  494. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  495. #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
  496. #define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
  497. static int mx31_3ds_usbotg_init(void)
  498. {
  499. int err;
  500. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  501. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  502. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  503. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  504. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  505. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  506. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  507. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  508. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  509. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  510. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  511. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  512. err = gpio_request(USBOTG_RST_B, "otgusb-reset");
  513. if (err) {
  514. pr_err("Failed to request the USB OTG reset gpio\n");
  515. return err;
  516. }
  517. err = gpio_direction_output(USBOTG_RST_B, 0);
  518. if (err) {
  519. pr_err("Failed to drive the USB OTG reset gpio\n");
  520. goto usbotg_free_reset;
  521. }
  522. mdelay(1);
  523. gpio_set_value(USBOTG_RST_B, 1);
  524. return 0;
  525. usbotg_free_reset:
  526. gpio_free(USBOTG_RST_B);
  527. return err;
  528. }
  529. static int mx31_3ds_otg_init(struct platform_device *pdev)
  530. {
  531. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  532. }
  533. static int mx31_3ds_host2_init(struct platform_device *pdev)
  534. {
  535. int err;
  536. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  537. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  538. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  539. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  540. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  541. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  542. mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
  543. mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
  544. mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
  545. mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
  546. mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
  547. mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
  548. err = gpio_request(USBH2_RST_B, "usbh2-reset");
  549. if (err) {
  550. pr_err("Failed to request the USB Host 2 reset gpio\n");
  551. return err;
  552. }
  553. err = gpio_direction_output(USBH2_RST_B, 0);
  554. if (err) {
  555. pr_err("Failed to drive the USB Host 2 reset gpio\n");
  556. goto usbotg_free_reset;
  557. }
  558. mdelay(1);
  559. gpio_set_value(USBH2_RST_B, 1);
  560. mdelay(10);
  561. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  562. usbotg_free_reset:
  563. gpio_free(USBH2_RST_B);
  564. return err;
  565. }
  566. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  567. .init = mx31_3ds_otg_init,
  568. .portsc = MXC_EHCI_MODE_ULPI,
  569. };
  570. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  571. .init = mx31_3ds_host2_init,
  572. .portsc = MXC_EHCI_MODE_ULPI,
  573. };
  574. static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
  575. .operating_mode = FSL_USB2_DR_DEVICE,
  576. .phy_mode = FSL_USB2_PHY_ULPI,
  577. };
  578. static int otg_mode_host;
  579. static int __init mx31_3ds_otg_mode(char *options)
  580. {
  581. if (!strcmp(options, "host"))
  582. otg_mode_host = 1;
  583. else if (!strcmp(options, "device"))
  584. otg_mode_host = 0;
  585. else
  586. pr_info("otg_mode neither \"host\" nor \"device\". "
  587. "Defaulting to device\n");
  588. return 0;
  589. }
  590. __setup("otg_mode=", mx31_3ds_otg_mode);
  591. static const struct imxuart_platform_data uart_pdata __initconst = {
  592. .flags = IMXUART_HAVE_RTSCTS,
  593. };
  594. static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
  595. .bitrate = 100000,
  596. };
  597. static struct platform_device *devices[] __initdata = {
  598. &mx31_3ds_ov2640,
  599. };
  600. static void __init mx31_3ds_init(void)
  601. {
  602. int ret;
  603. mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
  604. "mx31_3ds");
  605. imx31_add_imx_uart0(&uart_pdata);
  606. imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
  607. imx31_add_spi_imx1(&spi1_pdata);
  608. spi_register_board_info(mx31_3ds_spi_devs,
  609. ARRAY_SIZE(mx31_3ds_spi_devs));
  610. platform_add_devices(devices, ARRAY_SIZE(devices));
  611. imx31_add_imx_keypad(&mx31_3ds_keymap_data);
  612. mx31_3ds_usbotg_init();
  613. if (otg_mode_host) {
  614. otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  615. ULPI_OTG_DRVVBUS_EXT);
  616. if (otg_pdata.otg)
  617. imx31_add_mxc_ehci_otg(&otg_pdata);
  618. }
  619. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  620. ULPI_OTG_DRVVBUS_EXT);
  621. if (usbh2_pdata.otg)
  622. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  623. if (!otg_mode_host)
  624. imx31_add_fsl_usb2_udc(&usbotg_pdata);
  625. if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
  626. printk(KERN_WARNING "Init of the debug board failed, all "
  627. "devices on the debug board are unusable.\n");
  628. imx31_add_imx2_wdt(NULL);
  629. imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
  630. imx31_add_mxc_mmc(0, &sdhc1_pdata);
  631. imx31_add_spi_imx0(&spi0_pdata);
  632. imx31_add_ipu_core(&mx3_ipu_data);
  633. imx31_add_mx3_sdc_fb(&mx3fb_pdata);
  634. /* CSI */
  635. /* Camera power: default - off */
  636. ret = gpio_request_array(mx31_3ds_camera_gpios,
  637. ARRAY_SIZE(mx31_3ds_camera_gpios));
  638. if (ret) {
  639. pr_err("Failed to request camera gpios");
  640. iclink_ov2640.power = NULL;
  641. }
  642. mx31_3ds_init_camera();
  643. }
  644. static void __init mx31_3ds_timer_init(void)
  645. {
  646. mx31_clocks_init(26000000);
  647. }
  648. static struct sys_timer mx31_3ds_timer = {
  649. .init = mx31_3ds_timer_init,
  650. };
  651. static void __init mx31_3ds_reserve(void)
  652. {
  653. /* reserve MX31_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
  654. mx3_camera_base = memblock_alloc(MX31_3DS_CAMERA_BUF_SIZE,
  655. MX31_3DS_CAMERA_BUF_SIZE);
  656. memblock_free(mx3_camera_base, MX31_3DS_CAMERA_BUF_SIZE);
  657. memblock_remove(mx3_camera_base, MX31_3DS_CAMERA_BUF_SIZE);
  658. }
  659. MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
  660. /* Maintainer: Freescale Semiconductor, Inc. */
  661. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  662. .map_io = mx31_map_io,
  663. .init_early = imx31_init_early,
  664. .init_irq = mx31_init_irq,
  665. .timer = &mx31_3ds_timer,
  666. .init_machine = mx31_3ds_init,
  667. .reserve = mx31_3ds_reserve,
  668. MACHINE_END