ehci-imx27.c 2.2 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283
  1. /*
  2. * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
  3. * Copyright (C) 2010 Freescale Semiconductor, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  13. * for more details.
  14. */
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. #include <mach/hardware.h>
  18. #include <mach/mxc_ehci.h>
  19. #define USBCTRL_OTGBASE_OFFSET 0x600
  20. #define MX27_OTG_SIC_SHIFT 29
  21. #define MX27_OTG_SIC_MASK (0x3 << MX27_OTG_SIC_SHIFT)
  22. #define MX27_OTG_PM_BIT (1 << 24)
  23. #define MX27_H2_SIC_SHIFT 21
  24. #define MX27_H2_SIC_MASK (0x3 << MX27_H2_SIC_SHIFT)
  25. #define MX27_H2_PM_BIT (1 << 16)
  26. #define MX27_H2_DT_BIT (1 << 5)
  27. #define MX27_H1_SIC_SHIFT 13
  28. #define MX27_H1_SIC_MASK (0x3 << MX27_H1_SIC_SHIFT)
  29. #define MX27_H1_PM_BIT (1 << 8)
  30. #define MX27_H1_DT_BIT (1 << 4)
  31. int mx27_initialize_usb_hw(int port, unsigned int flags)
  32. {
  33. unsigned int v;
  34. v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  35. switch (port) {
  36. case 0: /* OTG port */
  37. v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);
  38. v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;
  39. if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  40. v |= MX27_OTG_PM_BIT;
  41. break;
  42. case 1: /* H1 port */
  43. v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);
  44. v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;
  45. if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  46. v |= MX27_H1_PM_BIT;
  47. if (!(flags & MXC_EHCI_TTL_ENABLED))
  48. v |= MX27_H1_DT_BIT;
  49. break;
  50. case 2: /* H2 port */
  51. v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);
  52. v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;
  53. if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  54. v |= MX27_H2_PM_BIT;
  55. if (!(flags & MXC_EHCI_TTL_ENABLED))
  56. v |= MX27_H2_DT_BIT;
  57. break;
  58. default:
  59. return -EINVAL;
  60. }
  61. writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  62. return 0;
  63. }