crt.S 4.0 KB

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  1. # See LICENSE for license details.
  2. #include "encoding.h"
  3. #if __riscv_xlen == 64
  4. # define LREG ld
  5. # define SREG sd
  6. # define REGBYTES 8
  7. #else
  8. # define LREG lw
  9. # define SREG sw
  10. # define REGBYTES 4
  11. #endif
  12. .text
  13. .globl _start
  14. _start:
  15. la t0, trap_entry
  16. csrw mtvec, t0
  17. li x1, 0
  18. li x2, 0
  19. li x3, 0
  20. li x4, 0
  21. li x5, 0
  22. li x6, 0
  23. li x7, 0
  24. li x8, 0
  25. li x9, 0
  26. li x10,0
  27. li x11,0
  28. li x12,0
  29. li x13,0
  30. li x14,0
  31. li x15,0
  32. li x16,0
  33. li x17,0
  34. li x18,0
  35. li x19,0
  36. li x20,0
  37. li x21,0
  38. li x22,0
  39. li x23,0
  40. li x24,0
  41. li x25,0
  42. li x26,0
  43. li x27,0
  44. li x28,0
  45. li x29,0
  46. li x30,0
  47. li x31,0
  48. # enable FPU and accelerator if present
  49. li t0, MSTATUS_FS | MSTATUS_XS
  50. csrs mstatus, t0
  51. # make sure XLEN agrees with compilation choice
  52. csrr t0, misa
  53. #if __riscv_xlen == 64
  54. bltz t0, 1f
  55. #else
  56. bgez t0, 1f
  57. #endif
  58. li a0, 1234
  59. j tohost_exit
  60. 1:
  61. #ifdef __riscv_hard_float
  62. # initialize FPU if we have one
  63. andi t0, t0, 1 << ('f' - 'a')
  64. beqz t0, 1f
  65. fssr x0
  66. fmv.s.x f0, x0
  67. fmv.s.x f1, x0
  68. fmv.s.x f2, x0
  69. fmv.s.x f3, x0
  70. fmv.s.x f4, x0
  71. fmv.s.x f5, x0
  72. fmv.s.x f6, x0
  73. fmv.s.x f7, x0
  74. fmv.s.x f8, x0
  75. fmv.s.x f9, x0
  76. fmv.s.x f10,x0
  77. fmv.s.x f11,x0
  78. fmv.s.x f12,x0
  79. fmv.s.x f13,x0
  80. fmv.s.x f14,x0
  81. fmv.s.x f15,x0
  82. fmv.s.x f16,x0
  83. fmv.s.x f17,x0
  84. fmv.s.x f18,x0
  85. fmv.s.x f19,x0
  86. fmv.s.x f20,x0
  87. fmv.s.x f21,x0
  88. fmv.s.x f22,x0
  89. fmv.s.x f23,x0
  90. fmv.s.x f24,x0
  91. fmv.s.x f25,x0
  92. fmv.s.x f26,x0
  93. fmv.s.x f27,x0
  94. fmv.s.x f28,x0
  95. fmv.s.x f29,x0
  96. fmv.s.x f30,x0
  97. fmv.s.x f31,x0
  98. #endif
  99. 1:
  100. # initialize global pointer
  101. la gp, _gp
  102. la tp, _end + 63
  103. and tp, tp, -64
  104. # get core id
  105. csrr a0, mhartid
  106. # for now, assume only 1 core
  107. li a1, 1
  108. 1:bgeu a0, a1, 1b
  109. # give each core 128KB of stack + TLS
  110. #define STKSHIFT 17
  111. sll a2, a0, STKSHIFT
  112. add tp, tp, a2
  113. add sp, a0, 1
  114. sll sp, sp, STKSHIFT
  115. add sp, sp, tp
  116. j _init
  117. .align 2
  118. trap_entry:
  119. addi sp, sp, -272
  120. SREG x1, 1*REGBYTES(sp)
  121. SREG x2, 2*REGBYTES(sp)
  122. SREG x3, 3*REGBYTES(sp)
  123. SREG x4, 4*REGBYTES(sp)
  124. SREG x5, 5*REGBYTES(sp)
  125. SREG x6, 6*REGBYTES(sp)
  126. SREG x7, 7*REGBYTES(sp)
  127. SREG x8, 8*REGBYTES(sp)
  128. SREG x9, 9*REGBYTES(sp)
  129. SREG x10, 10*REGBYTES(sp)
  130. SREG x11, 11*REGBYTES(sp)
  131. SREG x12, 12*REGBYTES(sp)
  132. SREG x13, 13*REGBYTES(sp)
  133. SREG x14, 14*REGBYTES(sp)
  134. SREG x15, 15*REGBYTES(sp)
  135. SREG x16, 16*REGBYTES(sp)
  136. SREG x17, 17*REGBYTES(sp)
  137. SREG x18, 18*REGBYTES(sp)
  138. SREG x19, 19*REGBYTES(sp)
  139. SREG x20, 20*REGBYTES(sp)
  140. SREG x21, 21*REGBYTES(sp)
  141. SREG x22, 22*REGBYTES(sp)
  142. SREG x23, 23*REGBYTES(sp)
  143. SREG x24, 24*REGBYTES(sp)
  144. SREG x25, 25*REGBYTES(sp)
  145. SREG x26, 26*REGBYTES(sp)
  146. SREG x27, 27*REGBYTES(sp)
  147. SREG x28, 28*REGBYTES(sp)
  148. SREG x29, 29*REGBYTES(sp)
  149. SREG x30, 30*REGBYTES(sp)
  150. SREG x31, 31*REGBYTES(sp)
  151. csrr a0, mcause
  152. csrr a1, mepc
  153. mv a2, sp
  154. jal handle_trap
  155. csrw mepc, a0
  156. # Remain in M-mode after eret
  157. li t0, MSTATUS_MPP
  158. csrs mstatus, t0
  159. LREG x1, 1*REGBYTES(sp)
  160. LREG x2, 2*REGBYTES(sp)
  161. LREG x3, 3*REGBYTES(sp)
  162. LREG x4, 4*REGBYTES(sp)
  163. LREG x5, 5*REGBYTES(sp)
  164. LREG x6, 6*REGBYTES(sp)
  165. LREG x7, 7*REGBYTES(sp)
  166. LREG x8, 8*REGBYTES(sp)
  167. LREG x9, 9*REGBYTES(sp)
  168. LREG x10, 10*REGBYTES(sp)
  169. LREG x11, 11*REGBYTES(sp)
  170. LREG x12, 12*REGBYTES(sp)
  171. LREG x13, 13*REGBYTES(sp)
  172. LREG x14, 14*REGBYTES(sp)
  173. LREG x15, 15*REGBYTES(sp)
  174. LREG x16, 16*REGBYTES(sp)
  175. LREG x17, 17*REGBYTES(sp)
  176. LREG x18, 18*REGBYTES(sp)
  177. LREG x19, 19*REGBYTES(sp)
  178. LREG x20, 20*REGBYTES(sp)
  179. LREG x21, 21*REGBYTES(sp)
  180. LREG x22, 22*REGBYTES(sp)
  181. LREG x23, 23*REGBYTES(sp)
  182. LREG x24, 24*REGBYTES(sp)
  183. LREG x25, 25*REGBYTES(sp)
  184. LREG x26, 26*REGBYTES(sp)
  185. LREG x27, 27*REGBYTES(sp)
  186. LREG x28, 28*REGBYTES(sp)
  187. LREG x29, 29*REGBYTES(sp)
  188. LREG x30, 30*REGBYTES(sp)
  189. LREG x31, 31*REGBYTES(sp)
  190. addi sp, sp, 272
  191. mret
  192. .section ".tdata.begin"
  193. .globl _tdata_begin
  194. _tdata_begin:
  195. .section ".tdata.end"
  196. .globl _tdata_end
  197. _tdata_end:
  198. .section ".tbss.end"
  199. .globl _tbss_end
  200. _tbss_end:
  201. .section ".tohost","aw",@progbits
  202. .align 6
  203. .globl tohost
  204. tohost: .dword 0
  205. .align 6
  206. .globl fromhost
  207. fromhost: .dword 0