base.c 86 KB

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  1. /*
  2. * OpenVox A1200P FXS/FXO Interface Driver for DAHDI Telephony interface
  3. *
  4. * Written by MiaoLin<miaolin@openvox.cn>
  5. *
  6. * Copyright (C) 2005-2010 OpenVox Communication Co. Ltd,
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. */
  25. /* Rev histroy
  26. *
  27. * Rev 0.10 initial version
  28. * Rev 0.11
  29. * fixed the led light on/off bug.
  30. * modify some wctdm print to opvxa1200
  31. * support firmware version 1.2, faster i/o operation, and better LED control.
  32. *
  33. * Rev 0.12 patched to support new pci id 0x8519
  34. * Rev 0.13 patched to remove the warning during compile under kernel 2.6.22
  35. * Rev 0.14 patched to remove the bug for ZAP_IRQ_SHARED , 3/9/2007
  36. * Rev 0.15 patched to support new pci ID 0X9532 by james.zhu, 23/10/2007
  37. * Rev 0.16 support new pci id 0x9559 by Miao Lin 21/3/2008
  38. * Rev 0.17
  39. * patched a few bugs,
  40. * add hwgain support.
  41. * fixed A800P version check
  42. * Rev 1.4.9.2
  43. * Only generate 8 channels for A800P
  44. * Version number synced to zaptel distribution.
  45. * Rev 1.4.9.2.a
  46. * Fixed freeregion.
  47. *
  48. * Rev 1.4.9.2.b
  49. * Add cid before first ring support.
  50. * New Paremeters:
  51. * cidbeforering : set to 1 will cause the card enable cidbeforering function. default 0
  52. * cidbuflen : length of cid buffer, in msec, default 3000 msec.
  53. * cidtimeout : time out of a ring, default 6000msec
  54. * User must set cidstart=polarity in zapata.conf to use with this feature
  55. * cidsignalling = signalling format send before 1st ring. most likely dtmf.
  56. *
  57. * Rev 1.4.9.2.c
  58. * add driver parameter cidtimeout.
  59. *
  60. * Rev 1.4.9.2.d
  61. * add debug stuff to test fxs power alarm
  62. *
  63. * Rev 1.4.11
  64. * Support enhanced full scale tx/rx for FXO required by europe standard (Register 30, acim) (module parm fxofullscale)
  65. *
  66. * Rev 1.4.12 2008/10/17
  67. * Fixed bug cause FXS module report fake power alarm.
  68. * Power alarm debug stuff removed.
  69. *
  70. * Rev 2.0 DAHDI 2008/10/17
  71. *
  72. * Rev 2.0.1 add new pci id 0x9599
  73. * Re 2.0.2 12/01/2009
  74. add fixedtimepolarity: set time(ms) when send polarity after 1st ring happen.
  75. * Sometimes the dtmf cid is sent just after first ring off, and the system do not have
  76. * enough time to start detect 1st dtmf.
  77. * 0 means send polarity at the end of 1st ring.
  78. * x means send ploarity after x ms of 1st ring begin.
  79. *
  80. * Rev 2.0.3 12/01/2009
  81. * Add touch_softlockup_watchdog() in wctdm_hardware_init, to avoid cpu softlockup system message for FXS.
  82. *
  83. *
  84. * Rev 1.4.12.4 17/04/2009 James.zhu
  85. * Changed wctdm_voicedaa_check_hook() to detect FXO battery and solved the problem with dial(dahdi/go/XXXXXXXXXX)
  86. * add alarm detection for FXO
  87. *
  88. * Rev 1.4.12.5 01/10/2009 james.zhu
  89. * Add jiffies for 5 second in wctdm_hardware_init
  90. *
  91. *
  92. */
  93. #include <linux/kernel.h>
  94. #include <linux/errno.h>
  95. #include <linux/module.h>
  96. #include <linux/init.h>
  97. #include <linux/errno.h>
  98. #include <linux/pci.h>
  99. #include <linux/interrupt.h>
  100. #include <linux/moduleparam.h>
  101. #include <asm/io.h>
  102. #include <linux/sched.h>
  103. #include "proslic.h"
  104. /* MiaoLin debug start */
  105. #include <linux/string.h>
  106. #include <asm/uaccess.h> /* get_fs(), set_fs(), KERNEL_DS */
  107. #include <linux/file.h> /* fput() */
  108. /* MiaoLin debug end */
  109. /*
  110. * Define for audio vs. register based ring detection
  111. *
  112. */
  113. /* #define AUDIO_RINGCHECK */
  114. /*
  115. Experimental max loop current limit for the proslic
  116. Loop current limit is from 20 mA to 41 mA in steps of 3
  117. (according to datasheet)
  118. So set the value below to:
  119. 0x00 : 20mA (default)
  120. 0x01 : 23mA
  121. 0x02 : 26mA
  122. 0x03 : 29mA
  123. 0x04 : 32mA
  124. 0x05 : 35mA
  125. 0x06 : 37mA
  126. 0x07 : 41mA
  127. */
  128. static int loopcurrent = 20;
  129. static int reversepolarity = 0;
  130. static alpha indirect_regs[] =
  131. {
  132. {0,255,"DTMF_ROW_0_PEAK",0x55C2},
  133. {1,255,"DTMF_ROW_1_PEAK",0x51E6},
  134. {2,255,"DTMF_ROW2_PEAK",0x4B85},
  135. {3,255,"DTMF_ROW3_PEAK",0x4937},
  136. {4,255,"DTMF_COL1_PEAK",0x3333},
  137. {5,255,"DTMF_FWD_TWIST",0x0202},
  138. {6,255,"DTMF_RVS_TWIST",0x0202},
  139. {7,255,"DTMF_ROW_RATIO_TRES",0x0198},
  140. {8,255,"DTMF_COL_RATIO_TRES",0x0198},
  141. {9,255,"DTMF_ROW_2ND_ARM",0x0611},
  142. {10,255,"DTMF_COL_2ND_ARM",0x0202},
  143. {11,255,"DTMF_PWR_MIN_TRES",0x00E5},
  144. {12,255,"DTMF_OT_LIM_TRES",0x0A1C},
  145. {13,0,"OSC1_COEF",0x7B30},
  146. {14,1,"OSC1X",0x0063},
  147. {15,2,"OSC1Y",0x0000},
  148. {16,3,"OSC2_COEF",0x7870},
  149. {17,4,"OSC2X",0x007D},
  150. {18,5,"OSC2Y",0x0000},
  151. {19,6,"RING_V_OFF",0x0000},
  152. {20,7,"RING_OSC",0x7EF0},
  153. {21,8,"RING_X",0x0160},
  154. {22,9,"RING_Y",0x0000},
  155. {23,255,"PULSE_ENVEL",0x2000},
  156. {24,255,"PULSE_X",0x2000},
  157. {25,255,"PULSE_Y",0x0000},
  158. //{26,13,"RECV_DIGITAL_GAIN",0x4000}, // playback volume set lower
  159. {26,13,"RECV_DIGITAL_GAIN",0x2000}, // playback volume set lower
  160. {27,14,"XMIT_DIGITAL_GAIN",0x4000},
  161. //{27,14,"XMIT_DIGITAL_GAIN",0x2000},
  162. {28,15,"LOOP_CLOSE_TRES",0x1000},
  163. {29,16,"RING_TRIP_TRES",0x3600},
  164. {30,17,"COMMON_MIN_TRES",0x1000},
  165. {31,18,"COMMON_MAX_TRES",0x0200},
  166. {32,19,"PWR_ALARM_Q1Q2",0x07C0},
  167. {33,20,"PWR_ALARM_Q3Q4",0x2600},
  168. {34,21,"PWR_ALARM_Q5Q6",0x1B80},
  169. {35,22,"LOOP_CLOSURE_FILTER",0x8000},
  170. {36,23,"RING_TRIP_FILTER",0x0320},
  171. {37,24,"TERM_LP_POLE_Q1Q2",0x008C},
  172. {38,25,"TERM_LP_POLE_Q3Q4",0x0100},
  173. {39,26,"TERM_LP_POLE_Q5Q6",0x0010},
  174. {40,27,"CM_BIAS_RINGING",0x0C00},
  175. {41,64,"DCDC_MIN_V",0x0C00},
  176. {42,255,"DCDC_XTRA",0x1000},
  177. {43,66,"LOOP_CLOSE_TRES_LOW",0x1000},
  178. };
  179. #include <dahdi/kernel.h>
  180. #include <dahdi/wctdm_user.h>
  181. #include "fxo_modes.h"
  182. #define NUM_FXO_REGS 60
  183. #define WC_MAX_IFACES 128
  184. #define WC_OFFSET 4 /* Offset between transmit and receive, in bytes. */
  185. #define WC_SYNCFLAG 0xca1ef1ac
  186. #define WC_CNTL 0x00
  187. #define WC_OPER 0x01
  188. #define WC_AUXC 0x02
  189. #define WC_AUXD 0x03
  190. #define WC_MASK0 0x04
  191. #define WC_MASK1 0x05
  192. #define WC_INTSTAT 0x06
  193. #define WC_AUXR 0x07
  194. #define WC_DMAWS 0x08
  195. #define WC_DMAWI 0x0c
  196. #define WC_DMAWE 0x10
  197. #define WC_DMARS 0x18
  198. #define WC_DMARI 0x1c
  199. #define WC_DMARE 0x20
  200. #define WC_AUXFUNC 0x2b
  201. #define WC_SERCTL 0x2d
  202. #define WC_FSCDELAY 0x2f
  203. #define WC_REGBASE 0xc0
  204. #define WC_VER 0x0
  205. #define WC_CS 0x1
  206. #define WC_SPICTRL 0x2
  207. #define WC_SPIDATA 0x3
  208. #define BIT_SPI_BYHW (1 << 0)
  209. #define BIT_SPI_BUSY (1 << 1) // 0=can read/write spi, 1=spi working.
  210. #define BIT_SPI_START (1 << 2)
  211. #define BIT_LED_CLK (1 << 0) // MiaoLin add to control the led.
  212. #define BIT_LED_DATA (1 << 1) // MiaoLin add to control the led.
  213. #define BIT_CS (1 << 2)
  214. #define BIT_SCLK (1 << 3)
  215. #define BIT_SDI (1 << 4)
  216. #define BIT_SDO (1 << 5)
  217. #define FLAG_EMPTY 0
  218. #define FLAG_WRITE 1
  219. #define FLAG_READ 2
  220. #define DEFAULT_RING_DEBOUNCE 64 /* Ringer Debounce (64 ms) */
  221. #define POLARITY_DEBOUNCE 64 /* Polarity debounce (64 ms) */
  222. #define OHT_TIMER 6000 /* How long after RING to retain OHT */
  223. #define FLAG_3215 (1 << 0)
  224. #define FLAG_A800 (1 << 7)
  225. #define MAX_NUM_CARDS 12
  226. #define NUM_CARDS 12
  227. #define NUM_FLAG 4 /* number of flag channels. */
  228. enum cid_hook_state {
  229. CID_STATE_IDLE = 0,
  230. CID_STATE_RING_ON,
  231. CID_STATE_RING_OFF,
  232. CID_STATE_WAIT_RING_FINISH
  233. };
  234. /* if you want to record the last 8 sec voice before the driver unload, uncomment it and rebuild. */
  235. /* #define TEST_LOG_INCOME_VOICE */
  236. #define voc_buffer_size (8000*8)
  237. #define MAX_ALARMS 10
  238. #define MOD_TYPE_FXS 0
  239. #define MOD_TYPE_FXO 1
  240. #define MINPEGTIME 10 * 8 /* 30 ms peak to peak gets us no more than 100 Hz */
  241. #define PEGTIME 50 * 8 /* 50ms peak to peak gets us rings of 10 Hz or more */
  242. #define PEGCOUNT 5 /* 5 cycles of pegging means RING */
  243. #define NUM_CAL_REGS 12
  244. struct calregs {
  245. unsigned char vals[NUM_CAL_REGS];
  246. };
  247. enum proslic_power_warn {
  248. PROSLIC_POWER_UNKNOWN = 0,
  249. PROSLIC_POWER_ON,
  250. PROSLIC_POWER_WARNED,
  251. };
  252. enum battery_state {
  253. BATTERY_UNKNOWN = 0,
  254. BATTERY_PRESENT,
  255. BATTERY_LOST,
  256. };
  257. struct wctdm {
  258. struct pci_dev *dev;
  259. char *variety;
  260. struct dahdi_span span;
  261. struct dahdi_device *ddev;
  262. unsigned char ios;
  263. int usecount;
  264. unsigned int intcount;
  265. int dead;
  266. int pos;
  267. int flags[MAX_NUM_CARDS];
  268. int freeregion;
  269. int alt;
  270. int curcard;
  271. int cardflag; /* Bit-map of present cards */
  272. enum proslic_power_warn proslic_power;
  273. spinlock_t lock;
  274. union {
  275. struct fxo {
  276. #ifdef AUDIO_RINGCHECK
  277. unsigned int pegtimer;
  278. int pegcount;
  279. int peg;
  280. int ring;
  281. #else
  282. int wasringing;
  283. int lastrdtx;
  284. #endif
  285. int ringdebounce;
  286. int offhook;
  287. unsigned int battdebounce;
  288. unsigned int battalarm;
  289. enum battery_state battery;
  290. int lastpol;
  291. int polarity;
  292. int polaritydebounce;
  293. } fxo;
  294. struct fxs {
  295. int oldrxhook;
  296. int debouncehook;
  297. int lastrxhook;
  298. int debounce;
  299. int ohttimer;
  300. int idletxhookstate; /* IDLE changing hook state */
  301. int lasttxhook;
  302. int palarms;
  303. struct calregs calregs;
  304. } fxs;
  305. } mod[MAX_NUM_CARDS];
  306. /* Receive hook state and debouncing */
  307. int modtype[MAX_NUM_CARDS];
  308. unsigned char reg0shadow[MAX_NUM_CARDS];
  309. unsigned char reg1shadow[MAX_NUM_CARDS];
  310. unsigned long ioaddr;
  311. unsigned long mem_region; /* 32 bit Region allocated to tiger320 */
  312. unsigned long mem_len; /* Length of 32 bit region */
  313. volatile unsigned long mem32; /* Virtual representation of 32 bit memory area */
  314. dma_addr_t readdma;
  315. dma_addr_t writedma;
  316. volatile unsigned char *writechunk; /* Double-word aligned write memory */
  317. volatile unsigned char *readchunk; /* Double-word aligned read memory */
  318. /*struct dahdi_chan chans[MAX_NUM_CARDS];*/
  319. struct dahdi_chan _chans[NUM_CARDS];
  320. struct dahdi_chan *chans[NUM_CARDS];
  321. #ifdef TEST_LOG_INCOME_VOICE
  322. char * voc_buf[MAX_NUM_CARDS + NUM_FLAG];
  323. int voc_ptr[MAX_NUM_CARDS + NUM_FLAG];
  324. #endif
  325. int lastchan;
  326. unsigned short ledstate;
  327. unsigned char fwversion;
  328. int max_cards;
  329. char *card_name;
  330. char *cid_history_buf[MAX_NUM_CARDS];
  331. int cid_history_ptr[MAX_NUM_CARDS];
  332. int cid_history_clone_cnt[MAX_NUM_CARDS];
  333. enum cid_hook_state cid_state[MAX_NUM_CARDS];
  334. int cid_ring_on_time[MAX_NUM_CARDS];
  335. };
  336. static char* A1200P_Name = "A1200P";
  337. static char* A800P_Name = "A800P";
  338. struct wctdm_desc {
  339. char *name;
  340. int flags;
  341. };
  342. static struct wctdm_desc wctdme = { "OpenVox A1200P/A800P", 0 };
  343. static int acim2tiss[16] = { 0x0, 0x1, 0x4, 0x5, 0x7, 0x0, 0x0, 0x6, 0x0, 0x0, 0x0, 0x2, 0x0, 0x3 };
  344. static struct wctdm *ifaces[WC_MAX_IFACES];
  345. static void wctdm_release(struct wctdm *wc);
  346. static unsigned int battdebounce;
  347. static unsigned int battalarm;
  348. static unsigned int battthresh;
  349. static int ringdebounce = DEFAULT_RING_DEBOUNCE;
  350. /* times 4, because must be a multiple of 4ms: */
  351. static int dialdebounce = 8 * 8;
  352. static int fwringdetect = 0;
  353. static int debug = 0;
  354. static int robust = 0;
  355. static int timingonly = 0;
  356. static int lowpower = 0;
  357. static int boostringer = 0;
  358. static int fastringer = 0;
  359. static int _opermode = 0;
  360. static char *opermode = "FCC";
  361. static int fxshonormode = 0;
  362. static int alawoverride = 0;
  363. static int fastpickup = 0;
  364. static int fxotxgain = 0;
  365. static int fxorxgain = 0;
  366. static int fxstxgain = 0;
  367. static int fxsrxgain = 0;
  368. /* special h/w control command */
  369. static int spibyhw = 1;
  370. static int usememio = 1;
  371. static int cidbeforering = 0;
  372. static int cidbuflen = 3000; /* in msec, default 3000 */
  373. static int cidtimeout = 6*1000; /* in msec, default 6000 */
  374. static int fxofullscale = 0; /* fxo full scale tx/rx, register 30, acim */
  375. static int fixedtimepolarity=0; /* time delay in ms when send polarity after rise edge of 1st ring.*/
  376. static int wctdm_init_proslic(struct wctdm *wc, int card, int fast , int manual, int sane);
  377. static void wctdm_set_led(struct wctdm* wc, int card, int onoff)
  378. {
  379. int i;
  380. unsigned char c;
  381. wc->ledstate &= ~(0x01<<card);
  382. wc->ledstate |= (onoff<<card);
  383. c = (inb(wc->ioaddr + WC_AUXD)&~BIT_LED_CLK)|BIT_LED_DATA;
  384. outb( c, wc->ioaddr + WC_AUXD);
  385. for(i=MAX_NUM_CARDS-1; i>=0; i--)
  386. {
  387. if(wc->ledstate & (0x0001<<i))
  388. if(wc->fwversion == 0x11)
  389. c &= ~BIT_LED_DATA;
  390. else
  391. c |= BIT_LED_DATA;
  392. else
  393. if(wc->fwversion == 0x11)
  394. c |= BIT_LED_DATA;
  395. else
  396. c &= ~BIT_LED_DATA;
  397. outb( c, wc->ioaddr + WC_AUXD);
  398. outb( c|BIT_LED_CLK, wc->ioaddr + WC_AUXD);
  399. outb( (c&~BIT_LED_CLK)|BIT_LED_DATA, wc->ioaddr + WC_AUXD);
  400. }
  401. }
  402. static inline void wctdm_transmitprep(struct wctdm *wc, unsigned char ints)
  403. {
  404. int x, y, chan_offset, pos;
  405. volatile unsigned char *txbuf;
  406. if (ints & /*0x01*/ 0x04)
  407. /* Write is at interrupt address. Start writing from normal offset */
  408. txbuf = wc->writechunk;
  409. else
  410. txbuf = wc->writechunk + DAHDI_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG);
  411. /* Calculate Transmission */
  412. dahdi_transmit(&wc->span);
  413. if(wc->lastchan == -1) // not in sync.
  414. return;
  415. chan_offset = (wc->lastchan*4 + 4 ) % (MAX_NUM_CARDS+NUM_FLAG);
  416. for (y=0;y<DAHDI_CHUNKSIZE;y++) {
  417. #ifdef __BIG_ENDIAN
  418. // operation pending...
  419. #else
  420. for (x=0;x<(MAX_NUM_CARDS+NUM_FLAG);x++) {
  421. pos = y * (MAX_NUM_CARDS+NUM_FLAG) + ((x + chan_offset + MAX_NUM_CARDS+NUM_FLAG - WC_OFFSET)&0x0f);
  422. if(x<wc->max_cards/*MAX_NUM_CARDS*/)
  423. txbuf[pos] = wc->chans[x]->writechunk[y];
  424. else
  425. txbuf[pos] = 0;
  426. }
  427. #endif
  428. }
  429. }
  430. #ifdef AUDIO_RINGCHECK
  431. static inline void ring_check(struct wctdm *wc, int card)
  432. {
  433. int x;
  434. short sample;
  435. if (wc->modtype[card] != MOD_TYPE_FXO)
  436. return;
  437. wc->mod[card].fxo.pegtimer += DAHDI_CHUNKSIZE;
  438. for (x=0;x<DAHDI_CHUNKSIZE;x++) {
  439. /* Look for pegging to indicate ringing */
  440. sample = DAHDI_XLAW(wc->chans[card].readchunk[x], (&(wc->chans[card])));
  441. if ((sample > 10000) && (wc->mod[card].fxo.peg != 1)) {
  442. if (debug > 1) printk(KERN_DEBUG "High peg!\n");
  443. if ((wc->mod[card].fxo.pegtimer < PEGTIME) && (wc->mod[card].fxo.pegtimer > MINPEGTIME))
  444. wc->mod[card].fxo.pegcount++;
  445. wc->mod[card].fxo.pegtimer = 0;
  446. wc->mod[card].fxo.peg = 1;
  447. } else if ((sample < -10000) && (wc->mod[card].fxo.peg != -1)) {
  448. if (debug > 1) printk(KERN_DEBUG "Low peg!\n");
  449. if ((wc->mod[card].fxo.pegtimer < (PEGTIME >> 2)) && (wc->mod[card].fxo.pegtimer > (MINPEGTIME >> 2)))
  450. wc->mod[card].fxo.pegcount++;
  451. wc->mod[card].fxo.pegtimer = 0;
  452. wc->mod[card].fxo.peg = -1;
  453. }
  454. }
  455. if (wc->mod[card].fxo.pegtimer > PEGTIME) {
  456. /* Reset pegcount if our timer expires */
  457. wc->mod[card].fxo.pegcount = 0;
  458. }
  459. /* Decrement debouncer if appropriate */
  460. if (wc->mod[card].fxo.ringdebounce)
  461. wc->mod[card].fxo.ringdebounce--;
  462. if (!wc->mod[card].fxo.offhook && !wc->mod[card].fxo.ringdebounce) {
  463. if (!wc->mod[card].fxo.ring && (wc->mod[card].fxo.pegcount > PEGCOUNT)) {
  464. /* It's ringing */
  465. if (debug)
  466. printk(KERN_DEBUG "RING on %d/%d!\n", wc->span.spanno, card + 1);
  467. if (!wc->mod[card].fxo.offhook)
  468. dahdi_hooksig(&wc->chans[card], DAHDI_RXSIG_RING);
  469. wc->mod[card].fxo.ring = 1;
  470. }
  471. if (wc->mod[card].fxo.ring && !wc->mod[card].fxo.pegcount) {
  472. /* No more ring */
  473. if (debug)
  474. printk(KERN_DEBUG "NO RING on %d/%d!\n", wc->span.spanno, card + 1);
  475. dahdi_hooksig(&wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  476. wc->mod[card].fxo.ring = 0;
  477. }
  478. }
  479. }
  480. #endif
  481. static inline void wctdm_receiveprep(struct wctdm *wc, unsigned char ints)
  482. {
  483. volatile unsigned char *rxbuf;
  484. int x, y, chan_offset;
  485. if (ints & 0x08/*0x04*/)
  486. /* Read is at interrupt address. Valid data is available at normal offset */
  487. rxbuf = wc->readchunk;
  488. else
  489. rxbuf = wc->readchunk + DAHDI_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG);
  490. for(x=0; x<4; x++)
  491. if( *(int*)(rxbuf+x*4) == WC_SYNCFLAG)
  492. break;
  493. if(x==4)
  494. {
  495. printk("buffer sync misseed!\n");
  496. wc->lastchan = -1;
  497. return;
  498. }
  499. else if(wc->lastchan != x)
  500. {
  501. printk("buffer re-sync occur from %d to %d\n", wc->lastchan, x);
  502. wc->lastchan = x;
  503. }
  504. chan_offset = (wc->lastchan*4 + 4 ) % (MAX_NUM_CARDS+NUM_FLAG);
  505. for (x=0;x<DAHDI_CHUNKSIZE;x++) {
  506. #ifdef __BIG_ENDIAN
  507. // operation pending...
  508. #else
  509. for (y=0;y<wc->max_cards/*MAX_NUM_CARDS*/;y++) {
  510. if (wc->cardflag & (1 << y))
  511. wc->chans[y]->readchunk[x] = rxbuf[(MAX_NUM_CARDS+NUM_FLAG) * x + ((y + chan_offset ) & 0x0f)];
  512. #ifdef TEST_LOG_INCOME_VOICE
  513. wc->voc_buf[y][wc->voc_ptr[y]] = rxbuf[(MAX_NUM_CARDS+NUM_FLAG) * x + ((y + chan_offset) & 0x0f)];
  514. wc->voc_ptr[y]++;
  515. if(wc->voc_ptr[y] >= voc_buffer_size)
  516. wc->voc_ptr[y] = 0;
  517. #endif
  518. }
  519. #endif
  520. }
  521. if(cidbeforering)
  522. {
  523. for(x=0; x<wc->max_cards; x++)
  524. {
  525. if (wc->modtype[wc->chans[x]->chanpos - 1] == MOD_TYPE_FXO)
  526. if(wc->mod[wc->chans[x]->chanpos - 1].fxo.offhook == 0)
  527. {
  528. /*unsigned int *p_readchunk, *p_cid_history;
  529. p_readchunk = (unsigned int*)wc->chans[x].readchunk;
  530. p_cid_history = (unsigned int*)(wc->cid_history_buf[x] + wc->cid_history_ptr[x]);*/
  531. if(wc->cid_state[x] == CID_STATE_IDLE) /* we need copy data to the cid voice buffer */
  532. {
  533. memcpy(wc->cid_history_buf[x] + wc->cid_history_ptr[x], wc->chans[x]->readchunk, DAHDI_CHUNKSIZE);
  534. wc->cid_history_ptr[x] = (wc->cid_history_ptr[x] + DAHDI_CHUNKSIZE)%(cidbuflen * DAHDI_MAX_CHUNKSIZE);
  535. }
  536. else if (wc->cid_state[x] == CID_STATE_RING_ON)
  537. wc->cid_history_clone_cnt[x] = cidbuflen;
  538. else if (wc->cid_state[x] == CID_STATE_RING_OFF)
  539. {
  540. if(wc->cid_history_clone_cnt[x])
  541. {
  542. memcpy(wc->chans[x]->readchunk, wc->cid_history_buf[x] + wc->cid_history_ptr[x], DAHDI_MAX_CHUNKSIZE);
  543. wc->cid_history_clone_cnt[x]--;
  544. wc->cid_history_ptr[x] = (wc->cid_history_ptr[x] + DAHDI_MAX_CHUNKSIZE)%(cidbuflen * DAHDI_MAX_CHUNKSIZE);
  545. }
  546. else
  547. {
  548. wc->cid_state[x] = CID_STATE_WAIT_RING_FINISH;
  549. wc->cid_history_clone_cnt[x] = cidtimeout; /* wait 6 sec, if no ring, return to idle */
  550. }
  551. }
  552. else if(wc->cid_state[x] == CID_STATE_WAIT_RING_FINISH)
  553. {
  554. if(wc->cid_history_clone_cnt[x] > 0)
  555. wc->cid_history_clone_cnt[x]--;
  556. else
  557. {
  558. wc->cid_state[x] = CID_STATE_IDLE;
  559. wc->cid_history_ptr[x] = 0;
  560. wc->cid_history_clone_cnt[x] = 0;
  561. }
  562. }
  563. }
  564. }
  565. }
  566. #ifdef AUDIO_RINGCHECK
  567. for (x=0;x<wc->max_cards;x++)
  568. ring_check(wc, x);
  569. #endif
  570. /* XXX We're wasting 8 taps. We should get closer :( */
  571. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++) {
  572. if (wc->cardflag & (1 << x))
  573. dahdi_ec_chunk(wc->chans[x], wc->chans[x]->readchunk, wc->chans[x]->writechunk);
  574. }
  575. dahdi_receive(&wc->span);
  576. }
  577. static void wctdm_stop_dma(struct wctdm *wc);
  578. static void wctdm_reset_tdm(struct wctdm *wc);
  579. static void wctdm_restart_dma(struct wctdm *wc);
  580. static unsigned char __wctdm_getcreg(struct wctdm *wc, unsigned char reg);
  581. static void __wctdm_setcreg(struct wctdm *wc, unsigned char reg, unsigned char val);
  582. static inline void __write_8bits(struct wctdm *wc, unsigned char bits)
  583. {
  584. if(spibyhw == 0)
  585. {
  586. int x;
  587. /* Drop chip select */
  588. wc->ios |= BIT_SCLK;
  589. outb(wc->ios, wc->ioaddr + WC_AUXD);
  590. wc->ios &= ~BIT_CS;
  591. outb(wc->ios, wc->ioaddr + WC_AUXD);
  592. for (x=0;x<8;x++) {
  593. /* Send out each bit, MSB first, drop SCLK as we do so */
  594. if (bits & 0x80)
  595. wc->ios |= BIT_SDI;
  596. else
  597. wc->ios &= ~BIT_SDI;
  598. wc->ios &= ~BIT_SCLK;
  599. outb(wc->ios, wc->ioaddr + WC_AUXD);
  600. /* Now raise SCLK high again and repeat */
  601. wc->ios |= BIT_SCLK;
  602. outb(wc->ios, wc->ioaddr + WC_AUXD);
  603. bits <<= 1;
  604. }
  605. /* Finally raise CS back high again */
  606. wc->ios |= BIT_CS;
  607. outb(wc->ios, wc->ioaddr + WC_AUXD);
  608. }
  609. else
  610. {
  611. __wctdm_setcreg(wc, WC_SPIDATA, bits);
  612. __wctdm_setcreg(wc, WC_SPICTRL, BIT_SPI_BYHW | BIT_SPI_START);
  613. while ((__wctdm_getcreg(wc, WC_SPICTRL) & BIT_SPI_BUSY) != 0);
  614. __wctdm_setcreg(wc, WC_SPICTRL, BIT_SPI_BYHW);
  615. }
  616. }
  617. static inline void __reset_spi(struct wctdm *wc)
  618. {
  619. __wctdm_setcreg(wc, WC_SPICTRL, 0);
  620. /* Drop chip select and clock once and raise and clock once */
  621. wc->ios |= BIT_SCLK;
  622. outb(wc->ios, wc->ioaddr + WC_AUXD);
  623. wc->ios &= ~BIT_CS;
  624. outb(wc->ios, wc->ioaddr + WC_AUXD);
  625. wc->ios |= BIT_SDI;
  626. wc->ios &= ~BIT_SCLK;
  627. outb(wc->ios, wc->ioaddr + WC_AUXD);
  628. /* Now raise SCLK high again and repeat */
  629. wc->ios |= BIT_SCLK;
  630. outb(wc->ios, wc->ioaddr + WC_AUXD);
  631. /* Finally raise CS back high again */
  632. wc->ios |= BIT_CS;
  633. outb(wc->ios, wc->ioaddr + WC_AUXD);
  634. /* Clock again */
  635. wc->ios &= ~BIT_SCLK;
  636. outb(wc->ios, wc->ioaddr + WC_AUXD);
  637. /* Now raise SCLK high again and repeat */
  638. wc->ios |= BIT_SCLK;
  639. outb(wc->ios, wc->ioaddr + WC_AUXD);
  640. __wctdm_setcreg(wc, WC_SPICTRL, spibyhw);
  641. }
  642. static inline unsigned char __read_8bits(struct wctdm *wc)
  643. {
  644. unsigned char res=0, c;
  645. int x;
  646. if(spibyhw == 0)
  647. {
  648. wc->ios &= ~BIT_CS;
  649. outb(wc->ios, wc->ioaddr + WC_AUXD);
  650. /* Drop chip select */
  651. wc->ios &= ~BIT_CS;
  652. outb(wc->ios, wc->ioaddr + WC_AUXD);
  653. for (x=0;x<8;x++) {
  654. res <<= 1;
  655. /* Get SCLK */
  656. wc->ios &= ~BIT_SCLK;
  657. outb(wc->ios, wc->ioaddr + WC_AUXD);
  658. /* Read back the value */
  659. c = inb(wc->ioaddr + WC_AUXR);
  660. if (c & BIT_SDO)
  661. res |= 1;
  662. /* Now raise SCLK high again */
  663. wc->ios |= BIT_SCLK;
  664. outb(wc->ios, wc->ioaddr + WC_AUXD);
  665. }
  666. /* Finally raise CS back high again */
  667. wc->ios |= BIT_CS;
  668. outb(wc->ios, wc->ioaddr + WC_AUXD);
  669. wc->ios &= ~BIT_SCLK;
  670. outb(wc->ios, wc->ioaddr + WC_AUXD);
  671. }
  672. else
  673. {
  674. __wctdm_setcreg(wc, WC_SPICTRL, BIT_SPI_BYHW | BIT_SPI_START);
  675. while ((__wctdm_getcreg(wc, WC_SPICTRL) & BIT_SPI_BUSY) != 0);
  676. res = __wctdm_getcreg(wc, WC_SPIDATA);
  677. __wctdm_setcreg(wc, WC_SPICTRL, BIT_SPI_BYHW);
  678. }
  679. /* And return our result */
  680. return res;
  681. }
  682. static void __wctdm_setcreg_mem(struct wctdm *wc, unsigned char reg, unsigned char val)
  683. {
  684. unsigned int *p = (unsigned int*)(wc->mem32 + WC_REGBASE + ((reg & 0xf) << 2));
  685. *p = val;
  686. }
  687. static unsigned char __wctdm_getcreg_mem(struct wctdm *wc, unsigned char reg)
  688. {
  689. unsigned int *p = (unsigned int*)(wc->mem32 + WC_REGBASE + ((reg & 0xf) << 2));
  690. return (*p)&0x00ff;
  691. }
  692. static void __wctdm_setcreg(struct wctdm *wc, unsigned char reg, unsigned char val)
  693. {
  694. if(usememio)
  695. __wctdm_setcreg_mem(wc, reg, val);
  696. else
  697. outb(val, wc->ioaddr + WC_REGBASE + ((reg & 0xf) << 2));
  698. }
  699. static unsigned char __wctdm_getcreg(struct wctdm *wc, unsigned char reg)
  700. {
  701. if(usememio)
  702. return __wctdm_getcreg_mem(wc, reg);
  703. else
  704. return inb(wc->ioaddr + WC_REGBASE + ((reg & 0xf) << 2));
  705. }
  706. static inline void __wctdm_setcard(struct wctdm *wc, int card)
  707. {
  708. if (wc->curcard != card) {
  709. __wctdm_setcreg(wc, WC_CS, card);
  710. wc->curcard = card;
  711. //printk("Select card %d\n", card);
  712. }
  713. }
  714. static void __wctdm_setreg(struct wctdm *wc, int card, unsigned char reg, unsigned char value)
  715. {
  716. __wctdm_setcard(wc, card);
  717. if (wc->modtype[card] == MOD_TYPE_FXO) {
  718. __write_8bits(wc, 0x20);
  719. __write_8bits(wc, reg & 0x7f);
  720. } else {
  721. __write_8bits(wc, reg & 0x7f);
  722. }
  723. __write_8bits(wc, value);
  724. }
  725. static void wctdm_setreg(struct wctdm *wc, int card, unsigned char reg, unsigned char value)
  726. {
  727. unsigned long flags;
  728. spin_lock_irqsave(&wc->lock, flags);
  729. __wctdm_setreg(wc, card, reg, value);
  730. spin_unlock_irqrestore(&wc->lock, flags);
  731. }
  732. static unsigned char __wctdm_getreg(struct wctdm *wc, int card, unsigned char reg)
  733. {
  734. __wctdm_setcard(wc, card);
  735. if (wc->modtype[card] == MOD_TYPE_FXO) {
  736. __write_8bits(wc, 0x60);
  737. __write_8bits(wc, reg & 0x7f);
  738. } else {
  739. __write_8bits(wc, reg | 0x80);
  740. }
  741. return __read_8bits(wc);
  742. }
  743. static inline void reset_spi(struct wctdm *wc, int card)
  744. {
  745. unsigned long flags;
  746. spin_lock_irqsave(&wc->lock, flags);
  747. __wctdm_setcard(wc, card);
  748. __reset_spi(wc);
  749. __reset_spi(wc);
  750. spin_unlock_irqrestore(&wc->lock, flags);
  751. }
  752. static unsigned char wctdm_getreg(struct wctdm *wc, int card, unsigned char reg)
  753. {
  754. unsigned long flags;
  755. unsigned char res;
  756. spin_lock_irqsave(&wc->lock, flags);
  757. res = __wctdm_getreg(wc, card, reg);
  758. spin_unlock_irqrestore(&wc->lock, flags);
  759. return res;
  760. }
  761. static int __wait_access(struct wctdm *wc, int card)
  762. {
  763. unsigned char data = 0;
  764. long origjiffies;
  765. int count = 0;
  766. #define MAX 6000 /* attempts */
  767. origjiffies = jiffies;
  768. /* Wait for indirect access */
  769. while (count++ < MAX)
  770. {
  771. data = __wctdm_getreg(wc, card, I_STATUS);
  772. if (!data)
  773. return 0;
  774. }
  775. if(count > (MAX-1)) printk(KERN_NOTICE " ##### Loop error (%02x) #####\n", data);
  776. return 0;
  777. }
  778. static unsigned char translate_3215(unsigned char address)
  779. {
  780. int x;
  781. for (x=0;x<sizeof(indirect_regs)/sizeof(indirect_regs[0]);x++) {
  782. if (indirect_regs[x].address == address) {
  783. address = indirect_regs[x].altaddr;
  784. break;
  785. }
  786. }
  787. return address;
  788. }
  789. static int wctdm_proslic_setreg_indirect(struct wctdm *wc, int card, unsigned char address, unsigned short data)
  790. {
  791. unsigned long flags;
  792. int res = -1;
  793. /* Translate 3215 addresses */
  794. if (wc->flags[card] & FLAG_3215) {
  795. address = translate_3215(address);
  796. if (address == 255)
  797. return 0;
  798. }
  799. spin_lock_irqsave(&wc->lock, flags);
  800. if(!__wait_access(wc, card)) {
  801. __wctdm_setreg(wc, card, IDA_LO,(unsigned char)(data & 0xFF));
  802. __wctdm_setreg(wc, card, IDA_HI,(unsigned char)((data & 0xFF00)>>8));
  803. __wctdm_setreg(wc, card, IAA,address);
  804. res = 0;
  805. };
  806. spin_unlock_irqrestore(&wc->lock, flags);
  807. return res;
  808. }
  809. static int wctdm_proslic_getreg_indirect(struct wctdm *wc, int card, unsigned char address)
  810. {
  811. unsigned long flags;
  812. int res = -1;
  813. char *p=NULL;
  814. /* Translate 3215 addresses */
  815. if (wc->flags[card] & FLAG_3215) {
  816. address = translate_3215(address);
  817. if (address == 255)
  818. return 0;
  819. }
  820. spin_lock_irqsave(&wc->lock, flags);
  821. if (!__wait_access(wc, card)) {
  822. __wctdm_setreg(wc, card, IAA, address);
  823. if (!__wait_access(wc, card)) {
  824. unsigned char data1, data2;
  825. data1 = __wctdm_getreg(wc, card, IDA_LO);
  826. data2 = __wctdm_getreg(wc, card, IDA_HI);
  827. res = data1 | (data2 << 8);
  828. } else
  829. p = "Failed to wait inside\n";
  830. } else
  831. p = "failed to wait\n";
  832. spin_unlock_irqrestore(&wc->lock, flags);
  833. if (p)
  834. printk(KERN_NOTICE "%s", p);
  835. return res;
  836. }
  837. static int wctdm_proslic_init_indirect_regs(struct wctdm *wc, int card)
  838. {
  839. unsigned char i;
  840. for (i=0; i<sizeof(indirect_regs) / sizeof(indirect_regs[0]); i++)
  841. {
  842. if(wctdm_proslic_setreg_indirect(wc, card, indirect_regs[i].address,indirect_regs[i].initial))
  843. return -1;
  844. }
  845. return 0;
  846. }
  847. static int wctdm_proslic_verify_indirect_regs(struct wctdm *wc, int card)
  848. {
  849. int passed = 1;
  850. unsigned short i, initial;
  851. int j;
  852. for (i=0; i<sizeof(indirect_regs) / sizeof(indirect_regs[0]); i++)
  853. {
  854. if((j = wctdm_proslic_getreg_indirect(wc, card, (unsigned char) indirect_regs[i].address)) < 0) {
  855. printk(KERN_NOTICE "Failed to read indirect register %d\n", i);
  856. return -1;
  857. }
  858. initial= indirect_regs[i].initial;
  859. if ( j != initial && (!(wc->flags[card] & FLAG_3215) || (indirect_regs[i].altaddr != 255)))
  860. {
  861. printk(KERN_NOTICE "!!!!!!! %s iREG %X = %X should be %X\n",
  862. indirect_regs[i].name,indirect_regs[i].address,j,initial );
  863. passed = 0;
  864. }
  865. }
  866. if (passed) {
  867. if (debug)
  868. printk(KERN_DEBUG "Init Indirect Registers completed successfully.\n");
  869. } else {
  870. printk(KERN_NOTICE " !!!!! Init Indirect Registers UNSUCCESSFULLY.\n");
  871. return -1;
  872. }
  873. return 0;
  874. }
  875. static inline void wctdm_proslic_recheck_sanity(struct wctdm *wc, int card)
  876. {
  877. int res;
  878. /* Check loopback */
  879. res = wc->reg1shadow[card];
  880. if (!res && (res != wc->mod[card].fxs.lasttxhook)) // read real state from register By wx
  881. res=wctdm_getreg(wc, card, 64);
  882. if (!res && (res != wc->mod[card].fxs.lasttxhook)) {
  883. res = wctdm_getreg(wc, card, 8);
  884. if (res) {
  885. printk(KERN_NOTICE "Ouch, part reset, quickly restoring reality (%d)\n", card);
  886. wctdm_init_proslic(wc, card, 1, 0, 1);
  887. } else {
  888. if (wc->mod[card].fxs.palarms++ < MAX_ALARMS) {
  889. printk(KERN_NOTICE "Power alarm on module %d, resetting!\n", card + 1);
  890. if (wc->mod[card].fxs.lasttxhook == 4)
  891. wc->mod[card].fxs.lasttxhook = 1;
  892. wctdm_setreg(wc, card, 64, wc->mod[card].fxs.lasttxhook);
  893. } else {
  894. if (wc->mod[card].fxs.palarms == MAX_ALARMS)
  895. printk(KERN_NOTICE "Too many power alarms on card %d, NOT resetting!\n", card + 1);
  896. }
  897. }
  898. }
  899. }
  900. static inline void wctdm_voicedaa_check_hook(struct wctdm *wc, int card)
  901. {
  902. #define MS_PER_CHECK_HOOK 16
  903. #ifndef AUDIO_RINGCHECK
  904. unsigned char res;
  905. #endif
  906. signed char b;
  907. int errors = 0;
  908. struct fxo *fxo = &wc->mod[card].fxo;
  909. /* Try to track issues that plague slot one FXO's */
  910. b = wc->reg0shadow[card];
  911. if ((b & 0x2) || !(b & 0x8)) {
  912. /* Not good -- don't look at anything else */
  913. if (debug)
  914. printk(KERN_DEBUG "Error (%02x) on card %d!\n", b, card + 1);
  915. errors++;
  916. }
  917. b &= 0x9b;
  918. if (fxo->offhook) {
  919. if (b != 0x9)
  920. wctdm_setreg(wc, card, 5, 0x9);
  921. } else {
  922. if (b != 0x8)
  923. wctdm_setreg(wc, card, 5, 0x8);
  924. }
  925. if (errors)
  926. return;
  927. if (!fxo->offhook) {
  928. if(fixedtimepolarity) {
  929. if ( wc->cid_state[card] == CID_STATE_RING_ON && wc->cid_ring_on_time[card]>0)
  930. {
  931. if(wc->cid_ring_on_time[card]>=fixedtimepolarity )
  932. {
  933. dahdi_qevent_lock(wc->chans[card], DAHDI_EVENT_POLARITY);
  934. wc->cid_ring_on_time[card] = -1; /* the polarity already sent */
  935. }
  936. else
  937. wc->cid_ring_on_time[card] += 16;
  938. }
  939. }
  940. if (fwringdetect) {
  941. res = wc->reg0shadow[card] & 0x60;
  942. if (fxo->ringdebounce) {
  943. --fxo->ringdebounce;
  944. if (res && (res != fxo->lastrdtx) &&
  945. (fxo->battery == BATTERY_PRESENT)) {
  946. if (!fxo->wasringing) {
  947. fxo->wasringing = 1;
  948. if (debug)
  949. printk(KERN_DEBUG "RING on %d/%d!\n", wc->span.spanno, card + 1);
  950. if(cidbeforering)
  951. {
  952. if(wc->cid_state[card] == CID_STATE_IDLE)
  953. {
  954. wc->cid_state[card] = CID_STATE_RING_ON;
  955. wc->cid_ring_on_time[card] = 16; /* check every 16ms */
  956. }
  957. else
  958. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_RING);
  959. }
  960. else
  961. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_RING);
  962. }
  963. fxo->lastrdtx = res;
  964. fxo->ringdebounce = 10;
  965. } else if (!res) {
  966. if ((fxo->ringdebounce == 0) && fxo->wasringing) {
  967. fxo->wasringing = 0;
  968. if (debug)
  969. printk(KERN_DEBUG "NO RING on %d/%d!\n", wc->span.spanno, card + 1);
  970. if(cidbeforering)
  971. {
  972. if(wc->cid_state[card] == CID_STATE_RING_ON)
  973. {
  974. if(fixedtimepolarity==0)
  975. dahdi_qevent_lock(wc->chans[card], DAHDI_EVENT_POLARITY);
  976. wc->cid_state[card] = CID_STATE_RING_OFF;
  977. }
  978. else
  979. {
  980. if(wc->cid_state[card] == CID_STATE_WAIT_RING_FINISH)
  981. wc->cid_history_clone_cnt[card] = cidtimeout;
  982. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  983. }
  984. }
  985. else
  986. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  987. }
  988. }
  989. } else if (res && (fxo->battery == BATTERY_PRESENT)) {
  990. fxo->lastrdtx = res;
  991. fxo->ringdebounce = 10;
  992. }
  993. } else {
  994. res = wc->reg0shadow[card];
  995. if ((res & 0x60) && (fxo->battery == BATTERY_PRESENT)) {
  996. fxo->ringdebounce += (DAHDI_CHUNKSIZE * 16);
  997. if (fxo->ringdebounce >= DAHDI_CHUNKSIZE * ringdebounce) {
  998. if (!fxo->wasringing) {
  999. fxo->wasringing = 1;
  1000. if(cidbeforering)
  1001. {
  1002. if(wc->cid_state[card] == CID_STATE_IDLE)
  1003. {
  1004. wc->cid_state[card] = CID_STATE_RING_ON;
  1005. wc->cid_ring_on_time[card] = 16; /* check every 16ms */
  1006. }
  1007. else
  1008. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_RING);
  1009. }
  1010. else
  1011. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_RING);
  1012. if (debug)
  1013. printk(KERN_DEBUG "RING on %d/%d!\n", wc->span.spanno, card + 1);
  1014. }
  1015. fxo->ringdebounce = DAHDI_CHUNKSIZE * ringdebounce;
  1016. }
  1017. } else {
  1018. fxo->ringdebounce -= DAHDI_CHUNKSIZE * 4;
  1019. if (fxo->ringdebounce <= 0) {
  1020. if (fxo->wasringing) {
  1021. fxo->wasringing = 0;
  1022. if(cidbeforering)
  1023. {
  1024. if(wc->cid_state[card] == CID_STATE_RING_ON)
  1025. {
  1026. if(fixedtimepolarity==0)
  1027. dahdi_qevent_lock(wc->chans[card], DAHDI_EVENT_POLARITY);
  1028. wc->cid_state[card] = CID_STATE_RING_OFF;
  1029. }
  1030. else
  1031. {
  1032. if(wc->cid_state[card] == CID_STATE_WAIT_RING_FINISH)
  1033. wc->cid_history_clone_cnt[card] = cidtimeout;
  1034. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  1035. }
  1036. }
  1037. else
  1038. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  1039. if (debug)
  1040. printk(KERN_DEBUG "NO RING on %d/%d!\n", wc->span.spanno, card + 1);
  1041. }
  1042. fxo->ringdebounce = 0;
  1043. }
  1044. }
  1045. }
  1046. }
  1047. b = wc->reg1shadow[card];
  1048. if (abs(b) < battthresh) {
  1049. /* possible existing states:
  1050. battery lost, no debounce timer
  1051. battery lost, debounce timer (going to battery present)
  1052. battery present or unknown, no debounce timer
  1053. battery present or unknown, debounce timer (going to battery lost)
  1054. */
  1055. if (fxo->battery == BATTERY_LOST) {
  1056. if (fxo->battdebounce) {
  1057. /* we were going to BATTERY_PRESENT, but battery was lost again,
  1058. so clear the debounce timer */
  1059. fxo->battdebounce = 0;
  1060. }
  1061. } else {
  1062. if (fxo->battdebounce) {
  1063. /* going to BATTERY_LOST, see if we are there yet */
  1064. if (--fxo->battdebounce == 0) {
  1065. fxo->battery = BATTERY_LOST;
  1066. if (debug)
  1067. printk(KERN_DEBUG "NO BATTERY on %d/%d!\n", wc->span.spanno, card + 1);
  1068. #ifdef JAPAN
  1069. if (!wc->ohdebounce && wc->offhook) {
  1070. dahdi_hooksig(&wc->chans[card], DAHDI_RXSIG_ONHOOK);
  1071. if (debug)
  1072. printk(KERN_DEBUG "Signalled On Hook\n");
  1073. #ifdef ZERO_BATT_RING
  1074. wc->onhook++;
  1075. #endif
  1076. }
  1077. #else
  1078. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_ONHOOK);
  1079. /* set the alarm timer, taking into account that part of its time
  1080. period has already passed while debouncing occurred */
  1081. fxo->battalarm = (battalarm - battdebounce) / MS_PER_CHECK_HOOK;
  1082. #endif
  1083. }
  1084. } else {
  1085. /* start the debounce timer to verify that battery has been lost */
  1086. fxo->battdebounce = battdebounce / MS_PER_CHECK_HOOK;
  1087. }
  1088. }
  1089. } else {
  1090. /* possible existing states:
  1091. battery lost or unknown, no debounce timer
  1092. battery lost or unknown, debounce timer (going to battery present)
  1093. battery present, no debounce timer
  1094. battery present, debounce timer (going to battery lost)
  1095. */
  1096. if (fxo->battery == BATTERY_PRESENT) {
  1097. if (fxo->battdebounce) {
  1098. /* we were going to BATTERY_LOST, but battery appeared again,
  1099. so clear the debounce timer */
  1100. fxo->battdebounce = 0;
  1101. }
  1102. } else {
  1103. if (fxo->battdebounce) {
  1104. /* going to BATTERY_PRESENT, see if we are there yet */
  1105. if (--fxo->battdebounce == 0) {
  1106. fxo->battery = BATTERY_PRESENT;
  1107. if (debug)
  1108. printk(KERN_DEBUG "BATTERY on %d/%d (%s)!\n", wc->span.spanno, card + 1,
  1109. (b < 0) ? "-" : "+");
  1110. #ifdef ZERO_BATT_RING
  1111. if (wc->onhook) {
  1112. wc->onhook = 0;
  1113. dahdi_hooksig(&wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  1114. if (debug)
  1115. printk(KERN_DEBUG "Signalled Off Hook\n");
  1116. }
  1117. #else
  1118. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  1119. #endif
  1120. /* set the alarm timer, taking into account that part of its time
  1121. period has already passed while debouncing occurred */
  1122. fxo->battalarm = (battalarm - battdebounce) / MS_PER_CHECK_HOOK;
  1123. }
  1124. } else {
  1125. /* start the debounce timer to verify that battery has appeared */
  1126. fxo->battdebounce = battdebounce / MS_PER_CHECK_HOOK;
  1127. }
  1128. }
  1129. }
  1130. if (fxo->lastpol >= 0) {
  1131. if (b < 0) {
  1132. fxo->lastpol = -1;
  1133. fxo->polaritydebounce = POLARITY_DEBOUNCE / MS_PER_CHECK_HOOK;
  1134. }
  1135. }
  1136. if (fxo->lastpol <= 0) {
  1137. if (b > 0) {
  1138. fxo->lastpol = 1;
  1139. fxo->polaritydebounce = POLARITY_DEBOUNCE / MS_PER_CHECK_HOOK;
  1140. }
  1141. }
  1142. if (fxo->battalarm) {
  1143. if (--fxo->battalarm == 0) {
  1144. /* the alarm timer has expired, so update the battery alarm state
  1145. for this channel */
  1146. dahdi_alarm_channel(wc->chans[card], fxo->battery == BATTERY_LOST ? DAHDI_ALARM_RED : DAHDI_ALARM_NONE);
  1147. }
  1148. }
  1149. if (fxo->polaritydebounce) {
  1150. if (--fxo->polaritydebounce == 0) {
  1151. if (fxo->lastpol != fxo->polarity) {
  1152. if (debug)
  1153. printk(KERN_DEBUG "%lu Polarity reversed (%d -> %d)\n", jiffies,
  1154. fxo->polarity,
  1155. fxo->lastpol);
  1156. if (fxo->polarity)
  1157. dahdi_qevent_lock(wc->chans[card], DAHDI_EVENT_POLARITY);
  1158. fxo->polarity = fxo->lastpol;
  1159. }
  1160. }
  1161. }
  1162. #undef MS_PER_CHECK_HOOK
  1163. }
  1164. static inline void wctdm_proslic_check_hook(struct wctdm *wc, int card)
  1165. {
  1166. char res;
  1167. int hook;
  1168. /* For some reason we have to debounce the
  1169. hook detector. */
  1170. res = wc->reg0shadow[card];
  1171. hook = (res & 1);
  1172. if (hook != wc->mod[card].fxs.lastrxhook) {
  1173. /* Reset the debounce (must be multiple of 4ms) */
  1174. wc->mod[card].fxs.debounce = dialdebounce * 4;
  1175. #if 0
  1176. printk(KERN_DEBUG "Resetting debounce card %d hook %d, %d\n", card, hook, wc->mod[card].fxs.debounce);
  1177. #endif
  1178. } else {
  1179. if (wc->mod[card].fxs.debounce > 0) {
  1180. wc->mod[card].fxs.debounce-= 16 * DAHDI_CHUNKSIZE;
  1181. #if 0
  1182. printk(KERN_DEBUG "Sustaining hook %d, %d\n", hook, wc->mod[card].fxs.debounce);
  1183. #endif
  1184. if (!wc->mod[card].fxs.debounce) {
  1185. #if 0
  1186. printk(KERN_DEBUG "Counted down debounce, newhook: %d...\n", hook);
  1187. #endif
  1188. wc->mod[card].fxs.debouncehook = hook;
  1189. }
  1190. if (!wc->mod[card].fxs.oldrxhook && wc->mod[card].fxs.debouncehook) {
  1191. /* Off hook */
  1192. #if 1
  1193. if (debug)
  1194. #endif
  1195. printk(KERN_DEBUG "opvxa1200: Card %d Going off hook\n", card);
  1196. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_OFFHOOK);
  1197. if (robust)
  1198. wctdm_init_proslic(wc, card, 1, 0, 1);
  1199. wc->mod[card].fxs.oldrxhook = 1;
  1200. } else if (wc->mod[card].fxs.oldrxhook && !wc->mod[card].fxs.debouncehook) {
  1201. /* On hook */
  1202. #if 1
  1203. if (debug)
  1204. #endif
  1205. printk(KERN_DEBUG "opvxa1200: Card %d Going on hook\n", card);
  1206. dahdi_hooksig(wc->chans[card], DAHDI_RXSIG_ONHOOK);
  1207. wc->mod[card].fxs.oldrxhook = 0;
  1208. }
  1209. }
  1210. }
  1211. wc->mod[card].fxs.lastrxhook = hook;
  1212. }
  1213. DAHDI_IRQ_HANDLER(wctdm_interrupt)
  1214. {
  1215. struct wctdm *wc = dev_id;
  1216. unsigned char ints;
  1217. int x, y, z;
  1218. int mode;
  1219. ints = inb(wc->ioaddr + WC_INTSTAT);
  1220. if (!ints)
  1221. return IRQ_NONE;
  1222. outb(ints, wc->ioaddr + WC_INTSTAT);
  1223. if (ints & 0x10) {
  1224. /* Stop DMA, wait for watchdog */
  1225. printk(KERN_INFO "TDM PCI Master abort\n");
  1226. wctdm_stop_dma(wc);
  1227. return IRQ_RETVAL(1);
  1228. }
  1229. if (ints & 0x20) {
  1230. printk(KERN_INFO "PCI Target abort\n");
  1231. return IRQ_RETVAL(1);
  1232. }
  1233. for (x=0;x<wc->max_cards/*4*3*/;x++) {
  1234. if (wc->cardflag & (1 << x) &&
  1235. (wc->modtype[x] == MOD_TYPE_FXS)) {
  1236. if (wc->mod[x].fxs.lasttxhook == 0x4) {
  1237. /* RINGing, prepare for OHT */
  1238. wc->mod[x].fxs.ohttimer = OHT_TIMER << 3;
  1239. if (reversepolarity)
  1240. wc->mod[x].fxs.idletxhookstate = 0x6; /* OHT mode when idle */
  1241. else
  1242. wc->mod[x].fxs.idletxhookstate = 0x2;
  1243. } else {
  1244. if (wc->mod[x].fxs.ohttimer) {
  1245. wc->mod[x].fxs.ohttimer-= DAHDI_CHUNKSIZE;
  1246. if (!wc->mod[x].fxs.ohttimer) {
  1247. if (reversepolarity)
  1248. wc->mod[x].fxs.idletxhookstate = 0x5; /* Switch to active */
  1249. else
  1250. wc->mod[x].fxs.idletxhookstate = 0x1;
  1251. if ((wc->mod[x].fxs.lasttxhook == 0x2) || (wc->mod[x].fxs.lasttxhook == 0x6)) {
  1252. /* Apply the change if appropriate */
  1253. if (reversepolarity)
  1254. wc->mod[x].fxs.lasttxhook = 0x5;
  1255. else
  1256. wc->mod[x].fxs.lasttxhook = 0x1;
  1257. wctdm_setreg(wc, x, 64, wc->mod[x].fxs.lasttxhook);
  1258. }
  1259. }
  1260. }
  1261. }
  1262. }
  1263. }
  1264. if (ints & 0x0f) {
  1265. wc->intcount++;
  1266. z = wc->intcount & 0x3;
  1267. mode = wc->intcount & 0xc;
  1268. for(y=0; y<wc->max_cards/4/*3*/; y++)
  1269. {
  1270. x = z + y*4;
  1271. if (wc->cardflag & (1 << x ) )
  1272. {
  1273. switch(mode)
  1274. {
  1275. case 0:
  1276. /* Rest */
  1277. break;
  1278. case 4:
  1279. /* Read first shadow reg */
  1280. if (wc->modtype[x] == MOD_TYPE_FXS)
  1281. wc->reg0shadow[x] = wctdm_getreg(wc, x, 68);
  1282. else if (wc->modtype[x] == MOD_TYPE_FXO)
  1283. wc->reg0shadow[x] = wctdm_getreg(wc, x, 5);
  1284. break;
  1285. case 8:
  1286. /* Read second shadow reg */
  1287. if (wc->modtype[x] == MOD_TYPE_FXS)
  1288. wc->reg1shadow[x] = wctdm_getreg(wc, x, 64);
  1289. else if (wc->modtype[x] == MOD_TYPE_FXO)
  1290. wc->reg1shadow[x] = wctdm_getreg(wc, x, 29);
  1291. break;
  1292. case 12:
  1293. /* Perform processing */
  1294. if (wc->modtype[x] == MOD_TYPE_FXS) {
  1295. wctdm_proslic_check_hook(wc, x);
  1296. if (!(wc->intcount & 0xf0))
  1297. wctdm_proslic_recheck_sanity(wc, x);
  1298. } else if (wc->modtype[x] == MOD_TYPE_FXO) {
  1299. wctdm_voicedaa_check_hook(wc, x);
  1300. }
  1301. break;
  1302. }
  1303. }
  1304. }
  1305. if (!(wc->intcount % 10000)) {
  1306. /* Accept an alarm once per 10 seconds */
  1307. for (x=0;x<wc->max_cards/*4*3*/;x++)
  1308. if (wc->modtype[x] == MOD_TYPE_FXS) {
  1309. if (wc->mod[x].fxs.palarms)
  1310. wc->mod[x].fxs.palarms--;
  1311. }
  1312. }
  1313. wctdm_receiveprep(wc, ints);
  1314. wctdm_transmitprep(wc, ints);
  1315. }
  1316. return IRQ_RETVAL(1);
  1317. }
  1318. static int wctdm_voicedaa_insane(struct wctdm *wc, int card)
  1319. {
  1320. int blah;
  1321. blah = wctdm_getreg(wc, card, 2);
  1322. if (blah != 0x3)
  1323. return -2;
  1324. blah = wctdm_getreg(wc, card, 11);
  1325. if (debug)
  1326. printk(KERN_DEBUG "VoiceDAA System: %02x\n", blah & 0xf);
  1327. return 0;
  1328. }
  1329. static int wctdm_proslic_insane(struct wctdm *wc, int card)
  1330. {
  1331. int blah,insane_report;
  1332. insane_report=0;
  1333. blah = wctdm_getreg(wc, card, 0);
  1334. if (debug)
  1335. printk(KERN_DEBUG "ProSLIC on module %d, product %d, version %d\n", card, (blah & 0x30) >> 4, (blah & 0xf));
  1336. #if 0
  1337. if ((blah & 0x30) >> 4) {
  1338. printk(KERN_DEBUG "ProSLIC on module %d is not a 3210.\n", card);
  1339. return -1;
  1340. }
  1341. #endif
  1342. if (((blah & 0xf) == 0) || ((blah & 0xf) == 0xf)) {
  1343. /* SLIC not loaded */
  1344. return -1;
  1345. }
  1346. if ((blah & 0xf) < 2) {
  1347. printk(KERN_NOTICE "ProSLIC 3210 version %d is too old\n", blah & 0xf);
  1348. return -1;
  1349. }
  1350. if (wctdm_getreg(wc, card, 1) & 0x80)
  1351. /* ProSLIC 3215, not a 3210 */
  1352. wc->flags[card] |= FLAG_3215;
  1353. blah = wctdm_getreg(wc, card, 8);
  1354. if (blah != 0x2) {
  1355. printk(KERN_NOTICE "ProSLIC on module %d insane (1) %d should be 2\n", card, blah);
  1356. return -1;
  1357. } else if ( insane_report)
  1358. printk(KERN_NOTICE "ProSLIC on module %d Reg 8 Reads %d Expected is 0x2\n",card,blah);
  1359. blah = wctdm_getreg(wc, card, 64);
  1360. if (blah != 0x0) {
  1361. printk(KERN_NOTICE "ProSLIC on module %d insane (2)\n", card);
  1362. return -1;
  1363. } else if ( insane_report)
  1364. printk(KERN_NOTICE "ProSLIC on module %d Reg 64 Reads %d Expected is 0x0\n",card,blah);
  1365. blah = wctdm_getreg(wc, card, 11);
  1366. if (blah != 0x33) {
  1367. printk(KERN_NOTICE "ProSLIC on module %d insane (3)\n", card);
  1368. return -1;
  1369. } else if ( insane_report)
  1370. printk(KERN_NOTICE "ProSLIC on module %d Reg 11 Reads %d Expected is 0x33\n",card,blah);
  1371. /* Just be sure it's setup right. */
  1372. wctdm_setreg(wc, card, 30, 0);
  1373. if (debug)
  1374. printk(KERN_DEBUG "ProSLIC on module %d seems sane.\n", card);
  1375. return 0;
  1376. }
  1377. static int wctdm_proslic_powerleak_test(struct wctdm *wc, int card)
  1378. {
  1379. unsigned long origjiffies;
  1380. unsigned char vbat;
  1381. /* Turn off linefeed */
  1382. wctdm_setreg(wc, card, 64, 0);
  1383. /* Power down */
  1384. wctdm_setreg(wc, card, 14, 0x10);
  1385. /* Wait for one second */
  1386. origjiffies = jiffies;
  1387. while((vbat = wctdm_getreg(wc, card, 82)) > 0x6) {
  1388. if ((jiffies - origjiffies) >= (HZ/2))
  1389. break;
  1390. }
  1391. if (vbat < 0x06) {
  1392. printk(KERN_NOTICE "Excessive leakage detected on module %d: %d volts (%02x) after %d ms\n", card,
  1393. 376 * vbat / 1000, vbat, (int)((jiffies - origjiffies) * 1000 / HZ));
  1394. return -1;
  1395. } else if (debug) {
  1396. printk(KERN_NOTICE "Post-leakage voltage: %d volts\n", 376 * vbat / 1000);
  1397. }
  1398. return 0;
  1399. }
  1400. static int wctdm_powerup_proslic(struct wctdm *wc, int card, int fast)
  1401. {
  1402. unsigned char vbat;
  1403. unsigned long origjiffies;
  1404. int lim;
  1405. /* Set period of DC-DC converter to 1/64 khz */
  1406. wctdm_setreg(wc, card, 92, 0xff /* was 0xff */);
  1407. /* Wait for VBat to powerup */
  1408. origjiffies = jiffies;
  1409. /* Disable powerdown */
  1410. wctdm_setreg(wc, card, 14, 0);
  1411. /* If fast, don't bother checking anymore */
  1412. if (fast)
  1413. return 0;
  1414. while((vbat = wctdm_getreg(wc, card, 82)) < 0xc0) {
  1415. /* Wait no more than 500ms */
  1416. if ((jiffies - origjiffies) > HZ/2) {
  1417. break;
  1418. }
  1419. }
  1420. if (vbat < 0xc0) {
  1421. if (wc->proslic_power == PROSLIC_POWER_UNKNOWN)
  1422. printk(KERN_NOTICE "ProSLIC on module %d failed to powerup within %d ms (%d mV only)\n\n -- DID YOU REMEMBER TO PLUG IN THE HD POWER CABLE TO THE A1200P??\n",
  1423. card, (int)(((jiffies - origjiffies) * 1000 / HZ)),
  1424. vbat * 375);
  1425. wc->proslic_power = PROSLIC_POWER_WARNED;
  1426. return -1;
  1427. } else if (debug) {
  1428. printk(KERN_DEBUG "ProSLIC on module %d powered up to -%d volts (%02x) in %d ms\n",
  1429. card, vbat * 376 / 1000, vbat, (int)(((jiffies - origjiffies) * 1000 / HZ)));
  1430. }
  1431. wc->proslic_power = PROSLIC_POWER_ON;
  1432. /* Proslic max allowed loop current, reg 71 LOOP_I_LIMIT */
  1433. /* If out of range, just set it to the default value */
  1434. lim = (loopcurrent - 20) / 3;
  1435. if ( loopcurrent > 41 ) {
  1436. lim = 0;
  1437. if (debug)
  1438. printk(KERN_DEBUG "Loop current out of range! Setting to default 20mA!\n");
  1439. }
  1440. else if (debug)
  1441. printk(KERN_DEBUG "Loop current set to %dmA!\n",(lim*3)+20);
  1442. wctdm_setreg(wc,card,LOOP_I_LIMIT,lim);
  1443. /* Engage DC-DC converter */
  1444. wctdm_setreg(wc, card, 93, 0x19 /* was 0x19 */);
  1445. #if 0
  1446. origjiffies = jiffies;
  1447. while(0x80 & wctdm_getreg(wc, card, 93)) {
  1448. if ((jiffies - origjiffies) > 2 * HZ) {
  1449. printk(KERN_DEBUG "Timeout waiting for DC-DC calibration on module %d\n", card);
  1450. return -1;
  1451. }
  1452. }
  1453. #if 0
  1454. /* Wait a full two seconds */
  1455. while((jiffies - origjiffies) < 2 * HZ);
  1456. /* Just check to be sure */
  1457. vbat = wctdm_getreg(wc, card, 82);
  1458. printk(KERN_DEBUG "ProSLIC on module %d powered up to -%d volts (%02x) in %d ms\n",
  1459. card, vbat * 376 / 1000, vbat, (int)(((jiffies - origjiffies) * 1000 / HZ)));
  1460. #endif
  1461. #endif
  1462. return 0;
  1463. }
  1464. static int wctdm_proslic_manual_calibrate(struct wctdm *wc, int card){
  1465. unsigned long origjiffies;
  1466. unsigned char i;
  1467. wctdm_setreg(wc, card, 21, 0);//(0) Disable all interupts in DR21
  1468. wctdm_setreg(wc, card, 22, 0);//(0)Disable all interupts in DR21
  1469. wctdm_setreg(wc, card, 23, 0);//(0)Disable all interupts in DR21
  1470. wctdm_setreg(wc, card, 64, 0);//(0)
  1471. wctdm_setreg(wc, card, 97, 0x18); //(0x18)Calibrations without the ADC and DAC offset and without common mode calibration.
  1472. wctdm_setreg(wc, card, 96, 0x47); //(0x47) Calibrate common mode and differential DAC mode DAC + ILIM
  1473. origjiffies=jiffies;
  1474. while( wctdm_getreg(wc,card,96)!=0 ){
  1475. if((jiffies-origjiffies)>80)
  1476. return -1;
  1477. }
  1478. //Initialized DR 98 and 99 to get consistant results.
  1479. // 98 and 99 are the results registers and the search should have same intial conditions.
  1480. /*******************************The following is the manual gain mismatch calibration****************************/
  1481. /*******************************This is also available as a function *******************************************/
  1482. // Delay 10ms
  1483. origjiffies=jiffies;
  1484. while((jiffies-origjiffies)<1);
  1485. wctdm_proslic_setreg_indirect(wc, card, 88,0);
  1486. wctdm_proslic_setreg_indirect(wc,card,89,0);
  1487. wctdm_proslic_setreg_indirect(wc,card,90,0);
  1488. wctdm_proslic_setreg_indirect(wc,card,91,0);
  1489. wctdm_proslic_setreg_indirect(wc,card,92,0);
  1490. wctdm_proslic_setreg_indirect(wc,card,93,0);
  1491. wctdm_setreg(wc, card, 98,0x10); // This is necessary if the calibration occurs other than at reset time
  1492. wctdm_setreg(wc, card, 99,0x10);
  1493. for ( i=0x1f; i>0; i--)
  1494. {
  1495. wctdm_setreg(wc, card, 98,i);
  1496. origjiffies=jiffies;
  1497. while((jiffies-origjiffies)<4);
  1498. if((wctdm_getreg(wc,card,88)) == 0)
  1499. break;
  1500. } // for
  1501. for ( i=0x1f; i>0; i--)
  1502. {
  1503. wctdm_setreg(wc, card, 99,i);
  1504. origjiffies=jiffies;
  1505. while((jiffies-origjiffies)<4);
  1506. if((wctdm_getreg(wc,card,89)) == 0)
  1507. break;
  1508. }//for
  1509. /*******************************The preceding is the manual gain mismatch calibration****************************/
  1510. /**********************************The following is the longitudinal Balance Cal***********************************/
  1511. wctdm_setreg(wc,card,64,1);
  1512. while((jiffies-origjiffies)<10); // Sleep 100?
  1513. wctdm_setreg(wc, card, 64, 0);
  1514. wctdm_setreg(wc, card, 23, 0x4); // enable interrupt for the balance Cal
  1515. wctdm_setreg(wc, card, 97, 0x1); // this is a singular calibration bit for longitudinal calibration
  1516. wctdm_setreg(wc, card, 96,0x40);
  1517. wctdm_getreg(wc,card,96); /* Read Reg 96 just cause */
  1518. wctdm_setreg(wc, card, 21, 0xFF);
  1519. wctdm_setreg(wc, card, 22, 0xFF);
  1520. wctdm_setreg(wc, card, 23, 0xFF);
  1521. /**The preceding is the longitudinal Balance Cal***/
  1522. return(0);
  1523. }
  1524. #if 1
  1525. static int wctdm_proslic_calibrate(struct wctdm *wc, int card)
  1526. {
  1527. unsigned long origjiffies;
  1528. int x;
  1529. /* Perform all calibrations */
  1530. wctdm_setreg(wc, card, 97, 0x1f);
  1531. /* Begin, no speedup */
  1532. wctdm_setreg(wc, card, 96, 0x5f);
  1533. /* Wait for it to finish */
  1534. origjiffies = jiffies;
  1535. while(wctdm_getreg(wc, card, 96)) {
  1536. if ((jiffies - origjiffies) > 2 * HZ) {
  1537. printk(KERN_NOTICE "Timeout waiting for calibration of module %d\n", card);
  1538. return -1;
  1539. }
  1540. }
  1541. if (debug) {
  1542. /* Print calibration parameters */
  1543. printk(KERN_DEBUG "Calibration Vector Regs 98 - 107: \n");
  1544. for (x=98;x<108;x++) {
  1545. printk(KERN_DEBUG "%d: %02x\n", x, wctdm_getreg(wc, card, x));
  1546. }
  1547. }
  1548. return 0;
  1549. }
  1550. #endif
  1551. static void wait_just_a_bit(int foo)
  1552. {
  1553. long newjiffies;
  1554. newjiffies = jiffies + foo;
  1555. while(jiffies < newjiffies);
  1556. }
  1557. /*********************************************************************
  1558. * Set the hwgain on the analog modules
  1559. *
  1560. * card = the card position for this module (0-23)
  1561. * gain = gain in dB x10 (e.g. -3.5dB would be gain=-35)
  1562. * tx = (0 for rx; 1 for tx)
  1563. *
  1564. *******************************************************************/
  1565. static int wctdm_set_hwgain(struct wctdm *wc, int card, __s32 gain, __u32 tx)
  1566. {
  1567. if (!(wc->modtype[card] == MOD_TYPE_FXO)) {
  1568. printk(KERN_NOTICE "Cannot adjust gain. Unsupported module type!\n");
  1569. return -1;
  1570. }
  1571. if (tx) {
  1572. if (debug)
  1573. printk(KERN_DEBUG "setting FXO tx gain for card=%d to %d\n", card, gain);
  1574. if (gain >= -150 && gain <= 0) {
  1575. wctdm_setreg(wc, card, 38, 16 + (gain/-10));
  1576. wctdm_setreg(wc, card, 40, 16 + (-gain%10));
  1577. } else if (gain <= 120 && gain > 0) {
  1578. wctdm_setreg(wc, card, 38, gain/10);
  1579. wctdm_setreg(wc, card, 40, (gain%10));
  1580. } else {
  1581. printk(KERN_INFO "FXO tx gain is out of range (%d)\n", gain);
  1582. return -1;
  1583. }
  1584. } else { /* rx */
  1585. if (debug)
  1586. printk(KERN_DEBUG "setting FXO rx gain for card=%d to %d\n", card, gain);
  1587. if (gain >= -150 && gain <= 0) {
  1588. wctdm_setreg(wc, card, 39, 16+ (gain/-10));
  1589. wctdm_setreg(wc, card, 41, 16 + (-gain%10));
  1590. } else if (gain <= 120 && gain > 0) {
  1591. wctdm_setreg(wc, card, 39, gain/10);
  1592. wctdm_setreg(wc, card, 41, (gain%10));
  1593. } else {
  1594. printk(KERN_INFO "FXO rx gain is out of range (%d)\n", gain);
  1595. return -1;
  1596. }
  1597. }
  1598. return 0;
  1599. }
  1600. static int wctdm_init_voicedaa(struct wctdm *wc, int card, int fast, int manual, int sane)
  1601. {
  1602. unsigned char reg16=0, reg26=0, reg30=0, reg31=0;
  1603. long newjiffies;
  1604. wc->modtype[card] = MOD_TYPE_FXO;
  1605. /* Sanity check the ProSLIC */
  1606. reset_spi(wc, card);
  1607. if (!sane && wctdm_voicedaa_insane(wc, card))
  1608. return -2;
  1609. /* Software reset */
  1610. wctdm_setreg(wc, card, 1, 0x80);
  1611. /* Wait just a bit */
  1612. wait_just_a_bit(HZ/10);
  1613. /* Enable PCM, ulaw */
  1614. if (alawoverride)
  1615. wctdm_setreg(wc, card, 33, 0x20);
  1616. else
  1617. wctdm_setreg(wc, card, 33, 0x28);
  1618. /* Set On-hook speed, Ringer impedence, and ringer threshold */
  1619. reg16 |= (fxo_modes[_opermode].ohs << 6);
  1620. reg16 |= (fxo_modes[_opermode].rz << 1);
  1621. reg16 |= (fxo_modes[_opermode].rt);
  1622. wctdm_setreg(wc, card, 16, reg16);
  1623. if(fwringdetect) {
  1624. /* Enable ring detector full-wave rectifier mode */
  1625. wctdm_setreg(wc, card, 18, 2);
  1626. wctdm_setreg(wc, card, 24, 0);
  1627. } else {
  1628. /* Set to the device defaults */
  1629. wctdm_setreg(wc, card, 18, 0);
  1630. wctdm_setreg(wc, card, 24, 0x19);
  1631. }
  1632. /* Set DC Termination:
  1633. Tip/Ring voltage adjust, minimum operational current, current limitation */
  1634. reg26 |= (fxo_modes[_opermode].dcv << 6);
  1635. reg26 |= (fxo_modes[_opermode].mini << 4);
  1636. reg26 |= (fxo_modes[_opermode].ilim << 1);
  1637. wctdm_setreg(wc, card, 26, reg26);
  1638. /* Set AC Impedence */
  1639. reg30 = (fxofullscale==1) ? (fxo_modes[_opermode].acim|0x10) : (fxo_modes[_opermode].acim);
  1640. wctdm_setreg(wc, card, 30, reg30);
  1641. /* Misc. DAA parameters */
  1642. if (fastpickup)
  1643. reg31 = 0xb3;
  1644. else
  1645. reg31 = 0xa3;
  1646. reg31 |= (fxo_modes[_opermode].ohs2 << 3);
  1647. wctdm_setreg(wc, card, 31, reg31);
  1648. /* Set Transmit/Receive timeslot */
  1649. //printk("set card %d to %d\n", card, (3-(card%4)) * 8 + (card/4) * 64);
  1650. wctdm_setreg(wc, card, 34, (3-(card%4)) * 8 + (card/4) * 64);
  1651. wctdm_setreg(wc, card, 35, 0x00);
  1652. wctdm_setreg(wc, card, 36, (3-(card%4)) * 8 + (card/4) * 64);
  1653. wctdm_setreg(wc, card, 37, 0x00);
  1654. /* Enable ISO-Cap */
  1655. wctdm_setreg(wc, card, 6, 0x00);
  1656. if (fastpickup)
  1657. wctdm_setreg(wc, card, 17, wctdm_getreg(wc, card, 17) | 0x20);
  1658. /* Wait 1000ms for ISO-cap to come up */
  1659. newjiffies = jiffies;
  1660. newjiffies += 2 * HZ;
  1661. while((jiffies < newjiffies) && !(wctdm_getreg(wc, card, 11) & 0xf0))
  1662. wait_just_a_bit(HZ/10);
  1663. if (!(wctdm_getreg(wc, card, 11) & 0xf0)) {
  1664. printk(KERN_NOTICE "VoiceDAA did not bring up ISO link properly!\n");
  1665. return -1;
  1666. }
  1667. if (debug)
  1668. printk(KERN_DEBUG "ISO-Cap is now up, line side: %02x rev %02x\n",
  1669. wctdm_getreg(wc, card, 11) >> 4,
  1670. (wctdm_getreg(wc, card, 13) >> 2) & 0xf);
  1671. /* Enable on-hook line monitor */
  1672. wctdm_setreg(wc, card, 5, 0x08);
  1673. /* Take values for fxotxgain and fxorxgain and apply them to module */
  1674. wctdm_set_hwgain(wc, card, fxotxgain, 1);
  1675. wctdm_set_hwgain(wc, card, fxorxgain, 0);
  1676. /* NZ -- crank the tx gain up by 7 dB */
  1677. if (!strcmp(fxo_modes[_opermode].name, "NEWZEALAND")) {
  1678. printk(KERN_INFO "Adjusting gain\n");
  1679. wctdm_set_hwgain(wc, card, 7, 1);
  1680. }
  1681. if(debug)
  1682. printk(KERN_DEBUG "DEBUG fxotxgain:%i.%i fxorxgain:%i.%i\n", (wctdm_getreg(wc, card, 38)/16)?-(wctdm_getreg(wc, card, 38) - 16) : wctdm_getreg(wc, card, 38), (wctdm_getreg(wc, card, 40)/16)? -(wctdm_getreg(wc, card, 40) - 16):wctdm_getreg(wc, card, 40), (wctdm_getreg(wc, card, 39)/16)? -(wctdm_getreg(wc, card, 39) - 16) : wctdm_getreg(wc, card, 39),(wctdm_getreg(wc, card, 41)/16)?-(wctdm_getreg(wc, card, 41) - 16):wctdm_getreg(wc, card, 41));
  1683. return 0;
  1684. }
  1685. static int wctdm_init_proslic(struct wctdm *wc, int card, int fast, int manual, int sane)
  1686. {
  1687. unsigned short tmp[5];
  1688. unsigned char r19, r9;
  1689. int x;
  1690. int fxsmode=0;
  1691. /* Sanity check the ProSLIC */
  1692. if (!sane && wctdm_proslic_insane(wc, card))
  1693. return -2;
  1694. /* By default, don't send on hook */
  1695. if (reversepolarity)
  1696. wc->mod[card].fxs.idletxhookstate = 5;
  1697. else
  1698. wc->mod[card].fxs.idletxhookstate = 1;
  1699. if (sane) {
  1700. /* Make sure we turn off the DC->DC converter to prevent anything from blowing up */
  1701. wctdm_setreg(wc, card, 14, 0x10);
  1702. }
  1703. if (wctdm_proslic_init_indirect_regs(wc, card)) {
  1704. printk(KERN_INFO "Indirect Registers failed to initialize on module %d.\n", card);
  1705. return -1;
  1706. }
  1707. /* Clear scratch pad area */
  1708. wctdm_proslic_setreg_indirect(wc, card, 97,0);
  1709. /* Clear digital loopback */
  1710. wctdm_setreg(wc, card, 8, 0);
  1711. /* Revision C optimization */
  1712. wctdm_setreg(wc, card, 108, 0xeb);
  1713. /* Disable automatic VBat switching for safety to prevent
  1714. Q7 from accidently turning on and burning out. */
  1715. wctdm_setreg(wc, card, 67, 0x07); /* Note, if pulse dialing has problems at high REN loads
  1716. change this to 0x17 */
  1717. /* Turn off Q7 */
  1718. wctdm_setreg(wc, card, 66, 1);
  1719. /* Flush ProSLIC digital filters by setting to clear, while
  1720. saving old values */
  1721. for (x=0;x<5;x++) {
  1722. tmp[x] = wctdm_proslic_getreg_indirect(wc, card, x + 35);
  1723. wctdm_proslic_setreg_indirect(wc, card, x + 35, 0x8000);
  1724. }
  1725. /* Power up the DC-DC converter */
  1726. if (wctdm_powerup_proslic(wc, card, fast)) {
  1727. printk(KERN_NOTICE "Unable to do INITIAL ProSLIC powerup on module %d\n", card);
  1728. return -1;
  1729. }
  1730. if (!fast) {
  1731. /* Check for power leaks */
  1732. if (wctdm_proslic_powerleak_test(wc, card)) {
  1733. printk(KERN_NOTICE "ProSLIC module %d failed leakage test. Check for short circuit\n", card);
  1734. }
  1735. /* Power up again */
  1736. if (wctdm_powerup_proslic(wc, card, fast)) {
  1737. printk(KERN_NOTICE "Unable to do FINAL ProSLIC powerup on module %d\n", card);
  1738. return -1;
  1739. }
  1740. #ifndef NO_CALIBRATION
  1741. /* Perform calibration */
  1742. if(manual) {
  1743. if (wctdm_proslic_manual_calibrate(wc, card)) {
  1744. //printk(KERN_NOTICE "Proslic failed on Manual Calibration\n");
  1745. if (wctdm_proslic_manual_calibrate(wc, card)) {
  1746. printk(KERN_NOTICE "Proslic Failed on Second Attempt to Calibrate Manually. (Try -DNO_CALIBRATION in Makefile)\n");
  1747. return -1;
  1748. }
  1749. printk(KERN_NOTICE "Proslic Passed Manual Calibration on Second Attempt\n");
  1750. }
  1751. }
  1752. else {
  1753. if(wctdm_proslic_calibrate(wc, card)) {
  1754. //printk(KERN_NOTICE "ProSlic died on Auto Calibration.\n");
  1755. if (wctdm_proslic_calibrate(wc, card)) {
  1756. printk(KERN_NOTICE "Proslic Failed on Second Attempt to Auto Calibrate\n");
  1757. return -1;
  1758. }
  1759. printk(KERN_NOTICE "Proslic Passed Auto Calibration on Second Attempt\n");
  1760. }
  1761. }
  1762. /* Perform DC-DC calibration */
  1763. wctdm_setreg(wc, card, 93, 0x99);
  1764. r19 = wctdm_getreg(wc, card, 107);
  1765. if ((r19 < 0x2) || (r19 > 0xd)) {
  1766. printk(KERN_NOTICE "DC-DC cal has a surprising direct 107 of 0x%02x!\n", r19);
  1767. wctdm_setreg(wc, card, 107, 0x8);
  1768. }
  1769. /* Save calibration vectors */
  1770. for (x=0;x<NUM_CAL_REGS;x++)
  1771. wc->mod[card].fxs.calregs.vals[x] = wctdm_getreg(wc, card, 96 + x);
  1772. #endif
  1773. } else {
  1774. /* Restore calibration registers */
  1775. for (x=0;x<NUM_CAL_REGS;x++)
  1776. wctdm_setreg(wc, card, 96 + x, wc->mod[card].fxs.calregs.vals[x]);
  1777. }
  1778. /* Calibration complete, restore original values */
  1779. for (x=0;x<5;x++) {
  1780. wctdm_proslic_setreg_indirect(wc, card, x + 35, tmp[x]);
  1781. }
  1782. if (wctdm_proslic_verify_indirect_regs(wc, card)) {
  1783. printk(KERN_INFO "Indirect Registers failed verification.\n");
  1784. return -1;
  1785. }
  1786. #if 0
  1787. /* Disable Auto Power Alarm Detect and other "features" */
  1788. wctdm_setreg(wc, card, 67, 0x0e);
  1789. blah = wctdm_getreg(wc, card, 67);
  1790. #endif
  1791. #if 0
  1792. if (wctdm_proslic_setreg_indirect(wc, card, 97, 0x0)) { // Stanley: for the bad recording fix
  1793. printk(KERN_INFO "ProSlic IndirectReg Died.\n");
  1794. return -1;
  1795. }
  1796. #endif
  1797. if (alawoverride)
  1798. wctdm_setreg(wc, card, 1, 0x20);
  1799. else
  1800. wctdm_setreg(wc, card, 1, 0x28);
  1801. // U-Law 8-bit interface
  1802. wctdm_setreg(wc, card, 2, (3-(card%4)) * 8 + (card/4) * 64); // Tx Start count low byte 0
  1803. wctdm_setreg(wc, card, 3, 0); // Tx Start count high byte 0
  1804. wctdm_setreg(wc, card, 4, (3-(card%4)) * 8 + (card/4) * 64); // Rx Start count low byte 0
  1805. wctdm_setreg(wc, card, 5, 0); // Rx Start count high byte 0
  1806. wctdm_setreg(wc, card, 18, 0xff); // clear all interrupt
  1807. wctdm_setreg(wc, card, 19, 0xff);
  1808. wctdm_setreg(wc, card, 20, 0xff);
  1809. wctdm_setreg(wc, card, 73, 0x04);
  1810. if (fxshonormode) {
  1811. fxsmode = acim2tiss[fxo_modes[_opermode].acim];
  1812. wctdm_setreg(wc, card, 10, 0x08 | fxsmode);
  1813. if (fxo_modes[_opermode].ring_osc)
  1814. wctdm_proslic_setreg_indirect(wc, card, 20, fxo_modes[_opermode].ring_osc);
  1815. if (fxo_modes[_opermode].ring_x)
  1816. wctdm_proslic_setreg_indirect(wc, card, 21, fxo_modes[_opermode].ring_x);
  1817. }
  1818. if (lowpower)
  1819. wctdm_setreg(wc, card, 72, 0x10);
  1820. #if 0
  1821. wctdm_setreg(wc, card, 21, 0x00); // enable interrupt
  1822. wctdm_setreg(wc, card, 22, 0x02); // Loop detection interrupt
  1823. wctdm_setreg(wc, card, 23, 0x01); // DTMF detection interrupt
  1824. #endif
  1825. #if 0
  1826. /* Enable loopback */
  1827. wctdm_setreg(wc, card, 8, 0x2);
  1828. wctdm_setreg(wc, card, 14, 0x0);
  1829. wctdm_setreg(wc, card, 64, 0x0);
  1830. wctdm_setreg(wc, card, 1, 0x08);
  1831. #endif
  1832. if (fastringer) {
  1833. /* Speed up Ringer */
  1834. wctdm_proslic_setreg_indirect(wc, card, 20, 0x7e6d);
  1835. wctdm_proslic_setreg_indirect(wc, card, 21, 0x01b9);
  1836. /* Beef up Ringing voltage to 89V */
  1837. if (boostringer) {
  1838. wctdm_setreg(wc, card, 74, 0x3f);
  1839. if (wctdm_proslic_setreg_indirect(wc, card, 21, 0x247))
  1840. return -1;
  1841. printk(KERN_INFO "Boosting fast ringer on slot %d (89V peak)\n", card + 1);
  1842. } else if (lowpower) {
  1843. if (wctdm_proslic_setreg_indirect(wc, card, 21, 0x14b))
  1844. return -1;
  1845. printk(KERN_INFO "Reducing fast ring power on slot %d (50V peak)\n", card + 1);
  1846. } else
  1847. printk(KERN_INFO "Speeding up ringer on slot %d (25Hz)\n", card + 1);
  1848. } else {
  1849. /* Beef up Ringing voltage to 89V */
  1850. if (boostringer) {
  1851. wctdm_setreg(wc, card, 74, 0x3f);
  1852. if (wctdm_proslic_setreg_indirect(wc, card, 21, 0x1d1))
  1853. return -1;
  1854. printk(KERN_INFO "Boosting ringer on slot %d (89V peak)\n", card + 1);
  1855. } else if (lowpower) {
  1856. if (wctdm_proslic_setreg_indirect(wc, card, 21, 0x108))
  1857. return -1;
  1858. printk(KERN_INFO "Reducing ring power on slot %d (50V peak)\n", card + 1);
  1859. }
  1860. }
  1861. if(fxstxgain || fxsrxgain) {
  1862. r9 = wctdm_getreg(wc, card, 9);
  1863. switch (fxstxgain) {
  1864. case 35:
  1865. r9+=8;
  1866. break;
  1867. case -35:
  1868. r9+=4;
  1869. break;
  1870. case 0:
  1871. break;
  1872. }
  1873. switch (fxsrxgain) {
  1874. case 35:
  1875. r9+=2;
  1876. break;
  1877. case -35:
  1878. r9+=1;
  1879. break;
  1880. case 0:
  1881. break;
  1882. }
  1883. wctdm_setreg(wc,card,9,r9);
  1884. }
  1885. if(debug)
  1886. printk(KERN_DEBUG "DEBUG: fxstxgain:%s fxsrxgain:%s\n",((wctdm_getreg(wc, card, 9)/8) == 1)?"3.5":(((wctdm_getreg(wc,card,9)/4) == 1)?"-3.5":"0.0"),((wctdm_getreg(wc, card, 9)/2) == 1)?"3.5":((wctdm_getreg(wc,card,9)%2)?"-3.5":"0.0"));
  1887. wctdm_setreg(wc, card, 64, 0x01);
  1888. return 0;
  1889. }
  1890. static int wctdm_ioctl(struct dahdi_chan *chan, unsigned int cmd, unsigned long data)
  1891. {
  1892. struct wctdm_stats stats;
  1893. struct wctdm_regs regs;
  1894. struct wctdm_regop regop;
  1895. struct wctdm_echo_coefs echoregs;
  1896. struct dahdi_hwgain hwgain;
  1897. struct wctdm *wc = chan->pvt;
  1898. int x;
  1899. switch (cmd) {
  1900. case DAHDI_ONHOOKTRANSFER:
  1901. if (wc->modtype[chan->chanpos - 1] != MOD_TYPE_FXS)
  1902. return -EINVAL;
  1903. if (get_user(x, (__user int *)data))
  1904. return -EFAULT;
  1905. wc->mod[chan->chanpos - 1].fxs.ohttimer = x << 3;
  1906. if (reversepolarity)
  1907. wc->mod[chan->chanpos - 1].fxs.idletxhookstate = 0x6; /* OHT mode when idle */
  1908. else
  1909. wc->mod[chan->chanpos - 1].fxs.idletxhookstate = 0x2;
  1910. if (wc->mod[chan->chanpos - 1].fxs.lasttxhook == 0x1 || wc->mod[chan->chanpos - 1].fxs.lasttxhook == 0x5) {
  1911. /* Apply the change if appropriate */
  1912. if (reversepolarity)
  1913. wc->mod[chan->chanpos - 1].fxs.lasttxhook = 0x6;
  1914. else
  1915. wc->mod[chan->chanpos - 1].fxs.lasttxhook = 0x2;
  1916. wctdm_setreg(wc, chan->chanpos - 1, 64, wc->mod[chan->chanpos - 1].fxs.lasttxhook);
  1917. }
  1918. break;
  1919. case DAHDI_SETPOLARITY:
  1920. if (get_user(x, (__user int *)data))
  1921. return -EFAULT;
  1922. if (wc->modtype[chan->chanpos - 1] != MOD_TYPE_FXS)
  1923. return -EINVAL;
  1924. /* Can't change polarity while ringing or when open */
  1925. if ((wc->mod[chan->chanpos -1 ].fxs.lasttxhook == 0x04) ||
  1926. (wc->mod[chan->chanpos -1 ].fxs.lasttxhook == 0x00))
  1927. return -EINVAL;
  1928. if ((x && !reversepolarity) || (!x && reversepolarity))
  1929. wc->mod[chan->chanpos - 1].fxs.lasttxhook |= 0x04;
  1930. else
  1931. wc->mod[chan->chanpos - 1].fxs.lasttxhook &= ~0x04;
  1932. wctdm_setreg(wc, chan->chanpos - 1, 64, wc->mod[chan->chanpos - 1].fxs.lasttxhook);
  1933. break;
  1934. case WCTDM_GET_STATS:
  1935. if (wc->modtype[chan->chanpos - 1] == MOD_TYPE_FXS) {
  1936. stats.tipvolt = wctdm_getreg(wc, chan->chanpos - 1, 80) * -376;
  1937. stats.ringvolt = wctdm_getreg(wc, chan->chanpos - 1, 81) * -376;
  1938. stats.batvolt = wctdm_getreg(wc, chan->chanpos - 1, 82) * -376;
  1939. } else if (wc->modtype[chan->chanpos - 1] == MOD_TYPE_FXO) {
  1940. stats.tipvolt = (signed char)wctdm_getreg(wc, chan->chanpos - 1, 29) * 1000;
  1941. stats.ringvolt = (signed char)wctdm_getreg(wc, chan->chanpos - 1, 29) * 1000;
  1942. stats.batvolt = (signed char)wctdm_getreg(wc, chan->chanpos - 1, 29) * 1000;
  1943. } else
  1944. return -EINVAL;
  1945. if (copy_to_user((__user void *)data, &stats, sizeof(stats)))
  1946. return -EFAULT;
  1947. break;
  1948. case WCTDM_GET_REGS:
  1949. if (wc->modtype[chan->chanpos - 1] == MOD_TYPE_FXS) {
  1950. for (x=0;x<NUM_INDIRECT_REGS;x++)
  1951. regs.indirect[x] = wctdm_proslic_getreg_indirect(wc, chan->chanpos -1, x);
  1952. for (x=0;x<NUM_REGS;x++)
  1953. regs.direct[x] = wctdm_getreg(wc, chan->chanpos - 1, x);
  1954. } else {
  1955. memset(&regs, 0, sizeof(regs));
  1956. for (x=0;x<NUM_FXO_REGS;x++)
  1957. regs.direct[x] = wctdm_getreg(wc, chan->chanpos - 1, x);
  1958. }
  1959. if (copy_to_user((__user void *)data, &regs, sizeof(regs)))
  1960. return -EFAULT;
  1961. break;
  1962. case WCTDM_SET_REG:
  1963. if (copy_from_user(&regop, (__user void *)data, sizeof(regop)))
  1964. return -EFAULT;
  1965. if (regop.indirect) {
  1966. if (wc->modtype[chan->chanpos - 1] != MOD_TYPE_FXS)
  1967. return -EINVAL;
  1968. printk(KERN_INFO "Setting indirect %d to 0x%04x on %d\n", regop.reg, regop.val, chan->chanpos);
  1969. wctdm_proslic_setreg_indirect(wc, chan->chanpos - 1, regop.reg, regop.val);
  1970. } else {
  1971. regop.val &= 0xff;
  1972. printk(KERN_INFO "Setting direct %d to %04x on %d\n", regop.reg, regop.val, chan->chanpos);
  1973. wctdm_setreg(wc, chan->chanpos - 1, regop.reg, regop.val);
  1974. }
  1975. break;
  1976. case WCTDM_SET_ECHOTUNE:
  1977. printk(KERN_INFO "-- Setting echo registers: \n");
  1978. if (copy_from_user(&echoregs, (__user void *)data, sizeof(echoregs)))
  1979. return -EFAULT;
  1980. if (wc->modtype[chan->chanpos - 1] == MOD_TYPE_FXO) {
  1981. /* Set the ACIM register */
  1982. wctdm_setreg(wc, chan->chanpos - 1, 30, (fxofullscale==1) ? (echoregs.acim|0x10) : echoregs.acim);
  1983. /* Set the digital echo canceller registers */
  1984. wctdm_setreg(wc, chan->chanpos - 1, 45, echoregs.coef1);
  1985. wctdm_setreg(wc, chan->chanpos - 1, 46, echoregs.coef2);
  1986. wctdm_setreg(wc, chan->chanpos - 1, 47, echoregs.coef3);
  1987. wctdm_setreg(wc, chan->chanpos - 1, 48, echoregs.coef4);
  1988. wctdm_setreg(wc, chan->chanpos - 1, 49, echoregs.coef5);
  1989. wctdm_setreg(wc, chan->chanpos - 1, 50, echoregs.coef6);
  1990. wctdm_setreg(wc, chan->chanpos - 1, 51, echoregs.coef7);
  1991. wctdm_setreg(wc, chan->chanpos - 1, 52, echoregs.coef8);
  1992. printk(KERN_INFO "-- Set echo registers successfully\n");
  1993. break;
  1994. } else {
  1995. return -EINVAL;
  1996. }
  1997. break;
  1998. case DAHDI_SET_HWGAIN:
  1999. if (copy_from_user(&hwgain, (__user void *) data, sizeof(hwgain)))
  2000. return -EFAULT;
  2001. wctdm_set_hwgain(wc, chan->chanpos-1, hwgain.newgain, hwgain.tx);
  2002. if (debug)
  2003. printk(KERN_DEBUG "Setting hwgain on channel %d to %d for %s direction\n",
  2004. chan->chanpos-1, hwgain.newgain, hwgain.tx ? "tx" : "rx");
  2005. break;
  2006. default:
  2007. return -ENOTTY;
  2008. }
  2009. return 0;
  2010. }
  2011. static int wctdm_open(struct dahdi_chan *chan)
  2012. {
  2013. struct wctdm *wc = chan->pvt;
  2014. if (!(wc->cardflag & (1 << (chan->chanpos - 1))))
  2015. return -ENODEV;
  2016. if (wc->dead)
  2017. return -ENODEV;
  2018. wc->usecount++;
  2019. /*MOD_INC_USE_COUNT; */
  2020. try_module_get(THIS_MODULE);
  2021. return 0;
  2022. }
  2023. static inline struct wctdm *wctdm_from_span(struct dahdi_span *span)
  2024. {
  2025. return container_of(span, struct wctdm, span);
  2026. }
  2027. static int wctdm_watchdog(struct dahdi_span *span, int event)
  2028. {
  2029. printk(KERN_INFO "opvxa1200: Restarting DMA\n");
  2030. wctdm_restart_dma(wctdm_from_span(span));
  2031. return 0;
  2032. }
  2033. static int wctdm_close(struct dahdi_chan *chan)
  2034. {
  2035. struct wctdm *wc = chan->pvt;
  2036. wc->usecount--;
  2037. /*MOD_DEC_USE_COUNT;*/
  2038. module_put(THIS_MODULE);
  2039. if (wc->modtype[chan->chanpos - 1] == MOD_TYPE_FXS) {
  2040. if (reversepolarity)
  2041. wc->mod[chan->chanpos - 1].fxs.idletxhookstate = 5;
  2042. else
  2043. wc->mod[chan->chanpos - 1].fxs.idletxhookstate = 1;
  2044. }
  2045. /* If we're dead, release us now */
  2046. if (!wc->usecount && wc->dead)
  2047. wctdm_release(wc);
  2048. return 0;
  2049. }
  2050. static int wctdm_hooksig(struct dahdi_chan *chan, enum dahdi_txsig txsig)
  2051. {
  2052. struct wctdm *wc = chan->pvt;
  2053. int reg=0;
  2054. if (wc->modtype[chan->chanpos - 1] == MOD_TYPE_FXO) {
  2055. /* XXX Enable hooksig for FXO XXX */
  2056. switch(txsig) {
  2057. case DAHDI_TXSIG_START:
  2058. case DAHDI_TXSIG_OFFHOOK:
  2059. wc->mod[chan->chanpos - 1].fxo.offhook = 1;
  2060. wctdm_setreg(wc, chan->chanpos - 1, 5, 0x9);
  2061. if(cidbeforering)
  2062. {
  2063. wc->cid_state[chan->chanpos - 1] = CID_STATE_IDLE;
  2064. wc->cid_history_clone_cnt[chan->chanpos - 1] = 0;
  2065. wc->cid_history_ptr[chan->chanpos - 1] = 0;
  2066. memset(wc->cid_history_buf[chan->chanpos - 1], DAHDI_LIN2X(0, chan), cidbuflen * DAHDI_MAX_CHUNKSIZE);
  2067. }
  2068. break;
  2069. case DAHDI_TXSIG_ONHOOK:
  2070. wc->mod[chan->chanpos - 1].fxo.offhook = 0;
  2071. wctdm_setreg(wc, chan->chanpos - 1, 5, 0x8);
  2072. break;
  2073. default:
  2074. printk(KERN_NOTICE "wcfxo: Can't set tx state to %d\n", txsig);
  2075. }
  2076. } else {
  2077. switch(txsig) {
  2078. case DAHDI_TXSIG_ONHOOK:
  2079. switch(chan->sig) {
  2080. case DAHDI_SIG_EM:
  2081. case DAHDI_SIG_FXOKS:
  2082. case DAHDI_SIG_FXOLS:
  2083. wc->mod[chan->chanpos-1].fxs.lasttxhook = wc->mod[chan->chanpos-1].fxs.idletxhookstate;
  2084. break;
  2085. case DAHDI_SIG_FXOGS:
  2086. wc->mod[chan->chanpos-1].fxs.lasttxhook = 3;
  2087. break;
  2088. }
  2089. break;
  2090. case DAHDI_TXSIG_OFFHOOK:
  2091. switch(chan->sig) {
  2092. case DAHDI_SIG_EM:
  2093. wc->mod[chan->chanpos-1].fxs.lasttxhook = 5;
  2094. break;
  2095. default:
  2096. wc->mod[chan->chanpos-1].fxs.lasttxhook = wc->mod[chan->chanpos-1].fxs.idletxhookstate;
  2097. break;
  2098. }
  2099. break;
  2100. case DAHDI_TXSIG_START:
  2101. wc->mod[chan->chanpos-1].fxs.lasttxhook = 4;
  2102. break;
  2103. case DAHDI_TXSIG_KEWL:
  2104. wc->mod[chan->chanpos-1].fxs.lasttxhook = 0;
  2105. break;
  2106. default:
  2107. printk(KERN_NOTICE "opvxa1200: Can't set tx state to %d\n", txsig);
  2108. }
  2109. if (debug)
  2110. printk(KERN_DEBUG "Setting FXS hook state to %d (%02x)\n", txsig, reg);
  2111. #if 1
  2112. wctdm_setreg(wc, chan->chanpos - 1, 64, wc->mod[chan->chanpos-1].fxs.lasttxhook);
  2113. #endif
  2114. }
  2115. return 0;
  2116. }
  2117. #ifdef DAHDI_SPAN_OPS
  2118. static const struct dahdi_span_ops wctdm_span_ops = {
  2119. .owner = THIS_MODULE,
  2120. .hooksig = wctdm_hooksig,
  2121. .open = wctdm_open,
  2122. .close = wctdm_close,
  2123. .ioctl = wctdm_ioctl,
  2124. .watchdog = wctdm_watchdog,
  2125. };
  2126. #endif
  2127. static int wctdm_initialize(struct wctdm *wc)
  2128. {
  2129. int x;
  2130. /* Dahdi stuff */
  2131. sprintf(wc->span.name, "OPVXA1200/%d", wc->pos);
  2132. snprintf(wc->span.desc, sizeof(wc->span.desc)-1, "%s Board %d", wc->variety, wc->pos + 1);
  2133. wc->ddev->location = kasprintf(GFP_KERNEL,
  2134. "PCI Bus %02d Slot %02d",
  2135. wc->dev->bus->number,
  2136. PCI_SLOT(wc->dev->devfn) + 1);
  2137. if (!wc->ddev->location) {
  2138. dahdi_free_device(wc->ddev);
  2139. wc->ddev = NULL;
  2140. return -ENOMEM;
  2141. }
  2142. wc->ddev->manufacturer = "OpenVox";
  2143. wc->ddev->devicetype = wc->variety;
  2144. if (alawoverride) {
  2145. printk(KERN_INFO "ALAW override parameter detected. Device will be operating in ALAW\n");
  2146. wc->span.deflaw = DAHDI_LAW_ALAW;
  2147. } else
  2148. wc->span.deflaw = DAHDI_LAW_MULAW;
  2149. x = __wctdm_getcreg(wc, WC_VER);
  2150. wc->fwversion = x;
  2151. if( x & FLAG_A800)
  2152. {
  2153. wc->card_name = A800P_Name;
  2154. wc->max_cards = 8;
  2155. }
  2156. else
  2157. {
  2158. wc->card_name = A1200P_Name;
  2159. wc->max_cards = 12;
  2160. }
  2161. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++) {
  2162. sprintf(wc->chans[x]->name, "OPVXA1200/%d/%d", wc->pos, x);
  2163. wc->chans[x]->sigcap = DAHDI_SIG_FXOKS | DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS | DAHDI_SIG_SF | DAHDI_SIG_EM | DAHDI_SIG_CLEAR;
  2164. wc->chans[x]->sigcap |= DAHDI_SIG_FXSKS | DAHDI_SIG_FXSLS | DAHDI_SIG_SF | DAHDI_SIG_CLEAR;
  2165. wc->chans[x]->chanpos = x+1;
  2166. wc->chans[x]->pvt = wc;
  2167. }
  2168. wc->span.chans = wc->chans;
  2169. wc->span.channels = wc->max_cards; /*MAX_NUM_CARDS;*/
  2170. wc->span.flags = DAHDI_FLAG_RBS;
  2171. wc->span.ops = &wctdm_span_ops;
  2172. wc->span.spantype = SPANTYPE_ANALOG_MIXED;
  2173. list_add_tail(&wc->span.device_node, &wc->ddev->spans);
  2174. if (dahdi_register_device(wc->ddev, &wc->dev->dev)) {
  2175. printk(KERN_NOTICE "Unable to register device %s with DAHDI\n",
  2176. wc->span.name);
  2177. kfree(wc->ddev->location);
  2178. dahdi_free_device(wc->ddev);
  2179. wc->ddev = NULL;
  2180. return -1;
  2181. }
  2182. return 0;
  2183. }
  2184. static void wctdm_post_initialize(struct wctdm *wc)
  2185. {
  2186. int x;
  2187. /* Finalize signalling */
  2188. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++) {
  2189. if (wc->cardflag & (1 << x)) {
  2190. if (wc->modtype[x] == MOD_TYPE_FXO)
  2191. wc->chans[x]->sigcap = DAHDI_SIG_FXSKS | DAHDI_SIG_FXSLS | DAHDI_SIG_SF | DAHDI_SIG_CLEAR;
  2192. else
  2193. wc->chans[x]->sigcap = DAHDI_SIG_FXOKS | DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS | DAHDI_SIG_SF | DAHDI_SIG_EM | DAHDI_SIG_CLEAR;
  2194. } else if (!(wc->chans[x]->sigcap & DAHDI_SIG_BROKEN)) {
  2195. wc->chans[x]->sigcap = 0;
  2196. }
  2197. }
  2198. }
  2199. static int wctdm_hardware_init(struct wctdm *wc)
  2200. {
  2201. /* Hardware stuff */
  2202. unsigned char ver;
  2203. unsigned char x,y;
  2204. int failed;
  2205. long origjiffies; //ml.
  2206. /* Signal Reset */
  2207. printk("before raise reset\n");
  2208. outb(0x01, wc->ioaddr + WC_CNTL);
  2209. /* Wait for 5 second */
  2210. origjiffies = jiffies;
  2211. while(1)
  2212. {
  2213. if ((jiffies - origjiffies) >= (HZ*5))
  2214. break;;
  2215. }
  2216. /* printk(KERN_INFO "after raise reset\n");*/
  2217. /* Check OpenVox chip */
  2218. x=inb(wc->ioaddr + WC_CNTL);
  2219. ver = __wctdm_getcreg(wc, WC_VER);
  2220. wc->fwversion = ver;
  2221. /*if( ver & FLAG_A800)
  2222. {
  2223. wc->card_name = A800P_Name;
  2224. wc->max_cards = 8;
  2225. }
  2226. else
  2227. {
  2228. wc->card_name = A1200P_Name;
  2229. wc->max_cards = 12;
  2230. }*/
  2231. printk(KERN_NOTICE "OpenVox %s version: %01x.%01x\n", wc->card_name, (ver&(~FLAG_A800))>>4, ver&0x0f);
  2232. failed = 0;
  2233. if (ver != 0x00) {
  2234. for (x=0;x<16;x++) {
  2235. /* Test registers */
  2236. __wctdm_setcreg(wc, WC_CS, x);
  2237. y = __wctdm_getcreg(wc, WC_CS) & 0x0f;
  2238. if (x != y) {
  2239. printk(KERN_INFO "%02x != %02x\n", x, y);
  2240. failed++;
  2241. }
  2242. }
  2243. if (!failed) {
  2244. printk(KERN_INFO "OpenVox %s passed register test\n", wc->card_name);
  2245. } else {
  2246. printk(KERN_NOTICE "OpenVox %s failed register test\n", wc->card_name);
  2247. return -1;
  2248. }
  2249. } else {
  2250. printk(KERN_INFO "No OpenVox chip %02x\n", ver);
  2251. }
  2252. if (spibyhw)
  2253. __wctdm_setcreg(wc, WC_SPICTRL, BIT_SPI_BYHW); // spi controled by hw MiaoLin;
  2254. else
  2255. __wctdm_setcreg(wc, WC_SPICTRL, 0);
  2256. /* Reset PCI Interface chip and registers (and serial) */
  2257. outb(0x06, wc->ioaddr + WC_CNTL);
  2258. /* Setup our proper outputs for when we switch for our "serial" port */
  2259. wc->ios = BIT_CS | BIT_SCLK | BIT_SDI;
  2260. outb(wc->ios, wc->ioaddr + WC_AUXD);
  2261. /* Set all to outputs except AUX 5, which is an input */
  2262. outb(0xdf, wc->ioaddr + WC_AUXC);
  2263. /* Select alternate function for AUX0 */ /* Useless in OpenVox by MiaoLin. */
  2264. /* outb(0x4, wc->ioaddr + WC_AUXFUNC); */
  2265. /* Wait 1/4 of a sec */
  2266. wait_just_a_bit(HZ/4);
  2267. /* Back to normal, with automatic DMA wrap around */
  2268. outb(0x30 | 0x01, wc->ioaddr + WC_CNTL);
  2269. wc->ledstate = 0;
  2270. wctdm_set_led(wc, 0, 0);
  2271. /* Make sure serial port and DMA are out of reset */
  2272. outb(inb(wc->ioaddr + WC_CNTL) & 0xf9, wc->ioaddr + WC_CNTL);
  2273. /* Configure serial port for MSB->LSB operation */
  2274. outb(0xc1, wc->ioaddr + WC_SERCTL);
  2275. /* Delay FSC by 0 so it's properly aligned */
  2276. outb(0x01, wc->ioaddr + WC_FSCDELAY); /* Modify to 1 by MiaoLin */
  2277. /* Setup DMA Addresses */
  2278. outl(wc->writedma, wc->ioaddr + WC_DMAWS); /* Write start */
  2279. outl(wc->writedma + DAHDI_CHUNKSIZE * 4 * 4 - 4, wc->ioaddr + WC_DMAWI); /* Middle (interrupt) */
  2280. outl(wc->writedma + DAHDI_CHUNKSIZE * 8 * 4 - 4, wc->ioaddr + WC_DMAWE); /* End */
  2281. outl(wc->readdma, wc->ioaddr + WC_DMARS); /* Read start */
  2282. outl(wc->readdma + DAHDI_CHUNKSIZE * 4 * 4 - 4, wc->ioaddr + WC_DMARI); /* Middle (interrupt) */
  2283. outl(wc->readdma + DAHDI_CHUNKSIZE * 8 * 4 - 4, wc->ioaddr + WC_DMARE); /* End */
  2284. /* Clear interrupts */
  2285. outb(0xff, wc->ioaddr + WC_INTSTAT);
  2286. /* Wait 1/4 of a second more */
  2287. wait_just_a_bit(HZ/4);
  2288. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++) {
  2289. int sane=0,ret=0,readi=0;
  2290. #if 1
  2291. touch_softlockup_watchdog(); // avoid showing CPU softlock message
  2292. /* Init with Auto Calibration */
  2293. if (!(ret=wctdm_init_proslic(wc, x, 0, 0, sane))) {
  2294. wc->cardflag |= (1 << x);
  2295. if (debug) {
  2296. readi = wctdm_getreg(wc,x,LOOP_I_LIMIT);
  2297. printk("Proslic module %d loop current is %dmA\n",x,
  2298. ((readi*3)+20));
  2299. }
  2300. printk(KERN_INFO "Module %d: Installed -- AUTO FXS/DPO\n",x);
  2301. wctdm_set_led(wc, (unsigned int)x, 1);
  2302. } else {
  2303. if(ret!=-2) {
  2304. sane=1;
  2305. printk(KERN_INFO "Init ProSlic with Manual Calibration \n");
  2306. /* Init with Manual Calibration */
  2307. if (!wctdm_init_proslic(wc, x, 0, 1, sane)) {
  2308. wc->cardflag |= (1 << x);
  2309. if (debug) {
  2310. readi = wctdm_getreg(wc,x,LOOP_I_LIMIT);
  2311. printk("Proslic module %d loop current is %dmA\n",x,
  2312. ((readi*3)+20));
  2313. }
  2314. printk(KERN_INFO "Module %d: Installed -- MANUAL FXS\n",x);
  2315. } else {
  2316. printk(KERN_NOTICE "Module %d: FAILED FXS (%s)\n", x, fxshonormode ? fxo_modes[_opermode].name : "FCC");
  2317. wc->chans[x]->sigcap = __DAHDI_SIG_FXO | DAHDI_SIG_BROKEN;
  2318. }
  2319. } else if (!(ret = wctdm_init_voicedaa(wc, x, 0, 0, sane))) {
  2320. wc->cardflag |= (1 << x);
  2321. printk(KERN_INFO "Module %d: Installed -- AUTO FXO (%s mode)\n",x, fxo_modes[_opermode].name);
  2322. wctdm_set_led(wc, (unsigned int)x, 1);
  2323. } else
  2324. printk(KERN_NOTICE "Module %d: Not installed\n", x);
  2325. }
  2326. #endif
  2327. }
  2328. /* Return error if nothing initialized okay. */
  2329. if (!wc->cardflag && !timingonly)
  2330. return -1;
  2331. /*__wctdm_setcreg(wc, WC_SYNC, (wc->cardflag << 1) | 0x1); */ /* removed by MiaoLin */
  2332. return 0;
  2333. }
  2334. static void wctdm_enable_interrupts(struct wctdm *wc)
  2335. {
  2336. /* Clear interrupts */
  2337. outb(0xff, wc->ioaddr + WC_INTSTAT);
  2338. /* Enable interrupts (we care about all of them) */
  2339. outb(0x3c, wc->ioaddr + WC_MASK0);
  2340. /* No external interrupts */
  2341. outb(0x00, wc->ioaddr + WC_MASK1);
  2342. }
  2343. static void wctdm_restart_dma(struct wctdm *wc)
  2344. {
  2345. /* Reset Master and TDM */
  2346. outb(0x01, wc->ioaddr + WC_CNTL);
  2347. outb(0x01, wc->ioaddr + WC_OPER);
  2348. }
  2349. static void wctdm_start_dma(struct wctdm *wc)
  2350. {
  2351. /* Reset Master and TDM */
  2352. outb(0x0f, wc->ioaddr + WC_CNTL);
  2353. set_current_state(TASK_INTERRUPTIBLE);
  2354. schedule_timeout(1);
  2355. outb(0x01, wc->ioaddr + WC_CNTL);
  2356. outb(0x01, wc->ioaddr + WC_OPER);
  2357. }
  2358. static void wctdm_stop_dma(struct wctdm *wc)
  2359. {
  2360. outb(0x00, wc->ioaddr + WC_OPER);
  2361. }
  2362. static void wctdm_reset_tdm(struct wctdm *wc)
  2363. {
  2364. /* Reset TDM */
  2365. outb(0x0f, wc->ioaddr + WC_CNTL);
  2366. }
  2367. static void wctdm_disable_interrupts(struct wctdm *wc)
  2368. {
  2369. outb(0x00, wc->ioaddr + WC_MASK0);
  2370. outb(0x00, wc->ioaddr + WC_MASK1);
  2371. }
  2372. static int __devinit wctdm_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  2373. {
  2374. int res;
  2375. struct wctdm *wc;
  2376. struct wctdm_desc *d = (struct wctdm_desc *)ent->driver_data;
  2377. int x;
  2378. int y;
  2379. static int initd_ifaces=0;
  2380. if(initd_ifaces){
  2381. memset((void *)ifaces,0,(sizeof(struct wctdm *))*WC_MAX_IFACES);
  2382. initd_ifaces=1;
  2383. }
  2384. for (x=0;x<WC_MAX_IFACES;x++)
  2385. if (!ifaces[x]) break;
  2386. if (x >= WC_MAX_IFACES) {
  2387. printk(KERN_NOTICE "Too many interfaces\n");
  2388. return -EIO;
  2389. }
  2390. if (pci_enable_device(pdev)) {
  2391. res = -EIO;
  2392. } else {
  2393. wc = kmalloc(sizeof(struct wctdm), GFP_KERNEL);
  2394. if (wc) {
  2395. int cardcount = 0;
  2396. wc->lastchan = -1; /* first channel offset = -1; */
  2397. wc->ledstate = 0;
  2398. ifaces[x] = wc;
  2399. memset(wc, 0, sizeof(struct wctdm));
  2400. for (x=0; x < sizeof(wc->chans)/sizeof(wc->chans[0]); ++x) {
  2401. wc->chans[x] = &wc->_chans[x];
  2402. }
  2403. spin_lock_init(&wc->lock);
  2404. wc->curcard = -1;
  2405. wc->ioaddr = pci_resource_start(pdev, 0);
  2406. wc->mem_region = pci_resource_start(pdev, 1);
  2407. wc->mem_len = pci_resource_len(pdev, 1);
  2408. wc->mem32 = (unsigned long)ioremap(wc->mem_region, wc->mem_len);
  2409. wc->dev = pdev;
  2410. wc->pos = x;
  2411. wc->variety = d->name;
  2412. for (y=0;y<MAX_NUM_CARDS;y++)
  2413. wc->flags[y] = d->flags;
  2414. /* Keep track of whether we need to free the region */
  2415. if (request_region(wc->ioaddr, 0xff, "opvxa1200"))
  2416. wc->freeregion = 1;
  2417. else
  2418. wc->freeregion = 0;
  2419. if (request_mem_region(wc->mem_region, wc->mem_len, "opvxa1200"))
  2420. wc->freeregion |= 0x02;
  2421. /* Allocate enough memory for two zt chunks, receive and transmit. Each sample uses
  2422. 8 bits. */
  2423. wc->writechunk = pci_alloc_consistent(pdev, DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2 * 2, &wc->writedma);
  2424. if (!wc->writechunk) {
  2425. printk(KERN_NOTICE "opvxa1200: Unable to allocate DMA-able memory\n");
  2426. if (wc->freeregion & 0x01)
  2427. release_region(wc->ioaddr, 0xff);
  2428. if (wc->freeregion & 0x02)
  2429. {
  2430. release_mem_region(wc->mem_region, wc->mem_len);
  2431. iounmap((void *)wc->mem32);
  2432. }
  2433. return -ENOMEM;
  2434. }
  2435. wc->readchunk = wc->writechunk + DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2; /* in bytes */
  2436. wc->readdma = wc->writedma + DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2; /* in bytes */
  2437. if (wctdm_initialize(wc)) {
  2438. printk(KERN_NOTICE "opvxa1200: Unable to intialize FXS\n");
  2439. /* Set Reset Low */
  2440. x=inb(wc->ioaddr + WC_CNTL);
  2441. outb((~0x1)&x, wc->ioaddr + WC_CNTL);
  2442. /* Free Resources */
  2443. free_irq(pdev->irq, wc);
  2444. if (wc->freeregion & 0x01)
  2445. release_region(wc->ioaddr, 0xff);
  2446. if (wc->freeregion & 0x02)
  2447. {
  2448. release_mem_region(wc->mem_region, wc->mem_len);
  2449. iounmap((void *)wc->mem32);
  2450. }
  2451. }
  2452. /* Enable bus mastering */
  2453. pci_set_master(pdev);
  2454. /* Keep track of which device we are */
  2455. pci_set_drvdata(pdev, wc);
  2456. if (request_irq(pdev->irq, wctdm_interrupt, IRQF_SHARED, "opvxa1200", wc)) {
  2457. printk(KERN_NOTICE "opvxa1200: Unable to request IRQ %d\n", pdev->irq);
  2458. if (wc->freeregion & 0x01)
  2459. release_region(wc->ioaddr, 0xff);
  2460. if (wc->freeregion & 0x02)
  2461. {
  2462. release_mem_region(wc->mem_region, wc->mem_len);
  2463. iounmap((void *)wc->mem32);
  2464. }
  2465. pci_free_consistent(pdev, DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2 * 2, (void *)wc->writechunk, wc->writedma);
  2466. pci_set_drvdata(pdev, NULL);
  2467. kfree(wc);
  2468. return -EIO;
  2469. }
  2470. if (wctdm_hardware_init(wc)) {
  2471. unsigned char w;
  2472. /* Set Reset Low */
  2473. w=inb(wc->ioaddr + WC_CNTL);
  2474. outb((~0x1)&w, wc->ioaddr + WC_CNTL);
  2475. /* Free Resources */
  2476. free_irq(pdev->irq, wc);
  2477. if (wc->freeregion & 0x01)
  2478. release_region(wc->ioaddr, 0xff);
  2479. if (wc->freeregion & 0x02)
  2480. {
  2481. release_mem_region(wc->mem_region, wc->mem_len);
  2482. iounmap((void *)wc->mem32);
  2483. }
  2484. pci_free_consistent(pdev, DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2 * 2, (void *)wc->writechunk, wc->writedma);
  2485. pci_set_drvdata(pdev, NULL);
  2486. dahdi_unregister_device(wc->ddev);
  2487. kfree(wc->ddev->location);
  2488. dahdi_free_device(wc->ddev);
  2489. kfree(wc);
  2490. return -EIO;
  2491. }
  2492. #ifdef TEST_LOG_INCOME_VOICE
  2493. for(x=0; x<MAX_NUM_CARDS+NUM_FLAG; x++)
  2494. {
  2495. wc->voc_buf[x] = kmalloc(voc_buffer_size, GFP_KERNEL);
  2496. wc->voc_ptr[x] = 0;
  2497. }
  2498. #endif
  2499. if(cidbeforering)
  2500. {
  2501. int len = cidbuflen * DAHDI_MAX_CHUNKSIZE;
  2502. if(debug)
  2503. printk("cidbeforering support enabled, length is %d msec\n", cidbuflen);
  2504. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++)
  2505. {
  2506. wc->cid_history_buf[x] = kmalloc(len, GFP_KERNEL);
  2507. wc->cid_history_ptr[x] = 0;
  2508. wc->cid_history_clone_cnt[x] = 0;
  2509. wc->cid_state[x] = CID_STATE_IDLE;
  2510. }
  2511. }
  2512. wctdm_post_initialize(wc);
  2513. /* Enable interrupts */
  2514. wctdm_enable_interrupts(wc);
  2515. /* Initialize Write/Buffers to all blank data */
  2516. memset((void *)wc->writechunk,0, DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2 * 2);
  2517. /* Start DMA */
  2518. wctdm_start_dma(wc);
  2519. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++) {
  2520. if (wc->cardflag & (1 << x))
  2521. cardcount++;
  2522. }
  2523. printk(KERN_INFO "Found an OpenVox %s: Version %x.%x (%d modules)\n", wc->card_name, (wc->fwversion&(~FLAG_A800))>>4, wc->fwversion&0x0f, cardcount);
  2524. if(debug)
  2525. printk(KERN_DEBUG "OpenVox %s debug On\n", wc->card_name);
  2526. res = 0;
  2527. } else
  2528. res = -ENOMEM;
  2529. }
  2530. return res;
  2531. }
  2532. static void wctdm_release(struct wctdm *wc)
  2533. {
  2534. #ifdef TEST_LOG_INCOME_VOICE
  2535. struct file * f = NULL;
  2536. mm_segment_t orig_fs;
  2537. int i;
  2538. char fname[20];
  2539. #endif
  2540. dahdi_unregister_device(wc->ddev);
  2541. kfree(wc->ddev->location);
  2542. dahdi_free_device(wc->ddev);
  2543. if (wc->freeregion & 0x01)
  2544. release_region(wc->ioaddr, 0xff);
  2545. if (wc->freeregion & 0x02)
  2546. {
  2547. release_mem_region(wc->mem_region, wc->mem_len);
  2548. iounmap((void *)wc->mem32);
  2549. }
  2550. #ifdef TEST_LOG_INCOME_VOICE
  2551. for(i=0; i<MAX_NUM_CARDS + NUM_FLAG; i++)
  2552. {
  2553. sprintf(fname, "//usr//%d.pcm", i);
  2554. f = filp_open(fname, O_RDWR|O_CREAT, 00);
  2555. if (!f || !f->f_op || !f->f_op->read)
  2556. {
  2557. printk("WARNING: File (read) object is a null pointer!!!\n");
  2558. continue;
  2559. }
  2560. f->f_pos = 0;
  2561. orig_fs = get_fs();
  2562. set_fs(KERNEL_DS);
  2563. if(wc->voc_buf[i])
  2564. {
  2565. f->f_op->write(f, wc->voc_buf[i], voc_buffer_size, &f->f_pos);
  2566. kfree(wc->voc_buf[i]);
  2567. }
  2568. set_fs(orig_fs);
  2569. fput(f);
  2570. }
  2571. #endif
  2572. if(cidbeforering)
  2573. {
  2574. int x;
  2575. for (x = 0; x < wc->max_cards/*MAX_NUM_CARDS*/; x++)
  2576. kfree(wc->cid_history_buf[x]);
  2577. }
  2578. kfree(wc);
  2579. printk(KERN_INFO "Free an OpenVox A1200 card\n");
  2580. }
  2581. static void __devexit wctdm_remove_one(struct pci_dev *pdev)
  2582. {
  2583. struct wctdm *wc = pci_get_drvdata(pdev);
  2584. if (wc) {
  2585. /* Stop any DMA */
  2586. wctdm_stop_dma(wc);
  2587. wctdm_reset_tdm(wc);
  2588. /* In case hardware is still there */
  2589. wctdm_disable_interrupts(wc);
  2590. /* Immediately free resources */
  2591. pci_free_consistent(pdev, DAHDI_MAX_CHUNKSIZE * (MAX_NUM_CARDS+NUM_FLAG) * 2 * 2, (void *)wc->writechunk, wc->writedma);
  2592. free_irq(pdev->irq, wc);
  2593. /* Reset PCI chip and registers */
  2594. if(wc->fwversion > 0x11)
  2595. outb(0x0e, wc->ioaddr + WC_CNTL);
  2596. else
  2597. {
  2598. wc->ledstate = 0;
  2599. wctdm_set_led(wc,0,0); // power off all leds.
  2600. }
  2601. /* Release span, possibly delayed */
  2602. if (!wc->usecount)
  2603. wctdm_release(wc);
  2604. else
  2605. wc->dead = 1;
  2606. }
  2607. }
  2608. static struct pci_device_id wctdm_pci_tbl[] = {
  2609. { 0xe159, 0x0001, 0x9100, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2610. { 0xe159, 0x0001, 0x9519, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2611. { 0xe159, 0x0001, 0x95D9, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2612. { 0xe159, 0x0001, 0x9500, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2613. { 0xe159, 0x0001, 0x9532, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2614. { 0xe159, 0x0001, 0x8519, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2615. { 0xe159, 0x0001, 0x9559, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2616. { 0xe159, 0x0001, 0x9599, PCI_ANY_ID, 0, 0, (unsigned long) &wctdme },
  2617. { 0 }
  2618. };
  2619. MODULE_DEVICE_TABLE(pci, wctdm_pci_tbl);
  2620. static struct pci_driver wctdm_driver = {
  2621. .name = "opvxa1200",
  2622. .probe = wctdm_init_one,
  2623. .remove = __devexit_p(wctdm_remove_one),
  2624. .suspend = NULL,
  2625. .resume = NULL,
  2626. .id_table = wctdm_pci_tbl,
  2627. };
  2628. static int __init wctdm_init(void)
  2629. {
  2630. int res;
  2631. int x;
  2632. for (x=0;x<(sizeof(fxo_modes) / sizeof(fxo_modes[0])); x++) {
  2633. if (!strcmp(fxo_modes[x].name, opermode))
  2634. break;
  2635. }
  2636. if (x < sizeof(fxo_modes) / sizeof(fxo_modes[0])) {
  2637. _opermode = x;
  2638. } else {
  2639. printk(KERN_NOTICE "Invalid/unknown operating mode '%s' specified. Please choose one of:\n", opermode);
  2640. for (x=0;x<sizeof(fxo_modes) / sizeof(fxo_modes[0]); x++)
  2641. printk(KERN_INFO " %s\n", fxo_modes[x].name);
  2642. printk(KERN_INFO "Note this option is CASE SENSITIVE!\n");
  2643. return -ENODEV;
  2644. }
  2645. if (!strcmp(fxo_modes[_opermode].name, "AUSTRALIA")) {
  2646. boostringer=1;
  2647. fxshonormode=1;
  2648. }
  2649. if (battdebounce == 0) {
  2650. battdebounce = fxo_modes[_opermode].battdebounce;
  2651. }
  2652. if (battalarm == 0) {
  2653. battalarm = fxo_modes[_opermode].battalarm;
  2654. }
  2655. if (battthresh == 0) {
  2656. battthresh = fxo_modes[_opermode].battthresh;
  2657. }
  2658. res = dahdi_pci_module(&wctdm_driver);
  2659. if (res)
  2660. return -ENODEV;
  2661. return 0;
  2662. }
  2663. static void __exit wctdm_cleanup(void)
  2664. {
  2665. pci_unregister_driver(&wctdm_driver);
  2666. }
  2667. module_param(debug, int, 0600);
  2668. module_param(loopcurrent, int, 0600);
  2669. module_param(reversepolarity, int, 0600);
  2670. module_param(robust, int, 0600);
  2671. module_param(opermode, charp, 0600);
  2672. module_param(timingonly, int, 0600);
  2673. module_param(lowpower, int, 0600);
  2674. module_param(boostringer, int, 0600);
  2675. module_param(fastringer, int, 0600);
  2676. module_param(fxshonormode, int, 0600);
  2677. module_param(battdebounce, uint, 0600);
  2678. module_param(battthresh, uint, 0600);
  2679. module_param(battalarm, uint, 0600);
  2680. module_param(ringdebounce, int, 0600);
  2681. module_param(dialdebounce, int, 0600);
  2682. module_param(fwringdetect, int, 0600);
  2683. module_param(alawoverride, int, 0600);
  2684. module_param(fastpickup, int, 0600);
  2685. module_param(fxotxgain, int, 0600);
  2686. module_param(fxorxgain, int, 0600);
  2687. module_param(fxstxgain, int, 0600);
  2688. module_param(fxsrxgain, int, 0600);
  2689. module_param(spibyhw, int, 0600);
  2690. module_param(usememio, int, 0600);
  2691. module_param(cidbeforering, int, 0600);
  2692. module_param(cidbuflen, int, 0600);
  2693. module_param(cidtimeout, int, 0600);
  2694. module_param(fxofullscale, int, 0600);
  2695. module_param(fixedtimepolarity, int, 0600);
  2696. MODULE_DESCRIPTION("OpenVox A1200 Driver");
  2697. MODULE_AUTHOR("MiaoLin <miaolin@openvox.com.cn>");
  2698. MODULE_LICENSE("GPL v2");
  2699. module_init(wctdm_init);
  2700. module_exit(wctdm_cleanup);