gbhw.inc 14 KB

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  1. ;*
  2. ;* GBHW.INC - Gameboy Hardware definitions
  3. ;*
  4. ; If all of these are already defined, don't do it again.
  5. IF !DEF(HARDWARE_INC)
  6. HARDWARE_INC SET 1
  7. rev_Check_hardware_inc: MACRO
  8. ;NOTE: REVISION NUMBER CHANGES MUST BE ADDED
  9. ;TO SECOND PARAMETER IN FOLLOWING LINE.
  10. IF \1 > 1.0 ;PUT REVISION NUMBER HERE
  11. WARN "Version \1 or later of 'gbhw.inc' is required."
  12. ENDC
  13. ENDM
  14. _HW EQU $FF00
  15. _VRAM EQU $8000 ; $8000->$A000
  16. _SCRN0 EQU $9800 ; $9800->$9BFF
  17. _SCRN1 EQU $9C00 ; $9C00->$9FFF
  18. _RAM EQU $C000 ; $C000->$E000
  19. _HRAM EQU $F800 ; $F800->$FFFE
  20. _OAMRAM EQU $FE00 ; $FE00->$FE9F
  21. _AUD3WAVERAM EQU $FF30 ; $FF30->$FF3F
  22. ; --
  23. ; -- OAM flags
  24. ; --
  25. OAMF_PRI EQU %10000000 ; Priority
  26. OAMF_YFLIP EQU %01000000 ; Y flip
  27. OAMF_XFLIP EQU %00100000 ; X flip
  28. OAMF_PAL0 EQU %00000000 ; Palette number; 0,1
  29. OAMF_PAL1 EQU %00010000 ; Palette number; 0,1
  30. ;***************************************************************************
  31. ;*
  32. ;* Custom registers
  33. ;*
  34. ;***************************************************************************
  35. ; --
  36. ; -- P1 ($FF00)
  37. ; -- Register for reading joy pad info. (R/W)
  38. ; --
  39. rP1 EQU $FF00
  40. P1F_5 EQU %00100000 ; P15 out port
  41. P1F_4 EQU %00010000 ; P14 out port
  42. P1F_3 EQU %00001000 ; P13 in port
  43. P1F_2 EQU %00000100 ; P12 in port
  44. P1F_1 EQU %00000010 ; P11 in port
  45. P1F_0 EQU %00000001 ; P10 in port
  46. ; --
  47. ; -- LCDC ($FF40)
  48. ; -- LCD Control (R/W)
  49. ; --
  50. rLCDC EQU $FF40
  51. LCDCF_OFF EQU %00000000 ; LCD Control Operation
  52. LCDCF_ON EQU %10000000 ; LCD Control Operation
  53. LCDCF_WIN9800 EQU %00000000 ; Window Tile Map Display Select
  54. LCDCF_WIN9C00 EQU %01000000 ; Window Tile Map Display Select
  55. LCDCF_WINOFF EQU %00000000 ; Window Display
  56. LCDCF_WINON EQU %00100000 ; Window Display
  57. LCDCF_BG8800 EQU %00000000 ; BG & Window Tile Data Select
  58. LCDCF_BG8000 EQU %00010000 ; BG & Window Tile Data Select
  59. LCDCF_BG9800 EQU %00000000 ; BG Tile Map Display Select
  60. LCDCF_BG9C00 EQU %00001000 ; BG Tile Map Display Select
  61. LCDCF_OBJ8 EQU %00000000 ; OBJ Construction
  62. LCDCF_OBJ16 EQU %00000100 ; OBJ Construction
  63. LCDCF_OBJOFF EQU %00000000 ; OBJ Display
  64. LCDCF_OBJON EQU %00000010 ; OBJ Display
  65. LCDCF_BGOFF EQU %00000000 ; BG Display
  66. LCDCF_BGON EQU %00000001 ; BG Display
  67. ; "Window Character Data Select" follows BG
  68. ; --
  69. ; -- STAT ($FF41)
  70. ; -- LCDC Status (R/W)
  71. ; --
  72. rSTAT EQU $FF41
  73. STATF_LYC EQU %01000000 ; LYCEQULY Coincidence (Selectable)
  74. STATF_MODE10 EQU %00100000 ; Mode 10
  75. STATF_MODE01 EQU %00010000 ; Mode 01 (V-Blank)
  76. STATF_MODE00 EQU %00001000 ; Mode 00 (H-Blank)
  77. STATF_LYCF EQU %00000100 ; Coincidence Flag
  78. STATF_HB EQU %00000000 ; H-Blank
  79. STATF_VB EQU %00000001 ; V-Blank
  80. STATF_OAM EQU %00000010 ; OAM-RAM is used by system
  81. STATF_LCD EQU %00000011 ; Both OAM and VRAM used by system
  82. STATF_BUSY EQU %00000010 ; When set, VRAM access is unsafe
  83. ; --
  84. ; -- SCY ($FF42)
  85. ; -- Scroll Y (R/W)
  86. ; --
  87. rSCY EQU $FF42
  88. ; --
  89. ; -- SCY ($FF43)
  90. ; -- Scroll X (R/W)
  91. ; --
  92. rSCX EQU $FF43
  93. ; --
  94. ; -- LY ($FF44)
  95. ; -- LCDC Y-Coordinate (R)
  96. ; --
  97. ; -- Values range from 0->153. 144->153 is the VBlank period.
  98. ; --
  99. rLY EQU $FF44
  100. ; --
  101. ; -- LYC ($FF45)
  102. ; -- LY Compare (R/W)
  103. ; --
  104. ; -- When LYEQUEQULYC, STATF_LYCF will be set in STAT
  105. ; --
  106. rLYC EQU $FF45
  107. ; --
  108. ; -- DMA ($FF46)
  109. ; -- DMA Transfer and Start Address (W)
  110. ; --
  111. rDMA EQU $FF46
  112. ; --
  113. ; -- BGP ($FF47)
  114. ; -- BG Palette Data (W)
  115. ; --
  116. ; -- Bit 7-6 - Intensity for %11
  117. ; -- Bit 5-4 - Intensity for %10
  118. ; -- Bit 3-2 - Intensity for %01
  119. ; -- Bit 1-0 - Intensity for %00
  120. ; --
  121. rBGP EQU $FF47
  122. ; --
  123. ; -- OBP0 ($FF48)
  124. ; -- Object Palette 0 Data (W)
  125. ; --
  126. ; -- See BGP for info
  127. ; --
  128. rOBP0 EQU $FF48
  129. ; --
  130. ; -- OBP1 ($FF49)
  131. ; -- Object Palette 1 Data (W)
  132. ; --
  133. ; -- See BGP for info
  134. ; --
  135. rOBP1 EQU $FF49
  136. ; --
  137. ; -- SB ($FF01)
  138. ; -- Serial Transfer Data (R/W)
  139. ; --
  140. rSB EQU $FF01
  141. ; --
  142. ; -- SC ($FF02)
  143. ; -- Serial I/O Control (R/W)
  144. ; --
  145. rSC EQU $FF02
  146. ; --
  147. ; -- DIV ($FF04)
  148. ; -- Divider register (R/W)
  149. ; --
  150. rDIV EQU $FF04
  151. ; --
  152. ; -- TIMA ($FF05)
  153. ; -- Timer counter (R/W)
  154. ; --
  155. rTIMA EQU $FF05
  156. ; --
  157. ; -- TMA ($FF06)
  158. ; -- Timer modulo (R/W)
  159. ; --
  160. rTMA EQU $FF06
  161. ; --
  162. ; -- TAC ($FF07)
  163. ; -- Timer control (R/W)
  164. ; --
  165. rTAC EQU $FF07
  166. TACF_START EQU %00000100
  167. TACF_STOP EQU %00000000
  168. TACF_4KHZ EQU %00000000
  169. TACF_16KHZ EQU %00000011
  170. TACF_65KHZ EQU %00000010
  171. TACF_262KHZ EQU %00000001
  172. ; --
  173. ; -- IF ($FF0F)
  174. ; -- Interrupt Flag (R/W)
  175. ; --
  176. ; -- IE ($FFFF)
  177. ; -- Interrupt Enable (R/W)
  178. ; --
  179. rIF EQU $FF0F
  180. rIE EQU $FFFF
  181. IEF_HILO EQU %00010000 ; Transition from High to Low of Pin number P10-P13
  182. IEF_SERIAL EQU %00001000 ; Serial I/O transfer end
  183. IEF_TIMER EQU %00000100 ; Timer Overflow
  184. IEF_LCDC EQU %00000010 ; LCDC (see STAT)
  185. IEF_VBLANK EQU %00000001 ; V-Blank
  186. ; --
  187. ; -- WY ($FF4A)
  188. ; -- Window Y Position (R/W)
  189. ; --
  190. ; -- 0 <EQU WY <EQU 143
  191. ; --
  192. rWY EQU $FF4A
  193. ; --
  194. ; -- WX ($FF4B)
  195. ; -- Window X Position (R/W)
  196. ; --
  197. ; -- 7 <EQU WX <EQU 166
  198. ; --
  199. rWX EQU $FF4B
  200. ;***************************************************************************
  201. ;*
  202. ;* Sound control registers
  203. ;*
  204. ;***************************************************************************
  205. ; --
  206. ; -- AUDVOL/NR50 ($FF24)
  207. ; -- Channel control / ON-OFF / Volume (R/W)
  208. ; --
  209. ; -- Bit 7 - Vin->SO2 ON/OFF (Vin??)
  210. ; -- Bit 6-4 - SO2 output level (volume) (# 0-7)
  211. ; -- Bit 3 - Vin->SO1 ON/OFF (Vin??)
  212. ; -- Bit 2-0 - SO1 output level (volume) (# 0-7)
  213. ; --
  214. rNR50 EQU $FF24
  215. rAUDVOL EQU rNR50
  216. ; --
  217. ; -- AUDTERM/NR51 ($FF25)
  218. ; -- Selection of Sound output terminal (R/W)
  219. ; --
  220. ; -- Bit 7 - Output sound 4 to SO2 terminal
  221. ; -- Bit 6 - Output sound 3 to SO2 terminal
  222. ; -- Bit 5 - Output sound 2 to SO2 terminal
  223. ; -- Bit 4 - Output sound 1 to SO2 terminal
  224. ; -- Bit 3 - Output sound 4 to SO1 terminal
  225. ; -- Bit 2 - Output sound 3 to SO1 terminal
  226. ; -- Bit 1 - Output sound 2 to SO1 terminal
  227. ; -- Bit 0 - Output sound 0 to SO1 terminal
  228. ; --
  229. rNR51 EQU $FF25
  230. rAUDTERM EQU rNR51
  231. ; --
  232. ; -- AUDENA/NR52 ($FF26)
  233. ; -- Sound on/off (R/W)
  234. ; --
  235. ; -- Bit 7 - All sound on/off (sets all audio regs to 0!)
  236. ; -- Bit 3 - Sound 4 ON flag (doesn't work!)
  237. ; -- Bit 2 - Sound 3 ON flag (doesn't work!)
  238. ; -- Bit 1 - Sound 2 ON flag (doesn't work!)
  239. ; -- Bit 0 - Sound 1 ON flag (doesn't work!)
  240. ; --
  241. rNR52 EQU $FF26
  242. rAUDENA EQU rNR52
  243. ;***************************************************************************
  244. ;*
  245. ;* SoundChannel #1 registers
  246. ;*
  247. ;***************************************************************************
  248. ; --
  249. ; -- AUD1SWEEP/NR10 ($FF10)
  250. ; -- Sweep register (R/W)
  251. ; --
  252. ; -- Bit 6-4 - Sweep Time
  253. ; -- Bit 3 - Sweep Increase/Decrease
  254. ; -- 0: Addition (frequency increases???)
  255. ; -- 1: Subtraction (frequency increases???)
  256. ; -- Bit 2-0 - Number of sweep shift (# 0-7)
  257. ; -- Sweep Time: (n*7.8ms)
  258. ; --
  259. rNR10 EQU $FF10
  260. rAUD1SWEEP EQU rNR10
  261. ; --
  262. ; -- AUD1LEN/NR11 ($FF11)
  263. ; -- Sound length/Wave pattern duty (R/W)
  264. ; --
  265. ; -- Bit 7-6 - Wave Pattern Duty (00:12.5% 01:25% 10:50% 11:75%)
  266. ; -- Bit 5-0 - Sound length data (# 0-63)
  267. ; --
  268. rNR11 EQU $FF11
  269. rAUD1LEN EQU rNR11
  270. ; --
  271. ; -- AUD1ENV/NR12 ($FF12)
  272. ; -- Envelope (R/W)
  273. ; --
  274. ; -- Bit 7-4 - Initial value of envelope
  275. ; -- Bit 3 - Envelope UP/DOWN
  276. ; -- 0: Decrease
  277. ; -- 1: Range of increase
  278. ; -- Bit 2-0 - Number of envelope sweep (# 0-7)
  279. ; --
  280. rNR12 EQU $FF12
  281. rAUD1ENV EQU rNR12
  282. ; --
  283. ; -- AUD1LOW/NR13 ($FF13)
  284. ; -- Frequency lo (W)
  285. ; --
  286. rNR13 EQU $FF13
  287. rAUD1LOW EQU rNR13
  288. ; --
  289. ; -- AUD1HIGH/NR14 ($FF14)
  290. ; -- Frequency hi (W)
  291. ; --
  292. ; -- Bit 7 - Initial (when set, sound restarts)
  293. ; -- Bit 6 - Counter/consecutive selection
  294. ; -- Bit 2-0 - Frequency's higher 3 bits
  295. ; --
  296. rNR14 EQU $FF14
  297. rAUD1HIGH EQU rNR14
  298. ;***************************************************************************
  299. ;*
  300. ;* SoundChannel #2 registers
  301. ;*
  302. ;***************************************************************************
  303. ; --
  304. ; -- AUD2LEN/NR21 ($FF16)
  305. ; -- Sound Length; Wave Pattern Duty (R/W)
  306. ; --
  307. ; -- see AUD1LEN for info
  308. ; --
  309. rNR21 EQU $FF16
  310. rAUD2LEN EQU rNR21
  311. ; --
  312. ; -- AUD2ENV/NR22 ($FF17)
  313. ; -- Envelope (R/W)
  314. ; --
  315. ; -- see AUD1ENV for info
  316. ; --
  317. rNR22 EQU $FF17
  318. rAUD2ENV EQU rNR22
  319. ; --
  320. ; -- AUD2LOW/NR23 ($FF18)
  321. ; -- Frequency lo (W)
  322. ; --
  323. rNR23 EQU $FF18
  324. rAUD2LOW EQU rNR23
  325. ; --
  326. ; -- AUD2HIGH/NR24 ($FF19)
  327. ; -- Frequency hi (W)
  328. ; --
  329. ; -- see AUD1HIGH for info
  330. ; --
  331. rNR24 EQU $FF19
  332. rAUD2HIGH EQU rNR24
  333. ;***************************************************************************
  334. ;*
  335. ;* SoundChannel #3 registers
  336. ;*
  337. ;***************************************************************************
  338. ; --
  339. ; -- AUD3ENA/NR30 ($FF1A)
  340. ; -- Sound on/off (R/W)
  341. ; --
  342. ; -- Bit 7 - Sound ON/OFF (1EQUON,0EQUOFF)
  343. ; --
  344. rNR30 EQU $FF1A
  345. rAUD3ENA EQU rNR30
  346. ; --
  347. ; -- AUD3LEN/NR31 ($FF1B)
  348. ; -- Sound length (R/W)
  349. ; --
  350. ; -- Bit 7-0 - Sound length
  351. ; --
  352. rNR31 EQU $FF1B
  353. rAUD3LEN EQU rNR31
  354. ; --
  355. ; -- AUD3LEVEL/NR32 ($FF1C)
  356. ; -- Select output level
  357. ; --
  358. ; -- Bit 6-5 - Select output level
  359. ; -- 00: 0/1 (mute)
  360. ; -- 01: 1/1
  361. ; -- 10: 1/2
  362. ; -- 11: 1/4
  363. ; --
  364. rNR32 EQU $FF1C
  365. rAUD3LEVEL EQU rNR32
  366. ; --
  367. ; -- AUD3LOW/NR33 ($FF1D)
  368. ; -- Frequency lo (W)
  369. ; --
  370. ; -- see AUD1LOW for info
  371. ; --
  372. rNR33 EQU $FF1D
  373. rAUD3LOW EQU rNR33
  374. ; --
  375. ; -- AUD3HIGH/NR34 ($FF1E)
  376. ; -- Frequency hi (W)
  377. ; --
  378. ; -- see AUD1HIGH for info
  379. ; --
  380. rNR34 EQU $FF1E
  381. rAUD3HIGH EQU rNR34
  382. ; --
  383. ; -- AUD4LEN/NR41 ($FF20)
  384. ; -- Sound length (R/W)
  385. ; --
  386. ; -- Bit 5-0 - Sound length data (# 0-63)
  387. ; --
  388. rNR41 EQU $FF20
  389. rAUD4LEN EQU rNR41
  390. ; --
  391. ; -- AUD4ENV/NR42 ($FF21)
  392. ; -- Envelope (R/W)
  393. ; --
  394. ; -- see AUD1ENV for info
  395. ; --
  396. rNR42 EQU $FF21
  397. rAUD4ENV EQU rNR42
  398. ; --
  399. ; -- AUD4POLY/NR42 ($FF22)
  400. ; -- Polynomial counter (R/W)
  401. ; --
  402. ; -- Bit 7-4 - Selection of the shift clock frequency of the (scf)
  403. ; -- polynomial counter (0000-1101)
  404. ; -- freqEQUdrf*1/2^scf (not sure)
  405. ; -- Bit 3 - Selection of the polynomial counter's step
  406. ; -- 0: 15 steps
  407. ; -- 1: 7 steps
  408. ; -- Bit 2-0 - Selection of the dividing ratio of frequencies (drf)
  409. ; -- 000: f/4 001: f/8 010: f/16 011: f/24
  410. ; -- 100: f/32 101: f/40 110: f/48 111: f/56 (fEQU4.194304 Mhz)
  411. ; --
  412. rNR42_2 EQU $FF22
  413. rAUD4POLY EQU rNR42_2
  414. ; --
  415. ; -- AUD4GO/NR43 ($FF23)
  416. ; -- (has wrong name and value (ff30) in Dr.Pan's doc!)
  417. ; --
  418. ; -- Bit 7 - Inital
  419. ; -- Bit 6 - Counter/consecutive selection
  420. ; --
  421. rNR43 EQU $FF23
  422. rAUD4GO EQU rNR43 ; silly name!
  423. ;***************************************************************************
  424. ;*
  425. ;* Cart related
  426. ;*
  427. ;***************************************************************************
  428. ROM_NOMBC EQU 0
  429. ROM_MBC1 EQU 1
  430. ROM_MBC1_RAM EQU 2
  431. ROM_MBC1_RAM_BAT EQU 3
  432. ROM_MBC2 EQU 5
  433. ROM_MBC2_BAT EQU 6
  434. ROM_NOMBC_RAM EQU 8
  435. ROM_NOMBC_RAM_BAT EQU 9
  436. ROM_SIZE_256KBIT EQU 0
  437. ROM_SIZE_512KBIT EQU 1
  438. ROM_SIZE_1M EQU 2
  439. ROM_SIZE_2M EQU 3
  440. ROM_SIZE_4M EQU 4
  441. ROM_SIZE_8M EQU 5
  442. ROM_SIZE_16M EQU 6
  443. ROM_SIZE_32KBYTE EQU 0
  444. ROM_SIZE_64KBYTE EQU 1
  445. ROM_SIZE_128KBYTE EQU 2
  446. ROM_SIZE_256KBYTE EQU 3
  447. ROM_SIZE_512KBYTE EQU 4
  448. ROM_SIZE_1MBYTE EQU 5
  449. ROM_SIZE_2MBYTE EQU 6
  450. RAM_SIZE_0KBIT EQU 0
  451. RAM_SIZE_16KBIT EQU 1
  452. RAM_SIZE_64KBIT EQU 2
  453. RAM_SIZE_256KBIT EQU 3
  454. RAM_SIZE_1MBIT EQU 4
  455. RAM_SIZE_0KBYTE EQU 0
  456. RAM_SIZE_2KBYTE EQU 1
  457. RAM_SIZE_8KBYTE EQU 2
  458. RAM_SIZE_32KBYTE EQU 3
  459. RAM_SIZE_128KBYTE EQU 4
  460. ;***************************************************************************
  461. ;*
  462. ;* Keypad related
  463. ;*
  464. ;***************************************************************************
  465. PADF_DOWN EQU $80
  466. PADF_UP EQU $40
  467. PADF_LEFT EQU $20
  468. PADF_RIGHT EQU $10
  469. PADF_START EQU $08
  470. PADF_SELECT EQU $04
  471. PADF_B EQU $02
  472. PADF_A EQU $01
  473. PADB_DOWN EQU $7
  474. PADB_UP EQU $6
  475. PADB_LEFT EQU $5
  476. PADB_RIGHT EQU $4
  477. PADB_START EQU $3
  478. PADB_SELECT EQU $2
  479. PADB_B EQU $1
  480. PADB_A EQU $0
  481. ;***************************************************************************
  482. ;*
  483. ;* Screen related
  484. ;*
  485. ;***************************************************************************
  486. SCRN_X EQU 160 ; Width of screen in pixels
  487. SCRN_Y EQU 144 ; Height of screen in pixels
  488. SCRN_X_B EQU 20 ; Width of screen in bytes
  489. SCRN_Y_B EQU 18 ; Height of screen in bytes
  490. SCRN_VX EQU 256 ; Virtual width of screen in pixels
  491. SCRN_VY EQU 256 ; Virtual height of screen in pixels
  492. SCRN_VX_B EQU 32 ; Virtual width of screen in bytes
  493. SCRN_VY_B EQU 32 ; Virtual height of screen in bytes
  494. NINTENDO_LOGO: MACRO
  495. ;*
  496. ;* Nintendo scrolling logo
  497. ;* (Code won't work on a real GameBoy)
  498. ;* (if next six lines are altered.)
  499. DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
  500. DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
  501. DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
  502. ENDM
  503. ROM_HEADER: MACRO
  504. ;*
  505. ;* Nintendo scrolling logo
  506. ;* (Code won't work on a real GameBoy)
  507. ;* (if next six lines are altered.)
  508. ; 0123456789ABCDEF
  509. DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
  510. DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
  511. DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
  512. DB "EXAMPLE",0,0,0,0,0,0,0,0 ; Cart name - 15bytes
  513. DB 0 ; $143
  514. DB 0,0 ; $144 - Licensee code (not important)
  515. DB 0 ; $146 - SGB Support indicator
  516. DB \1 ; $147 - Cart type
  517. DB \2 ; $148 - ROM Size
  518. DB \3 ; $149 - RAM Size
  519. DB 1 ; $14a - Destination code
  520. DB $33 ; $14b - Old licensee code
  521. DB 0 ; $14c - Mask ROM version
  522. DB 0 ; $14d - Complement check (important)
  523. DW 0 ; $14e - Checksum (not important)
  524. ENDM
  525. ENDC ;HARDWARE_INC