suarezvictor ff98f27434 Update 'hardware/README.md' 9 月之前
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CPU_board 0a2d6fef18 add CPU board 10 月之前
DVI_adapter 951e4ccb37 add DVI adapter and connector boards 10 月之前
DVI_connector_board 951e4ccb37 add DVI adapter and connector boards 10 月之前
FPGA_board f6c1e6398c add PDF schematics 10 月之前
IO_board 20e769bc88 add I/O board PCB design files 9 月之前
LVDS_adapter 81513a84bb add LVDS adapter board 10 月之前
VGA_adapter 5f174ccd72 Add VGA adapter board 10 月之前
VGA_connector_board 6e8f6b5fe9 add VGA connector board and docs 10 月之前
README.md ff98f27434 Update 'hardware/README.md' 9 月之前

README.md

BOARDS

Here are design files for the various board of this project:

Processing boards:

Adapter boards:

CPU board design

A second, smaller version of the CPU board was designed, based again on the Allwinner F133A CPU

It features:

  • C906 64-bit RISC-V CPU @1GHz (22nm manufacturing process)
  • Integrated 64MB DDR2 RAM
  • Small size, breadboard compatible
  • SD card socket to store media assets
  • 2 USB-C connectors with Host and OTG (Host/Device) functions, respectively
  • Video output connector
  • Headers for serial I/O and power
  • Reset and boot buttons
  • JTAG debugging using "pogo-pins"

The design is done with the open-source EDA tool Kicad, the source files are here
The board is 4 layer, based on the Yuzuki design, with CERN open-source hardware license.

PDF schematics are here.




FPGA board design

The FPGA board is capable of instancing a RISC-V CPU along with the hardware acellerators desiged in C and automatically translated to Verilog. Not only the board has the same layout as the CPU board but the drawing primitives use the same C sources, as one of the main objectives of the project.

Features are:

  • Lattice ECP5 FPGA device, supporting 12F, 25F, 45F and 85F sizes in 285 ball BGA package
  • DDR3L RAM of up to 1Gbit with impedance controlled tracks
  • Small size, breadboard compatible
  • SD card socket to store media assets
  • 2 USB-C connectors with Host and Device functions, respectively
  • Video output connector
  • Headers for serial I/O
  • Reset button (also for bitstream loading)
  • JTAG debugging using "pogo-pins"

The design is done with the open-source EDA tool Kicad, the source files are here
The board is 6 layer, based on the OrgangeCrab board r0.1, with CERN open-source hardware license.

PDF schematics are here.




NOTE: FPGA chip is not shown on the 3D rendering for lack of a 3D model for the part

VGA adapter board design

This adapter is capable of converting digital RGB parallel signals to VGA-compatible analog values, using a simple R-2R DAC. The adapter board outputs the VGA signals to a 15-pin flat cable, to be connected 1:1 to a connector board that has the D-sub (15-pin) starndard VGA connector.

The design is done with the open-source EDA tool Kicad, the source files are here (adapter) and here (connector)
PDF schematics for the adapter are here.

This design is relased under a CERN open-source hardware license.


LVDS adapter board design

This board connects 4 pairs of differential signals to a LCD using LVDS signalling (of the kind commonly used for laptops), to directly drive the display (1-channel). It also connect signals that can identify the display model and resolution.

Features:

  • 40-pin FPC cable connector
  • Protection diodes
  • I2C connection for display EDID reading
  • External header for powering the backlight

The design is done with the open-source EDA tool Kicad, the source files are here, licensed under a CERN open-source hardware license.

PDF schematics for the adapter are here.



DVI adapter board design

This board converts parallel RGB signals to digital video signals in the DVI format, as accepted by the majority of current PC monitors and TVs.

Features:

  • 20-pin FPC cable connector, compatible with standard FPV Ribbon cables for connection to displays
  • Protection diodes
  • I2C connection for display EDID reading
  • Solder jumpers for the main IC configuration

The design is done with the open-source EDA tool Kicad, the source files are here (adapter) and here (connector), licensed under a CERN open-source hardware license.

PDF schematics for the adapter are here.


I/O board design

The I/O board adapter allows to externally access the video signals (present on the 2x15 connectors) for other purposes like general purpose I/O pins and debug.

It uses a 40-pin FPC connector and cable that allows to break out the signals, in a more manageable way like using common wires as the ones usually for bread boards.

Also, it includes two 31-pin FPC connectors at 0.3mm pitch for replacing the Hirose connectors with FPC or FFCs. All the wiring are directo connections to the video connectors. A header to acces the touchscreen signal is also provided.

The design is done with the open-source EDA tool Kicad, the source files are here, licensed under a CERN open-source hardware license.