ddca-ss2021/ca/miriv/test/execute/testdata/input.txt

# test case 0
# stall
0
# flush
0
# pc
0001100111111001
# aluop
ALU_OR
# alusrc1
0
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01100001001011001110011010111000
# readdata2
01111001010111101111101000001110
# imm
01011000011110010001100000011010
# branchtype
BR_NOP
# memread
1
# memwrite
0
# memtype
MEM_HU
# wb rd
01001
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
00001
# reg write mem data
00100001011110110100100101010010
# reg write wr write
0
# reg write wr reg
11101
# reg write wr data
01110010101101001011100111101011

# test case 1
# stall
0
# flush
0
# pc
1010110011101101
# aluop
ALU_ADD
# alusrc1
1
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01100100110001111011101010111010
# readdata2
00001001110010111100111110110001
# imm
01001111101101000100001011000101
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
10001
# wb write
1
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
10110
# reg write mem data
01010111111111110001111100100010
# reg write wr write
1
# reg write wr reg
10000
# reg write wr data
00000100010110110001111001011010

# test case 2
# stall
0
# flush
0
# pc
1000011111100100
# aluop
ALU_SUB
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01111111111101101111000011110000
# readdata2
01100011000110111010101101001111
# imm
01001011111001001111000000000101
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
00101
# wb write
0
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
11001
# reg write mem data
01001000100011111001110111111001
# reg write wr write
0
# reg write wr reg
11110
# reg write wr data
00100000010101010011000110110000

# test case 3
# stall
0
# flush
0
# pc
0110101010101000
# aluop
ALU_SUB
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01101000001111110110110011001111
# readdata2
00010011111001001110111000111100
# imm
00111011000011110100101110010010
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_B
# wb rd
01111
# wb write
1
# wb src
WBS_MEM
# reg write mem write
0
# reg write mem reg
01100
# reg write mem data
01110000010101010111011110111111
# reg write wr write
1
# reg write wr reg
10010
# reg write wr data
00010011001100011110011101010111

# test case 4
# stall
0
# flush
0
# pc
0100100100010111
# aluop
ALU_SLL
# alusrc1
1
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01100100011111100111001001101111
# readdata2
01010100101000010101110011101101
# imm
01111011001100111000010010011010
# branchtype
BR_CNDI
# memread
1
# memwrite
0
# memtype
MEM_B
# wb rd
11100
# wb write
0
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
00010
# reg write mem data
01100011111001110000001001111011
# reg write wr write
0
# reg write wr reg
10101
# reg write wr data
01001101101001011111011011000110

# test case 5
# stall
0
# flush
0
# pc
1111111000101011
# aluop
ALU_OR
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00011011001010001111011110010001
# readdata2
01101010110101010010101001010001
# imm
00100000010011001010101011010000
# branchtype
BR_BR
# memread
1
# memwrite
0
# memtype
MEM_HU
# wb rd
10100
# wb write
0
# wb src
WBS_MEM
# reg write mem write
0
# reg write mem reg
01000
# reg write mem data
01110000101010000000100001110100
# reg write wr write
1
# reg write wr reg
00010
# reg write wr data
01101010110001011011100100101000

# test case 6
# stall
0
# flush
0
# pc
1100101000100000
# aluop
ALU_ADD
# alusrc1
0
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01101101100110001001000111100110
# readdata2
01100111111110001000101100110101
# imm
01110010111000100100000011010101
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
10000
# wb write
1
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
11100
# reg write mem data
00001001000001111010001000100010
# reg write wr write
0
# reg write wr reg
01101
# reg write wr data
01110101000111101100100110011111

# test case 7
# stall
0
# flush
0
# pc
1010101010101010
# aluop
ALU_NOP
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01011110101010011101000100011100
# readdata2
01101011011001111001111110011000
# imm
00101000010100111000100001001110
# branchtype
BR_BR
# memread
1
# memwrite
0
# memtype
MEM_H
# wb rd
10010
# wb write
0
# wb src
WBS_MEM
# reg write mem write
0
# reg write mem reg
00010
# reg write mem data
01100011110100111010011111100000
# reg write wr write
1
# reg write wr reg
11000
# reg write wr data
01101111110001111110010101100101

# test case 8
# stall
0
# flush
0
# pc
0111110001000011
# aluop
ALU_AND
# alusrc1
1
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01000111001100000001110110101010
# readdata2
01011100110111011010001011101011
# imm
00101111110100100011111000100110
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
11010
# wb write
1
# wb src
WBS_OPC
# reg write mem write
1
# reg write mem reg
00111
# reg write mem data
01101011111011000001001100010100
# reg write wr write
1
# reg write wr reg
10110
# reg write wr data
00010101100011111101100000000110

# test case 9
# stall
0
# flush
0
# pc
0101001010011110
# aluop
ALU_XOR
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00001101010001101000101010011100
# readdata2
01001111010001000000011001001001
# imm
01001101100010011110101111100111
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_H
# wb rd
11001
# wb write
1
# wb src
WBS_MEM
# reg write mem write
0
# reg write mem reg
11001
# reg write mem data
00001100110000100001000000001011
# reg write wr write
0
# reg write wr reg
11111
# reg write wr data
01111101101101110101010010011100

# test case 10
# stall
0
# flush
0
# pc
0100100100101100
# aluop
ALU_SLTU
# alusrc1
0
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00011000001010110110010011100001
# readdata2
01001111010001011001000111100001
# imm
01110101010011111110100010010001
# branchtype
BR_BR
# memread
1
# memwrite
0
# memtype
MEM_BU
# wb rd
00011
# wb write
0
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
01011
# reg write mem data
00011000001001001011001001001011
# reg write wr write
0
# reg write wr reg
10010
# reg write wr data
00011010101010111110101110100001

# test case 11
# stall
0
# flush
0
# pc
1100101111010101
# aluop
ALU_SLL
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01011111101100000100110011100011
# readdata2
01100100000100011100101100000011
# imm
01101010000010001011000000101100
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
00100
# wb write
0
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
00011
# reg write mem data
00010011011101001010110110000000
# reg write wr write
1
# reg write wr reg
10100
# reg write wr data
00011011101010011101001100000101

# test case 12
# stall
0
# flush
0
# pc
0010001010010111
# aluop
ALU_AND
# alusrc1
0
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00011100010011110101000010010011
# readdata2
01111110100101111011111110100110
# imm
01100011111110100100001011100101
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_HU
# wb rd
11100
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
11000
# reg write mem data
01011000111100010001110010100101
# reg write wr write
0
# reg write wr reg
00100
# reg write wr data
01111010100101001011100000011101

# test case 13
# stall
0
# flush
0
# pc
1100011101001101
# aluop
ALU_ADD
# alusrc1
1
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00000010101110111010111011111111
# readdata2
00100001000110100111000101010110
# imm
00101110011111001001010100001010
# branchtype
BR_CND
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
10101
# wb write
1
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
01111
# reg write mem data
01011101100100010000001111001011
# reg write wr write
0
# reg write wr reg
10101
# reg write wr data
01101110010110000110000000010010

# test case 14
# stall
0
# flush
0
# pc
1010000010001111
# aluop
ALU_ADD
# alusrc1
0
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01000100110110100010110110110101
# readdata2
01111000010000101101010001011110
# imm
00011000110100010111000100000011
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
01101
# wb write
0
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
11001
# reg write mem data
01001001001011100111010011100000
# reg write wr write
1
# reg write wr reg
00011
# reg write wr data
01101010110111101100011111111111

# test case 15
# stall
0
# flush
0
# pc
1010001000100001
# aluop
ALU_OR
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00111101001101101000001010000101
# readdata2
00110000001111010011011111100110
# imm
00000010011111011010100100010110
# branchtype
BR_CNDI
# memread
1
# memwrite
0
# memtype
MEM_B
# wb rd
01010
# wb write
1
# wb src
WBS_OPC
# reg write mem write
1
# reg write mem reg
10101
# reg write mem data
01110000111011111011111100001100
# reg write wr write
1
# reg write wr reg
11001
# reg write wr data
00100011011101100101110101001100

# test case 16
# stall
0
# flush
0
# pc
0101010011010010
# aluop
ALU_SLT
# alusrc1
1
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00111010101100111101100111111001
# readdata2
01100101010100000101011100111001
# imm
00111010100011110011101111011011
# branchtype
BR_NOP
# memread
1
# memwrite
0
# memtype
MEM_HU
# wb rd
10010
# wb write
0
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
11011
# reg write mem data
00111101110011111100010000010100
# reg write wr write
1
# reg write wr reg
10001
# reg write wr data
01011011101010010100101100001111

# test case 17
# stall
0
# flush
0
# pc
1110111100101011
# aluop
ALU_SRA
# alusrc1
0
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00110100111001001000010010001011
# readdata2
01111101111010010110100010111000
# imm
00010111110001010111101100111011
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_W
# wb rd
01100
# wb write
0
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
00101
# reg write mem data
01110100110110110111010101011010
# reg write wr write
0
# reg write wr reg
00001
# reg write wr data
00001100011100011101011111001010

# test case 18
# stall
0
# flush
0
# pc
0101101001100011
# aluop
ALU_SUB
# alusrc1
0
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01110000000001100000010110100101
# readdata2
00100001100011011010011001001110
# imm
01010000001001100100111000011110
# branchtype
BR_BR
# memread
1
# memwrite
0
# memtype
MEM_W
# wb rd
00000
# wb write
0
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
01000
# reg write mem data
00010011110101001001000001010011
# reg write wr write
0
# reg write wr reg
00011
# reg write wr data
01000010101111111111101100101101

# test case 19
# stall
0
# flush
0
# pc
0000000100101011
# aluop
ALU_OR
# alusrc1
0
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01101111011011111101110011000111
# readdata2
01111101001101100100101110111011
# imm
01001111000100100001001110000101
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_H
# wb rd
10001
# wb write
0
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
00010
# reg write mem data
00100011101001101100110101010010
# reg write wr write
1
# reg write wr reg
00001
# reg write wr data
01011011110100110011010000100111

# test case 20
# stall
0
# flush
0
# pc
0100110001010010
# aluop
ALU_XOR
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01001100000110001110000111101001
# readdata2
00111010010010011110111000110011
# imm
01111100010100111110011001001010
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
01111
# wb write
1
# wb src
WBS_OPC
# reg write mem write
1
# reg write mem reg
01101
# reg write mem data
01001010011101110111100100011000
# reg write wr write
1
# reg write wr reg
10010
# reg write wr data
01110010101100111100111100000110

# test case 21
# stall
0
# flush
0
# pc
1100001010011101
# aluop
ALU_XOR
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01001100100100000101110101011011
# readdata2
00000111111000111111111001011000
# imm
00011011010000000100110101000001
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_BU
# wb rd
00001
# wb write
0
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
11111
# reg write mem data
00010111100010001110110101111000
# reg write wr write
1
# reg write wr reg
01001
# reg write wr data
01011001010001111000111111011100

# test case 22
# stall
0
# flush
0
# pc
0111001111010101
# aluop
ALU_NOP
# alusrc1
0
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00111110011010010001100111110001
# readdata2
01001110010100110100100010000100
# imm
00111000100110010010110010101010
# branchtype
BR_CND
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
10000
# wb write
1
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
01000
# reg write mem data
01001010011011101101100001100011
# reg write wr write
1
# reg write wr reg
01001
# reg write wr data
00110010100010111011101000010001

# test case 23
# stall
0
# flush
0
# pc
0101011111110110
# aluop
ALU_SUB
# alusrc1
0
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01111110000010100101010100111110
# readdata2
00000001101010101010000011111101
# imm
01100111101001110001010101011000
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
10011
# wb write
1
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
11001
# reg write mem data
00100101011101001111001010010010
# reg write wr write
0
# reg write wr reg
00011
# reg write wr data
01111001011000000011111011000101

# test case 24
# stall
0
# flush
0
# pc
0001000110000100
# aluop
ALU_SUB
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00011001100100001111011111011010
# readdata2
01110001100111010010110011100101
# imm
00000011001000000001110101011110
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
01110
# wb write
1
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
11111
# reg write mem data
00010101011000110001010011000001
# reg write wr write
0
# reg write wr reg
11000
# reg write wr data
01101010000101001100010101011110

# test case 25
# stall
0
# flush
0
# pc
1100000110110001
# aluop
ALU_SLT
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00110011111100011001110101011011
# readdata2
01101010100000110101000101010001
# imm
00001001000110101001000111000000
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
01110
# wb write
0
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
00100
# reg write mem data
01101000010111110001010111110101
# reg write wr write
1
# reg write wr reg
00010
# reg write wr data
01010111000100011011011001101101

# test case 26
# stall
0
# flush
0
# pc
0111111011011111
# aluop
ALU_ADD
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01010011111110011111100011001000
# readdata2
01001110001011110110111011111110
# imm
01010011000101001111011110010110
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
00100
# wb write
1
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
10001
# reg write mem data
00100101101001100100010000100001
# reg write wr write
1
# reg write wr reg
10010
# reg write wr data
00100111010100011101110110001011

# test case 27
# stall
0
# flush
0
# pc
1100011000000001
# aluop
ALU_SLL
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00110010111100000001001010100100
# readdata2
01101110011011001101111000001110
# imm
00101100110111001000110001100111
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
10101
# wb write
1
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
11000
# reg write mem data
01011000011100011110101001111000
# reg write wr write
0
# reg write wr reg
01110
# reg write wr data
00000001100001101100111000101011

# test case 28
# stall
0
# flush
0
# pc
1010101011101001
# aluop
ALU_SRL
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00111100110111101100100010101011
# readdata2
01100011000001101111011111011110
# imm
01101010101111101100111110001010
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_HU
# wb rd
11001
# wb write
1
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
11001
# reg write mem data
01110010100000000100100000110010
# reg write wr write
1
# reg write wr reg
00000
# reg write wr data
00011100011111100001000111101000

# test case 29
# stall
0
# flush
0
# pc
1110110010100010
# aluop
ALU_XOR
# alusrc1
1
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01010111001100000000011000010001
# readdata2
01110001110111000110100111111101
# imm
00011110000111001111100111011100
# branchtype
BR_CNDI
# memread
1
# memwrite
0
# memtype
MEM_BU
# wb rd
01100
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
10110
# reg write mem data
00110001111010100000010001000001
# reg write wr write
1
# reg write wr reg
00000
# reg write wr data
01000000110000110111001101011001

# test case 30
# stall
0
# flush
0
# pc
0100010011100111
# aluop
ALU_SLTU
# alusrc1
0
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01110111010111011000110100010110
# readdata2
01000000110010010110101101101000
# imm
01001111011100101111110000010101
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
01001
# wb write
1
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
00001
# reg write mem data
01111111111000100110111010001011
# reg write wr write
1
# reg write wr reg
11101
# reg write wr data
00111111101100001000111100101111

# test case 31
# stall
0
# flush
0
# pc
0111000111110110
# aluop
ALU_SUB
# alusrc1
1
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00011101001010110010100000010100
# readdata2
00001111100000101110100111111010
# imm
01101001101000100111010100011011
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
10010
# wb write
1
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
10010
# reg write mem data
00111101011001000001110111111100
# reg write wr write
1
# reg write wr reg
00111
# reg write wr data
01111110111010110110110111000100

# test case 32
# stall
0
# flush
0
# pc
0000000011010001
# aluop
ALU_SUB
# alusrc1
1
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00000011001110010010000001111100
# readdata2
01000011010000101101100000101111
# imm
01111001001000101100111010001011
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
11110
# wb write
0
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
01010
# reg write mem data
01000111111101011110000010001010
# reg write wr write
0
# reg write wr reg
00101
# reg write wr data
01110011010110111100110111010101

# test case 33
# stall
0
# flush
0
# pc
0000000000110110
# aluop
ALU_ADD
# alusrc1
0
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01000011011101010100111100101001
# readdata2
00001000101101100010011100110111
# imm
01111000001001001111011111111100
# branchtype
BR_CND
# memread
0
# memwrite
1
# memtype
MEM_HU
# wb rd
00011
# wb write
1
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
00011
# reg write mem data
01100100000000000011000001101010
# reg write wr write
1
# reg write wr reg
01110
# reg write wr data
01110010100110000011000100110001

# test case 34
# stall
0
# flush
0
# pc
1000110011101110
# aluop
ALU_SLL
# alusrc1
1
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00100101101000101111111011110001
# readdata2
00110101001000011111001100101001
# imm
01011011110110000010110110000111
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
00011
# wb write
0
# wb src
WBS_MEM
# reg write mem write
0
# reg write mem reg
01000
# reg write mem data
00010101111000010100101010001110
# reg write wr write
1
# reg write wr reg
00100
# reg write wr data
01011010010111010101010001000000

# test case 35
# stall
0
# flush
0
# pc
1011010111011110
# aluop
ALU_XOR
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00011111110101011100111000010101
# readdata2
01100000000100000010011001100100
# imm
01100010111011100001010011111101
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
00101
# wb write
0
# wb src
WBS_OPC
# reg write mem write
1
# reg write mem reg
11000
# reg write mem data
00001111110011101110100100001111
# reg write wr write
0
# reg write wr reg
11111
# reg write wr data
01010101111100100010110011111101

# test case 36
# stall
0
# flush
0
# pc
1111000100011011
# aluop
ALU_SLT
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01001100011011101110111100001001
# readdata2
00111100101000010000010011101011
# imm
00100000101001111010110110001111
# branchtype
BR_NOP
# memread
1
# memwrite
0
# memtype
MEM_BU
# wb rd
00110
# wb write
0
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
00111
# reg write mem data
00111000110010010010111010101000
# reg write wr write
0
# reg write wr reg
00100
# reg write wr data
00011101110010010100010000111111

# test case 37
# stall
0
# flush
0
# pc
1000101110111111
# aluop
ALU_NOP
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00010011001001101001000011101000
# readdata2
01010101010001001011110000110001
# imm
00110011001110110101101101100000
# branchtype
BR_NOP
# memread
1
# memwrite
0
# memtype
MEM_HU
# wb rd
01111
# wb write
1
# wb src
WBS_MEM
# reg write mem write
0
# reg write mem reg
01111
# reg write mem data
00101101000001101110100010000111
# reg write wr write
1
# reg write wr reg
11110
# reg write wr data
01110111001100000111110010101111

# test case 38
# stall
0
# flush
0
# pc
0010011000001101
# aluop
ALU_SUB
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00001010100011011100111011011110
# readdata2
01110111011000001001101110001001
# imm
01101110111101010011000110101001
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_H
# wb rd
01001
# wb write
0
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
10001
# reg write mem data
01001110001001001110110110010101
# reg write wr write
0
# reg write wr reg
10010
# reg write wr data
01111011010101000001101111001010

# test case 39
# stall
0
# flush
0
# pc
1110101101000101
# aluop
ALU_OR
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00010110010111111110100001101100
# readdata2
01101011010001100110111001100010
# imm
00000001110011111001110111010100
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_W
# wb rd
10110
# wb write
0
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
01111
# reg write mem data
00101111111101011011000000011000
# reg write wr write
1
# reg write wr reg
11001
# reg write wr data
01111000101110011010110110000010

# test case 40
# stall
0
# flush
0
# pc
1010100001001110
# aluop
ALU_XOR
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01101111010011010011110101001111
# readdata2
00110001010001111110011000100000
# imm
01100101101101011010011001000101
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_B
# wb rd
01001
# wb write
0
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
01111
# reg write mem data
00111001011010111110010110010100
# reg write wr write
0
# reg write wr reg
00100
# reg write wr data
01100000110010101000000000111110

# test case 41
# stall
0
# flush
0
# pc
1110010000011110
# aluop
ALU_NOP
# alusrc1
0
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00001111100010000111000000101100
# readdata2
00000100110110000100100111111100
# imm
00110101011100011101010001011010
# branchtype
BR_BR
# memread
1
# memwrite
0
# memtype
MEM_HU
# wb rd
11100
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
00111
# reg write mem data
00101101100000001111010111010111
# reg write wr write
1
# reg write wr reg
01100
# reg write wr data
01010001010101111111010111111011

# test case 42
# stall
0
# flush
0
# pc
1111000011111110
# aluop
ALU_SRL
# alusrc1
0
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01101000101010100100100000100000
# readdata2
00111011100010100101000100001111
# imm
01101100000001101000111111011000
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_HU
# wb rd
11100
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
11101
# reg write mem data
01011001001110001100000100110111
# reg write wr write
0
# reg write wr reg
10111
# reg write wr data
01110010110010101111110000100100

# test case 43
# stall
0
# flush
0
# pc
0001000011111011
# aluop
ALU_SLT
# alusrc1
0
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
01101001101110001101000010101011
# readdata2
01000101010010011110000111011010
# imm
01010111100000001110010101110100
# branchtype
BR_CNDI
# memread
0
# memwrite
1
# memtype
MEM_BU
# wb rd
10101
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
00100
# reg write mem data
01111001101001110000010011110011
# reg write wr write
0
# reg write wr reg
11100
# reg write wr data
01001110000111100010001000110001

# test case 44
# stall
0
# flush
0
# pc
0010101000011000
# aluop
ALU_SLT
# alusrc1
1
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00001101100100111011101001110111
# readdata2
00011000010100011100011110010001
# imm
00010001101110001101011001110100
# branchtype
BR_BR
# memread
0
# memwrite
1
# memtype
MEM_H
# wb rd
11000
# wb write
0
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
11001
# reg write mem data
01011111101111101000001010100100
# reg write wr write
1
# reg write wr reg
01101
# reg write wr data
01110010111101100010101010111011

# test case 45
# stall
0
# flush
0
# pc
1111100000101011
# aluop
ALU_SLT
# alusrc1
0
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01111011001111110010001101000101
# readdata2
00111110010010001001011001110001
# imm
01110110101111000010011000100010
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_BU
# wb rd
00010
# wb write
0
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
11101
# reg write mem data
01101110010010100010011001010111
# reg write wr write
0
# reg write wr reg
10001
# reg write wr data
01110010011011011100000110110100

# test case 46
# stall
0
# flush
0
# pc
0010100011101111
# aluop
ALU_XOR
# alusrc1
1
# alusrc2
1
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00001101101001111011011101111000
# readdata2
00011111011001011000000001000100
# imm
01110011100110000000000110100111
# branchtype
BR_CND
# memread
1
# memwrite
0
# memtype
MEM_BU
# wb rd
01001
# wb write
1
# wb src
WBS_ALU
# reg write mem write
0
# reg write mem reg
11100
# reg write mem data
00101101110001010001001101111000
# reg write wr write
1
# reg write wr reg
11110
# reg write wr data
00010011110101011110011101000010

# test case 47
# stall
0
# flush
0
# pc
0010111000010100
# aluop
ALU_SRA
# alusrc1
0
# alusrc2
0
# alusrc3
0
# rs1
00000
# rs2
00000
# readdata1
00001010111110101100100110111010
# readdata2
00100001010011010110000011010001
# imm
01010110011010011000111101101001
# branchtype
BR_NOP
# memread
0
# memwrite
1
# memtype
MEM_HU
# wb rd
01111
# wb write
0
# wb src
WBS_ALU
# reg write mem write
1
# reg write mem reg
01110
# reg write mem data
00011000010011000111011010100011
# reg write wr write
1
# reg write wr reg
10101
# reg write wr data
00110111000110000101100101100001

# test case 48
# stall
0
# flush
0
# pc
0000010100010001
# aluop
ALU_XOR
# alusrc1
1
# alusrc2
0
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
00000110111001101000000101100001
# readdata2
01101001000110100000000101011011
# imm
00100110101110111101100100000011
# branchtype
BR_NOP
# memread
1
# memwrite
0
# memtype
MEM_B
# wb rd
11100
# wb write
1
# wb src
WBS_MEM
# reg write mem write
1
# reg write mem reg
11101
# reg write mem data
01001100111000110110111100100100
# reg write wr write
0
# reg write wr reg
00110
# reg write wr data
01110011110100111110010100000101

# test case 49
# stall
0
# flush
0
# pc
1000101111100101
# aluop
ALU_SUB
# alusrc1
0
# alusrc2
1
# alusrc3
1
# rs1
00000
# rs2
00000
# readdata1
01011001001010111111111101101111
# readdata2
01110110001110100101101101111111
# imm
01011101011000110011001011010011
# branchtype
BR_CNDI
# memread
1
# memwrite
0
# memtype
MEM_B
# wb rd
00000
# wb write
1
# wb src
WBS_OPC
# reg write mem write
0
# reg write mem reg
11000
# reg write mem data
01110110001110010100000111100000
# reg write wr write
1
# reg write wr reg
11011
# reg write wr data
01100111011101111010011011001000