jedec.c 14 KB

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  1. /*
  2. * This file is part of the flashrom project.
  3. *
  4. * Copyright (C) 2000 Silicon Integrated System Corporation
  5. * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
  6. * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
  7. * Copyright (C) 2007 Carl-Daniel Hailfinger
  8. * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  23. */
  24. #include "flash.h"
  25. #define MAX_REFLASH_TRIES 0x10
  26. #define MASK_FULL 0xffff
  27. #define MASK_2AA 0x7ff
  28. #define MASK_AAA 0xfff
  29. /* Check one byte for odd parity */
  30. uint8_t oddparity(uint8_t val)
  31. {
  32. val = (val ^ (val >> 4)) & 0xf;
  33. val = (val ^ (val >> 2)) & 0x3;
  34. return (val ^ (val >> 1)) & 0x1;
  35. }
  36. static void toggle_ready_jedec_common(const struct flashctx *flash, chipaddr dst, int delay)
  37. {
  38. unsigned int i = 0;
  39. uint8_t tmp1, tmp2;
  40. tmp1 = chip_readb(flash, dst) & 0x40;
  41. while (i++ < 0xFFFFFFF) {
  42. if (delay)
  43. programmer_delay(delay);
  44. tmp2 = chip_readb(flash, dst) & 0x40;
  45. if (tmp1 == tmp2) {
  46. break;
  47. }
  48. tmp1 = tmp2;
  49. }
  50. if (i > 0x100000)
  51. msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
  52. }
  53. void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst)
  54. {
  55. toggle_ready_jedec_common(flash, dst, 0);
  56. }
  57. /* Some chips require a minimum delay between toggle bit reads.
  58. * The Winbond W39V040C wants 50 ms between reads on sector erase toggle,
  59. * but experiments show that 2 ms are already enough. Pick a safety factor
  60. * of 4 and use an 8 ms delay.
  61. * Given that erase is slow on all chips, it is recommended to use
  62. * toggle_ready_jedec_slow in erase functions.
  63. */
  64. static void toggle_ready_jedec_slow(const struct flashctx *flash, chipaddr dst)
  65. {
  66. toggle_ready_jedec_common(flash, dst, 8 * 1000);
  67. }
  68. void data_polling_jedec(const struct flashctx *flash, chipaddr dst, uint8_t data)
  69. {
  70. unsigned int i = 0;
  71. uint8_t tmp;
  72. data &= 0x80;
  73. while (i++ < 0xFFFFFFF) {
  74. tmp = chip_readb(flash, dst) & 0x80;
  75. if (tmp == data) {
  76. break;
  77. }
  78. }
  79. if (i > 0x100000)
  80. msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
  81. }
  82. static unsigned int getaddrmask(struct flashctx *flash)
  83. {
  84. switch (flash->feature_bits & FEATURE_ADDR_MASK) {
  85. case FEATURE_ADDR_FULL:
  86. return MASK_FULL;
  87. break;
  88. case FEATURE_ADDR_2AA:
  89. return MASK_2AA;
  90. break;
  91. case FEATURE_ADDR_AAA:
  92. return MASK_AAA;
  93. break;
  94. default:
  95. msg_cerr("%s called with unknown mask\n", __func__);
  96. return 0;
  97. break;
  98. }
  99. }
  100. static void start_program_jedec_common(struct flashctx *flash, unsigned int mask)
  101. {
  102. chipaddr bios = flash->virtual_memory;
  103. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  104. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  105. chip_writeb(flash, 0xA0, bios + (0x5555 & mask));
  106. }
  107. static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
  108. {
  109. chipaddr bios = flash->virtual_memory;
  110. uint8_t id1, id2;
  111. uint32_t largeid1, largeid2;
  112. uint32_t flashcontent1, flashcontent2;
  113. int probe_timing_enter, probe_timing_exit;
  114. if (flash->probe_timing > 0)
  115. probe_timing_enter = probe_timing_exit = flash->probe_timing;
  116. else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
  117. probe_timing_enter = probe_timing_exit = 0;
  118. } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
  119. msg_cdbg("Chip lacks correct probe timing information, "
  120. "using default 10mS/40uS. ");
  121. probe_timing_enter = 10000;
  122. probe_timing_exit = 40;
  123. } else {
  124. msg_cerr("Chip has negative value in probe_timing, failing "
  125. "without chip access\n");
  126. return 0;
  127. }
  128. /* Earlier probes might have been too fast for the chip to enter ID
  129. * mode completely. Allow the chip to finish this before seeing a
  130. * reset command.
  131. */
  132. if (probe_timing_enter)
  133. programmer_delay(probe_timing_enter);
  134. /* Reset chip to a clean slate */
  135. if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
  136. {
  137. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  138. if (probe_timing_exit)
  139. programmer_delay(10);
  140. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  141. if (probe_timing_exit)
  142. programmer_delay(10);
  143. }
  144. chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
  145. if (probe_timing_exit)
  146. programmer_delay(probe_timing_exit);
  147. /* Issue JEDEC Product ID Entry command */
  148. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  149. if (probe_timing_enter)
  150. programmer_delay(10);
  151. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  152. if (probe_timing_enter)
  153. programmer_delay(10);
  154. chip_writeb(flash, 0x90, bios + (0x5555 & mask));
  155. if (probe_timing_enter)
  156. programmer_delay(probe_timing_enter);
  157. /* Read product ID */
  158. id1 = chip_readb(flash, bios);
  159. id2 = chip_readb(flash, bios + 0x01);
  160. largeid1 = id1;
  161. largeid2 = id2;
  162. /* Check if it is a continuation ID, this should be a while loop. */
  163. if (id1 == 0x7F) {
  164. largeid1 <<= 8;
  165. id1 = chip_readb(flash, bios + 0x100);
  166. largeid1 |= id1;
  167. }
  168. if (id2 == 0x7F) {
  169. largeid2 <<= 8;
  170. id2 = chip_readb(flash, bios + 0x101);
  171. largeid2 |= id2;
  172. }
  173. /* Issue JEDEC Product ID Exit command */
  174. if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
  175. {
  176. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  177. if (probe_timing_exit)
  178. programmer_delay(10);
  179. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  180. if (probe_timing_exit)
  181. programmer_delay(10);
  182. }
  183. chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
  184. if (probe_timing_exit)
  185. programmer_delay(probe_timing_exit);
  186. msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);
  187. if (!oddparity(id1))
  188. msg_cdbg(", id1 parity violation");
  189. /* Read the product ID location again. We should now see normal flash contents. */
  190. flashcontent1 = chip_readb(flash, bios);
  191. flashcontent2 = chip_readb(flash, bios + 0x01);
  192. /* Check if it is a continuation ID, this should be a while loop. */
  193. if (flashcontent1 == 0x7F) {
  194. flashcontent1 <<= 8;
  195. flashcontent1 |= chip_readb(flash, bios + 0x100);
  196. }
  197. if (flashcontent2 == 0x7F) {
  198. flashcontent2 <<= 8;
  199. flashcontent2 |= chip_readb(flash, bios + 0x101);
  200. }
  201. if (largeid1 == flashcontent1)
  202. msg_cdbg(", id1 is normal flash content");
  203. if (largeid2 == flashcontent2)
  204. msg_cdbg(", id2 is normal flash content");
  205. msg_cdbg("\n");
  206. if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id)
  207. return 0;
  208. if (flash->feature_bits & FEATURE_REGISTERMAP)
  209. map_flash_registers(flash);
  210. return 1;
  211. }
  212. static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
  213. unsigned int pagesize, unsigned int mask)
  214. {
  215. chipaddr bios = flash->virtual_memory;
  216. int delay_us = 0;
  217. if(flash->probe_timing != TIMING_ZERO)
  218. delay_us = 10;
  219. /* Issue the Sector Erase command */
  220. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  221. programmer_delay(delay_us);
  222. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  223. programmer_delay(delay_us);
  224. chip_writeb(flash, 0x80, bios + (0x5555 & mask));
  225. programmer_delay(delay_us);
  226. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  227. programmer_delay(delay_us);
  228. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  229. programmer_delay(delay_us);
  230. chip_writeb(flash, 0x30, bios + page);
  231. programmer_delay(delay_us);
  232. /* wait for Toggle bit ready */
  233. toggle_ready_jedec_slow(flash, bios);
  234. /* FIXME: Check the status register for errors. */
  235. return 0;
  236. }
  237. static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
  238. unsigned int blocksize, unsigned int mask)
  239. {
  240. chipaddr bios = flash->virtual_memory;
  241. int delay_us = 0;
  242. if(flash->probe_timing != TIMING_ZERO)
  243. delay_us = 10;
  244. /* Issue the Sector Erase command */
  245. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  246. programmer_delay(delay_us);
  247. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  248. programmer_delay(delay_us);
  249. chip_writeb(flash, 0x80, bios + (0x5555 & mask));
  250. programmer_delay(delay_us);
  251. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  252. programmer_delay(delay_us);
  253. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  254. programmer_delay(delay_us);
  255. chip_writeb(flash, 0x50, bios + block);
  256. programmer_delay(delay_us);
  257. /* wait for Toggle bit ready */
  258. toggle_ready_jedec_slow(flash, bios);
  259. /* FIXME: Check the status register for errors. */
  260. return 0;
  261. }
  262. static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask)
  263. {
  264. chipaddr bios = flash->virtual_memory;
  265. int delay_us = 0;
  266. if(flash->probe_timing != TIMING_ZERO)
  267. delay_us = 10;
  268. /* Issue the JEDEC Chip Erase command */
  269. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  270. programmer_delay(delay_us);
  271. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  272. programmer_delay(delay_us);
  273. chip_writeb(flash, 0x80, bios + (0x5555 & mask));
  274. programmer_delay(delay_us);
  275. chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
  276. programmer_delay(delay_us);
  277. chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
  278. programmer_delay(delay_us);
  279. chip_writeb(flash, 0x10, bios + (0x5555 & mask));
  280. programmer_delay(delay_us);
  281. toggle_ready_jedec_slow(flash, bios);
  282. /* FIXME: Check the status register for errors. */
  283. return 0;
  284. }
  285. static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src,
  286. chipaddr dst, unsigned int mask)
  287. {
  288. int tried = 0, failed = 0;
  289. chipaddr bios = flash->virtual_memory;
  290. /* If the data is 0xFF, don't program it and don't complain. */
  291. if (*src == 0xFF) {
  292. return 0;
  293. }
  294. retry:
  295. /* Issue JEDEC Byte Program command */
  296. start_program_jedec_common(flash, mask);
  297. /* transfer data from source to destination */
  298. chip_writeb(flash, *src, dst);
  299. toggle_ready_jedec(flash, bios);
  300. if (chip_readb(flash, dst) != *src && tried++ < MAX_REFLASH_TRIES) {
  301. goto retry;
  302. }
  303. if (tried >= MAX_REFLASH_TRIES)
  304. failed = 1;
  305. return failed;
  306. }
  307. /* chunksize is 1 */
  308. int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
  309. {
  310. int i, failed = 0;
  311. chipaddr dst = flash->virtual_memory + start;
  312. chipaddr olddst;
  313. unsigned int mask;
  314. mask = getaddrmask(flash);
  315. olddst = dst;
  316. for (i = 0; i < len; i++) {
  317. if (write_byte_program_jedec_common(flash, src, dst, mask))
  318. failed = 1;
  319. dst++, src++;
  320. }
  321. if (failed)
  322. msg_cerr(" writing sector at 0x%lx failed!\n", olddst);
  323. return failed;
  324. }
  325. int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size)
  326. {
  327. int i, tried = 0, failed;
  328. uint8_t *s = src;
  329. chipaddr bios = flash->virtual_memory;
  330. chipaddr dst = bios + start;
  331. chipaddr d = dst;
  332. unsigned int mask;
  333. mask = getaddrmask(flash);
  334. retry:
  335. /* Issue JEDEC Start Program command */
  336. start_program_jedec_common(flash, mask);
  337. /* transfer data from source to destination */
  338. for (i = 0; i < page_size; i++) {
  339. /* If the data is 0xFF, don't program it */
  340. if (*src != 0xFF)
  341. chip_writeb(flash, *src, dst);
  342. dst++;
  343. src++;
  344. }
  345. toggle_ready_jedec(flash, dst - 1);
  346. dst = d;
  347. src = s;
  348. failed = verify_range(flash, src, start, page_size, NULL);
  349. if (failed && tried++ < MAX_REFLASH_TRIES) {
  350. msg_cerr("retrying.\n");
  351. goto retry;
  352. }
  353. if (failed) {
  354. msg_cerr(" page 0x%lx failed!\n",
  355. (d - bios) / page_size);
  356. }
  357. return failed;
  358. }
  359. /* chunksize is page_size */
  360. /*
  361. * Write a part of the flash chip.
  362. * FIXME: Use the chunk code from Michael Karcher instead.
  363. * This function is a slightly modified copy of spi_write_chunked.
  364. * Each page is written separately in chunks with a maximum size of chunksize.
  365. */
  366. int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
  367. {
  368. unsigned int i, starthere, lenhere;
  369. /* FIXME: page_size is the wrong variable. We need max_writechunk_size
  370. * in struct flashctx to do this properly. All chips using
  371. * write_jedec have page_size set to max_writechunk_size, so
  372. * we're OK for now.
  373. */
  374. unsigned int page_size = flash->page_size;
  375. /* Warning: This loop has a very unusual condition and body.
  376. * The loop needs to go through each page with at least one affected
  377. * byte. The lowest page number is (start / page_size) since that
  378. * division rounds down. The highest page number we want is the page
  379. * where the last byte of the range lives. That last byte has the
  380. * address (start + len - 1), thus the highest page number is
  381. * (start + len - 1) / page_size. Since we want to include that last
  382. * page as well, the loop condition uses <=.
  383. */
  384. for (i = start / page_size; i <= (start + len - 1) / page_size; i++) {
  385. /* Byte position of the first byte in the range in this page. */
  386. /* starthere is an offset to the base address of the chip. */
  387. starthere = max(start, i * page_size);
  388. /* Length of bytes in the range in this page. */
  389. lenhere = min(start + len, (i + 1) * page_size) - starthere;
  390. if (write_page_write_jedec_common(flash, buf + starthere - start, starthere, lenhere))
  391. return 1;
  392. }
  393. return 0;
  394. }
  395. /* erase chip with block_erase() prototype */
  396. int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr,
  397. unsigned int blocksize)
  398. {
  399. unsigned int mask;
  400. mask = getaddrmask(flash);
  401. if ((addr != 0) || (blocksize != flash->total_size * 1024)) {
  402. msg_cerr("%s called with incorrect arguments\n",
  403. __func__);
  404. return -1;
  405. }
  406. return erase_chip_jedec_common(flash, mask);
  407. }
  408. int probe_jedec(struct flashctx *flash)
  409. {
  410. unsigned int mask;
  411. mask = getaddrmask(flash);
  412. return probe_jedec_common(flash, mask);
  413. }
  414. int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
  415. {
  416. unsigned int mask;
  417. mask = getaddrmask(flash);
  418. return erase_sector_jedec_common(flash, page, size, mask);
  419. }
  420. int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
  421. {
  422. unsigned int mask;
  423. mask = getaddrmask(flash);
  424. return erase_block_jedec_common(flash, page, size, mask);
  425. }
  426. int erase_chip_jedec(struct flashctx *flash)
  427. {
  428. unsigned int mask;
  429. mask = getaddrmask(flash);
  430. return erase_chip_jedec_common(flash, mask);
  431. }