Historique des commits

Auteur SHA1 Message Date
  David Hendricks 57b7524b14 spi: Allow cached ID bytes to be cleared il y a 9 ans
  Vadim Bendebury 3a50116286 Add partial support for S25FL256S. il y a 10 ans
  David Hendricks 1ed1d35d8f Skip regions locked via flash descriptor for Intel platforms il y a 13 ans
  hailfinger e30f6d5ea1 Add paranoid checks for correct values in essential registers in the il y a 14 ans
  hailfinger 2cddad344a The AAI code rewrite in r1052 introduced a bug: The writelen of AAI il y a 14 ans
  hailfinger c33d4730ec Add detailed status register printing and unlocking for all ATMEL AT25* il y a 14 ans
  hailfinger 19db09299e Modernize SPI AAI code, blacklist IT87 SPI for AAI, allow AAI to run il y a 14 ans
  hailfinger 59a8357d80 Some chips implement the RES (0xab) opcode, but they use a non-standard il y a 14 ans
  snelson 4d31f0d41f Convert chips to block_erasers: il y a 15 ans
  hailfinger 9c5add71e0 Add Bus Pirate SPI support to flashrom. il y a 15 ans
  hailfinger 9c290a72b3 Use a distinct return code for SPI commands with unsupported/invalid il y a 15 ans
  hailfinger 54c1466d72 There are various reasons why a SPI command can fail. Among others, I il y a 15 ans
  hailfinger 19376c9144 Original v2 revision: 3781 il y a 16 ans
  uwe 17efbedfba Original v2 revision: 3779 il y a 16 ans
  hailfinger 3dd0c3ec16 Original v2 revision: 3775 il y a 16 ans
  hailfinger 222ed8c65d Original v2 revision: 3754 il y a 16 ans
  stuge 494b4eb02f Original v2 revision: 3418 il y a 16 ans
  hailfinger 82893120c3 Original v2 revision: 3320 il y a 16 ans
  hailfinger 7803156eda Original v2 revision: 3302 il y a 16 ans