isa_dma.c 15 KB

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  1. /*-
  2. * SPDX-License-Identifier: BSD-3-Clause
  3. *
  4. * Copyright (c) 1991 The Regents of the University of California.
  5. * All rights reserved.
  6. *
  7. * This code is derived from software contributed to Berkeley by
  8. * William Jolitz.
  9. *
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in the
  17. * documentation and/or other materials provided with the distribution.
  18. * 3. Neither the name of the University nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  23. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25. * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32. * SUCH DAMAGE.
  33. *
  34. * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
  35. */
  36. #include <sys/cdefs.h>
  37. __FBSDID("$FreeBSD$");
  38. /*
  39. * code to manage AT bus
  40. *
  41. * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
  42. * Fixed uninitialized variable problem and added code to deal
  43. * with DMA page boundaries in isa_dmarangecheck(). Fixed word
  44. * mode DMA count compution and reorganized DMA setup code in
  45. * isa_dmastart()
  46. */
  47. #include <sys/param.h>
  48. #include <sys/systm.h>
  49. #include <sys/bus.h>
  50. #include <sys/kernel.h>
  51. #include <sys/malloc.h>
  52. #include <sys/lock.h>
  53. #include <sys/proc.h>
  54. #include <sys/mutex.h>
  55. #include <sys/module.h>
  56. #include <vm/vm.h>
  57. #include <vm/vm_param.h>
  58. #include <vm/pmap.h>
  59. #include <isa/isareg.h>
  60. #include <isa/isavar.h>
  61. #include <isa/isa_dmareg.h>
  62. #define ISARAM_END 0x1000000
  63. static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
  64. static caddr_t dma_bouncebuf[8];
  65. static u_int dma_bouncebufsize[8];
  66. static u_int8_t dma_bounced = 0;
  67. static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
  68. static u_int8_t dma_inuse = 0; /* User for acquire/release */
  69. static u_int8_t dma_auto_mode = 0;
  70. static struct mtx isa_dma_lock;
  71. MTX_SYSINIT(isa_dma_lock, &isa_dma_lock, "isa DMA lock", MTX_DEF);
  72. #define VALID_DMA_MASK (7)
  73. /* high byte of address is stored in this port for i-th dma channel */
  74. static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
  75. /*
  76. * Setup a DMA channel's bounce buffer.
  77. */
  78. int
  79. isa_dma_init(int chan, u_int bouncebufsize, int flag)
  80. {
  81. void *buf;
  82. int contig;
  83. #ifdef DIAGNOSTIC
  84. if (chan & ~VALID_DMA_MASK)
  85. panic("isa_dma_init: channel out of range");
  86. #endif
  87. /* Try malloc() first. It works better if it works. */
  88. buf = malloc(bouncebufsize, M_DEVBUF, flag);
  89. if (buf != NULL) {
  90. if (isa_dmarangecheck(buf, bouncebufsize, chan) != 0) {
  91. free(buf, M_DEVBUF);
  92. buf = NULL;
  93. }
  94. contig = 0;
  95. }
  96. if (buf == NULL) {
  97. buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
  98. 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
  99. contig = 1;
  100. }
  101. if (buf == NULL)
  102. return (ENOMEM);
  103. mtx_lock(&isa_dma_lock);
  104. /*
  105. * If a DMA channel is shared, both drivers have to call isa_dma_init
  106. * since they don't know that the other driver will do it.
  107. * Just return if we're already set up good.
  108. * XXX: this only works if they agree on the bouncebuf size. This
  109. * XXX: is typically the case since they are multiple instances of
  110. * XXX: the same driver.
  111. */
  112. if (dma_bouncebuf[chan] != NULL) {
  113. if (contig)
  114. contigfree(buf, bouncebufsize, M_DEVBUF);
  115. else
  116. free(buf, M_DEVBUF);
  117. mtx_unlock(&isa_dma_lock);
  118. return (0);
  119. }
  120. dma_bouncebufsize[chan] = bouncebufsize;
  121. dma_bouncebuf[chan] = buf;
  122. mtx_unlock(&isa_dma_lock);
  123. return (0);
  124. }
  125. /*
  126. * Register a DMA channel's usage. Usually called from a device driver
  127. * in open() or during its initialization.
  128. */
  129. int
  130. isa_dma_acquire(int chan)
  131. {
  132. #ifdef DIAGNOSTIC
  133. if (chan & ~VALID_DMA_MASK)
  134. panic("isa_dma_acquire: channel out of range");
  135. #endif
  136. mtx_lock(&isa_dma_lock);
  137. if (dma_inuse & (1 << chan)) {
  138. printf("isa_dma_acquire: channel %d already in use\n", chan);
  139. mtx_unlock(&isa_dma_lock);
  140. return (EBUSY);
  141. }
  142. dma_inuse |= (1 << chan);
  143. dma_auto_mode &= ~(1 << chan);
  144. mtx_unlock(&isa_dma_lock);
  145. return (0);
  146. }
  147. /*
  148. * Unregister a DMA channel's usage. Usually called from a device driver
  149. * during close() or during its shutdown.
  150. */
  151. void
  152. isa_dma_release(int chan)
  153. {
  154. #ifdef DIAGNOSTIC
  155. if (chan & ~VALID_DMA_MASK)
  156. panic("isa_dma_release: channel out of range");
  157. mtx_lock(&isa_dma_lock);
  158. if ((dma_inuse & (1 << chan)) == 0)
  159. printf("isa_dma_release: channel %d not in use\n", chan);
  160. #else
  161. mtx_lock(&isa_dma_lock);
  162. #endif
  163. if (dma_busy & (1 << chan)) {
  164. dma_busy &= ~(1 << chan);
  165. /*
  166. * XXX We should also do "dma_bounced &= (1 << chan);"
  167. * because we are acting on behalf of isa_dmadone() which
  168. * was not called to end the last DMA operation. This does
  169. * not matter now, but it may in the future.
  170. */
  171. }
  172. dma_inuse &= ~(1 << chan);
  173. dma_auto_mode &= ~(1 << chan);
  174. mtx_unlock(&isa_dma_lock);
  175. }
  176. /*
  177. * isa_dmacascade(): program 8237 DMA controller channel to accept
  178. * external dma control by a board.
  179. */
  180. void
  181. isa_dmacascade(int chan)
  182. {
  183. #ifdef DIAGNOSTIC
  184. if (chan & ~VALID_DMA_MASK)
  185. panic("isa_dmacascade: channel out of range");
  186. #endif
  187. mtx_lock(&isa_dma_lock);
  188. /* set dma channel mode, and set dma channel mode */
  189. if ((chan & 4) == 0) {
  190. outb(DMA1_MODE, DMA37MD_CASCADE | chan);
  191. outb(DMA1_SMSK, chan);
  192. } else {
  193. outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
  194. outb(DMA2_SMSK, chan & 3);
  195. }
  196. mtx_unlock(&isa_dma_lock);
  197. }
  198. /*
  199. * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
  200. * problems by using a bounce buffer.
  201. */
  202. void
  203. isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
  204. {
  205. vm_paddr_t phys;
  206. int waport;
  207. caddr_t newaddr;
  208. int dma_range_checked;
  209. dma_range_checked = isa_dmarangecheck(addr, nbytes, chan);
  210. #ifdef DIAGNOSTIC
  211. if (chan & ~VALID_DMA_MASK)
  212. panic("isa_dmastart: channel out of range");
  213. if ((chan < 4 && nbytes > (1<<16))
  214. || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
  215. panic("isa_dmastart: impossible request");
  216. mtx_lock(&isa_dma_lock);
  217. if ((dma_inuse & (1 << chan)) == 0)
  218. printf("isa_dmastart: channel %d not acquired\n", chan);
  219. #else
  220. mtx_lock(&isa_dma_lock);
  221. #endif
  222. #if 0
  223. /*
  224. * XXX This should be checked, but drivers like ad1848 only call
  225. * isa_dmastart() once because they use Auto DMA mode. If we
  226. * leave this in, drivers that do this will print this continuously.
  227. */
  228. if (dma_busy & (1 << chan))
  229. printf("isa_dmastart: channel %d busy\n", chan);
  230. #endif
  231. dma_busy |= (1 << chan);
  232. if (dma_range_checked) {
  233. if (dma_bouncebuf[chan] == NULL
  234. || dma_bouncebufsize[chan] < nbytes)
  235. panic("isa_dmastart: bad bounce buffer");
  236. dma_bounced |= (1 << chan);
  237. newaddr = dma_bouncebuf[chan];
  238. /* copy bounce buffer on write */
  239. if (!(flags & ISADMA_READ))
  240. bcopy(addr, newaddr, nbytes);
  241. addr = newaddr;
  242. }
  243. /* translate to physical */
  244. phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
  245. if (flags & ISADMA_RAW) {
  246. dma_auto_mode |= (1 << chan);
  247. } else {
  248. dma_auto_mode &= ~(1 << chan);
  249. }
  250. if ((chan & 4) == 0) {
  251. /*
  252. * Program one of DMA channels 0..3. These are
  253. * byte mode channels.
  254. */
  255. /* set dma channel mode, and reset address ff */
  256. /* If ISADMA_RAW flag is set, then use autoinitialise mode */
  257. if (flags & ISADMA_RAW) {
  258. if (flags & ISADMA_READ)
  259. outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
  260. else
  261. outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
  262. }
  263. else
  264. if (flags & ISADMA_READ)
  265. outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
  266. else
  267. outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
  268. outb(DMA1_FFC, 0);
  269. /* send start address */
  270. waport = DMA1_CHN(chan);
  271. outb(waport, phys);
  272. outb(waport, phys>>8);
  273. outb(dmapageport[chan], phys>>16);
  274. /* send count */
  275. outb(waport + 1, --nbytes);
  276. outb(waport + 1, nbytes>>8);
  277. /* unmask channel */
  278. outb(DMA1_SMSK, chan);
  279. } else {
  280. /*
  281. * Program one of DMA channels 4..7. These are
  282. * word mode channels.
  283. */
  284. /* set dma channel mode, and reset address ff */
  285. /* If ISADMA_RAW flag is set, then use autoinitialise mode */
  286. if (flags & ISADMA_RAW) {
  287. if (flags & ISADMA_READ)
  288. outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
  289. else
  290. outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
  291. }
  292. else
  293. if (flags & ISADMA_READ)
  294. outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
  295. else
  296. outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
  297. outb(DMA2_FFC, 0);
  298. /* send start address */
  299. waport = DMA2_CHN(chan - 4);
  300. outb(waport, phys>>1);
  301. outb(waport, phys>>9);
  302. outb(dmapageport[chan], phys>>16);
  303. /* send count */
  304. nbytes >>= 1;
  305. outb(waport + 2, --nbytes);
  306. outb(waport + 2, nbytes>>8);
  307. /* unmask channel */
  308. outb(DMA2_SMSK, chan & 3);
  309. }
  310. mtx_unlock(&isa_dma_lock);
  311. }
  312. void
  313. isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
  314. {
  315. #ifdef DIAGNOSTIC
  316. if (chan & ~VALID_DMA_MASK)
  317. panic("isa_dmadone: channel out of range");
  318. if ((dma_inuse & (1 << chan)) == 0)
  319. printf("isa_dmadone: channel %d not acquired\n", chan);
  320. #endif
  321. mtx_lock(&isa_dma_lock);
  322. if (((dma_busy & (1 << chan)) == 0) &&
  323. (dma_auto_mode & (1 << chan)) == 0 )
  324. printf("isa_dmadone: channel %d not busy\n", chan);
  325. if ((dma_auto_mode & (1 << chan)) == 0)
  326. outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
  327. if (dma_bounced & (1 << chan)) {
  328. /* copy bounce buffer on read */
  329. if (flags & ISADMA_READ)
  330. bcopy(dma_bouncebuf[chan], addr, nbytes);
  331. dma_bounced &= ~(1 << chan);
  332. }
  333. dma_busy &= ~(1 << chan);
  334. mtx_unlock(&isa_dma_lock);
  335. }
  336. /*
  337. * Check for problems with the address range of a DMA transfer
  338. * (non-contiguous physical pages, outside of bus address space,
  339. * crossing DMA page boundaries).
  340. * Return true if special handling needed.
  341. */
  342. static int
  343. isa_dmarangecheck(caddr_t va, u_int length, int chan)
  344. {
  345. vm_paddr_t phys, priorpage = 0;
  346. vm_offset_t endva;
  347. u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
  348. endva = (vm_offset_t)round_page((vm_offset_t)va + length);
  349. for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
  350. phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
  351. if (phys == 0)
  352. panic("isa_dmacheck: no physical page present");
  353. if (phys >= ISARAM_END)
  354. return (1);
  355. if (priorpage) {
  356. if (priorpage + PAGE_SIZE != phys)
  357. return (1);
  358. /* check if crossing a DMA page boundary */
  359. if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
  360. return (1);
  361. }
  362. priorpage = phys;
  363. }
  364. return (0);
  365. }
  366. /*
  367. * Query the progress of a transfer on a DMA channel.
  368. *
  369. * To avoid having to interrupt a transfer in progress, we sample
  370. * each of the high and low databytes twice, and apply the following
  371. * logic to determine the correct count.
  372. *
  373. * Reads are performed with interrupts disabled, thus it is to be
  374. * expected that the time between reads is very small. At most
  375. * one rollover in the low count byte can be expected within the
  376. * four reads that are performed.
  377. *
  378. * There are three gaps in which a rollover can occur :
  379. *
  380. * - read low1
  381. * gap1
  382. * - read high1
  383. * gap2
  384. * - read low2
  385. * gap3
  386. * - read high2
  387. *
  388. * If a rollover occurs in gap1 or gap2, the low2 value will be
  389. * greater than the low1 value. In this case, low2 and high2 are a
  390. * corresponding pair.
  391. *
  392. * In any other case, low1 and high1 can be considered to be correct.
  393. *
  394. * The function returns the number of bytes remaining in the transfer,
  395. * or -1 if the channel requested is not active.
  396. *
  397. */
  398. static int
  399. isa_dmastatus_locked(int chan)
  400. {
  401. u_long cnt = 0;
  402. int ffport, waport;
  403. u_long low1, high1, low2, high2;
  404. mtx_assert(&isa_dma_lock, MA_OWNED);
  405. /* channel active? */
  406. if ((dma_inuse & (1 << chan)) == 0) {
  407. printf("isa_dmastatus: channel %d not active\n", chan);
  408. return(-1);
  409. }
  410. /* channel busy? */
  411. if (((dma_busy & (1 << chan)) == 0) &&
  412. (dma_auto_mode & (1 << chan)) == 0 ) {
  413. printf("chan %d not busy\n", chan);
  414. return -2 ;
  415. }
  416. if (chan < 4) { /* low DMA controller */
  417. ffport = DMA1_FFC;
  418. waport = DMA1_CHN(chan) + 1;
  419. } else { /* high DMA controller */
  420. ffport = DMA2_FFC;
  421. waport = DMA2_CHN(chan - 4) + 2;
  422. }
  423. disable_intr(); /* no interrupts Mr Jones! */
  424. outb(ffport, 0); /* clear register LSB flipflop */
  425. low1 = inb(waport);
  426. high1 = inb(waport);
  427. outb(ffport, 0); /* clear again */
  428. low2 = inb(waport);
  429. high2 = inb(waport);
  430. enable_intr(); /* enable interrupts again */
  431. /*
  432. * Now decide if a wrap has tried to skew our results.
  433. * Note that after TC, the count will read 0xffff, while we want
  434. * to return zero, so we add and then mask to compensate.
  435. */
  436. if (low1 >= low2) {
  437. cnt = (low1 + (high1 << 8) + 1) & 0xffff;
  438. } else {
  439. cnt = (low2 + (high2 << 8) + 1) & 0xffff;
  440. }
  441. if (chan >= 4) /* high channels move words */
  442. cnt *= 2;
  443. return(cnt);
  444. }
  445. int
  446. isa_dmastatus(int chan)
  447. {
  448. int status;
  449. mtx_lock(&isa_dma_lock);
  450. status = isa_dmastatus_locked(chan);
  451. mtx_unlock(&isa_dma_lock);
  452. return (status);
  453. }
  454. /*
  455. * Reached terminal count yet ?
  456. */
  457. int
  458. isa_dmatc(int chan)
  459. {
  460. if (chan < 4)
  461. return(inb(DMA1_STATUS) & (1 << chan));
  462. else
  463. return(inb(DMA2_STATUS) & (1 << (chan & 3)));
  464. }
  465. /*
  466. * Stop a DMA transfer currently in progress.
  467. */
  468. int
  469. isa_dmastop(int chan)
  470. {
  471. int status;
  472. mtx_lock(&isa_dma_lock);
  473. if ((dma_inuse & (1 << chan)) == 0)
  474. printf("isa_dmastop: channel %d not acquired\n", chan);
  475. if (((dma_busy & (1 << chan)) == 0) &&
  476. ((dma_auto_mode & (1 << chan)) == 0)) {
  477. printf("chan %d not busy\n", chan);
  478. mtx_unlock(&isa_dma_lock);
  479. return -2 ;
  480. }
  481. if ((chan & 4) == 0) {
  482. outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
  483. } else {
  484. outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
  485. }
  486. status = isa_dmastatus_locked(chan);
  487. mtx_unlock(&isa_dma_lock);
  488. return (status);
  489. }
  490. /*
  491. * Attach to the ISA PnP descriptor for the AT DMA controller
  492. */
  493. static struct isa_pnp_id atdma_ids[] = {
  494. { 0x0002d041 /* PNP0200 */, "AT DMA controller" },
  495. { 0 }
  496. };
  497. static int
  498. atdma_probe(device_t dev)
  499. {
  500. int result;
  501. if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
  502. device_quiet(dev);
  503. return(result);
  504. }
  505. static int
  506. atdma_attach(device_t dev)
  507. {
  508. return(0);
  509. }
  510. static device_method_t atdma_methods[] = {
  511. /* Device interface */
  512. DEVMETHOD(device_probe, atdma_probe),
  513. DEVMETHOD(device_attach, atdma_attach),
  514. DEVMETHOD(device_detach, bus_generic_detach),
  515. DEVMETHOD(device_shutdown, bus_generic_shutdown),
  516. DEVMETHOD(device_suspend, bus_generic_suspend),
  517. DEVMETHOD(device_resume, bus_generic_resume),
  518. { 0, 0 }
  519. };
  520. static driver_t atdma_driver = {
  521. "atdma",
  522. atdma_methods,
  523. 1, /* no softc */
  524. };
  525. static devclass_t atdma_devclass;
  526. DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
  527. DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
  528. ISA_PNP_INFO(atdma_ids);