qcom_adsp_pil.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471
  1. /*
  2. * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
  3. *
  4. * Copyright (C) 2016 Linaro Ltd
  5. * Copyright (C) 2014 Sony Mobile Communications AB
  6. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/clk.h>
  18. #include <linux/firmware.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/of_address.h>
  23. #include <linux/of_device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/qcom_scm.h>
  26. #include <linux/regulator/consumer.h>
  27. #include <linux/remoteproc.h>
  28. #include <linux/soc/qcom/mdt_loader.h>
  29. #include <linux/soc/qcom/smem.h>
  30. #include <linux/soc/qcom/smem_state.h>
  31. #include "qcom_common.h"
  32. #include "remoteproc_internal.h"
  33. struct adsp_data {
  34. int crash_reason_smem;
  35. const char *firmware_name;
  36. int pas_id;
  37. bool has_aggre2_clk;
  38. const char *ssr_name;
  39. };
  40. struct qcom_adsp {
  41. struct device *dev;
  42. struct rproc *rproc;
  43. int wdog_irq;
  44. int fatal_irq;
  45. int ready_irq;
  46. int handover_irq;
  47. int stop_ack_irq;
  48. struct qcom_smem_state *state;
  49. unsigned stop_bit;
  50. struct clk *xo;
  51. struct clk *aggre2_clk;
  52. struct regulator *cx_supply;
  53. struct regulator *px_supply;
  54. int pas_id;
  55. int crash_reason_smem;
  56. bool has_aggre2_clk;
  57. struct completion start_done;
  58. struct completion stop_done;
  59. phys_addr_t mem_phys;
  60. phys_addr_t mem_reloc;
  61. void *mem_region;
  62. size_t mem_size;
  63. struct qcom_rproc_glink glink_subdev;
  64. struct qcom_rproc_subdev smd_subdev;
  65. struct qcom_rproc_ssr ssr_subdev;
  66. };
  67. static int adsp_load(struct rproc *rproc, const struct firmware *fw)
  68. {
  69. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  70. return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
  71. adsp->mem_region, adsp->mem_phys, adsp->mem_size);
  72. }
  73. static const struct rproc_fw_ops adsp_fw_ops = {
  74. .find_rsc_table = qcom_mdt_find_rsc_table,
  75. .load = adsp_load,
  76. };
  77. static int adsp_start(struct rproc *rproc)
  78. {
  79. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  80. int ret;
  81. ret = clk_prepare_enable(adsp->xo);
  82. if (ret)
  83. return ret;
  84. ret = clk_prepare_enable(adsp->aggre2_clk);
  85. if (ret)
  86. goto disable_xo_clk;
  87. ret = regulator_enable(adsp->cx_supply);
  88. if (ret)
  89. goto disable_aggre2_clk;
  90. ret = regulator_enable(adsp->px_supply);
  91. if (ret)
  92. goto disable_cx_supply;
  93. ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
  94. if (ret) {
  95. dev_err(adsp->dev,
  96. "failed to authenticate image and release reset\n");
  97. goto disable_px_supply;
  98. }
  99. ret = wait_for_completion_timeout(&adsp->start_done,
  100. msecs_to_jiffies(5000));
  101. if (!ret) {
  102. dev_err(adsp->dev, "start timed out\n");
  103. qcom_scm_pas_shutdown(adsp->pas_id);
  104. ret = -ETIMEDOUT;
  105. goto disable_px_supply;
  106. }
  107. ret = 0;
  108. disable_px_supply:
  109. regulator_disable(adsp->px_supply);
  110. disable_cx_supply:
  111. regulator_disable(adsp->cx_supply);
  112. disable_aggre2_clk:
  113. clk_disable_unprepare(adsp->aggre2_clk);
  114. disable_xo_clk:
  115. clk_disable_unprepare(adsp->xo);
  116. return ret;
  117. }
  118. static int adsp_stop(struct rproc *rproc)
  119. {
  120. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  121. int ret;
  122. qcom_smem_state_update_bits(adsp->state,
  123. BIT(adsp->stop_bit),
  124. BIT(adsp->stop_bit));
  125. ret = wait_for_completion_timeout(&adsp->stop_done,
  126. msecs_to_jiffies(5000));
  127. if (ret == 0)
  128. dev_err(adsp->dev, "timed out on wait\n");
  129. qcom_smem_state_update_bits(adsp->state,
  130. BIT(adsp->stop_bit),
  131. 0);
  132. ret = qcom_scm_pas_shutdown(adsp->pas_id);
  133. if (ret)
  134. dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
  135. return ret;
  136. }
  137. static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len)
  138. {
  139. struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
  140. int offset;
  141. offset = da - adsp->mem_reloc;
  142. if (offset < 0 || offset + len > adsp->mem_size)
  143. return NULL;
  144. return adsp->mem_region + offset;
  145. }
  146. static const struct rproc_ops adsp_ops = {
  147. .start = adsp_start,
  148. .stop = adsp_stop,
  149. .da_to_va = adsp_da_to_va,
  150. };
  151. static irqreturn_t adsp_wdog_interrupt(int irq, void *dev)
  152. {
  153. struct qcom_adsp *adsp = dev;
  154. rproc_report_crash(adsp->rproc, RPROC_WATCHDOG);
  155. return IRQ_HANDLED;
  156. }
  157. static irqreturn_t adsp_fatal_interrupt(int irq, void *dev)
  158. {
  159. struct qcom_adsp *adsp = dev;
  160. size_t len;
  161. char *msg;
  162. msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, adsp->crash_reason_smem, &len);
  163. if (!IS_ERR(msg) && len > 0 && msg[0])
  164. dev_err(adsp->dev, "fatal error received: %s\n", msg);
  165. rproc_report_crash(adsp->rproc, RPROC_FATAL_ERROR);
  166. if (!IS_ERR(msg))
  167. msg[0] = '\0';
  168. return IRQ_HANDLED;
  169. }
  170. static irqreturn_t adsp_ready_interrupt(int irq, void *dev)
  171. {
  172. return IRQ_HANDLED;
  173. }
  174. static irqreturn_t adsp_handover_interrupt(int irq, void *dev)
  175. {
  176. struct qcom_adsp *adsp = dev;
  177. complete(&adsp->start_done);
  178. return IRQ_HANDLED;
  179. }
  180. static irqreturn_t adsp_stop_ack_interrupt(int irq, void *dev)
  181. {
  182. struct qcom_adsp *adsp = dev;
  183. complete(&adsp->stop_done);
  184. return IRQ_HANDLED;
  185. }
  186. static int adsp_init_clock(struct qcom_adsp *adsp)
  187. {
  188. int ret;
  189. adsp->xo = devm_clk_get(adsp->dev, "xo");
  190. if (IS_ERR(adsp->xo)) {
  191. ret = PTR_ERR(adsp->xo);
  192. if (ret != -EPROBE_DEFER)
  193. dev_err(adsp->dev, "failed to get xo clock");
  194. return ret;
  195. }
  196. if (adsp->has_aggre2_clk) {
  197. adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
  198. if (IS_ERR(adsp->aggre2_clk)) {
  199. ret = PTR_ERR(adsp->aggre2_clk);
  200. if (ret != -EPROBE_DEFER)
  201. dev_err(adsp->dev,
  202. "failed to get aggre2 clock");
  203. return ret;
  204. }
  205. }
  206. return 0;
  207. }
  208. static int adsp_init_regulator(struct qcom_adsp *adsp)
  209. {
  210. adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
  211. if (IS_ERR(adsp->cx_supply))
  212. return PTR_ERR(adsp->cx_supply);
  213. regulator_set_load(adsp->cx_supply, 100000);
  214. adsp->px_supply = devm_regulator_get(adsp->dev, "px");
  215. return PTR_ERR_OR_ZERO(adsp->px_supply);
  216. }
  217. static int adsp_request_irq(struct qcom_adsp *adsp,
  218. struct platform_device *pdev,
  219. const char *name,
  220. irq_handler_t thread_fn)
  221. {
  222. int ret;
  223. ret = platform_get_irq_byname(pdev, name);
  224. if (ret < 0) {
  225. dev_err(&pdev->dev, "no %s IRQ defined\n", name);
  226. return ret;
  227. }
  228. ret = devm_request_threaded_irq(&pdev->dev, ret,
  229. NULL, thread_fn,
  230. IRQF_ONESHOT,
  231. "adsp", adsp);
  232. if (ret)
  233. dev_err(&pdev->dev, "request %s IRQ failed\n", name);
  234. return ret;
  235. }
  236. static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
  237. {
  238. struct device_node *node;
  239. struct resource r;
  240. int ret;
  241. node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
  242. if (!node) {
  243. dev_err(adsp->dev, "no memory-region specified\n");
  244. return -EINVAL;
  245. }
  246. ret = of_address_to_resource(node, 0, &r);
  247. if (ret)
  248. return ret;
  249. adsp->mem_phys = adsp->mem_reloc = r.start;
  250. adsp->mem_size = resource_size(&r);
  251. adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
  252. if (!adsp->mem_region) {
  253. dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
  254. &r.start, adsp->mem_size);
  255. return -EBUSY;
  256. }
  257. return 0;
  258. }
  259. static int adsp_probe(struct platform_device *pdev)
  260. {
  261. const struct adsp_data *desc;
  262. struct qcom_adsp *adsp;
  263. struct rproc *rproc;
  264. int ret;
  265. desc = of_device_get_match_data(&pdev->dev);
  266. if (!desc)
  267. return -EINVAL;
  268. if (!qcom_scm_is_available())
  269. return -EPROBE_DEFER;
  270. rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
  271. desc->firmware_name, sizeof(*adsp));
  272. if (!rproc) {
  273. dev_err(&pdev->dev, "unable to allocate remoteproc\n");
  274. return -ENOMEM;
  275. }
  276. rproc->fw_ops = &adsp_fw_ops;
  277. adsp = (struct qcom_adsp *)rproc->priv;
  278. adsp->dev = &pdev->dev;
  279. adsp->rproc = rproc;
  280. adsp->pas_id = desc->pas_id;
  281. adsp->crash_reason_smem = desc->crash_reason_smem;
  282. adsp->has_aggre2_clk = desc->has_aggre2_clk;
  283. platform_set_drvdata(pdev, adsp);
  284. init_completion(&adsp->start_done);
  285. init_completion(&adsp->stop_done);
  286. ret = adsp_alloc_memory_region(adsp);
  287. if (ret)
  288. goto free_rproc;
  289. ret = adsp_init_clock(adsp);
  290. if (ret)
  291. goto free_rproc;
  292. ret = adsp_init_regulator(adsp);
  293. if (ret)
  294. goto free_rproc;
  295. ret = adsp_request_irq(adsp, pdev, "wdog", adsp_wdog_interrupt);
  296. if (ret < 0)
  297. goto free_rproc;
  298. adsp->wdog_irq = ret;
  299. ret = adsp_request_irq(adsp, pdev, "fatal", adsp_fatal_interrupt);
  300. if (ret < 0)
  301. goto free_rproc;
  302. adsp->fatal_irq = ret;
  303. ret = adsp_request_irq(adsp, pdev, "ready", adsp_ready_interrupt);
  304. if (ret < 0)
  305. goto free_rproc;
  306. adsp->ready_irq = ret;
  307. ret = adsp_request_irq(adsp, pdev, "handover", adsp_handover_interrupt);
  308. if (ret < 0)
  309. goto free_rproc;
  310. adsp->handover_irq = ret;
  311. ret = adsp_request_irq(adsp, pdev, "stop-ack", adsp_stop_ack_interrupt);
  312. if (ret < 0)
  313. goto free_rproc;
  314. adsp->stop_ack_irq = ret;
  315. adsp->state = qcom_smem_state_get(&pdev->dev, "stop",
  316. &adsp->stop_bit);
  317. if (IS_ERR(adsp->state)) {
  318. ret = PTR_ERR(adsp->state);
  319. goto free_rproc;
  320. }
  321. qcom_add_glink_subdev(rproc, &adsp->glink_subdev);
  322. qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
  323. qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
  324. ret = rproc_add(rproc);
  325. if (ret)
  326. goto free_rproc;
  327. return 0;
  328. free_rproc:
  329. rproc_free(rproc);
  330. return ret;
  331. }
  332. static int adsp_remove(struct platform_device *pdev)
  333. {
  334. struct qcom_adsp *adsp = platform_get_drvdata(pdev);
  335. qcom_smem_state_put(adsp->state);
  336. rproc_del(adsp->rproc);
  337. qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
  338. qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
  339. qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
  340. rproc_free(adsp->rproc);
  341. return 0;
  342. }
  343. static const struct adsp_data adsp_resource_init = {
  344. .crash_reason_smem = 423,
  345. .firmware_name = "adsp.mdt",
  346. .pas_id = 1,
  347. .has_aggre2_clk = false,
  348. .ssr_name = "lpass",
  349. };
  350. static const struct adsp_data slpi_resource_init = {
  351. .crash_reason_smem = 424,
  352. .firmware_name = "slpi.mdt",
  353. .pas_id = 12,
  354. .has_aggre2_clk = true,
  355. .ssr_name = "dsps",
  356. };
  357. static const struct of_device_id adsp_of_match[] = {
  358. { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
  359. { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
  360. { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
  361. { },
  362. };
  363. MODULE_DEVICE_TABLE(of, adsp_of_match);
  364. static struct platform_driver adsp_driver = {
  365. .probe = adsp_probe,
  366. .remove = adsp_remove,
  367. .driver = {
  368. .name = "qcom_adsp_pil",
  369. .of_match_table = adsp_of_match,
  370. },
  371. };
  372. module_platform_driver(adsp_driver);
  373. MODULE_DESCRIPTION("Qualcomm MSM8974/MSM8996 ADSP Peripherial Image Loader");
  374. MODULE_LICENSE("GPL v2");