intel_punit_ipc.c 8.9 KB

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  1. /*
  2. * Driver for the Intel P-Unit Mailbox IPC mechanism
  3. *
  4. * (C) Copyright 2015 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * The heart of the P-Unit is the Foxton microcontroller and its firmware,
  11. * which provide mailbox interface for power management usage.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/acpi.h>
  15. #include <linux/delay.h>
  16. #include <linux/bitops.h>
  17. #include <linux/device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/intel_punit_ipc.h>
  22. /* IPC Mailbox registers */
  23. #define OFFSET_DATA_LOW 0x0
  24. #define OFFSET_DATA_HIGH 0x4
  25. /* bit field of interface register */
  26. #define CMD_RUN BIT(31)
  27. #define CMD_ERRCODE_MASK GENMASK(7, 0)
  28. #define CMD_PARA1_SHIFT 8
  29. #define CMD_PARA2_SHIFT 16
  30. #define CMD_TIMEOUT_SECONDS 1
  31. enum {
  32. BASE_DATA = 0,
  33. BASE_IFACE,
  34. BASE_MAX,
  35. };
  36. typedef struct {
  37. struct device *dev;
  38. struct mutex lock;
  39. int irq;
  40. struct completion cmd_complete;
  41. /* base of interface and data registers */
  42. void __iomem *base[RESERVED_IPC][BASE_MAX];
  43. IPC_TYPE type;
  44. } IPC_DEV;
  45. static IPC_DEV *punit_ipcdev;
  46. static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)
  47. {
  48. return readl(ipcdev->base[type][BASE_IFACE]);
  49. }
  50. static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)
  51. {
  52. writel(cmd, ipcdev->base[type][BASE_IFACE]);
  53. }
  54. static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)
  55. {
  56. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  57. }
  58. static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)
  59. {
  60. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  61. }
  62. static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  63. {
  64. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  65. }
  66. static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  67. {
  68. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  69. }
  70. static const char *ipc_err_string(int error)
  71. {
  72. if (error == IPC_PUNIT_ERR_SUCCESS)
  73. return "no error";
  74. else if (error == IPC_PUNIT_ERR_INVALID_CMD)
  75. return "invalid command";
  76. else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)
  77. return "invalid parameter";
  78. else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)
  79. return "command timeout";
  80. else if (error == IPC_PUNIT_ERR_CMD_LOCKED)
  81. return "command locked";
  82. else if (error == IPC_PUNIT_ERR_INVALID_VR_ID)
  83. return "invalid vr id";
  84. else if (error == IPC_PUNIT_ERR_VR_ERR)
  85. return "vr error";
  86. else
  87. return "unknown error";
  88. }
  89. static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)
  90. {
  91. int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;
  92. int errcode;
  93. int status;
  94. if (ipcdev->irq) {
  95. if (!wait_for_completion_timeout(&ipcdev->cmd_complete,
  96. CMD_TIMEOUT_SECONDS * HZ)) {
  97. dev_err(ipcdev->dev, "IPC timed out\n");
  98. return -ETIMEDOUT;
  99. }
  100. } else {
  101. while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)
  102. udelay(1);
  103. if (!loops) {
  104. dev_err(ipcdev->dev, "IPC timed out\n");
  105. return -ETIMEDOUT;
  106. }
  107. }
  108. status = ipc_read_status(ipcdev, type);
  109. errcode = status & CMD_ERRCODE_MASK;
  110. if (errcode) {
  111. dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n",
  112. ipc_err_string(errcode), status);
  113. return -EIO;
  114. }
  115. return 0;
  116. }
  117. /**
  118. * intel_punit_ipc_simple_command() - Simple IPC command
  119. * @cmd: IPC command code.
  120. * @para1: First 8bit parameter, set 0 if not used.
  121. * @para2: Second 8bit parameter, set 0 if not used.
  122. *
  123. * Send a IPC command to P-Unit when there is no data transaction
  124. *
  125. * Return: IPC error code or 0 on success.
  126. */
  127. int intel_punit_ipc_simple_command(int cmd, int para1, int para2)
  128. {
  129. IPC_DEV *ipcdev = punit_ipcdev;
  130. IPC_TYPE type;
  131. u32 val;
  132. int ret;
  133. mutex_lock(&ipcdev->lock);
  134. reinit_completion(&ipcdev->cmd_complete);
  135. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  136. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  137. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  138. ipc_write_cmd(ipcdev, type, val);
  139. ret = intel_punit_ipc_check_status(ipcdev, type);
  140. mutex_unlock(&ipcdev->lock);
  141. return ret;
  142. }
  143. EXPORT_SYMBOL(intel_punit_ipc_simple_command);
  144. /**
  145. * intel_punit_ipc_command() - IPC command with data and pointers
  146. * @cmd: IPC command code.
  147. * @para1: First 8bit parameter, set 0 if not used.
  148. * @para2: Second 8bit parameter, set 0 if not used.
  149. * @in: Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD.
  150. * @out: Output data.
  151. *
  152. * Send a IPC command to P-Unit with data transaction
  153. *
  154. * Return: IPC error code or 0 on success.
  155. */
  156. int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)
  157. {
  158. IPC_DEV *ipcdev = punit_ipcdev;
  159. IPC_TYPE type;
  160. u32 val;
  161. int ret;
  162. mutex_lock(&ipcdev->lock);
  163. reinit_completion(&ipcdev->cmd_complete);
  164. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  165. if (in) {
  166. ipc_write_data_low(ipcdev, type, *in);
  167. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  168. ipc_write_data_high(ipcdev, type, *++in);
  169. }
  170. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  171. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  172. ipc_write_cmd(ipcdev, type, val);
  173. ret = intel_punit_ipc_check_status(ipcdev, type);
  174. if (ret)
  175. goto out;
  176. if (out) {
  177. *out = ipc_read_data_low(ipcdev, type);
  178. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  179. *++out = ipc_read_data_high(ipcdev, type);
  180. }
  181. out:
  182. mutex_unlock(&ipcdev->lock);
  183. return ret;
  184. }
  185. EXPORT_SYMBOL_GPL(intel_punit_ipc_command);
  186. static irqreturn_t intel_punit_ioc(int irq, void *dev_id)
  187. {
  188. IPC_DEV *ipcdev = dev_id;
  189. complete(&ipcdev->cmd_complete);
  190. return IRQ_HANDLED;
  191. }
  192. static int intel_punit_get_bars(struct platform_device *pdev)
  193. {
  194. struct resource *res;
  195. void __iomem *addr;
  196. /*
  197. * The following resources are required
  198. * - BIOS_IPC BASE_DATA
  199. * - BIOS_IPC BASE_IFACE
  200. */
  201. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  202. addr = devm_ioremap_resource(&pdev->dev, res);
  203. if (IS_ERR(addr))
  204. return PTR_ERR(addr);
  205. punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr;
  206. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  207. addr = devm_ioremap_resource(&pdev->dev, res);
  208. if (IS_ERR(addr))
  209. return PTR_ERR(addr);
  210. punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr;
  211. /*
  212. * The following resources are optional
  213. * - ISPDRIVER_IPC BASE_DATA
  214. * - ISPDRIVER_IPC BASE_IFACE
  215. * - GTDRIVER_IPC BASE_DATA
  216. * - GTDRIVER_IPC BASE_IFACE
  217. */
  218. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  219. if (res && resource_size(res) > 1) {
  220. addr = devm_ioremap_resource(&pdev->dev, res);
  221. if (!IS_ERR(addr))
  222. punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr;
  223. }
  224. res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
  225. if (res && resource_size(res) > 1) {
  226. addr = devm_ioremap_resource(&pdev->dev, res);
  227. if (!IS_ERR(addr))
  228. punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr;
  229. }
  230. res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
  231. if (res && resource_size(res) > 1) {
  232. addr = devm_ioremap_resource(&pdev->dev, res);
  233. if (!IS_ERR(addr))
  234. punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr;
  235. }
  236. res = platform_get_resource(pdev, IORESOURCE_MEM, 5);
  237. if (res && resource_size(res) > 1) {
  238. addr = devm_ioremap_resource(&pdev->dev, res);
  239. if (!IS_ERR(addr))
  240. punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr;
  241. }
  242. return 0;
  243. }
  244. static int intel_punit_ipc_probe(struct platform_device *pdev)
  245. {
  246. int irq, ret;
  247. punit_ipcdev = devm_kzalloc(&pdev->dev,
  248. sizeof(*punit_ipcdev), GFP_KERNEL);
  249. if (!punit_ipcdev)
  250. return -ENOMEM;
  251. platform_set_drvdata(pdev, punit_ipcdev);
  252. irq = platform_get_irq(pdev, 0);
  253. if (irq < 0) {
  254. punit_ipcdev->irq = 0;
  255. dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
  256. } else {
  257. ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,
  258. IRQF_NO_SUSPEND, "intel_punit_ipc",
  259. &punit_ipcdev);
  260. if (ret) {
  261. dev_err(&pdev->dev, "Failed to request irq: %d\n", irq);
  262. return ret;
  263. }
  264. punit_ipcdev->irq = irq;
  265. }
  266. ret = intel_punit_get_bars(pdev);
  267. if (ret)
  268. goto out;
  269. punit_ipcdev->dev = &pdev->dev;
  270. mutex_init(&punit_ipcdev->lock);
  271. init_completion(&punit_ipcdev->cmd_complete);
  272. out:
  273. return ret;
  274. }
  275. static int intel_punit_ipc_remove(struct platform_device *pdev)
  276. {
  277. return 0;
  278. }
  279. static const struct acpi_device_id punit_ipc_acpi_ids[] = {
  280. { "INT34D4", 0 },
  281. { }
  282. };
  283. MODULE_DEVICE_TABLE(acpi, punit_ipc_acpi_ids);
  284. static struct platform_driver intel_punit_ipc_driver = {
  285. .probe = intel_punit_ipc_probe,
  286. .remove = intel_punit_ipc_remove,
  287. .driver = {
  288. .name = "intel_punit_ipc",
  289. .acpi_match_table = ACPI_PTR(punit_ipc_acpi_ids),
  290. },
  291. };
  292. static int __init intel_punit_ipc_init(void)
  293. {
  294. return platform_driver_register(&intel_punit_ipc_driver);
  295. }
  296. static void __exit intel_punit_ipc_exit(void)
  297. {
  298. platform_driver_unregister(&intel_punit_ipc_driver);
  299. }
  300. MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
  301. MODULE_DESCRIPTION("Intel P-Unit IPC driver");
  302. MODULE_LICENSE("GPL v2");
  303. /* Some modules are dependent on this, so init earlier */
  304. fs_initcall(intel_punit_ipc_init);
  305. module_exit(intel_punit_ipc_exit);