goldfish_pipe.c 27 KB

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  1. /*
  2. * Copyright (C) 2012 Intel, Inc.
  3. * Copyright (C) 2013 Intel, Inc.
  4. * Copyright (C) 2014 Linaro Limited
  5. * Copyright (C) 2011-2016 Google, Inc.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. /* This source file contains the implementation of a special device driver
  18. * that intends to provide a *very* fast communication channel between the
  19. * guest system and the QEMU emulator.
  20. *
  21. * Usage from the guest is simply the following (error handling simplified):
  22. *
  23. * int fd = open("/dev/qemu_pipe",O_RDWR);
  24. * .... write() or read() through the pipe.
  25. *
  26. * This driver doesn't deal with the exact protocol used during the session.
  27. * It is intended to be as simple as something like:
  28. *
  29. * // do this _just_ after opening the fd to connect to a specific
  30. * // emulator service.
  31. * const char* msg = "<pipename>";
  32. * if (write(fd, msg, strlen(msg)+1) < 0) {
  33. * ... could not connect to <pipename> service
  34. * close(fd);
  35. * }
  36. *
  37. * // after this, simply read() and write() to communicate with the
  38. * // service. Exact protocol details left as an exercise to the reader.
  39. *
  40. * This driver is very fast because it doesn't copy any data through
  41. * intermediate buffers, since the emulator is capable of translating
  42. * guest user addresses into host ones.
  43. *
  44. * Note that we must however ensure that each user page involved in the
  45. * exchange is properly mapped during a transfer.
  46. */
  47. #include <linux/module.h>
  48. #include <linux/interrupt.h>
  49. #include <linux/kernel.h>
  50. #include <linux/spinlock.h>
  51. #include <linux/miscdevice.h>
  52. #include <linux/platform_device.h>
  53. #include <linux/poll.h>
  54. #include <linux/sched.h>
  55. #include <linux/bitops.h>
  56. #include <linux/slab.h>
  57. #include <linux/io.h>
  58. #include <linux/goldfish.h>
  59. #include <linux/dma-mapping.h>
  60. #include <linux/mm.h>
  61. #include <linux/acpi.h>
  62. /*
  63. * Update this when something changes in the driver's behavior so the host
  64. * can benefit from knowing it
  65. */
  66. enum {
  67. PIPE_DRIVER_VERSION = 2,
  68. PIPE_CURRENT_DEVICE_VERSION = 2
  69. };
  70. /*
  71. * IMPORTANT: The following constants must match the ones used and defined
  72. * in external/qemu/hw/goldfish_pipe.c in the Android source tree.
  73. */
  74. /* List of bitflags returned in status of CMD_POLL command */
  75. enum PipePollFlags {
  76. PIPE_POLL_IN = 1 << 0,
  77. PIPE_POLL_OUT = 1 << 1,
  78. PIPE_POLL_HUP = 1 << 2
  79. };
  80. /* Possible status values used to signal errors - see goldfish_pipe_error_convert */
  81. enum PipeErrors {
  82. PIPE_ERROR_INVAL = -1,
  83. PIPE_ERROR_AGAIN = -2,
  84. PIPE_ERROR_NOMEM = -3,
  85. PIPE_ERROR_IO = -4
  86. };
  87. /* Bit-flags used to signal events from the emulator */
  88. enum PipeWakeFlags {
  89. PIPE_WAKE_CLOSED = 1 << 0, /* emulator closed pipe */
  90. PIPE_WAKE_READ = 1 << 1, /* pipe can now be read from */
  91. PIPE_WAKE_WRITE = 1 << 2 /* pipe can now be written to */
  92. };
  93. /* Bit flags for the 'flags' field */
  94. enum PipeFlagsBits {
  95. BIT_CLOSED_ON_HOST = 0, /* pipe closed by host */
  96. BIT_WAKE_ON_WRITE = 1, /* want to be woken on writes */
  97. BIT_WAKE_ON_READ = 2, /* want to be woken on reads */
  98. };
  99. enum PipeRegs {
  100. PIPE_REG_CMD = 0,
  101. PIPE_REG_SIGNAL_BUFFER_HIGH = 4,
  102. PIPE_REG_SIGNAL_BUFFER = 8,
  103. PIPE_REG_SIGNAL_BUFFER_COUNT = 12,
  104. PIPE_REG_OPEN_BUFFER_HIGH = 20,
  105. PIPE_REG_OPEN_BUFFER = 24,
  106. PIPE_REG_VERSION = 36,
  107. PIPE_REG_GET_SIGNALLED = 48,
  108. };
  109. enum PipeCmdCode {
  110. PIPE_CMD_OPEN = 1, /* to be used by the pipe device itself */
  111. PIPE_CMD_CLOSE,
  112. PIPE_CMD_POLL,
  113. PIPE_CMD_WRITE,
  114. PIPE_CMD_WAKE_ON_WRITE,
  115. PIPE_CMD_READ,
  116. PIPE_CMD_WAKE_ON_READ,
  117. /*
  118. * TODO(zyy): implement a deferred read/write execution to allow
  119. * parallel processing of pipe operations on the host.
  120. */
  121. PIPE_CMD_WAKE_ON_DONE_IO,
  122. };
  123. enum {
  124. MAX_BUFFERS_PER_COMMAND = 336,
  125. MAX_SIGNALLED_PIPES = 64,
  126. INITIAL_PIPES_CAPACITY = 64
  127. };
  128. struct goldfish_pipe_dev;
  129. struct goldfish_pipe;
  130. struct goldfish_pipe_command;
  131. /* A per-pipe command structure, shared with the host */
  132. struct goldfish_pipe_command {
  133. s32 cmd; /* PipeCmdCode, guest -> host */
  134. s32 id; /* pipe id, guest -> host */
  135. s32 status; /* command execution status, host -> guest */
  136. s32 reserved; /* to pad to 64-bit boundary */
  137. union {
  138. /* Parameters for PIPE_CMD_{READ,WRITE} */
  139. struct {
  140. /* number of buffers, guest -> host */
  141. u32 buffers_count;
  142. /* number of consumed bytes, host -> guest */
  143. s32 consumed_size;
  144. /* buffer pointers, guest -> host */
  145. u64 ptrs[MAX_BUFFERS_PER_COMMAND];
  146. /* buffer sizes, guest -> host */
  147. u32 sizes[MAX_BUFFERS_PER_COMMAND];
  148. } rw_params;
  149. };
  150. };
  151. /* A single signalled pipe information */
  152. struct signalled_pipe_buffer {
  153. u32 id;
  154. u32 flags;
  155. };
  156. /* Parameters for the PIPE_CMD_OPEN command */
  157. struct open_command_param {
  158. u64 command_buffer_ptr;
  159. u32 rw_params_max_count;
  160. };
  161. /* Device-level set of buffers shared with the host */
  162. struct goldfish_pipe_dev_buffers {
  163. struct open_command_param open_command_params;
  164. struct signalled_pipe_buffer signalled_pipe_buffers[
  165. MAX_SIGNALLED_PIPES];
  166. };
  167. /* This data type models a given pipe instance */
  168. struct goldfish_pipe {
  169. /* pipe ID - index into goldfish_pipe_dev::pipes array */
  170. u32 id;
  171. /* The wake flags pipe is waiting for
  172. * Note: not protected with any lock, uses atomic operations
  173. * and barriers to make it thread-safe.
  174. */
  175. unsigned long flags;
  176. /* wake flags host have signalled,
  177. * - protected by goldfish_pipe_dev::lock
  178. */
  179. unsigned long signalled_flags;
  180. /* A pointer to command buffer */
  181. struct goldfish_pipe_command *command_buffer;
  182. /* doubly linked list of signalled pipes, protected by
  183. * goldfish_pipe_dev::lock
  184. */
  185. struct goldfish_pipe *prev_signalled;
  186. struct goldfish_pipe *next_signalled;
  187. /*
  188. * A pipe's own lock. Protects the following:
  189. * - *command_buffer - makes sure a command can safely write its
  190. * parameters to the host and read the results back.
  191. */
  192. struct mutex lock;
  193. /* A wake queue for sleeping until host signals an event */
  194. wait_queue_head_t wake_queue;
  195. /* Pointer to the parent goldfish_pipe_dev instance */
  196. struct goldfish_pipe_dev *dev;
  197. };
  198. /* The global driver data. Holds a reference to the i/o page used to
  199. * communicate with the emulator, and a wake queue for blocked tasks
  200. * waiting to be awoken.
  201. */
  202. struct goldfish_pipe_dev {
  203. /*
  204. * Global device spinlock. Protects the following members:
  205. * - pipes, pipes_capacity
  206. * - [*pipes, *pipes + pipes_capacity) - array data
  207. * - first_signalled_pipe,
  208. * goldfish_pipe::prev_signalled,
  209. * goldfish_pipe::next_signalled,
  210. * goldfish_pipe::signalled_flags - all singnalled-related fields,
  211. * in all allocated pipes
  212. * - open_command_params - PIPE_CMD_OPEN-related buffers
  213. *
  214. * It looks like a lot of different fields, but the trick is that
  215. * the only operation that happens often is the signalled pipes array
  216. * manipulation. That's why it's OK for now to keep the rest of the
  217. * fields under the same lock. If we notice too much contention because
  218. * of PIPE_CMD_OPEN, then we should add a separate lock there.
  219. */
  220. spinlock_t lock;
  221. /*
  222. * Array of the pipes of |pipes_capacity| elements,
  223. * indexed by goldfish_pipe::id
  224. */
  225. struct goldfish_pipe **pipes;
  226. u32 pipes_capacity;
  227. /* Pointers to the buffers host uses for interaction with this driver */
  228. struct goldfish_pipe_dev_buffers *buffers;
  229. /* Head of a doubly linked list of signalled pipes */
  230. struct goldfish_pipe *first_signalled_pipe;
  231. /* Some device-specific data */
  232. int irq;
  233. int version;
  234. unsigned char __iomem *base;
  235. };
  236. static struct goldfish_pipe_dev pipe_dev[1] = {};
  237. static int goldfish_cmd_locked(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  238. {
  239. pipe->command_buffer->cmd = cmd;
  240. /* failure by default */
  241. pipe->command_buffer->status = PIPE_ERROR_INVAL;
  242. writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
  243. return pipe->command_buffer->status;
  244. }
  245. static int goldfish_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
  246. {
  247. int status;
  248. if (mutex_lock_interruptible(&pipe->lock))
  249. return PIPE_ERROR_IO;
  250. status = goldfish_cmd_locked(pipe, cmd);
  251. mutex_unlock(&pipe->lock);
  252. return status;
  253. }
  254. /*
  255. * This function converts an error code returned by the emulator through
  256. * the PIPE_REG_STATUS i/o register into a valid negative errno value.
  257. */
  258. static int goldfish_pipe_error_convert(int status)
  259. {
  260. switch (status) {
  261. case PIPE_ERROR_AGAIN:
  262. return -EAGAIN;
  263. case PIPE_ERROR_NOMEM:
  264. return -ENOMEM;
  265. case PIPE_ERROR_IO:
  266. return -EIO;
  267. default:
  268. return -EINVAL;
  269. }
  270. }
  271. static int pin_user_pages(unsigned long first_page, unsigned long last_page,
  272. unsigned int last_page_size, int is_write,
  273. struct page *pages[MAX_BUFFERS_PER_COMMAND],
  274. unsigned int *iter_last_page_size)
  275. {
  276. int ret;
  277. int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1;
  278. if (requested_pages > MAX_BUFFERS_PER_COMMAND) {
  279. requested_pages = MAX_BUFFERS_PER_COMMAND;
  280. *iter_last_page_size = PAGE_SIZE;
  281. } else {
  282. *iter_last_page_size = last_page_size;
  283. }
  284. ret = get_user_pages_fast(
  285. first_page, requested_pages, !is_write, pages);
  286. if (ret <= 0)
  287. return -EFAULT;
  288. if (ret < requested_pages)
  289. *iter_last_page_size = PAGE_SIZE;
  290. return ret;
  291. }
  292. static void release_user_pages(struct page **pages, int pages_count,
  293. int is_write, s32 consumed_size)
  294. {
  295. int i;
  296. for (i = 0; i < pages_count; i++) {
  297. if (!is_write && consumed_size > 0)
  298. set_page_dirty(pages[i]);
  299. put_page(pages[i]);
  300. }
  301. }
  302. /* Populate the call parameters, merging adjacent pages together */
  303. static void populate_rw_params(
  304. struct page **pages, int pages_count,
  305. unsigned long address, unsigned long address_end,
  306. unsigned long first_page, unsigned long last_page,
  307. unsigned int iter_last_page_size, int is_write,
  308. struct goldfish_pipe_command *command)
  309. {
  310. /*
  311. * Process the first page separately - it's the only page that
  312. * needs special handling for its start address.
  313. */
  314. unsigned long xaddr = page_to_phys(pages[0]);
  315. unsigned long xaddr_prev = xaddr;
  316. int buffer_idx = 0;
  317. int i = 1;
  318. int size_on_page = first_page == last_page
  319. ? (int)(address_end - address)
  320. : (PAGE_SIZE - (address & ~PAGE_MASK));
  321. command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK));
  322. command->rw_params.sizes[0] = size_on_page;
  323. for (; i < pages_count; ++i) {
  324. xaddr = page_to_phys(pages[i]);
  325. size_on_page = (i == pages_count - 1) ?
  326. iter_last_page_size : PAGE_SIZE;
  327. if (xaddr == xaddr_prev + PAGE_SIZE) {
  328. command->rw_params.sizes[buffer_idx] += size_on_page;
  329. } else {
  330. ++buffer_idx;
  331. command->rw_params.ptrs[buffer_idx] = (u64)xaddr;
  332. command->rw_params.sizes[buffer_idx] = size_on_page;
  333. }
  334. xaddr_prev = xaddr;
  335. }
  336. command->rw_params.buffers_count = buffer_idx + 1;
  337. }
  338. static int transfer_max_buffers(struct goldfish_pipe *pipe,
  339. unsigned long address, unsigned long address_end, int is_write,
  340. unsigned long last_page, unsigned int last_page_size,
  341. s32 *consumed_size, int *status)
  342. {
  343. static struct page *pages[MAX_BUFFERS_PER_COMMAND];
  344. unsigned long first_page = address & PAGE_MASK;
  345. unsigned int iter_last_page_size;
  346. int pages_count = pin_user_pages(first_page, last_page,
  347. last_page_size, is_write,
  348. pages, &iter_last_page_size);
  349. if (pages_count < 0)
  350. return pages_count;
  351. /* Serialize access to the pipe command buffers */
  352. if (mutex_lock_interruptible(&pipe->lock))
  353. return -ERESTARTSYS;
  354. populate_rw_params(pages, pages_count, address, address_end,
  355. first_page, last_page, iter_last_page_size, is_write,
  356. pipe->command_buffer);
  357. /* Transfer the data */
  358. *status = goldfish_cmd_locked(pipe,
  359. is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ);
  360. *consumed_size = pipe->command_buffer->rw_params.consumed_size;
  361. release_user_pages(pages, pages_count, is_write, *consumed_size);
  362. mutex_unlock(&pipe->lock);
  363. return 0;
  364. }
  365. static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)
  366. {
  367. u32 wakeBit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
  368. set_bit(wakeBit, &pipe->flags);
  369. /* Tell the emulator we're going to wait for a wake event */
  370. (void)goldfish_cmd(pipe,
  371. is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ);
  372. while (test_bit(wakeBit, &pipe->flags)) {
  373. if (wait_event_interruptible(
  374. pipe->wake_queue,
  375. !test_bit(wakeBit, &pipe->flags)))
  376. return -ERESTARTSYS;
  377. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  378. return -EIO;
  379. }
  380. return 0;
  381. }
  382. static ssize_t goldfish_pipe_read_write(struct file *filp,
  383. char __user *buffer, size_t bufflen, int is_write)
  384. {
  385. struct goldfish_pipe *pipe = filp->private_data;
  386. int count = 0, ret = -EINVAL;
  387. unsigned long address, address_end, last_page;
  388. unsigned int last_page_size;
  389. /* If the emulator already closed the pipe, no need to go further */
  390. if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))
  391. return -EIO;
  392. /* Null reads or writes succeeds */
  393. if (unlikely(bufflen == 0))
  394. return 0;
  395. /* Check the buffer range for access */
  396. if (unlikely(!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ,
  397. buffer, bufflen)))
  398. return -EFAULT;
  399. address = (unsigned long)buffer;
  400. address_end = address + bufflen;
  401. last_page = (address_end - 1) & PAGE_MASK;
  402. last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1;
  403. while (address < address_end) {
  404. s32 consumed_size;
  405. int status;
  406. ret = transfer_max_buffers(pipe, address, address_end, is_write,
  407. last_page, last_page_size, &consumed_size,
  408. &status);
  409. if (ret < 0)
  410. break;
  411. if (consumed_size > 0) {
  412. /* No matter what's the status, we've transferred
  413. * something.
  414. */
  415. count += consumed_size;
  416. address += consumed_size;
  417. }
  418. if (status > 0)
  419. continue;
  420. if (status == 0) {
  421. /* EOF */
  422. ret = 0;
  423. break;
  424. }
  425. if (count > 0) {
  426. /*
  427. * An error occurred, but we already transferred
  428. * something on one of the previous iterations.
  429. * Just return what we already copied and log this
  430. * err.
  431. */
  432. if (status != PIPE_ERROR_AGAIN)
  433. pr_info_ratelimited("goldfish_pipe: backend error %d on %s\n",
  434. status, is_write ? "write" : "read");
  435. break;
  436. }
  437. /*
  438. * If the error is not PIPE_ERROR_AGAIN, or if we are in
  439. * non-blocking mode, just return the error code.
  440. */
  441. if (status != PIPE_ERROR_AGAIN ||
  442. (filp->f_flags & O_NONBLOCK) != 0) {
  443. ret = goldfish_pipe_error_convert(status);
  444. break;
  445. }
  446. status = wait_for_host_signal(pipe, is_write);
  447. if (status < 0)
  448. return status;
  449. }
  450. if (count > 0)
  451. return count;
  452. return ret;
  453. }
  454. static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
  455. size_t bufflen, loff_t *ppos)
  456. {
  457. return goldfish_pipe_read_write(filp, buffer, bufflen,
  458. /* is_write */ 0);
  459. }
  460. static ssize_t goldfish_pipe_write(struct file *filp,
  461. const char __user *buffer, size_t bufflen,
  462. loff_t *ppos)
  463. {
  464. return goldfish_pipe_read_write(filp,
  465. /* cast away the const */(char __user *)buffer, bufflen,
  466. /* is_write */ 1);
  467. }
  468. static unsigned int goldfish_pipe_poll(struct file *filp, poll_table *wait)
  469. {
  470. struct goldfish_pipe *pipe = filp->private_data;
  471. unsigned int mask = 0;
  472. int status;
  473. poll_wait(filp, &pipe->wake_queue, wait);
  474. status = goldfish_cmd(pipe, PIPE_CMD_POLL);
  475. if (status < 0)
  476. return -ERESTARTSYS;
  477. if (status & PIPE_POLL_IN)
  478. mask |= POLLIN | POLLRDNORM;
  479. if (status & PIPE_POLL_OUT)
  480. mask |= POLLOUT | POLLWRNORM;
  481. if (status & PIPE_POLL_HUP)
  482. mask |= POLLHUP;
  483. if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
  484. mask |= POLLERR;
  485. return mask;
  486. }
  487. static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev,
  488. u32 id, u32 flags)
  489. {
  490. struct goldfish_pipe *pipe;
  491. if (WARN_ON(id >= dev->pipes_capacity))
  492. return;
  493. pipe = dev->pipes[id];
  494. if (!pipe)
  495. return;
  496. pipe->signalled_flags |= flags;
  497. if (pipe->prev_signalled || pipe->next_signalled
  498. || dev->first_signalled_pipe == pipe)
  499. return; /* already in the list */
  500. pipe->next_signalled = dev->first_signalled_pipe;
  501. if (dev->first_signalled_pipe)
  502. dev->first_signalled_pipe->prev_signalled = pipe;
  503. dev->first_signalled_pipe = pipe;
  504. }
  505. static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev,
  506. struct goldfish_pipe *pipe) {
  507. if (pipe->prev_signalled)
  508. pipe->prev_signalled->next_signalled = pipe->next_signalled;
  509. if (pipe->next_signalled)
  510. pipe->next_signalled->prev_signalled = pipe->prev_signalled;
  511. if (pipe == dev->first_signalled_pipe)
  512. dev->first_signalled_pipe = pipe->next_signalled;
  513. pipe->prev_signalled = NULL;
  514. pipe->next_signalled = NULL;
  515. }
  516. static struct goldfish_pipe *signalled_pipes_pop_front(
  517. struct goldfish_pipe_dev *dev, int *wakes)
  518. {
  519. struct goldfish_pipe *pipe;
  520. unsigned long flags;
  521. spin_lock_irqsave(&dev->lock, flags);
  522. pipe = dev->first_signalled_pipe;
  523. if (pipe) {
  524. *wakes = pipe->signalled_flags;
  525. pipe->signalled_flags = 0;
  526. /*
  527. * This is an optimized version of
  528. * signalled_pipes_remove_locked()
  529. * - We want to make it as fast as possible to
  530. * wake the sleeping pipe operations faster.
  531. */
  532. dev->first_signalled_pipe = pipe->next_signalled;
  533. if (dev->first_signalled_pipe)
  534. dev->first_signalled_pipe->prev_signalled = NULL;
  535. pipe->next_signalled = NULL;
  536. }
  537. spin_unlock_irqrestore(&dev->lock, flags);
  538. return pipe;
  539. }
  540. static void goldfish_interrupt_task(unsigned long unused)
  541. {
  542. struct goldfish_pipe_dev *dev = pipe_dev;
  543. /* Iterate over the signalled pipes and wake them one by one */
  544. struct goldfish_pipe *pipe;
  545. int wakes;
  546. while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) {
  547. if (wakes & PIPE_WAKE_CLOSED) {
  548. pipe->flags = 1 << BIT_CLOSED_ON_HOST;
  549. } else {
  550. if (wakes & PIPE_WAKE_READ)
  551. clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
  552. if (wakes & PIPE_WAKE_WRITE)
  553. clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
  554. }
  555. /*
  556. * wake_up_interruptible() implies a write barrier, so don't
  557. * explicitly add another one here.
  558. */
  559. wake_up_interruptible(&pipe->wake_queue);
  560. }
  561. }
  562. DECLARE_TASKLET(goldfish_interrupt_tasklet, goldfish_interrupt_task, 0);
  563. /*
  564. * The general idea of the interrupt handling:
  565. *
  566. * 1. device raises an interrupt if there's at least one signalled pipe
  567. * 2. IRQ handler reads the signalled pipes and their count from the device
  568. * 3. device writes them into a shared buffer and returns the count
  569. * it only resets the IRQ if it has returned all signalled pipes,
  570. * otherwise it leaves it raised, so IRQ handler will be called
  571. * again for the next chunk
  572. * 4. IRQ handler adds all returned pipes to the device's signalled pipes list
  573. * 5. IRQ handler launches a tasklet to process the signalled pipes from the
  574. * list in a separate context
  575. */
  576. static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
  577. {
  578. u32 count;
  579. u32 i;
  580. unsigned long flags;
  581. struct goldfish_pipe_dev *dev = dev_id;
  582. if (dev != pipe_dev)
  583. return IRQ_NONE;
  584. /* Request the signalled pipes from the device */
  585. spin_lock_irqsave(&dev->lock, flags);
  586. count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
  587. if (count == 0) {
  588. spin_unlock_irqrestore(&dev->lock, flags);
  589. return IRQ_NONE;
  590. }
  591. if (count > MAX_SIGNALLED_PIPES)
  592. count = MAX_SIGNALLED_PIPES;
  593. for (i = 0; i < count; ++i)
  594. signalled_pipes_add_locked(dev,
  595. dev->buffers->signalled_pipe_buffers[i].id,
  596. dev->buffers->signalled_pipe_buffers[i].flags);
  597. spin_unlock_irqrestore(&dev->lock, flags);
  598. tasklet_schedule(&goldfish_interrupt_tasklet);
  599. return IRQ_HANDLED;
  600. }
  601. static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev)
  602. {
  603. int id;
  604. for (id = 0; id < dev->pipes_capacity; ++id)
  605. if (!dev->pipes[id])
  606. return id;
  607. {
  608. /* Reallocate the array */
  609. u32 new_capacity = 2 * dev->pipes_capacity;
  610. struct goldfish_pipe **pipes =
  611. kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC);
  612. if (!pipes)
  613. return -ENOMEM;
  614. memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity);
  615. kfree(dev->pipes);
  616. dev->pipes = pipes;
  617. id = dev->pipes_capacity;
  618. dev->pipes_capacity = new_capacity;
  619. }
  620. return id;
  621. }
  622. /**
  623. * goldfish_pipe_open - open a channel to the AVD
  624. * @inode: inode of device
  625. * @file: file struct of opener
  626. *
  627. * Create a new pipe link between the emulator and the use application.
  628. * Each new request produces a new pipe.
  629. *
  630. * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
  631. * right now so this is fine. A move to 64bit will need this addressing
  632. */
  633. static int goldfish_pipe_open(struct inode *inode, struct file *file)
  634. {
  635. struct goldfish_pipe_dev *dev = pipe_dev;
  636. unsigned long flags;
  637. int id;
  638. int status;
  639. /* Allocate new pipe kernel object */
  640. struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
  641. if (pipe == NULL)
  642. return -ENOMEM;
  643. pipe->dev = dev;
  644. mutex_init(&pipe->lock);
  645. init_waitqueue_head(&pipe->wake_queue);
  646. /*
  647. * Command buffer needs to be allocated on its own page to make sure
  648. * it is physically contiguous in host's address space.
  649. */
  650. pipe->command_buffer =
  651. (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL);
  652. if (!pipe->command_buffer) {
  653. status = -ENOMEM;
  654. goto err_pipe;
  655. }
  656. spin_lock_irqsave(&dev->lock, flags);
  657. id = get_free_pipe_id_locked(dev);
  658. if (id < 0) {
  659. status = id;
  660. goto err_id_locked;
  661. }
  662. dev->pipes[id] = pipe;
  663. pipe->id = id;
  664. pipe->command_buffer->id = id;
  665. /* Now tell the emulator we're opening a new pipe. */
  666. dev->buffers->open_command_params.rw_params_max_count =
  667. MAX_BUFFERS_PER_COMMAND;
  668. dev->buffers->open_command_params.command_buffer_ptr =
  669. (u64)(unsigned long)__pa(pipe->command_buffer);
  670. status = goldfish_cmd_locked(pipe, PIPE_CMD_OPEN);
  671. spin_unlock_irqrestore(&dev->lock, flags);
  672. if (status < 0)
  673. goto err_cmd;
  674. /* All is done, save the pipe into the file's private data field */
  675. file->private_data = pipe;
  676. return 0;
  677. err_cmd:
  678. spin_lock_irqsave(&dev->lock, flags);
  679. dev->pipes[id] = NULL;
  680. err_id_locked:
  681. spin_unlock_irqrestore(&dev->lock, flags);
  682. free_page((unsigned long)pipe->command_buffer);
  683. err_pipe:
  684. kfree(pipe);
  685. return status;
  686. }
  687. static int goldfish_pipe_release(struct inode *inode, struct file *filp)
  688. {
  689. unsigned long flags;
  690. struct goldfish_pipe *pipe = filp->private_data;
  691. struct goldfish_pipe_dev *dev = pipe->dev;
  692. /* The guest is closing the channel, so tell the emulator right now */
  693. (void)goldfish_cmd(pipe, PIPE_CMD_CLOSE);
  694. spin_lock_irqsave(&dev->lock, flags);
  695. dev->pipes[pipe->id] = NULL;
  696. signalled_pipes_remove_locked(dev, pipe);
  697. spin_unlock_irqrestore(&dev->lock, flags);
  698. filp->private_data = NULL;
  699. free_page((unsigned long)pipe->command_buffer);
  700. kfree(pipe);
  701. return 0;
  702. }
  703. static const struct file_operations goldfish_pipe_fops = {
  704. .owner = THIS_MODULE,
  705. .read = goldfish_pipe_read,
  706. .write = goldfish_pipe_write,
  707. .poll = goldfish_pipe_poll,
  708. .open = goldfish_pipe_open,
  709. .release = goldfish_pipe_release,
  710. };
  711. static struct miscdevice goldfish_pipe_dev = {
  712. .minor = MISC_DYNAMIC_MINOR,
  713. .name = "goldfish_pipe",
  714. .fops = &goldfish_pipe_fops,
  715. };
  716. static int goldfish_pipe_device_init(struct platform_device *pdev)
  717. {
  718. char *page;
  719. struct goldfish_pipe_dev *dev = pipe_dev;
  720. int err = devm_request_irq(&pdev->dev, dev->irq,
  721. goldfish_pipe_interrupt,
  722. IRQF_SHARED, "goldfish_pipe", dev);
  723. if (err) {
  724. dev_err(&pdev->dev, "unable to allocate IRQ for v2\n");
  725. return err;
  726. }
  727. err = misc_register(&goldfish_pipe_dev);
  728. if (err) {
  729. dev_err(&pdev->dev, "unable to register v2 device\n");
  730. return err;
  731. }
  732. dev->first_signalled_pipe = NULL;
  733. dev->pipes_capacity = INITIAL_PIPES_CAPACITY;
  734. dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes),
  735. GFP_KERNEL);
  736. if (!dev->pipes)
  737. return -ENOMEM;
  738. /*
  739. * We're going to pass two buffers, open_command_params and
  740. * signalled_pipe_buffers, to the host. This means each of those buffers
  741. * needs to be contained in a single physical page. The easiest choice
  742. * is to just allocate a page and place the buffers in it.
  743. */
  744. if (WARN_ON(sizeof(*dev->buffers) > PAGE_SIZE))
  745. return -ENOMEM;
  746. page = (char *)__get_free_page(GFP_KERNEL);
  747. if (!page) {
  748. kfree(dev->pipes);
  749. return -ENOMEM;
  750. }
  751. dev->buffers = (struct goldfish_pipe_dev_buffers *)page;
  752. /* Send the buffer addresses to the host */
  753. {
  754. u64 paddr = __pa(&dev->buffers->signalled_pipe_buffers);
  755. writel((u32)(unsigned long)(paddr >> 32),
  756. dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
  757. writel((u32)(unsigned long)paddr,
  758. dev->base + PIPE_REG_SIGNAL_BUFFER);
  759. writel((u32)MAX_SIGNALLED_PIPES,
  760. dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
  761. paddr = __pa(&dev->buffers->open_command_params);
  762. writel((u32)(unsigned long)(paddr >> 32),
  763. dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
  764. writel((u32)(unsigned long)paddr,
  765. dev->base + PIPE_REG_OPEN_BUFFER);
  766. }
  767. return 0;
  768. }
  769. static void goldfish_pipe_device_deinit(struct platform_device *pdev)
  770. {
  771. struct goldfish_pipe_dev *dev = pipe_dev;
  772. misc_deregister(&goldfish_pipe_dev);
  773. kfree(dev->pipes);
  774. free_page((unsigned long)dev->buffers);
  775. }
  776. static int goldfish_pipe_probe(struct platform_device *pdev)
  777. {
  778. int err;
  779. struct resource *r;
  780. struct goldfish_pipe_dev *dev = pipe_dev;
  781. if (WARN_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE))
  782. return -ENOMEM;
  783. /* not thread safe, but this should not happen */
  784. WARN_ON(dev->base != NULL);
  785. spin_lock_init(&dev->lock);
  786. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  787. if (r == NULL || resource_size(r) < PAGE_SIZE) {
  788. dev_err(&pdev->dev, "can't allocate i/o page\n");
  789. return -EINVAL;
  790. }
  791. dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
  792. if (dev->base == NULL) {
  793. dev_err(&pdev->dev, "ioremap failed\n");
  794. return -EINVAL;
  795. }
  796. r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  797. if (r == NULL) {
  798. err = -EINVAL;
  799. goto error;
  800. }
  801. dev->irq = r->start;
  802. /*
  803. * Exchange the versions with the host device
  804. *
  805. * Note: v1 driver used to not report its version, so we write it before
  806. * reading device version back: this allows the host implementation to
  807. * detect the old driver (if there was no version write before read).
  808. */
  809. writel((u32)PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
  810. dev->version = readl(dev->base + PIPE_REG_VERSION);
  811. if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION))
  812. return -EINVAL;
  813. err = goldfish_pipe_device_init(pdev);
  814. if (!err)
  815. return 0;
  816. error:
  817. dev->base = NULL;
  818. return err;
  819. }
  820. static int goldfish_pipe_remove(struct platform_device *pdev)
  821. {
  822. struct goldfish_pipe_dev *dev = pipe_dev;
  823. goldfish_pipe_device_deinit(pdev);
  824. dev->base = NULL;
  825. return 0;
  826. }
  827. static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
  828. { "GFSH0003", 0 },
  829. { },
  830. };
  831. MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
  832. static const struct of_device_id goldfish_pipe_of_match[] = {
  833. { .compatible = "google,android-pipe", },
  834. {},
  835. };
  836. MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
  837. static struct platform_driver goldfish_pipe_driver = {
  838. .probe = goldfish_pipe_probe,
  839. .remove = goldfish_pipe_remove,
  840. .driver = {
  841. .name = "goldfish_pipe",
  842. .of_match_table = goldfish_pipe_of_match,
  843. .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
  844. }
  845. };
  846. module_platform_driver(goldfish_pipe_driver);
  847. MODULE_AUTHOR("David Turner <digit@google.com>");
  848. MODULE_LICENSE("GPL");