cros_ec_lpc.c 10 KB

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  1. /*
  2. * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
  3. *
  4. * Copyright (C) 2012-2015 Google, Inc
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * This driver uses the Chrome OS EC byte-level message-based protocol for
  16. * communicating the keyboard state (which keys are pressed) from a keyboard EC
  17. * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
  18. * but everything else (including deghosting) is done here. The main
  19. * motivation for this is to keep the EC firmware as simple as possible, since
  20. * it cannot be easily upgraded and EC flash/IRAM space is relatively
  21. * expensive.
  22. */
  23. #include <linux/acpi.h>
  24. #include <linux/dmi.h>
  25. #include <linux/delay.h>
  26. #include <linux/io.h>
  27. #include <linux/mfd/cros_ec.h>
  28. #include <linux/mfd/cros_ec_commands.h>
  29. #include <linux/mfd/cros_ec_lpc_reg.h>
  30. #include <linux/module.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/printk.h>
  33. #define DRV_NAME "cros_ec_lpcs"
  34. #define ACPI_DRV_NAME "GOOG0004"
  35. static int ec_response_timed_out(void)
  36. {
  37. unsigned long one_second = jiffies + HZ;
  38. u8 data;
  39. usleep_range(200, 300);
  40. do {
  41. if (!(cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_CMD, 1, &data) &
  42. EC_LPC_STATUS_BUSY_MASK))
  43. return 0;
  44. usleep_range(100, 200);
  45. } while (time_before(jiffies, one_second));
  46. return 1;
  47. }
  48. static int cros_ec_pkt_xfer_lpc(struct cros_ec_device *ec,
  49. struct cros_ec_command *msg)
  50. {
  51. struct ec_host_response response;
  52. u8 sum;
  53. int ret = 0;
  54. u8 *dout;
  55. ret = cros_ec_prepare_tx(ec, msg);
  56. /* Write buffer */
  57. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
  58. /* Here we go */
  59. sum = EC_COMMAND_PROTOCOL_3;
  60. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
  61. if (ec_response_timed_out()) {
  62. dev_warn(ec->dev, "EC responsed timed out\n");
  63. ret = -EIO;
  64. goto done;
  65. }
  66. /* Check result */
  67. msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
  68. ret = cros_ec_check_result(ec, msg);
  69. if (ret)
  70. goto done;
  71. /* Read back response */
  72. dout = (u8 *)&response;
  73. sum = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
  74. dout);
  75. msg->result = response.result;
  76. if (response.data_len > msg->insize) {
  77. dev_err(ec->dev,
  78. "packet too long (%d bytes, expected %d)",
  79. response.data_len, msg->insize);
  80. ret = -EMSGSIZE;
  81. goto done;
  82. }
  83. /* Read response and process checksum */
  84. sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET +
  85. sizeof(response), response.data_len,
  86. msg->data);
  87. if (sum) {
  88. dev_err(ec->dev,
  89. "bad packet checksum %02x\n",
  90. response.checksum);
  91. ret = -EBADMSG;
  92. goto done;
  93. }
  94. /* Return actual amount of data received */
  95. ret = response.data_len;
  96. done:
  97. return ret;
  98. }
  99. static int cros_ec_cmd_xfer_lpc(struct cros_ec_device *ec,
  100. struct cros_ec_command *msg)
  101. {
  102. struct ec_lpc_host_args args;
  103. u8 sum;
  104. int ret = 0;
  105. if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
  106. msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
  107. dev_err(ec->dev,
  108. "invalid buffer sizes (out %d, in %d)\n",
  109. msg->outsize, msg->insize);
  110. return -EINVAL;
  111. }
  112. /* Now actually send the command to the EC and get the result */
  113. args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
  114. args.command_version = msg->version;
  115. args.data_size = msg->outsize;
  116. /* Initialize checksum */
  117. sum = msg->command + args.flags + args.command_version + args.data_size;
  118. /* Copy data and update checksum */
  119. sum += cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
  120. msg->data);
  121. /* Finalize checksum and write args */
  122. args.checksum = sum;
  123. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
  124. (u8 *)&args);
  125. /* Here we go */
  126. sum = msg->command;
  127. cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
  128. if (ec_response_timed_out()) {
  129. dev_warn(ec->dev, "EC responsed timed out\n");
  130. ret = -EIO;
  131. goto done;
  132. }
  133. /* Check result */
  134. msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
  135. ret = cros_ec_check_result(ec, msg);
  136. if (ret)
  137. goto done;
  138. /* Read back args */
  139. cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
  140. (u8 *)&args);
  141. if (args.data_size > msg->insize) {
  142. dev_err(ec->dev,
  143. "packet too long (%d bytes, expected %d)",
  144. args.data_size, msg->insize);
  145. ret = -ENOSPC;
  146. goto done;
  147. }
  148. /* Start calculating response checksum */
  149. sum = msg->command + args.flags + args.command_version + args.data_size;
  150. /* Read response and update checksum */
  151. sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PARAM, args.data_size,
  152. msg->data);
  153. /* Verify checksum */
  154. if (args.checksum != sum) {
  155. dev_err(ec->dev,
  156. "bad packet checksum, expected %02x, got %02x\n",
  157. args.checksum, sum);
  158. ret = -EBADMSG;
  159. goto done;
  160. }
  161. /* Return actual amount of data received */
  162. ret = args.data_size;
  163. done:
  164. return ret;
  165. }
  166. /* Returns num bytes read, or negative on error. Doesn't need locking. */
  167. static int cros_ec_lpc_readmem(struct cros_ec_device *ec, unsigned int offset,
  168. unsigned int bytes, void *dest)
  169. {
  170. int i = offset;
  171. char *s = dest;
  172. int cnt = 0;
  173. if (offset >= EC_MEMMAP_SIZE - bytes)
  174. return -EINVAL;
  175. /* fixed length */
  176. if (bytes) {
  177. cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
  178. return bytes;
  179. }
  180. /* string */
  181. for (; i < EC_MEMMAP_SIZE; i++, s++) {
  182. cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + i, 1, s);
  183. cnt++;
  184. if (!*s)
  185. break;
  186. }
  187. return cnt;
  188. }
  189. static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
  190. {
  191. struct cros_ec_device *ec_dev = data;
  192. if (ec_dev->mkbp_event_supported &&
  193. cros_ec_get_next_event(ec_dev, NULL) > 0)
  194. blocking_notifier_call_chain(&ec_dev->event_notifier, 0,
  195. ec_dev);
  196. }
  197. static int cros_ec_lpc_probe(struct platform_device *pdev)
  198. {
  199. struct device *dev = &pdev->dev;
  200. struct acpi_device *adev;
  201. acpi_status status;
  202. struct cros_ec_device *ec_dev;
  203. u8 buf[2];
  204. int ret;
  205. if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
  206. dev_name(dev))) {
  207. dev_err(dev, "couldn't reserve memmap region\n");
  208. return -EBUSY;
  209. }
  210. cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
  211. if (buf[0] != 'E' || buf[1] != 'C') {
  212. dev_err(dev, "EC ID not detected\n");
  213. return -ENODEV;
  214. }
  215. if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
  216. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  217. dev_err(dev, "couldn't reserve region0\n");
  218. return -EBUSY;
  219. }
  220. if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
  221. EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {
  222. dev_err(dev, "couldn't reserve region1\n");
  223. return -EBUSY;
  224. }
  225. ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
  226. if (!ec_dev)
  227. return -ENOMEM;
  228. platform_set_drvdata(pdev, ec_dev);
  229. ec_dev->dev = dev;
  230. ec_dev->phys_name = dev_name(dev);
  231. ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
  232. ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
  233. ec_dev->cmd_readmem = cros_ec_lpc_readmem;
  234. ec_dev->din_size = sizeof(struct ec_host_response) +
  235. sizeof(struct ec_response_get_protocol_info);
  236. ec_dev->dout_size = sizeof(struct ec_host_request);
  237. ret = cros_ec_register(ec_dev);
  238. if (ret) {
  239. dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
  240. return ret;
  241. }
  242. /*
  243. * Connect a notify handler to process MKBP messages if we have a
  244. * companion ACPI device.
  245. */
  246. adev = ACPI_COMPANION(dev);
  247. if (adev) {
  248. status = acpi_install_notify_handler(adev->handle,
  249. ACPI_ALL_NOTIFY,
  250. cros_ec_lpc_acpi_notify,
  251. ec_dev);
  252. if (ACPI_FAILURE(status))
  253. dev_warn(dev, "Failed to register notifier %08x\n",
  254. status);
  255. }
  256. return 0;
  257. }
  258. static int cros_ec_lpc_remove(struct platform_device *pdev)
  259. {
  260. struct cros_ec_device *ec_dev;
  261. struct acpi_device *adev;
  262. adev = ACPI_COMPANION(&pdev->dev);
  263. if (adev)
  264. acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
  265. cros_ec_lpc_acpi_notify);
  266. ec_dev = platform_get_drvdata(pdev);
  267. cros_ec_remove(ec_dev);
  268. return 0;
  269. }
  270. static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
  271. { ACPI_DRV_NAME, 0 },
  272. { }
  273. };
  274. MODULE_DEVICE_TABLE(acpi, cros_ec_lpc_acpi_device_ids);
  275. static const struct dmi_system_id cros_ec_lpc_dmi_table[] __initconst = {
  276. {
  277. /*
  278. * Today all Chromebooks/boxes ship with Google_* as version and
  279. * coreboot as bios vendor. No other systems with this
  280. * combination are known to date.
  281. */
  282. .matches = {
  283. DMI_MATCH(DMI_BIOS_VENDOR, "coreboot"),
  284. DMI_MATCH(DMI_BIOS_VERSION, "Google_"),
  285. },
  286. },
  287. {
  288. /* x86-link, the Chromebook Pixel. */
  289. .matches = {
  290. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  291. DMI_MATCH(DMI_PRODUCT_NAME, "Link"),
  292. },
  293. },
  294. {
  295. /* x86-samus, the Chromebook Pixel 2. */
  296. .matches = {
  297. DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
  298. DMI_MATCH(DMI_PRODUCT_NAME, "Samus"),
  299. },
  300. },
  301. {
  302. /* x86-peppy, the Acer C720 Chromebook. */
  303. .matches = {
  304. DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
  305. DMI_MATCH(DMI_PRODUCT_NAME, "Peppy"),
  306. },
  307. },
  308. { /* sentinel */ }
  309. };
  310. MODULE_DEVICE_TABLE(dmi, cros_ec_lpc_dmi_table);
  311. #ifdef CONFIG_PM_SLEEP
  312. static int cros_ec_lpc_suspend(struct device *dev)
  313. {
  314. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  315. return cros_ec_suspend(ec_dev);
  316. }
  317. static int cros_ec_lpc_resume(struct device *dev)
  318. {
  319. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  320. return cros_ec_resume(ec_dev);
  321. }
  322. #endif
  323. const struct dev_pm_ops cros_ec_lpc_pm_ops = {
  324. SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
  325. };
  326. static struct platform_driver cros_ec_lpc_driver = {
  327. .driver = {
  328. .name = DRV_NAME,
  329. .acpi_match_table = cros_ec_lpc_acpi_device_ids,
  330. .pm = &cros_ec_lpc_pm_ops,
  331. },
  332. .probe = cros_ec_lpc_probe,
  333. .remove = cros_ec_lpc_remove,
  334. };
  335. static int __init cros_ec_lpc_init(void)
  336. {
  337. int ret;
  338. if (!dmi_check_system(cros_ec_lpc_dmi_table)) {
  339. pr_err(DRV_NAME ": unsupported system.\n");
  340. return -ENODEV;
  341. }
  342. cros_ec_lpc_reg_init();
  343. /* Register the driver */
  344. ret = platform_driver_register(&cros_ec_lpc_driver);
  345. if (ret) {
  346. pr_err(DRV_NAME ": can't register driver: %d\n", ret);
  347. cros_ec_lpc_reg_destroy();
  348. return ret;
  349. }
  350. return 0;
  351. }
  352. static void __exit cros_ec_lpc_exit(void)
  353. {
  354. platform_driver_unregister(&cros_ec_lpc_driver);
  355. cros_ec_lpc_reg_destroy();
  356. }
  357. module_init(cros_ec_lpc_init);
  358. module_exit(cros_ec_lpc_exit);
  359. MODULE_LICENSE("GPL");
  360. MODULE_DESCRIPTION("ChromeOS EC LPC driver");