pn553.c 54 KB

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  1. /*
  2. * Copyright (C) 2010 Trusted Logic S.A.
  3. * Copyright (C) 2021 XiaoMi, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. *
  16. */
  17. /******************************************************************************
  18. *
  19. * The original Work has been changed by NXP Semiconductors.
  20. *
  21. * Copyright (C) 2013-2019 NXP Semiconductors
  22. * *
  23. * This program is free software; you can redistribute it and/or modify
  24. * it under the terms of the GNU General Public License as published by
  25. * the Free Software Foundation; either version 2 of the License, or
  26. * (at your option) any later version.
  27. *
  28. * This program is distributed in the hope that it will be useful,
  29. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31. * GNU General Public License for more details.
  32. *
  33. *
  34. ******************************************************************************/
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/fs.h>
  38. #include <linux/reboot.h>
  39. #include <linux/slab.h>
  40. #include <linux/init.h>
  41. #include <linux/list.h>
  42. #include <linux/i2c.h>
  43. #include <linux/irq.h>
  44. #include <linux/jiffies.h>
  45. #include <linux/uaccess.h>
  46. #include <linux/delay.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/io.h>
  49. #include <linux/platform_device.h>
  50. #include <linux/gpio.h>
  51. #include <linux/of_gpio.h>
  52. #include <linux/miscdevice.h>
  53. #include <linux/spinlock.h>
  54. #include <asm/siginfo.h>
  55. #include <linux/rcupdate.h>
  56. #include <linux/sched.h>
  57. #include <linux/signal.h>
  58. #include <linux/workqueue.h>
  59. #include <linux/timer.h>
  60. #include "pn553.h"
  61. static const struct of_device_id msm_match_table[] = {
  62. {.compatible = "qcom,nq-nci"},
  63. {}
  64. };
  65. MODULE_DEVICE_TABLE(of, msm_match_table);
  66. #define NEXUS5x 0
  67. #define HWINFO 0
  68. #if NEXUS5x
  69. #undef ISO_RST
  70. #else
  71. #undef ISO_RST
  72. #endif
  73. #define DRAGON_NFC 1
  74. #define SIG_NFC 44
  75. #define MAX_BUFFER_SIZE 512
  76. #define MAX_SECURE_SESSIONS 1
  77. #define MSG_PROP_GID 0x4F
  78. #define ESE_CLD_RST_OID 0x1E
  79. #define ESE_CLD_RST_RSP_SIZE 0x04
  80. #define WAKEUP_SRC_TIMEOUT (2000)
  81. extern int force_sig_info(int, struct siginfo *, struct task_struct *);
  82. /* VEN is kept ON all the time if you define the macro VEN_ALWAYS_ON.
  83. Used for SN100 usecases */
  84. #define VEN_ALWAYS_ON
  85. /* Macro added to disable SVDD power toggling */
  86. /* #define JCOP_4X_VALIDATION */
  87. struct pn544_dev {
  88. wait_queue_head_t read_wq;
  89. struct mutex read_mutex;
  90. struct i2c_client *client;
  91. struct miscdevice pn544_device;
  92. unsigned int ven_gpio;
  93. unsigned int firm_gpio;
  94. unsigned int irq_gpio;
  95. #ifdef ISO_RST
  96. unsigned int iso_rst_gpio; /* ISO-RST pin gpio */
  97. #endif
  98. struct mutex p61_state_mutex; /* used to make p61_current_state flag secure */
  99. p61_access_state_t p61_current_state; /* stores the current P61 state */
  100. bool nfc_ven_enabled; /* stores the VEN pin state powered by Nfc */
  101. bool spi_ven_enabled; /* stores the VEN pin state powered by Spi */
  102. bool irq_enabled;
  103. spinlock_t irq_enabled_lock;
  104. bool irq_wake_up;
  105. long nfc_service_pid; /*used to signal the nfc the nfc service */
  106. chip_pwr_scheme_t chip_pwr_scheme;
  107. unsigned int secure_timer_cnt;
  108. struct workqueue_struct *pSecureTimerCbWq;
  109. struct work_struct wq_task;
  110. /* Bit value Status Remark
  111. * b0 : 1 -> NFC_ON Driver Open should set the flag
  112. * 0 NFC_OFF Driver release should reset this flag
  113. * b1 : 1 -> FWDNLD If FWDNLD is going on.
  114. * 0 Normal operation
  115. * b2 : 1 -> ese_cold_reset sequence has been triggered from the SPI driver
  116. * 0 -> ese_cold_reset cmd has been written by the NFC HAL
  117. * bits b3 to b7 : Reserved for the future use.
  118. * NOTE: Driver probe function should reset b0-b2 flags.
  119. * The value of b3-b7 flags is undetermined.
  120. * */
  121. volatile uint8_t state_flags;
  122. };
  123. static int nfcc_reboot(struct notifier_block *notifier, unsigned long val,
  124. void *v);
  125. #if HWINFO
  126. struct hw_type_info hw_info;
  127. #endif
  128. static struct notifier_block nfcc_notifier = {
  129. .notifier_call = nfcc_reboot,
  130. .next = NULL,
  131. .priority = 0
  132. };
  133. unsigned int disable_ctrl;
  134. static struct pn544_dev *g_pn544_dev;
  135. static struct semaphore ese_access_sema;
  136. static struct semaphore svdd_sync_onoff_sema;
  137. static struct completion dwp_onoff_sema;
  138. static struct completion ese_cold_reset_sema;
  139. static int8_t ese_cold_reset_rsp[ESE_CLD_RST_RSP_SIZE];
  140. static struct timer_list secure_timer;
  141. static void release_ese_lock(p61_access_state_t p61_current_state);
  142. int get_ese_lock(p61_access_state_t p61_current_state, int timeout);
  143. static long set_jcop_download_state(unsigned long arg);
  144. static long start_seccure_timer(unsigned long timer_value);
  145. static long secure_timer_operation(struct pn544_dev *pn544_dev,
  146. unsigned long arg);
  147. #if HWINFO
  148. static void check_hw_info(void);
  149. #endif
  150. #define SECURE_TIMER_WORK_QUEUE "SecTimerCbWq"
  151. static void pn544_disable_irq(struct pn544_dev *pn544_dev)
  152. {
  153. unsigned long flags;
  154. spin_lock_irqsave(&pn544_dev->irq_enabled_lock, flags);
  155. if (pn544_dev->irq_enabled) {
  156. disable_irq_nosync(pn544_dev->client->irq);
  157. disable_irq_wake(pn544_dev->client->irq);
  158. pn544_dev->irq_enabled = false;
  159. }
  160. spin_unlock_irqrestore(&pn544_dev->irq_enabled_lock, flags);
  161. }
  162. static int pn544_dev_release(struct inode *inode, struct file *filp)
  163. {
  164. g_pn544_dev->state_flags = 0x00;
  165. pr_info(KERN_ALERT "Exit %s: NFC driver release nfc hal \n",
  166. __func__);
  167. return 0;
  168. }
  169. static irqreturn_t pn544_dev_irq_handler(int irq, void *dev_id)
  170. {
  171. struct pn544_dev *pn544_dev = dev_id;
  172. if (device_may_wakeup(&pn544_dev->client->dev))
  173. pm_wakeup_event(&pn544_dev->client->dev, WAKEUP_SRC_TIMEOUT);
  174. pn544_disable_irq(pn544_dev);
  175. /* HiKey Compilation fix */
  176. /* Wake up waiting readers */
  177. wake_up(&pn544_dev->read_wq);
  178. return IRQ_HANDLED;
  179. }
  180. static void rcv_ese_cldrst_status(void)
  181. {
  182. int ret = -1;
  183. char tmp[MAX_BUFFER_SIZE];
  184. size_t rcount = (size_t) ese_cold_reset_rsp[2];
  185. /* Read data: No need to wait for the interrupt */
  186. ret = i2c_master_recv(g_pn544_dev->client, tmp, rcount);
  187. if (ret == rcount) {
  188. ese_cold_reset_rsp[3] = tmp[0];
  189. pr_info("%s NxpNciR : len = 4 > %02X%02X%02X%02X\n", __func__,
  190. ese_cold_reset_rsp[0], ese_cold_reset_rsp[1],
  191. ese_cold_reset_rsp[2], ese_cold_reset_rsp[3]);
  192. } else {
  193. pr_err("%s : Failed to receive payload of the cold_rst_cmd\n",
  194. __func__);
  195. ese_cold_reset_rsp[3] = -EIO;
  196. }
  197. if (g_pn544_dev->state_flags & (P544_FLAG_NFC_ON)) {
  198. complete(&ese_cold_reset_sema);
  199. }
  200. }
  201. static ssize_t pn544_dev_read(struct file *filp, char __user *buf, size_t count, loff_t *offset)
  202. {
  203. struct pn544_dev *pn544_dev = filp->private_data;
  204. char tmp[MAX_BUFFER_SIZE];
  205. int ret;
  206. if (count > MAX_BUFFER_SIZE)
  207. count = MAX_BUFFER_SIZE;
  208. //pr_debug("%s : reading %zu bytes.\n", __func__, count);
  209. mutex_lock(&pn544_dev->read_mutex);
  210. if (!gpio_get_value(pn544_dev->irq_gpio)) {
  211. if (filp->f_flags & O_NONBLOCK) {
  212. ret = -EAGAIN;
  213. goto fail;
  214. }
  215. while (1) {
  216. pn544_dev->irq_enabled = true;
  217. enable_irq(pn544_dev->client->irq);
  218. enable_irq_wake(pn544_dev->client->irq);
  219. ret = wait_event_interruptible(pn544_dev->read_wq,
  220. !pn544_dev->irq_enabled);
  221. pn544_disable_irq(pn544_dev);
  222. if (ret)
  223. goto fail;
  224. if (gpio_get_value(pn544_dev->irq_gpio))
  225. break;
  226. pr_warning("%s: spurious interrupt detected\n",
  227. __func__);
  228. }
  229. }
  230. /* Read data */
  231. ret = i2c_master_recv(pn544_dev->client, tmp, count);
  232. /* if the received response for COLD_RESET_COMMAND
  233. * Consume it in driver*/
  234. if ((pn544_dev->state_flags & P544_FLAG_ESE_COLD_RESET_FROM_DRIVER) &&
  235. MSG_PROP_GID == tmp[0] && ESE_CLD_RST_OID == tmp[1]) {
  236. memset(&ese_cold_reset_rsp, 0, sizeof(ese_cold_reset_rsp));
  237. memcpy(ese_cold_reset_rsp, tmp, 3);
  238. rcv_ese_cldrst_status();
  239. mutex_unlock(&pn544_dev->read_mutex);
  240. return 0;
  241. }
  242. mutex_unlock(&pn544_dev->read_mutex);
  243. /* pn544 seems to be slow in handling I2C read requests
  244. * so add 1ms delay after recv operation */
  245. #if !NEXUS5x
  246. udelay(1000);
  247. #endif
  248. if (ret < 0) {
  249. pr_err("%s: i2c_master_recv returned %d\n", __func__, ret);
  250. return ret;
  251. }
  252. if (ret > count) {
  253. pr_err("%s: received too many bytes from i2c (%d)\n",
  254. __func__, ret);
  255. return -EIO;
  256. }
  257. if (copy_to_user(buf, tmp, ret)) {
  258. pr_warning("%s : failed to copy to user space\n", __func__);
  259. return -EFAULT;
  260. }
  261. return ret;
  262. fail:
  263. mutex_unlock(&pn544_dev->read_mutex);
  264. return ret;
  265. }
  266. static ssize_t pn544_dev_write(struct file *filp, const char __user *buf, size_t count, loff_t *offset)
  267. {
  268. struct pn544_dev *pn544_dev;
  269. char tmp[MAX_BUFFER_SIZE];
  270. int ret;
  271. pn544_dev = filp->private_data;
  272. if (count > MAX_BUFFER_SIZE)
  273. count = MAX_BUFFER_SIZE;
  274. if (copy_from_user(tmp, buf, count)) {
  275. pr_err("%s : failed to copy from user space\n", __func__);
  276. return -EFAULT;
  277. }
  278. //pr_debug("%s : writing %zu bytes.\n", __func__, count);
  279. /* Write data */
  280. ret = i2c_master_send(pn544_dev->client, tmp, count);
  281. if (ret != count) {
  282. pr_err("%s : i2c_master_send returned %d\n", __func__, ret);
  283. ret = -EIO;
  284. }
  285. /* pn544 seems to be slow in handling I2C write requests
  286. * so add 1ms delay after I2C send oparation */
  287. udelay(1000);
  288. return ret;
  289. }
  290. static void p61_update_access_state(struct pn544_dev *pn544_dev, p61_access_state_t current_state, bool set)
  291. {
  292. pr_info("%s: Enter current_state = %x\n", __func__,
  293. pn544_dev->p61_current_state);
  294. if (current_state) {
  295. if (set) {
  296. if (pn544_dev->p61_current_state == P61_STATE_IDLE)
  297. pn544_dev->p61_current_state =
  298. P61_STATE_INVALID;
  299. pn544_dev->p61_current_state |= current_state;
  300. } else {
  301. pn544_dev->p61_current_state ^= current_state;
  302. if (!pn544_dev->p61_current_state)
  303. pn544_dev->p61_current_state = P61_STATE_IDLE;
  304. }
  305. }
  306. pr_info("%s: Exit current_state = %x\n", __func__,
  307. pn544_dev->p61_current_state);
  308. }
  309. static void p61_get_access_state(struct pn544_dev *pn544_dev, p61_access_state_t *current_state)
  310. {
  311. if (current_state == NULL) {
  312. //*current_state = P61_STATE_INVALID;
  313. pr_err
  314. ("%s : invalid state of p61_access_state_t current state \n",
  315. __func__);
  316. } else {
  317. *current_state = pn544_dev->p61_current_state;
  318. }
  319. }
  320. static void p61_access_lock(struct pn544_dev *pn544_dev)
  321. {
  322. pr_info("%s: Enter pn544 dev is %x,\n", __func__, pn544_dev);
  323. pr_info("%s: Enter pn544 dev state mutex is %s,\n", __func__,
  324. &pn544_dev->p61_state_mutex);
  325. mutex_lock(&pn544_dev->p61_state_mutex);
  326. pr_info("%s: Exit\n", __func__);
  327. }
  328. static void p61_access_unlock(struct pn544_dev *pn544_dev)
  329. {
  330. pr_info("%s: Enter\n", __func__);
  331. mutex_unlock(&pn544_dev->p61_state_mutex);
  332. }
  333. long p61_cold_reset(void)
  334. {
  335. long ret = 0;
  336. unsigned int loop = 0x03;
  337. struct file filp;
  338. int timeout = 2000; /* 2s timeout :NCI cmd timeout */
  339. unsigned long tempJ = msecs_to_jiffies(timeout);
  340. uint8_t cmd_ese_cold_reset[] = { 0x2F, 0x1E, 0x00 };
  341. filp.private_data = g_pn544_dev;
  342. pr_info("%s: Enter", __func__);
  343. if (g_pn544_dev->state_flags & P544_FLAG_FW_DNLD) {
  344. /* If FW DNLD, Operation is not permitted */
  345. pr_err("%s : Operation is not permitted during fwdnld\n",
  346. __func__);
  347. return -EPERM;
  348. }
  349. /* pn544_dev_read() should return the rsp if JNI has requested the cold reset */
  350. g_pn544_dev->state_flags |= (P544_FLAG_ESE_COLD_RESET_FROM_DRIVER);
  351. init_completion(&ese_cold_reset_sema);
  352. /* write command to I2C line */
  353. do {
  354. ret =
  355. i2c_master_send(g_pn544_dev->client, cmd_ese_cold_reset,
  356. sizeof(cmd_ese_cold_reset));
  357. if (ret == sizeof(cmd_ese_cold_reset)) {
  358. break;
  359. }
  360. loop--;
  361. usleep_range(5000, 6000);
  362. } while (loop);
  363. if (!loop && (ret != sizeof(cmd_ese_cold_reset))) {
  364. pr_err("%s : i2c_master_send returned %ld\n", __func__, ret);
  365. g_pn544_dev->state_flags &=
  366. ~(P544_FLAG_ESE_COLD_RESET_FROM_DRIVER);
  367. return -EIO;
  368. }
  369. pr_info("%s: NxpNciX: %ld > %02X%02X%02X \n", __func__, ret,
  370. cmd_ese_cold_reset[0], cmd_ese_cold_reset[1],
  371. cmd_ese_cold_reset[2]);
  372. ret = 0x00;
  373. if (g_pn544_dev->state_flags & P544_FLAG_NFC_ON) { /* NFC_ON */
  374. /* Read is pending from the NFC service which will complete the ese_cold_reset_sema */
  375. if (wait_for_completion_timeout(&ese_cold_reset_sema, tempJ) ==
  376. 0) {
  377. pr_err("%s: Timeout", __func__);
  378. ese_cold_reset_rsp[3] = -EAGAIN; // Failure case
  379. }
  380. } else { /* NFC_OFF */
  381. /* call the pn544_dev_read() */
  382. filp.f_flags &= ~O_NONBLOCK;
  383. ret = pn544_dev_read(&filp, NULL, 3, 0);
  384. }
  385. if (0x00 == ret) /* success case */
  386. ret = ese_cold_reset_rsp[3];
  387. g_pn544_dev->state_flags &= ~(P544_FLAG_ESE_COLD_RESET_FROM_DRIVER);
  388. /* Return the status to the SPI Driver */
  389. pr_info("%s: exit, Status:%ld", __func__, ret);
  390. return ret;
  391. }
  392. EXPORT_SYMBOL(p61_cold_reset);
  393. static int signal_handler(p61_access_state_t state, long nfc_pid)
  394. {
  395. struct siginfo sinfo;
  396. pid_t pid;
  397. struct task_struct *task;
  398. int sigret = 0, ret = 0;
  399. pr_info("%s: Enter\n", __func__);
  400. if (nfc_pid == 0) {
  401. pr_info("nfc_pid is clear don't call signal_handler.\n");
  402. } else {
  403. memset(&sinfo, 0, sizeof(struct siginfo));
  404. sinfo.si_signo = SIG_NFC;
  405. sinfo.si_code = SI_QUEUE;
  406. sinfo.si_int = state;
  407. pid = nfc_pid;
  408. task = pid_task(find_vpid(pid), PIDTYPE_PID);
  409. if (task) {
  410. pr_info("%s.\n", task->comm);
  411. sigret = force_sig_info(SIG_NFC, &sinfo, task);
  412. if (sigret < 0) {
  413. pr_info
  414. ("send_sig_info failed..... sigret %d.\n",
  415. sigret);
  416. ret = -1;
  417. //msleep(60);
  418. }
  419. } else {
  420. pr_info("finding task from PID failed\r\n");
  421. ret = -1;
  422. }
  423. }
  424. pr_info("%s: Exit ret = %d\n", __func__, ret);
  425. return ret;
  426. }
  427. static void svdd_sync_onoff(long nfc_service_pid, p61_access_state_t origin)
  428. {
  429. int timeout = 100; //100 ms timeout
  430. unsigned long tempJ = msecs_to_jiffies(timeout);
  431. pr_info("%s: Enter nfc_service_pid: %ld\n", __func__, nfc_service_pid);
  432. if (nfc_service_pid) {
  433. if (0 == signal_handler(origin, nfc_service_pid)) {
  434. sema_init(&svdd_sync_onoff_sema, 0);
  435. pr_info("Waiting for svdd protection response");
  436. if (down_timeout(&svdd_sync_onoff_sema, tempJ) != 0) {
  437. pr_info("svdd wait protection: Timeout");
  438. }
  439. pr_info("svdd wait protection : released");
  440. }
  441. }
  442. pr_info("%s: Exit\n", __func__);
  443. }
  444. static int release_svdd_wait(void)
  445. {
  446. pr_info("%s: Enter \n", __func__);
  447. up(&svdd_sync_onoff_sema);
  448. pr_info("%s: Exit\n", __func__);
  449. return 0;
  450. }
  451. static void dwp_OnOff(long nfc_service_pid, p61_access_state_t origin)
  452. {
  453. int timeout = 100; //100 ms timeout
  454. unsigned long tempJ = msecs_to_jiffies(timeout);
  455. if (nfc_service_pid) {
  456. if (0 == signal_handler(origin, nfc_service_pid)) {
  457. init_completion(&dwp_onoff_sema);
  458. if (wait_for_completion_timeout(&dwp_onoff_sema, tempJ)
  459. != 0) {
  460. pr_info("Dwp On/off wait protection: Timeout");
  461. }
  462. pr_info("Dwp On/Off wait protection : released");
  463. }
  464. }
  465. }
  466. static int release_dwpOnOff_wait(void)
  467. {
  468. pr_info("%s: Enter \n", __func__);
  469. complete(&dwp_onoff_sema);
  470. return 0;
  471. }
  472. static int pn544_dev_open(struct inode *inode, struct file *filp)
  473. {
  474. struct pn544_dev *pn544_dev = container_of(filp->private_data,
  475. struct pn544_dev,
  476. pn544_device);
  477. filp->private_data = pn544_dev;
  478. pn544_dev->state_flags |= (P544_FLAG_NFC_ON);
  479. pr_debug("%s : %d,%d\n", __func__, imajor(inode), iminor(inode));
  480. return 0;
  481. }
  482. static int set_nfc_pid(unsigned long arg)
  483. {
  484. pr_info("%s : The NFC Service PID is %ld\n", __func__, arg);
  485. g_pn544_dev->nfc_service_pid = arg;
  486. return 0;
  487. }
  488. long pn544_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  489. {
  490. struct pn544_dev *pn544_dev = g_pn544_dev;
  491. pr_info("%s :enter cmd = %u, arg = %ld\n", __func__, cmd, arg);
  492. //pn544_dev = filp->private_data;
  493. if (NULL == pn544_dev)
  494. return 0;
  495. /* Free pass autobahn area, not protected. Use it carefullly. START */
  496. switch (cmd) {
  497. case P544_GET_ESE_ACCESS:
  498. return get_ese_lock(P61_STATE_WIRED, arg);
  499. break;
  500. case P544_REL_SVDD_WAIT:
  501. return release_svdd_wait();
  502. break;
  503. case P544_SET_NFC_SERVICE_PID:
  504. return set_nfc_pid(arg);
  505. break;
  506. case P544_REL_DWPONOFF_WAIT:
  507. return release_dwpOnOff_wait();
  508. break;
  509. default:
  510. break;
  511. }
  512. /* Free pass autobahn area, not protected. Use it carefullly. END */
  513. p61_access_lock(pn544_dev);
  514. switch (cmd) {
  515. case PN544_SET_PWR:
  516. {
  517. p61_access_state_t current_state = P61_STATE_INVALID;
  518. p61_get_access_state(pn544_dev, &current_state);
  519. if (arg == 2) {
  520. if (current_state &
  521. (P61_STATE_SPI | P61_STATE_SPI_PRIO)
  522. && (pn544_dev->chip_pwr_scheme !=
  523. PN80T_EXT_PMU_SCHEME)) {
  524. /* NFCC fw/download should not be allowed if p61 is used
  525. * by SPI
  526. */
  527. pr_info
  528. ("%s NFCC should not be allowed to reset/FW download \n",
  529. __func__);
  530. p61_access_unlock(pn544_dev);
  531. return -EBUSY; /* Device or resource busy */
  532. }
  533. pn544_dev->nfc_ven_enabled = true;
  534. if ((pn544_dev->spi_ven_enabled == false
  535. && !(pn544_dev->secure_timer_cnt))
  536. || (pn544_dev->chip_pwr_scheme ==
  537. PN80T_EXT_PMU_SCHEME)) {
  538. /* power on with firmware download (requires hw reset)
  539. */
  540. pr_info("%s power on with firmware\n",
  541. __func__);
  542. gpio_set_value(pn544_dev->ven_gpio, 1);
  543. msleep(10);
  544. if (pn544_dev->firm_gpio) {
  545. p61_update_access_state
  546. (pn544_dev, P61_STATE_DWNLD,
  547. true);
  548. gpio_set_value(pn544_dev->
  549. firm_gpio, 1);
  550. }
  551. msleep(10);
  552. gpio_set_value(pn544_dev->ven_gpio, 0);
  553. msleep(10);
  554. gpio_set_value(pn544_dev->ven_gpio, 1);
  555. msleep(10);
  556. }
  557. } else if (arg == 1) {
  558. /* power on */
  559. pr_info("%s power on\n", __func__);
  560. if (pn544_dev->firm_gpio) {
  561. if ((current_state &
  562. (P61_STATE_WIRED | P61_STATE_SPI |
  563. P61_STATE_SPI_PRIO)) == 0) {
  564. p61_update_access_state
  565. (pn544_dev, P61_STATE_IDLE,
  566. true);
  567. }
  568. if (current_state & P61_STATE_DWNLD) {
  569. p61_update_access_state
  570. (pn544_dev, P61_STATE_DWNLD,
  571. false);
  572. }
  573. gpio_set_value(pn544_dev->firm_gpio, 0);
  574. }
  575. pn544_dev->nfc_ven_enabled = true;
  576. #ifndef VEN_ALWAYS_ON
  577. if (pn544_dev->spi_ven_enabled == false
  578. || (pn544_dev->chip_pwr_scheme ==
  579. PN80T_EXT_PMU_SCHEME)) {
  580. gpio_set_value(pn544_dev->ven_gpio, 1);
  581. }
  582. #endif
  583. } else if (arg == 0) {
  584. /* power off */
  585. pr_info("%s power off\n", __func__);
  586. if (pn544_dev->firm_gpio) {
  587. if ((current_state &
  588. (P61_STATE_WIRED | P61_STATE_SPI |
  589. P61_STATE_SPI_PRIO)) == 0) {
  590. p61_update_access_state
  591. (pn544_dev, P61_STATE_IDLE,
  592. true);
  593. }
  594. gpio_set_value(pn544_dev->firm_gpio, 0);
  595. }
  596. pn544_dev->nfc_ven_enabled = false;
  597. /* Don't change Ven state if spi made it high */
  598. #ifndef VEN_ALWAYS_ON
  599. if ((pn544_dev->spi_ven_enabled == false
  600. && !(pn544_dev->secure_timer_cnt))
  601. || (pn544_dev->chip_pwr_scheme ==
  602. PN80T_EXT_PMU_SCHEME)) {
  603. gpio_set_value(pn544_dev->ven_gpio, 0);
  604. }
  605. #endif
  606. /* HiKey Compilation fix */
  607. } else if (arg == 3) {
  608. /*NFC Service called ISO-RST */
  609. p61_access_state_t current_state =
  610. P61_STATE_INVALID;
  611. p61_get_access_state(pn544_dev, &current_state);
  612. if (current_state &
  613. (P61_STATE_SPI | P61_STATE_SPI_PRIO)) {
  614. p61_access_unlock(pn544_dev);
  615. return -EPERM; /* Operation not permitted */
  616. }
  617. if (current_state & P61_STATE_WIRED) {
  618. p61_update_access_state(pn544_dev,
  619. P61_STATE_WIRED,
  620. false);
  621. }
  622. #ifdef ISO_RST
  623. gpio_set_value(pn544_dev->iso_rst_gpio, 0);
  624. msleep(50);
  625. gpio_set_value(pn544_dev->iso_rst_gpio, 1);
  626. msleep(50);
  627. pr_info("%s ISO RESET from DWP DONE\n",
  628. __func__);
  629. #endif
  630. } else if (arg == 4) {
  631. pr_info("%s FW dwldioctl called from NFC \n",
  632. __func__);
  633. /*NFC Service called FW dwnld */
  634. if (pn544_dev->firm_gpio) {
  635. p61_update_access_state(pn544_dev,
  636. P61_STATE_DWNLD,
  637. true);
  638. gpio_set_value(pn544_dev->firm_gpio, 1);
  639. pn544_dev->state_flags |=
  640. (P544_FLAG_FW_DNLD);
  641. msleep(10);
  642. }
  643. } else if (arg == 5) {
  644. msleep(10);
  645. gpio_set_value(pn544_dev->ven_gpio, 0);
  646. msleep(10);
  647. gpio_set_value(pn544_dev->ven_gpio, 1);
  648. msleep(10);
  649. pr_info("%s VEN reset DONE >>>>>>>\n",
  650. __func__);
  651. } else if (arg == 6) {
  652. if (pn544_dev->firm_gpio) {
  653. gpio_set_value(pn544_dev->firm_gpio, 0);
  654. pn544_dev->state_flags &=
  655. ~(P544_FLAG_FW_DNLD);
  656. }
  657. pr_info("%s FW GPIO set to 0x00 >>>>>>>\n",
  658. __func__);
  659. } else {
  660. pr_err("%s bad arg %lu\n", __func__, arg);
  661. /* changed the p61 state to idle */
  662. p61_access_unlock(pn544_dev);
  663. return -EINVAL;
  664. }
  665. }
  666. break;
  667. case P61_SET_SPI_PWR:
  668. {
  669. p61_access_state_t current_state = P61_STATE_INVALID;
  670. p61_get_access_state(pn544_dev, &current_state);
  671. if (arg == 1) {
  672. pr_info
  673. ("%s : PN61_SET_SPI_PWR - power on ese\n",
  674. __func__);
  675. if ((current_state &
  676. (P61_STATE_SPI | P61_STATE_SPI_PRIO)) ==
  677. 0) {
  678. p61_update_access_state(pn544_dev,
  679. P61_STATE_SPI,
  680. true);
  681. /*To handle triple mode protection signal
  682. NFC service when SPI session started */
  683. if (!
  684. (current_state &
  685. P61_STATE_JCP_DWNLD)) {
  686. if (pn544_dev->nfc_service_pid) {
  687. pr_info
  688. ("nfc service pid %s ---- %ld",
  689. __func__,
  690. pn544_dev->
  691. nfc_service_pid);
  692. /*signal_handler(P61_STATE_SPI, pn544_dev->nfc_service_pid); */
  693. dwp_OnOff(pn544_dev->
  694. nfc_service_pid,
  695. P61_STATE_SPI);
  696. } else {
  697. pr_info
  698. (" invalid nfc service pid....signalling failed%s ---- %ld",
  699. __func__,
  700. pn544_dev->
  701. nfc_service_pid);
  702. }
  703. }
  704. pn544_dev->spi_ven_enabled = true;
  705. if (pn544_dev->chip_pwr_scheme ==
  706. PN80T_EXT_PMU_SCHEME)
  707. break;
  708. #ifndef VEN_ALWAYS_ON
  709. if (pn544_dev->nfc_ven_enabled == false) {
  710. /* provide power to NFCC if, NFC service not provided */
  711. gpio_set_value(pn544_dev->
  712. ven_gpio, 1);
  713. msleep(10);
  714. }
  715. #endif
  716. /* Delay (10ms) after SVDD_PWR_ON to allow JCOP to bootup (5ms jcop boot time + 5ms guard time) */
  717. usleep_range(10000, 12000);
  718. } else {
  719. pr_info
  720. ("%s : PN61_SET_SPI_PWR - power on ese failed \n",
  721. __func__);
  722. p61_access_unlock(pn544_dev);
  723. return -EBUSY; /* Device or resource busy */
  724. }
  725. } else if (arg == 0) {
  726. pr_info
  727. ("%s : PN61_SET_SPI_PWR - power off ese\n",
  728. __func__);
  729. if (current_state & P61_STATE_SPI_PRIO) {
  730. p61_update_access_state(pn544_dev,
  731. P61_STATE_SPI_PRIO,
  732. false);
  733. if (!
  734. (current_state &
  735. P61_STATE_JCP_DWNLD)) {
  736. if (pn544_dev->nfc_service_pid) {
  737. pr_info
  738. ("nfc service pid %s ---- %ld",
  739. __func__,
  740. pn544_dev->
  741. nfc_service_pid);
  742. if (!
  743. (current_state &
  744. P61_STATE_WIRED)) {
  745. svdd_sync_onoff
  746. (pn544_dev->
  747. nfc_service_pid,
  748. P61_STATE_SPI_SVDD_SYNC_START
  749. |
  750. P61_STATE_SPI_PRIO_END);
  751. } else {
  752. signal_handler
  753. (P61_STATE_SPI_PRIO_END,
  754. pn544_dev->
  755. nfc_service_pid);
  756. }
  757. } else {
  758. pr_info
  759. (" invalid nfc service pid....signalling failed%s ---- %ld",
  760. __func__,
  761. pn544_dev->
  762. nfc_service_pid);
  763. }
  764. } else
  765. if (!
  766. (current_state &
  767. P61_STATE_WIRED)) {
  768. svdd_sync_onoff(pn544_dev->
  769. nfc_service_pid,
  770. P61_STATE_SPI_SVDD_SYNC_START);
  771. }
  772. pn544_dev->spi_ven_enabled = false;
  773. if (pn544_dev->chip_pwr_scheme ==
  774. PN80T_EXT_PMU_SCHEME)
  775. break;
  776. /* if secure timer is running, Delay the SPI close by 25ms after sending End of Apdu to enable eSE go into DPD
  777. gracefully (20ms after EOS + 5ms DPD settlement time) */
  778. if (pn544_dev->secure_timer_cnt)
  779. usleep_range(25000, 30000);
  780. if (!(current_state & P61_STATE_WIRED)
  781. && !(pn544_dev->secure_timer_cnt)) {
  782. svdd_sync_onoff(pn544_dev->
  783. nfc_service_pid,
  784. P61_STATE_SPI_SVDD_SYNC_END);
  785. }
  786. #ifndef JCOP_4X_VALIDATION
  787. #ifndef VEN_ALWAYS_ON
  788. if ((pn544_dev->nfc_ven_enabled ==
  789. false)
  790. && !(pn544_dev->secure_timer_cnt)) {
  791. gpio_set_value(pn544_dev->
  792. ven_gpio, 0);
  793. msleep(10);
  794. }
  795. #endif
  796. #endif
  797. } else if (current_state & P61_STATE_SPI) {
  798. p61_update_access_state(pn544_dev,
  799. P61_STATE_SPI,
  800. false);
  801. if (!(current_state & P61_STATE_WIRED)
  802. && (pn544_dev->chip_pwr_scheme !=
  803. PN80T_EXT_PMU_SCHEME)
  804. && !(current_state &
  805. P61_STATE_JCP_DWNLD)) {
  806. if (pn544_dev->nfc_service_pid) {
  807. pr_info
  808. ("nfc service pid %s ---- %ld",
  809. __func__,
  810. pn544_dev->
  811. nfc_service_pid);
  812. svdd_sync_onoff
  813. (pn544_dev->
  814. nfc_service_pid,
  815. P61_STATE_SPI_SVDD_SYNC_START
  816. |
  817. P61_STATE_SPI_END);
  818. } else {
  819. pr_info
  820. (" invalid nfc service pid....signalling failed%s ---- %ld",
  821. __func__,
  822. pn544_dev->
  823. nfc_service_pid);
  824. }
  825. /* if secure timer is running, Delay the SPI close by 25ms after sending End of Apdu to enable eSE go into DPD
  826. gracefully (20ms after EOS + 5ms DPD settlement time) */
  827. if (pn544_dev->secure_timer_cnt)
  828. usleep_range(25000,
  829. 30000);
  830. if (!
  831. (pn544_dev->
  832. secure_timer_cnt)) {
  833. svdd_sync_onoff
  834. (pn544_dev->
  835. nfc_service_pid,
  836. P61_STATE_SPI_SVDD_SYNC_END);
  837. }
  838. }
  839. /*If JCOP3.2 or 3.3 for handling triple mode
  840. protection signal NFC service */
  841. else {
  842. if (!
  843. (current_state &
  844. P61_STATE_JCP_DWNLD)) {
  845. if (pn544_dev->
  846. nfc_service_pid) {
  847. pr_info
  848. ("nfc service pid %s ---- %ld",
  849. __func__,
  850. pn544_dev->
  851. nfc_service_pid);
  852. if (pn544_dev->
  853. chip_pwr_scheme
  854. ==
  855. PN80T_LEGACY_PWR_SCHEME) {
  856. svdd_sync_onoff
  857. (pn544_dev->
  858. nfc_service_pid,
  859. P61_STATE_SPI_SVDD_SYNC_START
  860. |
  861. P61_STATE_SPI_END);
  862. } else {
  863. signal_handler
  864. (P61_STATE_SPI_END,
  865. pn544_dev->
  866. nfc_service_pid);
  867. }
  868. } else {
  869. pr_info
  870. (" invalid nfc service pid....signalling failed%s ---- %ld",
  871. __func__,
  872. pn544_dev->
  873. nfc_service_pid);
  874. }
  875. } else if (pn544_dev->
  876. chip_pwr_scheme ==
  877. PN80T_LEGACY_PWR_SCHEME) {
  878. svdd_sync_onoff
  879. (pn544_dev->
  880. nfc_service_pid,
  881. P61_STATE_SPI_SVDD_SYNC_START);
  882. }
  883. if (pn544_dev->
  884. chip_pwr_scheme ==
  885. PN80T_LEGACY_PWR_SCHEME) {
  886. svdd_sync_onoff
  887. (pn544_dev->
  888. nfc_service_pid,
  889. P61_STATE_SPI_SVDD_SYNC_END);
  890. }
  891. }
  892. pn544_dev->spi_ven_enabled = false;
  893. #ifndef VEN_ALWAYS_ON
  894. if (pn544_dev->nfc_ven_enabled == false
  895. && (pn544_dev->chip_pwr_scheme !=
  896. PN80T_EXT_PMU_SCHEME)
  897. && !(pn544_dev->secure_timer_cnt)) {
  898. gpio_set_value(pn544_dev->
  899. ven_gpio, 0);
  900. msleep(10);
  901. }
  902. #endif
  903. } else {
  904. pr_err
  905. ("%s : PN61_SET_SPI_PWR - failed, current_state = %x \n",
  906. __func__,
  907. pn544_dev->p61_current_state);
  908. p61_access_unlock(pn544_dev);
  909. return -EPERM; /* Operation not permitted */
  910. }
  911. } else if (arg == 2) {
  912. pr_info("%s : PN61_SET_SPI_PWR - reset\n",
  913. __func__);
  914. if (current_state &
  915. (P61_STATE_IDLE | P61_STATE_SPI |
  916. P61_STATE_SPI_PRIO)) {
  917. if (pn544_dev->spi_ven_enabled == false) {
  918. pn544_dev->spi_ven_enabled =
  919. true;
  920. #ifndef VEN_ALWAYS_ON
  921. if ((pn544_dev->
  922. nfc_ven_enabled == false)
  923. && (pn544_dev->
  924. chip_pwr_scheme !=
  925. PN80T_EXT_PMU_SCHEME)) {
  926. /* provide power to NFCC if, NFC service not provided */
  927. gpio_set_value
  928. (pn544_dev->
  929. ven_gpio, 1);
  930. msleep(10);
  931. }
  932. #endif
  933. }
  934. if (pn544_dev->chip_pwr_scheme !=
  935. PN80T_EXT_PMU_SCHEME
  936. && !(pn544_dev->secure_timer_cnt)) {
  937. svdd_sync_onoff(pn544_dev->
  938. nfc_service_pid,
  939. P61_STATE_SPI_SVDD_SYNC_START);
  940. svdd_sync_onoff(pn544_dev->
  941. nfc_service_pid,
  942. P61_STATE_SPI_SVDD_SYNC_END);
  943. msleep(10);
  944. msleep(10);
  945. }
  946. } else {
  947. pr_info
  948. ("%s : PN61_SET_SPI_PWR - reset failed \n",
  949. __func__);
  950. p61_access_unlock(pn544_dev);
  951. return -EBUSY; /* Device or resource busy */
  952. }
  953. } else if (arg == 3) {
  954. pr_info
  955. ("%s : PN61_SET_SPI_PWR - Prio Session Start power on ese\n",
  956. __func__);
  957. if ((current_state &
  958. (P61_STATE_SPI | P61_STATE_SPI_PRIO)) ==
  959. 0) {
  960. p61_update_access_state(pn544_dev,
  961. P61_STATE_SPI_PRIO,
  962. true);
  963. if (current_state & P61_STATE_WIRED) {
  964. if (pn544_dev->nfc_service_pid) {
  965. pr_info
  966. ("nfc service pid %s ---- %ld",
  967. __func__,
  968. pn544_dev->
  969. nfc_service_pid);
  970. /*signal_handler(P61_STATE_SPI_PRIO, pn544_dev->nfc_service_pid); */
  971. dwp_OnOff(pn544_dev->
  972. nfc_service_pid,
  973. P61_STATE_SPI_PRIO);
  974. } else {
  975. pr_info
  976. (" invalid nfc service pid....signalling failed%s ---- %ld",
  977. __func__,
  978. pn544_dev->
  979. nfc_service_pid);
  980. }
  981. }
  982. pn544_dev->spi_ven_enabled = true;
  983. if (pn544_dev->chip_pwr_scheme !=
  984. PN80T_EXT_PMU_SCHEME) {
  985. #ifndef VEN_ALWAYS_ON
  986. if (pn544_dev->
  987. nfc_ven_enabled == false) {
  988. /* provide power to NFCC if, NFC service not provided */
  989. gpio_set_value
  990. (pn544_dev->
  991. ven_gpio, 1);
  992. msleep(10);
  993. }
  994. #endif
  995. /* pull the gpio to high once NFCC is power on */
  996. /* Delay (10ms) after SVDD_PWR_ON to allow JCOP to bootup (5ms jcop boot time + 5ms guard time) */
  997. usleep_range(10000, 12000);
  998. }
  999. } else {
  1000. pr_info
  1001. ("%s : Prio Session Start power on ese failed \n",
  1002. __func__);
  1003. p61_access_unlock(pn544_dev);
  1004. return -EBUSY; /* Device or resource busy */
  1005. }
  1006. } else if (arg == 4) {
  1007. if (current_state & P61_STATE_SPI_PRIO) {
  1008. pr_info
  1009. ("%s : PN61_SET_SPI_PWR - Prio Session Ending...\n",
  1010. __func__);
  1011. p61_update_access_state(pn544_dev,
  1012. P61_STATE_SPI_PRIO,
  1013. false);
  1014. /*after SPI prio timeout, the state is changing from SPI prio to SPI */
  1015. p61_update_access_state(pn544_dev,
  1016. P61_STATE_SPI,
  1017. true);
  1018. if (current_state & P61_STATE_WIRED) {
  1019. if (pn544_dev->nfc_service_pid) {
  1020. pr_info
  1021. ("nfc service pid %s ---- %ld",
  1022. __func__,
  1023. pn544_dev->
  1024. nfc_service_pid);
  1025. signal_handler
  1026. (P61_STATE_SPI_PRIO_END,
  1027. pn544_dev->
  1028. nfc_service_pid);
  1029. } else {
  1030. pr_info
  1031. (" invalid nfc service pid....signalling failed%s ---- %ld",
  1032. __func__,
  1033. pn544_dev->
  1034. nfc_service_pid);
  1035. }
  1036. }
  1037. } else {
  1038. pr_info
  1039. ("%s : PN61_SET_SPI_PWR - Prio Session End failed \n",
  1040. __func__);
  1041. p61_access_unlock(pn544_dev);
  1042. return -EBADRQC; /* Device or resource busy */
  1043. }
  1044. } else if (arg == 5) {
  1045. release_ese_lock(P61_STATE_SPI);
  1046. } else if (arg == 6) {
  1047. /*SPI Service called ISO-RST */
  1048. p61_access_state_t current_state =
  1049. P61_STATE_INVALID;
  1050. p61_get_access_state(pn544_dev, &current_state);
  1051. if (current_state & P61_STATE_WIRED) {
  1052. p61_access_unlock(pn544_dev);
  1053. return -EPERM; /* Operation not permitted */
  1054. }
  1055. if (current_state & P61_STATE_SPI) {
  1056. p61_update_access_state(pn544_dev,
  1057. P61_STATE_SPI,
  1058. false);
  1059. } else if (current_state & P61_STATE_SPI_PRIO) {
  1060. p61_update_access_state(pn544_dev,
  1061. P61_STATE_SPI_PRIO,
  1062. false);
  1063. }
  1064. #ifdef ISO_RST
  1065. gpio_set_value(pn544_dev->iso_rst_gpio, 0);
  1066. msleep(50);
  1067. gpio_set_value(pn544_dev->iso_rst_gpio, 1);
  1068. msleep(50);
  1069. pr_info("%s ISO RESET from SPI DONE\n",
  1070. __func__);
  1071. #endif
  1072. } else {
  1073. pr_info("%s bad ese pwr arg %lu\n", __func__,
  1074. arg);
  1075. p61_access_unlock(pn544_dev);
  1076. return -EBADRQC; /* Invalid request code */
  1077. }
  1078. }
  1079. break;
  1080. case P61_GET_PWR_STATUS:
  1081. {
  1082. p61_access_state_t current_state = P61_STATE_INVALID;
  1083. p61_get_access_state(pn544_dev, &current_state);
  1084. pr_info("%s: P61_GET_PWR_STATUS = %x", __func__,
  1085. current_state);
  1086. put_user(current_state, (int __user *)arg);
  1087. }
  1088. break;
  1089. case PN544_SET_DWNLD_STATUS:
  1090. {
  1091. long ret;
  1092. ret = set_jcop_download_state(arg);
  1093. if (ret < 0) {
  1094. p61_access_unlock(pn544_dev);
  1095. return ret;
  1096. }
  1097. }
  1098. break;
  1099. case P61_SET_WIRED_ACCESS:
  1100. {
  1101. p61_access_state_t current_state = P61_STATE_INVALID;
  1102. p61_get_access_state(pn544_dev, &current_state);
  1103. if (arg == 1) {
  1104. if (current_state) {
  1105. pr_info
  1106. ("%s : P61_SET_WIRED_ACCESS - enabling\n",
  1107. __func__);
  1108. p61_update_access_state(pn544_dev,
  1109. P61_STATE_WIRED,
  1110. true);
  1111. if (current_state & P61_STATE_SPI_PRIO) {
  1112. if (pn544_dev->nfc_service_pid) {
  1113. pr_info
  1114. ("nfc service pid %s ---- %ld",
  1115. __func__,
  1116. pn544_dev->
  1117. nfc_service_pid);
  1118. signal_handler
  1119. (P61_STATE_SPI_PRIO,
  1120. pn544_dev->
  1121. nfc_service_pid);
  1122. } else {
  1123. pr_info
  1124. (" invalid nfc service pid....signalling failed%s ---- %ld",
  1125. __func__,
  1126. pn544_dev->
  1127. nfc_service_pid);
  1128. }
  1129. }
  1130. } else {
  1131. pr_info
  1132. ("%s : P61_SET_WIRED_ACCESS - enabling failed \n",
  1133. __func__);
  1134. p61_access_unlock(pn544_dev);
  1135. return -EBUSY; /* Device or resource busy */
  1136. }
  1137. } else if (arg == 0) {
  1138. pr_info
  1139. ("%s : P61_SET_WIRED_ACCESS - disabling \n",
  1140. __func__);
  1141. if (current_state & P61_STATE_WIRED) {
  1142. p61_update_access_state(pn544_dev,
  1143. P61_STATE_WIRED,
  1144. false);
  1145. if ((current_state &
  1146. (P61_STATE_SPI |
  1147. P61_STATE_SPI_PRIO)) == 0
  1148. && (pn544_dev->chip_pwr_scheme ==
  1149. PN67T_PWR_SCHEME)) {
  1150. svdd_sync_onoff(pn544_dev->
  1151. nfc_service_pid,
  1152. P61_STATE_SPI_SVDD_SYNC_START);
  1153. svdd_sync_onoff(pn544_dev->
  1154. nfc_service_pid,
  1155. P61_STATE_SPI_SVDD_SYNC_END);
  1156. }
  1157. } else {
  1158. pr_err
  1159. ("%s : P61_SET_WIRED_ACCESS - failed, current_state = %x \n",
  1160. __func__,
  1161. pn544_dev->p61_current_state);
  1162. p61_access_unlock(pn544_dev);
  1163. return -EPERM; /* Operation not permitted */
  1164. }
  1165. } else if (arg == 2) {
  1166. pr_info("%s : P61_ESE_GPIO_LOW \n", __func__);
  1167. if (pn544_dev->chip_pwr_scheme ==
  1168. PN67T_PWR_SCHEME) {
  1169. svdd_sync_onoff(pn544_dev->
  1170. nfc_service_pid,
  1171. P61_STATE_SPI_SVDD_SYNC_START);
  1172. svdd_sync_onoff(pn544_dev->
  1173. nfc_service_pid,
  1174. P61_STATE_SPI_SVDD_SYNC_END);
  1175. }
  1176. } else if (arg == 3) {
  1177. pr_info("%s : P61_ESE_GPIO_HIGH \n", __func__);
  1178. } else if (arg == 4) {
  1179. release_ese_lock(P61_STATE_WIRED);
  1180. } else {
  1181. pr_info
  1182. ("%s P61_SET_WIRED_ACCESS - bad arg %lu\n",
  1183. __func__, arg);
  1184. p61_access_unlock(pn544_dev);
  1185. return -EBADRQC; /* Invalid request code */
  1186. }
  1187. }
  1188. break;
  1189. case P544_SET_POWER_SCHEME:
  1190. {
  1191. if (arg == PN67T_PWR_SCHEME) {
  1192. pn544_dev->chip_pwr_scheme = PN67T_PWR_SCHEME;
  1193. pr_info
  1194. ("%s : The power scheme is set to PN67T legacy \n",
  1195. __func__);
  1196. } else if (arg == PN80T_LEGACY_PWR_SCHEME) {
  1197. pn544_dev->chip_pwr_scheme =
  1198. PN80T_LEGACY_PWR_SCHEME;
  1199. pr_info
  1200. ("%s : The power scheme is set to PN80T_LEGACY_PWR_SCHEME,\n",
  1201. __func__);
  1202. } else if (arg == PN80T_EXT_PMU_SCHEME) {
  1203. pn544_dev->chip_pwr_scheme =
  1204. PN80T_EXT_PMU_SCHEME;
  1205. pr_info
  1206. ("%s : The power scheme is set to PN80T_EXT_PMU_SCHEME,\n",
  1207. __func__);
  1208. } else {
  1209. pr_info("%s : The power scheme is invalid,\n",
  1210. __func__);
  1211. }
  1212. }
  1213. break;
  1214. case P544_SECURE_TIMER_SESSION:
  1215. {
  1216. secure_timer_operation(pn544_dev, arg);
  1217. }
  1218. break;
  1219. default:
  1220. pr_err("%s bad ioctl %u\n", __func__, cmd);
  1221. p61_access_unlock(pn544_dev);
  1222. return -EINVAL;
  1223. }
  1224. p61_access_unlock(pn544_dev);
  1225. pr_info("%s :exit cmd = %u, arg = %ld\n", __func__, cmd, arg);
  1226. return 0;
  1227. }
  1228. EXPORT_SYMBOL(pn544_dev_ioctl);
  1229. static void secure_timer_workqueue(struct work_struct *Wq)
  1230. {
  1231. p61_access_state_t current_state = P61_STATE_INVALID;
  1232. printk(KERN_INFO "secure_timer_callback: called (%lu).\n", jiffies);
  1233. /* Locking the critical section: ESE_PWR_OFF to allow eSE to shutdown peacefully :: START */
  1234. get_ese_lock(P61_STATE_WIRED, MAX_ESE_ACCESS_TIME_OUT_MS);
  1235. p61_update_access_state(g_pn544_dev, P61_STATE_SECURE_MODE, false);
  1236. p61_get_access_state(g_pn544_dev, &current_state);
  1237. if ((current_state & (P61_STATE_SPI | P61_STATE_SPI_PRIO)) == 0) {
  1238. printk(KERN_INFO
  1239. "secure_timer_callback: make se_pwer_gpio low, state = %d",
  1240. current_state);
  1241. /* Delay (2.5ms) after SVDD_PWR_OFF for the shutdown settlement time */
  1242. usleep_range(2500, 3000);
  1243. #ifndef VEN_ALWAYS_ON
  1244. if (g_pn544_dev->nfc_service_pid == 0x00) {
  1245. gpio_set_value(g_pn544_dev->ven_gpio, 0);
  1246. printk(KERN_INFO
  1247. "secure_timer_callback :make ven_gpio low, state = %d",
  1248. current_state);
  1249. }
  1250. #endif
  1251. }
  1252. g_pn544_dev->secure_timer_cnt = 0;
  1253. /* Locking the critical section: ESE_PWR_OFF to allow eSE to shutdown peacefully :: END */
  1254. release_ese_lock(P61_STATE_WIRED);
  1255. return;
  1256. }
  1257. static void secure_timer_callback(unsigned long data)
  1258. {
  1259. /* Flush and push the timer callback event to the bottom half(work queue)
  1260. to be executed later, at a safer time */
  1261. flush_workqueue(g_pn544_dev->pSecureTimerCbWq);
  1262. queue_work(g_pn544_dev->pSecureTimerCbWq, &g_pn544_dev->wq_task);
  1263. return;
  1264. }
  1265. static long start_seccure_timer(unsigned long timer_value)
  1266. {
  1267. long ret = -EINVAL;
  1268. pr_info("start_seccure_timer: enter\n");
  1269. /* Delete the timer if timer pending */
  1270. if (timer_pending(&secure_timer) == 1) {
  1271. pr_info("start_seccure_timer: delete pending timer \n");
  1272. /* delete timer if already pending */
  1273. del_timer(&secure_timer);
  1274. }
  1275. /* Start the timer if timer value is non-zero */
  1276. if (timer_value) {
  1277. init_timer(&secure_timer);
  1278. setup_timer(&secure_timer, secure_timer_callback, 0);
  1279. pr_info("start_seccure_timer: timeout %lums (%lu)\n",
  1280. timer_value, jiffies);
  1281. ret =
  1282. mod_timer(&secure_timer,
  1283. jiffies + msecs_to_jiffies(timer_value));
  1284. if (ret)
  1285. pr_info("start_seccure_timer: Error in mod_timer\n");
  1286. }
  1287. return ret;
  1288. }
  1289. static long secure_timer_operation(struct pn544_dev *pn544_dev,
  1290. unsigned long arg)
  1291. {
  1292. long ret = -EINVAL;
  1293. unsigned long timer_value = arg;
  1294. printk(KERN_INFO "secure_timer_operation, %d\n",
  1295. pn544_dev->chip_pwr_scheme);
  1296. if (pn544_dev->chip_pwr_scheme == PN80T_LEGACY_PWR_SCHEME) {
  1297. ret = start_seccure_timer(timer_value);
  1298. if (!ret) {
  1299. pn544_dev->secure_timer_cnt = 1;
  1300. p61_update_access_state(pn544_dev,
  1301. P61_STATE_SECURE_MODE, true);
  1302. } else {
  1303. pn544_dev->secure_timer_cnt = 0;
  1304. p61_update_access_state(pn544_dev,
  1305. P61_STATE_SECURE_MODE, false);
  1306. pr_info("%s :Secure timer reset \n", __func__);
  1307. }
  1308. } else {
  1309. pr_info("%s :Secure timer session not applicable \n",
  1310. __func__);
  1311. }
  1312. return ret;
  1313. }
  1314. static long set_jcop_download_state(unsigned long arg)
  1315. {
  1316. p61_access_state_t current_state = P61_STATE_INVALID;
  1317. long ret = 0;
  1318. p61_get_access_state(g_pn544_dev, &current_state);
  1319. pr_info("%s:Enter PN544_SET_DWNLD_STATUS:JCOP Dwnld state arg = %ld",
  1320. __func__, arg);
  1321. if (arg == JCP_DWNLD_INIT) {
  1322. if (g_pn544_dev->nfc_service_pid) {
  1323. pr_info("nfc service pid %s ---- %ld", __func__,
  1324. g_pn544_dev->nfc_service_pid);
  1325. signal_handler((p61_access_state_t) JCP_DWNLD_INIT,
  1326. g_pn544_dev->nfc_service_pid);
  1327. } else {
  1328. if (current_state & P61_STATE_JCP_DWNLD) {
  1329. ret = -EINVAL;
  1330. } else {
  1331. p61_update_access_state(g_pn544_dev,
  1332. P61_STATE_JCP_DWNLD,
  1333. true);
  1334. }
  1335. }
  1336. } else if (arg == JCP_DWNLD_START) {
  1337. if (current_state & P61_STATE_JCP_DWNLD) {
  1338. ret = -EINVAL;
  1339. } else {
  1340. p61_update_access_state(g_pn544_dev,
  1341. P61_STATE_JCP_DWNLD, true);
  1342. }
  1343. } else if (arg == JCP_SPI_DWNLD_COMPLETE) {
  1344. if (g_pn544_dev->nfc_service_pid) {
  1345. signal_handler((p61_access_state_t)
  1346. JCP_DWP_DWNLD_COMPLETE,
  1347. g_pn544_dev->nfc_service_pid);
  1348. }
  1349. p61_update_access_state(g_pn544_dev, P61_STATE_JCP_DWNLD,
  1350. false);
  1351. } else if (arg == JCP_DWP_DWNLD_COMPLETE) {
  1352. p61_update_access_state(g_pn544_dev, P61_STATE_JCP_DWNLD,
  1353. false);
  1354. } else {
  1355. pr_info("%s bad ese pwr arg %lu\n", __func__, arg);
  1356. p61_access_unlock(g_pn544_dev);
  1357. return -EBADRQC; /* Invalid request code */
  1358. }
  1359. pr_info("%s: PN544_SET_DWNLD_STATUS = %x", __func__, current_state);
  1360. return ret;
  1361. }
  1362. int get_ese_lock(p61_access_state_t p61_current_state, int timeout)
  1363. {
  1364. unsigned long tempJ = msecs_to_jiffies(timeout);
  1365. if (down_timeout(&ese_access_sema, tempJ) != 0) {
  1366. printk("get_ese_lock: timeout p61_current_state = %d\n",
  1367. p61_current_state);
  1368. return -EBUSY;
  1369. }
  1370. return 0;
  1371. }
  1372. EXPORT_SYMBOL(get_ese_lock);
  1373. static void release_ese_lock(p61_access_state_t p61_current_state)
  1374. {
  1375. up(&ese_access_sema);
  1376. }
  1377. static const struct file_operations pn544_dev_fops = {
  1378. .owner = THIS_MODULE,
  1379. .llseek = no_llseek,
  1380. .read = pn544_dev_read,
  1381. .write = pn544_dev_write,
  1382. .open = pn544_dev_open,
  1383. .release = pn544_dev_release,
  1384. .unlocked_ioctl = pn544_dev_ioctl,
  1385. };
  1386. #if DRAGON_NFC
  1387. static int pn544_parse_dt(struct device *dev,
  1388. struct pn544_i2c_platform_data *data)
  1389. {
  1390. struct device_node *np = dev->of_node;
  1391. int errorno = 0;
  1392. printk("going to pn544_parse_dt");
  1393. #if !NEXUS5x
  1394. data->irq_gpio = of_get_named_gpio(np, "nq-irq", 0);
  1395. if ((!gpio_is_valid(data->irq_gpio)))
  1396. return -EINVAL;
  1397. data->ven_gpio = of_get_named_gpio(np, "nq-ven", 0);
  1398. if ((!gpio_is_valid(data->ven_gpio)))
  1399. return -EINVAL;
  1400. disable_ctrl = data->ven_gpio;
  1401. data->firm_gpio = of_get_named_gpio(np, "nq-firm", 0);
  1402. if ((!gpio_is_valid(data->firm_gpio)))
  1403. return -EINVAL;
  1404. #else
  1405. data->ven_gpio = of_get_named_gpio_flags(np, "nxp,gpio_ven", 0, NULL);
  1406. data->firm_gpio = of_get_named_gpio_flags(np, "nxp,gpio_mode", 0, NULL);
  1407. data->irq_gpio = of_get_named_gpio_flags(np, "nxp,gpio_irq", 0, NULL);
  1408. #endif
  1409. pr_err("%s: %d, %d, %d, error:%d\n", __func__,
  1410. data->irq_gpio, data->ven_gpio, data->firm_gpio, errorno);
  1411. return errorno;
  1412. }
  1413. #endif
  1414. static int pn544_probe(struct i2c_client *client,
  1415. const struct i2c_device_id *id)
  1416. {
  1417. int ret;
  1418. struct pn544_i2c_platform_data *platform_data;
  1419. printk("%s: enter\n", __func__);
  1420. if (client->dev.of_node) {
  1421. platform_data = devm_kzalloc(&client->dev,
  1422. sizeof(struct
  1423. pn544_i2c_platform_data),
  1424. GFP_KERNEL);
  1425. if (!platform_data) {
  1426. printk("nfc-nci probe: Failed to allocate memory\n");
  1427. return -ENOMEM;
  1428. }
  1429. ret = pn544_parse_dt(&client->dev, platform_data);
  1430. if (ret) {
  1431. printk("%s pn544_parse_dt failed", __func__);
  1432. }
  1433. client->irq = gpio_to_irq(platform_data->irq_gpio);
  1434. if (client->irq < 0) {
  1435. printk("%s gpio to irq failed", __func__);
  1436. }
  1437. } else {
  1438. platform_data = client->dev.platform_data;
  1439. }
  1440. printk("%s, inside nfc-nci flags = %x\n", __func__, client->flags);
  1441. if (platform_data == NULL) {
  1442. pr_err("%s : nfc probe fail\n", __func__);
  1443. return -ENODEV;
  1444. }
  1445. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  1446. pr_err("%s : need I2C_FUNC_I2C\n", __func__);
  1447. return -ENODEV;
  1448. }
  1449. ret = gpio_request(platform_data->irq_gpio, "nfc_irq_gpio");
  1450. if (ret)
  1451. return -ENODEV;
  1452. ret = gpio_request(platform_data->ven_gpio, "nfc_reset_gpio");
  1453. if (ret)
  1454. goto err_ven;
  1455. if (platform_data->firm_gpio) {
  1456. ret = gpio_request(platform_data->firm_gpio, "nfc_firm_gpio");
  1457. if (ret)
  1458. goto err_firm;
  1459. }
  1460. #ifdef ISO_RST
  1461. if (platform_data->iso_rst_gpio) {
  1462. ret = gpio_request(platform_data->iso_rst_gpio, "nfc_iso_rst");
  1463. if (ret)
  1464. goto err_iso_rst;
  1465. }
  1466. #endif
  1467. g_pn544_dev = kzalloc(sizeof(*g_pn544_dev), GFP_KERNEL);
  1468. if (g_pn544_dev == NULL) {
  1469. dev_err(&client->dev,
  1470. "failed to allocate memory for module data\n");
  1471. ret = -ENOMEM;
  1472. goto err_exit;
  1473. }
  1474. g_pn544_dev->irq_gpio = platform_data->irq_gpio;
  1475. g_pn544_dev->ven_gpio = platform_data->ven_gpio;
  1476. g_pn544_dev->firm_gpio = platform_data->firm_gpio;
  1477. #ifdef ISO_RST
  1478. g_pn544_dev->iso_rst_gpio = platform_data->iso_rst_gpio;
  1479. #endif
  1480. g_pn544_dev->p61_current_state = P61_STATE_IDLE;
  1481. g_pn544_dev->nfc_ven_enabled = false;
  1482. g_pn544_dev->spi_ven_enabled = false;
  1483. g_pn544_dev->chip_pwr_scheme = PN67T_PWR_SCHEME;
  1484. g_pn544_dev->client = client;
  1485. g_pn544_dev->secure_timer_cnt = 0;
  1486. g_pn544_dev->state_flags = 0x00;
  1487. ret = gpio_direction_input(g_pn544_dev->irq_gpio);
  1488. if (ret < 0) {
  1489. pr_err("%s :not able to set irq_gpio as input\n", __func__);
  1490. goto err_ven;
  1491. }
  1492. #ifndef VEN_ALWAYS_ON
  1493. ret = gpio_direction_output(g_pn544_dev->ven_gpio, 0);
  1494. if (ret < 0) {
  1495. pr_err("%s : not able to set ven_gpio as output\n", __func__);
  1496. goto err_firm;
  1497. }
  1498. #else
  1499. ret = gpio_direction_output(g_pn544_dev->ven_gpio, 0);
  1500. if (ret < 0) {
  1501. pr_err("%s : not able to set ven_gpio as output\n", __func__);
  1502. goto err_firm;
  1503. }
  1504. #endif
  1505. if (platform_data->firm_gpio) {
  1506. ret = gpio_direction_output(g_pn544_dev->firm_gpio, 0);
  1507. if (ret < 0) {
  1508. pr_err("%s : not able to set firm_gpio as output\n",
  1509. __func__);
  1510. goto err_exit;
  1511. }
  1512. }
  1513. #ifdef ISO_RST
  1514. ret = gpio_direction_output(g_pn544_dev->iso_rst_gpio, 0);
  1515. if (ret < 0) {
  1516. pr_err("%s : not able to set iso rst gpio as output\n",
  1517. __func__);
  1518. goto err_iso_rst;
  1519. }
  1520. #endif
  1521. /* init mutex and queues */
  1522. printk("going to init mutex");
  1523. init_waitqueue_head(&g_pn544_dev->read_wq);
  1524. mutex_init(&g_pn544_dev->read_mutex);
  1525. sema_init(&ese_access_sema, 1);
  1526. mutex_init(&g_pn544_dev->p61_state_mutex);
  1527. spin_lock_init(&g_pn544_dev->irq_enabled_lock);
  1528. g_pn544_dev->pSecureTimerCbWq =
  1529. create_workqueue(SECURE_TIMER_WORK_QUEUE);
  1530. INIT_WORK(&g_pn544_dev->wq_task, secure_timer_workqueue);
  1531. g_pn544_dev->irq_wake_up = false;
  1532. g_pn544_dev->pn544_device.minor = MISC_DYNAMIC_MINOR;
  1533. g_pn544_dev->pn544_device.name = "nq-nci";
  1534. g_pn544_dev->pn544_device.fops = &pn544_dev_fops;
  1535. ret = misc_register(&g_pn544_dev->pn544_device);
  1536. if (ret) {
  1537. pr_err("%s : misc_register failed\n", __FILE__);
  1538. goto err_misc_register;
  1539. }
  1540. #ifdef ISO_RST
  1541. /* Setting ISO RESET pin high to power ESE during init */
  1542. gpio_set_value(g_pn544_dev->iso_rst_gpio, 1);
  1543. #endif
  1544. /* request irq. the irq is set whenever the chip has data available
  1545. * for reading. it is cleared when all data has been read.
  1546. */
  1547. pr_info("%s : requesting IRQ %d\n", __func__, client->irq);
  1548. g_pn544_dev->irq_enabled = true;
  1549. ret = request_irq(client->irq, pn544_dev_irq_handler,
  1550. IRQF_TRIGGER_HIGH, client->name, g_pn544_dev);
  1551. pr_info("%s : requesting IRQ ret is %d\n", __func__, ret);
  1552. if (ret) {
  1553. dev_err(&client->dev, "request_irq failed\n");
  1554. goto err_request_irq_failed;
  1555. }
  1556. enable_irq_wake(g_pn544_dev->client->irq);
  1557. pn544_disable_irq(g_pn544_dev);
  1558. i2c_set_clientdata(client, g_pn544_dev);
  1559. #ifdef VEN_ALWAYS_ON
  1560. msleep(5); /* VBAT--> VDDIO(HIGH) + Guardtime of min 5ms --> VEN(HIGH) */
  1561. /* VEN toggle(reset) to proceed */
  1562. gpio_set_value(g_pn544_dev->ven_gpio, 0);
  1563. msleep(5);
  1564. gpio_set_value(g_pn544_dev->ven_gpio, 1);
  1565. #endif
  1566. #if HWINFO
  1567. /*
  1568. * This function is used only if
  1569. * hardware info is required during probe*/
  1570. check_hw_info();
  1571. #endif
  1572. pr_info("%s : we going to return 0\n", __func__);
  1573. return 0;
  1574. err_request_irq_failed:
  1575. misc_deregister(&g_pn544_dev->pn544_device);
  1576. err_misc_register:
  1577. mutex_destroy(&g_pn544_dev->read_mutex);
  1578. mutex_destroy(&g_pn544_dev->p61_state_mutex);
  1579. kfree(g_pn544_dev);
  1580. err_exit:
  1581. if (g_pn544_dev->firm_gpio)
  1582. gpio_free(platform_data->firm_gpio);
  1583. err_firm:
  1584. gpio_free(platform_data->ven_gpio);
  1585. err_ven:
  1586. gpio_free(platform_data->irq_gpio);
  1587. #ifdef ISO_RST
  1588. err_iso_rst:
  1589. gpio_free(platform_data->iso_rst_gpio);
  1590. #endif
  1591. pr_info("%s : probe to return ret is %d\n", __func__, ret);
  1592. return ret;
  1593. }
  1594. static int pn544_remove(struct i2c_client *client)
  1595. {
  1596. int ret = 0;
  1597. struct pn544_dev *pn544_dev;
  1598. pn544_dev = i2c_get_clientdata(client);
  1599. if (!pn544_dev) {
  1600. dev_err(&client->dev,
  1601. "%s: device doesn't exist anymore\n", __func__);
  1602. ret = -ENODEV;
  1603. goto err;
  1604. }
  1605. unregister_reboot_notifier(&nfcc_notifier);
  1606. free_irq(client->irq, pn544_dev);
  1607. misc_deregister(&pn544_dev->pn544_device);
  1608. mutex_destroy(&pn544_dev->read_mutex);
  1609. mutex_destroy(&pn544_dev->p61_state_mutex);
  1610. gpio_free(pn544_dev->irq_gpio);
  1611. gpio_free(pn544_dev->ven_gpio);
  1612. destroy_workqueue(pn544_dev->pSecureTimerCbWq);
  1613. #ifdef ISO_RST
  1614. gpio_free(pn544_dev->iso_rst_gpio);
  1615. #endif
  1616. pn544_dev->p61_current_state = P61_STATE_INVALID;
  1617. pn544_dev->nfc_ven_enabled = false;
  1618. pn544_dev->spi_ven_enabled = false;
  1619. if (pn544_dev->firm_gpio)
  1620. gpio_free(pn544_dev->firm_gpio);
  1621. kfree(pn544_dev);
  1622. err:
  1623. return ret;
  1624. }
  1625. static int nqx_suspend(struct device *device)
  1626. {
  1627. struct i2c_client *client = to_i2c_client(device);
  1628. struct pn544_dev *pn544_dev = i2c_get_clientdata(client);
  1629. if (device_may_wakeup(&client->dev) && pn544_dev->irq_enabled) {
  1630. if (!enable_irq_wake(client->irq))
  1631. pn544_dev->irq_wake_up = true;
  1632. }
  1633. return 0;
  1634. }
  1635. static int nqx_resume(struct device *device)
  1636. {
  1637. struct i2c_client *client = to_i2c_client(device);
  1638. struct pn544_dev *pn544_dev = i2c_get_clientdata(client);
  1639. if (device_may_wakeup(&client->dev) && pn544_dev->irq_wake_up) {
  1640. if (!disable_irq_wake(client->irq))
  1641. pn544_dev->irq_wake_up = false;
  1642. }
  1643. return 0;
  1644. }
  1645. static const struct i2c_device_id pn544_id[] = {
  1646. {"pn544", 0},
  1647. {}
  1648. };
  1649. static const struct dev_pm_ops nfc_pm_ops = {
  1650. SET_SYSTEM_SLEEP_PM_OPS(nqx_suspend, nqx_resume)
  1651. };
  1652. static struct i2c_driver pn544_driver = {
  1653. .id_table = pn544_id,
  1654. .probe = pn544_probe,
  1655. .remove = pn544_remove,
  1656. .driver = {
  1657. .owner = THIS_MODULE,
  1658. .name = "nq-nci",
  1659. #if DRAGON_NFC
  1660. .of_match_table = msm_match_table,
  1661. #endif
  1662. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  1663. .pm = &nfc_pm_ops,
  1664. },
  1665. };
  1666. static int nfcc_reboot(struct notifier_block *notifier, unsigned long val,
  1667. void *v)
  1668. {
  1669. gpio_set_value(disable_ctrl, 1);
  1670. return NOTIFY_OK;
  1671. }
  1672. #if HWINFO
  1673. /******************************************************************************
  1674. * Function check_hw_info
  1675. *
  1676. * Description This function is called during pn544_probe to retrieve
  1677. * HW info.
  1678. * Useful get HW information in case of previous FW download is
  1679. * interrupted and core reset is not allowed.
  1680. * This function checks if core reset is allowed, if not
  1681. * sets DWNLD_REQ(firm_gpio) , ven reset and sends firmware
  1682. * get version command.
  1683. * In response HW information will be received.
  1684. *
  1685. * Returns None
  1686. *
  1687. ******************************************************************************/
  1688. static void check_hw_info(void)
  1689. {
  1690. char read_data[20];
  1691. int ret, get_version_len = 8, retry_count = 0;
  1692. static uint8_t cmd_reset_nci[] = { 0x20, 0x00, 0x01, 0x00 };
  1693. char get_version_cmd[] = { 0x00, 0x04, 0xF1, 0x00, 0x00, 0x00, 0x6E, 0xEF };
  1694. pr_info("%s :Enter\n", __func__);
  1695. /*
  1696. * Ven Reset before sending core Reset
  1697. * This is to check core reset is allowed or not.
  1698. * If not allowed then previous FW download is interrupted in between
  1699. * */
  1700. pr_info("%s :Ven Reset \n", __func__);
  1701. gpio_set_value(pn544_dev->ven_gpio, 1);
  1702. msleep(10);
  1703. gpio_set_value(pn544_dev->ven_gpio, 0);
  1704. msleep(10);
  1705. gpio_set_value(pn544_dev->ven_gpio, 1);
  1706. msleep(10);
  1707. ret = i2c_master_send(pn544_dev->client, cmd_reset_nci, 4);
  1708. if (ret == 4) {
  1709. pr_info("%s : core reset write success\n", __func__);
  1710. } else {
  1711. /*
  1712. * Core reset failed.
  1713. * set the DWNLD_REQ , do ven reset
  1714. * send firmware download info command
  1715. * */
  1716. pr_err("%s : write failed\n", __func__);
  1717. pr_info("%s power on with firmware\n", __func__);
  1718. gpio_set_value(pn544_dev->ven_gpio, 1);
  1719. msleep(10);
  1720. if (pn544_dev->firm_gpio) {
  1721. p61_update_access_state(pn544_dev, P61_STATE_DWNLD,
  1722. true);
  1723. gpio_set_value(pn544_dev->firm_gpio, 1);
  1724. }
  1725. msleep(10);
  1726. gpio_set_value(pn544_dev->ven_gpio, 0);
  1727. msleep(10);
  1728. gpio_set_value(pn544_dev->ven_gpio, 1);
  1729. msleep(10);
  1730. ret =
  1731. i2c_master_send(pn544_dev->client, get_version_cmd,
  1732. get_version_len);
  1733. if (ret != get_version_len) {
  1734. ret = -EIO;
  1735. pr_err("%s : write_failed \n", __func__);
  1736. } else {
  1737. pr_info("%s :data sent\n", __func__);
  1738. }
  1739. ret = 0;
  1740. while (retry_count < 10) {
  1741. /*
  1742. * Wait for read interrupt
  1743. * If spurious interrupt is received retry again
  1744. * */
  1745. pn544_dev->irq_enabled = true;
  1746. enable_irq(pn544_dev->client->irq);
  1747. enable_irq_wake(pn544_dev->client->irq);
  1748. ret = wait_event_interruptible(pn544_dev->read_wq,
  1749. !pn544_dev->irq_enabled);
  1750. pn544_disable_irq(pn544_dev);
  1751. if (gpio_get_value(pn544_dev->irq_gpio))
  1752. break;
  1753. pr_warning("%s: spurious interrupt detected\n",
  1754. __func__);
  1755. retry_count++;
  1756. }
  1757. if (ret) {
  1758. return;
  1759. }
  1760. /*
  1761. * Read response data and copy into hw_type_info
  1762. * */
  1763. ret = i2c_master_recv(pn544_dev->client, read_data, 14);
  1764. if (ret) {
  1765. memcpy(hw_info.data, read_data, ret);
  1766. hw_info.len = ret;
  1767. pr_info("%s :data received len : %d\n", __func__,
  1768. hw_info.len);
  1769. } else {
  1770. pr_err("%s :Read Failed\n", __func__);
  1771. }
  1772. }
  1773. }
  1774. #endif
  1775. /*
  1776. * module load/unload record keeping
  1777. */
  1778. static int __init pn544_dev_init(void)
  1779. {
  1780. pr_info("Loading pn544 driver\n");
  1781. return i2c_add_driver(&pn544_driver);
  1782. }
  1783. module_init(pn544_dev_init);
  1784. static void __exit pn544_dev_exit(void)
  1785. {
  1786. pr_info("Unloading pn544 driver\n");
  1787. unregister_reboot_notifier(&nfcc_notifier);
  1788. i2c_del_driver(&pn544_driver);
  1789. }
  1790. module_exit(pn544_dev_exit);
  1791. MODULE_AUTHOR("Sylvain Fonteneau");
  1792. MODULE_DESCRIPTION("NFC PN544 driver");
  1793. MODULE_LICENSE("GPL");