aspeed-lpc-ctrl.c 6.7 KB

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  1. /*
  2. * Copyright 2017 IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. */
  9. #include <linux/mfd/syscon.h>
  10. #include <linux/miscdevice.h>
  11. #include <linux/mm.h>
  12. #include <linux/module.h>
  13. #include <linux/of_address.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/poll.h>
  16. #include <linux/regmap.h>
  17. #include <linux/aspeed-lpc-ctrl.h>
  18. #define DEVICE_NAME "aspeed-lpc-ctrl"
  19. #define HICR7 0x8
  20. #define HICR8 0xc
  21. struct aspeed_lpc_ctrl {
  22. struct miscdevice miscdev;
  23. struct regmap *regmap;
  24. phys_addr_t mem_base;
  25. resource_size_t mem_size;
  26. u32 pnor_size;
  27. u32 pnor_base;
  28. };
  29. static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
  30. {
  31. return container_of(file->private_data, struct aspeed_lpc_ctrl,
  32. miscdev);
  33. }
  34. static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
  35. {
  36. struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
  37. unsigned long vsize = vma->vm_end - vma->vm_start;
  38. pgprot_t prot = vma->vm_page_prot;
  39. if (vma->vm_pgoff + vsize > lpc_ctrl->mem_base + lpc_ctrl->mem_size)
  40. return -EINVAL;
  41. /* ast2400/2500 AHB accesses are not cache coherent */
  42. prot = pgprot_noncached(prot);
  43. if (remap_pfn_range(vma, vma->vm_start,
  44. (lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
  45. vsize, prot))
  46. return -EAGAIN;
  47. return 0;
  48. }
  49. static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
  50. unsigned long param)
  51. {
  52. struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
  53. void __user *p = (void __user *)param;
  54. struct aspeed_lpc_ctrl_mapping map;
  55. u32 addr;
  56. u32 size;
  57. long rc;
  58. if (copy_from_user(&map, p, sizeof(map)))
  59. return -EFAULT;
  60. if (map.flags != 0)
  61. return -EINVAL;
  62. switch (cmd) {
  63. case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
  64. /* The flash windows don't report their size */
  65. if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
  66. return -EINVAL;
  67. /* Support more than one window id in the future */
  68. if (map.window_id != 0)
  69. return -EINVAL;
  70. map.size = lpc_ctrl->mem_size;
  71. return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
  72. case ASPEED_LPC_CTRL_IOCTL_MAP:
  73. /*
  74. * The top half of HICR7 is the MSB of the BMC address of the
  75. * mapping.
  76. * The bottom half of HICR7 is the MSB of the HOST LPC
  77. * firmware space address of the mapping.
  78. *
  79. * The 1 bits in the top of half of HICR8 represent the bits
  80. * (in the requested address) that should be ignored and
  81. * replaced with those from the top half of HICR7.
  82. * The 1 bits in the bottom half of HICR8 represent the bits
  83. * (in the requested address) that should be kept and pass
  84. * into the BMC address space.
  85. */
  86. /*
  87. * It doesn't make sense to talk about a size or offset with
  88. * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
  89. * bits of addresses and sizes.
  90. */
  91. if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
  92. return -EINVAL;
  93. /*
  94. * Because of the way the masks work in HICR8 offset has to
  95. * be a multiple of size.
  96. */
  97. if (map.offset & (map.size - 1))
  98. return -EINVAL;
  99. if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
  100. addr = lpc_ctrl->pnor_base;
  101. size = lpc_ctrl->pnor_size;
  102. } else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
  103. addr = lpc_ctrl->mem_base;
  104. size = lpc_ctrl->mem_size;
  105. } else {
  106. return -EINVAL;
  107. }
  108. /* Check overflow first! */
  109. if (map.offset + map.size < map.offset ||
  110. map.offset + map.size > size)
  111. return -EINVAL;
  112. if (map.size == 0 || map.size > size)
  113. return -EINVAL;
  114. addr += map.offset;
  115. /*
  116. * addr (host lpc address) is safe regardless of values. This
  117. * simply changes the address the host has to request on its
  118. * side of the LPC bus. This cannot impact the hosts own
  119. * memory space by surprise as LPC specific accessors are
  120. * required. The only strange thing that could be done is
  121. * setting the lower 16 bits but the shift takes care of that.
  122. */
  123. rc = regmap_write(lpc_ctrl->regmap, HICR7,
  124. (addr | (map.addr >> 16)));
  125. if (rc)
  126. return rc;
  127. return regmap_write(lpc_ctrl->regmap, HICR8,
  128. (~(map.size - 1)) | ((map.size >> 16) - 1));
  129. }
  130. return -EINVAL;
  131. }
  132. static const struct file_operations aspeed_lpc_ctrl_fops = {
  133. .owner = THIS_MODULE,
  134. .mmap = aspeed_lpc_ctrl_mmap,
  135. .unlocked_ioctl = aspeed_lpc_ctrl_ioctl,
  136. };
  137. static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
  138. {
  139. struct aspeed_lpc_ctrl *lpc_ctrl;
  140. struct device_node *node;
  141. struct resource resm;
  142. struct device *dev;
  143. int rc;
  144. dev = &pdev->dev;
  145. lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
  146. if (!lpc_ctrl)
  147. return -ENOMEM;
  148. node = of_parse_phandle(dev->of_node, "flash", 0);
  149. if (!node) {
  150. dev_err(dev, "Didn't find host pnor flash node\n");
  151. return -ENODEV;
  152. }
  153. rc = of_address_to_resource(node, 1, &resm);
  154. of_node_put(node);
  155. if (rc) {
  156. dev_err(dev, "Couldn't address to resource for flash\n");
  157. return rc;
  158. }
  159. lpc_ctrl->pnor_size = resource_size(&resm);
  160. lpc_ctrl->pnor_base = resm.start;
  161. dev_set_drvdata(&pdev->dev, lpc_ctrl);
  162. node = of_parse_phandle(dev->of_node, "memory-region", 0);
  163. if (!node) {
  164. dev_err(dev, "Didn't find reserved memory\n");
  165. return -EINVAL;
  166. }
  167. rc = of_address_to_resource(node, 0, &resm);
  168. of_node_put(node);
  169. if (rc) {
  170. dev_err(dev, "Couldn't address to resource for reserved memory\n");
  171. return -ENOMEM;
  172. }
  173. lpc_ctrl->mem_size = resource_size(&resm);
  174. lpc_ctrl->mem_base = resm.start;
  175. lpc_ctrl->regmap = syscon_node_to_regmap(
  176. pdev->dev.parent->of_node);
  177. if (IS_ERR(lpc_ctrl->regmap)) {
  178. dev_err(dev, "Couldn't get regmap\n");
  179. return -ENODEV;
  180. }
  181. lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
  182. lpc_ctrl->miscdev.name = DEVICE_NAME;
  183. lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
  184. lpc_ctrl->miscdev.parent = dev;
  185. rc = misc_register(&lpc_ctrl->miscdev);
  186. if (rc)
  187. dev_err(dev, "Unable to register device\n");
  188. else
  189. dev_info(dev, "Loaded at %pr\n", &resm);
  190. return rc;
  191. }
  192. static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
  193. {
  194. struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
  195. misc_deregister(&lpc_ctrl->miscdev);
  196. return 0;
  197. }
  198. static const struct of_device_id aspeed_lpc_ctrl_match[] = {
  199. { .compatible = "aspeed,ast2400-lpc-ctrl" },
  200. { .compatible = "aspeed,ast2500-lpc-ctrl" },
  201. { },
  202. };
  203. static struct platform_driver aspeed_lpc_ctrl_driver = {
  204. .driver = {
  205. .name = DEVICE_NAME,
  206. .of_match_table = aspeed_lpc_ctrl_match,
  207. },
  208. .probe = aspeed_lpc_ctrl_probe,
  209. .remove = aspeed_lpc_ctrl_remove,
  210. };
  211. module_platform_driver(aspeed_lpc_ctrl_driver);
  212. MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
  213. MODULE_LICENSE("GPL");
  214. MODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
  215. MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");