Kconfig 6.4 KB

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  1. menuconfig MAILBOX
  2. bool "Mailbox Hardware Support"
  3. help
  4. Mailbox is a framework to control hardware communication between
  5. on-chip processors through queued messages and interrupt driven
  6. signals. Say Y if your platform supports hardware mailboxes.
  7. if MAILBOX
  8. config ARM_MHU
  9. tristate "ARM MHU Mailbox"
  10. depends on ARM_AMBA
  11. help
  12. Say Y here if you want to build the ARM MHU controller driver.
  13. The controller has 3 mailbox channels, the last of which can be
  14. used in Secure mode only.
  15. config PLATFORM_MHU
  16. tristate "Platform MHU Mailbox"
  17. depends on OF
  18. depends on HAS_IOMEM
  19. help
  20. Say Y here if you want to build a platform specific variant MHU
  21. controller driver.
  22. The controller has a maximum of 3 mailbox channels, the last of
  23. which can be used in Secure mode only.
  24. config PL320_MBOX
  25. bool "ARM PL320 Mailbox"
  26. depends on ARM_AMBA
  27. help
  28. An implementation of the ARM PL320 Interprocessor Communication
  29. Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
  30. send short messages between Highbank's A9 cores and the EnergyCore
  31. Management Engine, primarily for cpufreq. Say Y here if you want
  32. to use the PL320 IPCM support.
  33. config OMAP2PLUS_MBOX
  34. tristate "OMAP2+ Mailbox framework support"
  35. depends on ARCH_OMAP2PLUS
  36. help
  37. Mailbox implementation for OMAP family chips with hardware for
  38. interprocessor communication involving DSP, IVA1.0 and IVA2 in
  39. OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
  40. want to use OMAP2+ Mailbox framework support.
  41. config OMAP_MBOX_KFIFO_SIZE
  42. int "Mailbox kfifo default buffer size (bytes)"
  43. depends on OMAP2PLUS_MBOX
  44. default 256
  45. help
  46. Specify the default size of mailbox's kfifo buffers (bytes).
  47. This can also be changed at runtime (via the mbox_kfifo_size
  48. module parameter).
  49. config ROCKCHIP_MBOX
  50. bool "Rockchip Soc Intergrated Mailbox Support"
  51. depends on ARCH_ROCKCHIP || COMPILE_TEST
  52. help
  53. This driver provides support for inter-processor communication
  54. between CPU cores and MCU processor on Some Rockchip SOCs.
  55. Please check it that the Soc you use have Mailbox hardware.
  56. Say Y here if you want to use the Rockchip Mailbox support.
  57. config PCC
  58. bool "Platform Communication Channel Driver"
  59. depends on ACPI
  60. default n
  61. help
  62. ACPI 5.0+ spec defines a generic mode of communication
  63. between the OS and a platform such as the BMC. This medium
  64. (PCC) is typically used by CPPC (ACPI CPU Performance management),
  65. RAS (ACPI reliability protocol) and MPST (ACPI Memory power
  66. states). Select this driver if your platform implements the
  67. PCC clients mentioned above.
  68. config ALTERA_MBOX
  69. tristate "Altera Mailbox"
  70. depends on HAS_IOMEM
  71. help
  72. An implementation of the Altera Mailbox soft core. It is used
  73. to send message between processors. Say Y here if you want to use the
  74. Altera mailbox support.
  75. config BCM2835_MBOX
  76. tristate "BCM2835 Mailbox"
  77. depends on ARCH_BCM2835
  78. help
  79. An implementation of the BCM2385 Mailbox. It is used to invoke
  80. the services of the Videocore. Say Y here if you want to use the
  81. BCM2835 Mailbox.
  82. config STI_MBOX
  83. tristate "STI Mailbox framework support"
  84. depends on ARCH_STI && OF
  85. help
  86. Mailbox implementation for STMicroelectonics family chips with
  87. hardware for interprocessor communication.
  88. config TI_MESSAGE_MANAGER
  89. tristate "Texas Instruments Message Manager Driver"
  90. depends on ARCH_KEYSTONE
  91. help
  92. An implementation of Message Manager slave driver for Keystone
  93. architecture SoCs from Texas Instruments. Message Manager is a
  94. communication entity found on few of Texas Instrument's keystone
  95. architecture SoCs. These may be used for communication between
  96. multiple processors within the SoC. Select this driver if your
  97. platform has support for the hardware block.
  98. config HI6220_MBOX
  99. tristate "Hi6220 Mailbox"
  100. depends on ARCH_HISI
  101. help
  102. An implementation of the hi6220 mailbox. It is used to send message
  103. between application processors and MCU. Say Y here if you want to
  104. build Hi6220 mailbox controller driver.
  105. config MAILBOX_TEST
  106. tristate "Mailbox Test Client"
  107. depends on OF
  108. depends on HAS_IOMEM
  109. help
  110. Test client to help with testing new Controller driver
  111. implementations.
  112. config QCOM_APCS_IPC
  113. tristate "Qualcomm APCS IPC driver"
  114. depends on ARCH_QCOM || COMPILE_TEST
  115. help
  116. Say y here to enable support for the APCS IPC mailbox driver,
  117. providing an interface for invoking the inter-process communication
  118. signals from the application processor to other masters.
  119. config TEGRA_HSP_MBOX
  120. bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
  121. depends on ARCH_TEGRA_186_SOC
  122. help
  123. The Tegra HSP driver is used for the interprocessor communication
  124. between different remote processors and host processors on Tegra186
  125. and later SoCs. Say Y here if you want to have this support.
  126. If unsure say N.
  127. config XGENE_SLIMPRO_MBOX
  128. tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
  129. depends on ARCH_XGENE
  130. help
  131. An implementation of the APM X-Gene Interprocessor Communication
  132. Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
  133. It is used to send short messages between ARM64-bit cores and
  134. the SLIMpro Management Engine, primarily for PM. Say Y here if you
  135. want to use the APM X-Gene SLIMpro IPCM support.
  136. config BCM_PDC_MBOX
  137. tristate "Broadcom FlexSparx DMA Mailbox"
  138. depends on ARCH_BCM_IPROC || COMPILE_TEST
  139. depends on HAS_DMA
  140. help
  141. Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
  142. which provides access to various offload engines on Broadcom
  143. SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
  144. config BCM_FLEXRM_MBOX
  145. tristate "Broadcom FlexRM Mailbox"
  146. depends on ARM64
  147. depends on HAS_DMA
  148. select GENERIC_MSI_IRQ_DOMAIN
  149. default ARCH_BCM_IPROC
  150. help
  151. Mailbox implementation of the Broadcom FlexRM ring manager,
  152. which provides access to various offload engines on Broadcom
  153. SoCs. Say Y here if you want to use the Broadcom FlexRM.
  154. config MTK_CMDQ_MBOX
  155. tristate "MediaTek CMDQ Mailbox Support"
  156. help
  157. Say yes here to add support for the MediaTek Command Queue (CMDQ)
  158. mailbox driver. The CMDQ is used to help read/write registers with
  159. critical time limitation, such as updating display configuration
  160. during the vblank.
  161. config MTK_RPMSG_MBOX
  162. tristate "MediaTek RPMSG Mailbox Support"
  163. help
  164. Say yes here to add support for the MediaTek RPMSG mailbox driver.
  165. This uses MTK MBOX driver to communicate with remote processors
  166. base on mailbox framework. It provide channels, controller creation
  167. and send operations.
  168. endif