Kconfig 2.5 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config PPC_CELL
  3. bool
  4. default n
  5. config PPC_CELL_COMMON
  6. bool
  7. select PPC_CELL
  8. select PPC_DCR_MMIO
  9. select PPC_INDIRECT_PIO
  10. select PPC_INDIRECT_MMIO
  11. select PPC_NATIVE
  12. select PPC_RTAS
  13. select IRQ_EDGE_EOI_HANDLER
  14. config PPC_CELL_NATIVE
  15. bool
  16. select PPC_CELL_COMMON
  17. select MPIC
  18. select PPC_IO_WORKAROUNDS
  19. select IBM_EMAC_EMAC4 if IBM_EMAC
  20. select IBM_EMAC_RGMII if IBM_EMAC
  21. select IBM_EMAC_ZMII if IBM_EMAC #test only
  22. select IBM_EMAC_TAH if IBM_EMAC #test only
  23. default n
  24. config PPC_IBM_CELL_BLADE
  25. bool "IBM Cell Blade"
  26. depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
  27. select PPC_CELL_NATIVE
  28. select PPC_OF_PLATFORM_PCI
  29. select PCI
  30. select MMIO_NVRAM
  31. select PPC_UDBG_16550
  32. select UDBG_RTAS_CONSOLE
  33. config AXON_MSI
  34. bool
  35. depends on PPC_IBM_CELL_BLADE && PCI_MSI
  36. default y
  37. menu "Cell Broadband Engine options"
  38. depends on PPC_CELL
  39. config SPU_FS
  40. tristate "SPU file system"
  41. default m
  42. depends on PPC_CELL
  43. depends on COREDUMP
  44. select SPU_BASE
  45. help
  46. The SPU file system is used to access Synergistic Processing
  47. Units on machines implementing the Broadband Processor
  48. Architecture.
  49. config SPU_BASE
  50. bool
  51. default n
  52. select PPC_COPRO_BASE
  53. config CBE_RAS
  54. bool "RAS features for bare metal Cell BE"
  55. depends on PPC_CELL_NATIVE
  56. default y
  57. config PPC_IBM_CELL_RESETBUTTON
  58. bool "IBM Cell Blade Pinhole reset button"
  59. depends on CBE_RAS && PPC_IBM_CELL_BLADE
  60. default y
  61. help
  62. Support Pinhole Resetbutton on IBM Cell blades.
  63. This adds a method to trigger system reset via front panel pinhole button.
  64. config PPC_IBM_CELL_POWERBUTTON
  65. tristate "IBM Cell Blade power button"
  66. depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
  67. default y
  68. help
  69. Support Powerbutton on IBM Cell blades.
  70. This will enable the powerbutton as an input device.
  71. config CBE_THERM
  72. tristate "CBE thermal support"
  73. default m
  74. depends on CBE_RAS && SPU_BASE
  75. config PPC_PMI
  76. tristate
  77. default y
  78. depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON
  79. help
  80. PMI (Platform Management Interrupt) is a way to
  81. communicate with the BMC (Baseboard Management Controller).
  82. It is used in some IBM Cell blades.
  83. config CBE_CPUFREQ_SPU_GOVERNOR
  84. tristate "CBE frequency scaling based on SPU usage"
  85. depends on SPU_FS && CPU_FREQ
  86. default m
  87. help
  88. This governor checks for spu usage to adjust the cpu frequency.
  89. If no spu is running on a given cpu, that cpu will be throttled to
  90. the minimal possible frequency.
  91. endmenu
  92. config OPROFILE_CELL
  93. def_bool y
  94. depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE