head.S 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * head.S - Common startup code for 68000 core based CPU's
  4. *
  5. * 2012.10.21, Luis Alves <ljalvs@gmail.com>, Single head.S file for all
  6. * 68000 core based CPU's. Based on the sources from:
  7. * Coldfire by Greg Ungerer <gerg@snapgear.com>
  8. * 68328 by D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
  9. * Kenneth Albanowski <kjahds@kjahds.com>,
  10. * The Silver Hammer Group, Ltd.
  11. *
  12. */
  13. #include <linux/linkage.h>
  14. #include <linux/init.h>
  15. #include <asm/asm-offsets.h>
  16. #include <asm/thread_info.h>
  17. /*****************************************************************************
  18. * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
  19. *****************************************************************************/
  20. #ifdef CONFIG_MEMORY_RESERVE
  21. #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
  22. #else
  23. #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)
  24. #endif
  25. /*****************************************************************************/
  26. .global _start
  27. .global _rambase
  28. .global _ramvec
  29. .global _ramstart
  30. .global _ramend
  31. #if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
  32. .global bootlogo_bits
  33. #endif
  34. /* Defining DEBUG_HEAD_CODE, serial port in 68x328 is inited */
  35. /* #define DEBUG_HEAD_CODE */
  36. #undef DEBUG_HEAD_CODE
  37. .data
  38. /*****************************************************************************
  39. * RAM setup pointers. Used by the kernel to determine RAM location and size.
  40. *****************************************************************************/
  41. _rambase:
  42. .long 0
  43. _ramvec:
  44. .long 0
  45. _ramstart:
  46. .long 0
  47. _ramend:
  48. .long 0
  49. __HEAD
  50. /*****************************************************************************
  51. * Entry point, where all begins!
  52. *****************************************************************************/
  53. _start:
  54. /* Pilot need this specific signature at the start of ROM */
  55. #ifdef CONFIG_PILOT
  56. .byte 0x4e, 0xfa, 0x00, 0x0a /* bra opcode (jmp 10 bytes) */
  57. .byte 'b', 'o', 'o', 't'
  58. .word 10000
  59. nop
  60. moveq #0, %d0
  61. movew %d0, 0xfffff618 /* Watchdog off */
  62. movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
  63. #endif /* CONFIG_PILOT */
  64. movew #0x2700, %sr /* disable all interrupts */
  65. /*****************************************************************************
  66. * Setup PLL and wait for it to settle (in 68x328 cpu's).
  67. * Also, if enabled, init serial port.
  68. *****************************************************************************/
  69. #if defined(CONFIG_M68328) || \
  70. defined(CONFIG_M68EZ328) || \
  71. defined(CONFIG_M68VZ328)
  72. /* Serial port setup. Should only be needed if debugging this startup code. */
  73. #ifdef DEBUG_HEAD_CODE
  74. movew #0x0800, 0xfffff906 /* Ignore CTS */
  75. movew #0x010b, 0xfffff902 /* BAUD to 9600 */
  76. movew #0xe100, 0xfffff900 /* enable */
  77. #endif /* DEBUG_HEAD */
  78. #ifdef CONFIG_PILOT
  79. movew #0x2410, 0xfffff200 /* PLLCR */
  80. #else
  81. movew #0x2400, 0xfffff200 /* PLLCR */
  82. #endif
  83. movew #0x0123, 0xfffff202 /* PLLFSR */
  84. moveq #0, %d0
  85. movew #16384, %d0 /* PLL settle wait loop */
  86. _pll_settle:
  87. subw #1, %d0
  88. bne _pll_settle
  89. #endif /* CONFIG_M68x328 */
  90. /*****************************************************************************
  91. * If running kernel from ROM some specific initialization has to be done.
  92. * (Assuming that everything is already init'ed when running from RAM)
  93. *****************************************************************************/
  94. #ifdef CONFIG_ROMKERNEL
  95. /*****************************************************************************
  96. * Init chip registers (uCsimm specific)
  97. *****************************************************************************/
  98. #ifdef CONFIG_UCSIMM
  99. moveb #0x00, 0xfffffb0b /* Watchdog off */
  100. moveb #0x10, 0xfffff000 /* SCR */
  101. moveb #0x00, 0xfffff40b /* enable chip select */
  102. moveb #0x00, 0xfffff423 /* enable /DWE */
  103. moveb #0x08, 0xfffffd0d /* disable hardmap */
  104. moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
  105. movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
  106. movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
  107. movew #0x8f00, 0xfffffc00 /* DRAM configuration */
  108. movew #0x9667, 0xfffffc02 /* DRAM control */
  109. movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
  110. movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
  111. moveb #0x40, 0xfffff300 /* IVR */
  112. movel #0x007FFFFF, %d0 /* IMR */
  113. movel %d0, 0xfffff304
  114. moveb 0xfffff42b, %d0
  115. andb #0xe0, %d0
  116. moveb %d0, 0xfffff42b
  117. #endif
  118. /*****************************************************************************
  119. * Init LCD controller.
  120. * (Assuming that LCD controller is already init'ed when running from RAM)
  121. *****************************************************************************/
  122. #ifdef CONFIG_INIT_LCD
  123. #ifdef CONFIG_PILOT
  124. moveb #0, 0xfffffA27 /* LCKCON */
  125. movel #_start, 0xfffffA00 /* LSSA */
  126. moveb #0xa, 0xfffffA05 /* LVPW */
  127. movew #0x9f, 0xFFFFFa08 /* LXMAX */
  128. movew #0x9f, 0xFFFFFa0a /* LYMAX */
  129. moveb #9, 0xfffffa29 /* LBAR */
  130. moveb #0, 0xfffffa25 /* LPXCD */
  131. moveb #0x04, 0xFFFFFa20 /* LPICF */
  132. moveb #0x58, 0xfffffA27 /* LCKCON */
  133. moveb #0x85, 0xfffff429 /* PFDATA */
  134. moveb #0xd8, 0xfffffA27 /* LCKCON */
  135. moveb #0xc5, 0xfffff429 /* PFDATA */
  136. moveb #0xd5, 0xfffff429 /* PFDATA */
  137. movel #bootlogo_bits, 0xFFFFFA00 /* LSSA */
  138. moveb #10, 0xFFFFFA05 /* LVPW */
  139. movew #160, 0xFFFFFA08 /* LXMAX */
  140. movew #160, 0xFFFFFA0A /* LYMAX */
  141. #else /* CONFIG_PILOT */
  142. movel #bootlogo_bits, 0xfffffA00 /* LSSA */
  143. moveb #0x28, 0xfffffA05 /* LVPW */
  144. movew #0x280, 0xFFFFFa08 /* LXMAX */
  145. movew #0x1df, 0xFFFFFa0a /* LYMAX */
  146. moveb #0, 0xfffffa29 /* LBAR */
  147. moveb #0, 0xfffffa25 /* LPXCD */
  148. moveb #0x08, 0xFFFFFa20 /* LPICF */
  149. moveb #0x01, 0xFFFFFA21 /* -ve pol */
  150. moveb #0x81, 0xfffffA27 /* LCKCON */
  151. movew #0xff00, 0xfffff412 /* LCD pins */
  152. #endif /* CONFIG_PILOT */
  153. #endif /* CONFIG_INIT_LCD */
  154. /*****************************************************************************
  155. * Kernel is running from FLASH/ROM (XIP)
  156. * Copy init text & data to RAM
  157. *****************************************************************************/
  158. moveal #_etext, %a0
  159. moveal #_sdata, %a1
  160. moveal #__bss_start, %a2
  161. _copy_initmem:
  162. movel %a0@+, %a1@+
  163. cmpal %a1, %a2
  164. bhi _copy_initmem
  165. #endif /* CONFIG_ROMKERNEL */
  166. /*****************************************************************************
  167. * Setup basic memory information for kernel
  168. *****************************************************************************/
  169. movel #CONFIG_VECTORBASE,_ramvec /* set vector base location */
  170. movel #CONFIG_RAMBASE,_rambase /* set the base of RAM */
  171. movel #RAMEND, _ramend /* set end ram addr */
  172. lea __bss_stop,%a1
  173. movel %a1,_ramstart
  174. /*****************************************************************************
  175. * If the kernel is in RAM, move romfs to right above bss and
  176. * adjust _ramstart to where romfs ends.
  177. *
  178. * (Do this only if CONFIG_MTD_UCLINUX is true)
  179. *****************************************************************************/
  180. #if defined(CONFIG_ROMFS_FS) && defined(CONFIG_RAMKERNEL) && \
  181. defined(CONFIG_MTD_UCLINUX)
  182. lea __bss_start, %a0 /* get start of bss */
  183. lea __bss_stop, %a1 /* set up destination */
  184. movel %a0, %a2 /* copy of bss start */
  185. movel 8(%a0), %d0 /* get size of ROMFS */
  186. addql #8, %d0 /* allow for rounding */
  187. andl #0xfffffffc, %d0 /* whole words */
  188. addl %d0, %a0 /* copy from end */
  189. addl %d0, %a1 /* copy from end */
  190. movel %a1, _ramstart /* set start of ram */
  191. _copy_romfs:
  192. movel -(%a0), -(%a1) /* copy dword */
  193. cmpl %a0, %a2 /* check if at end */
  194. bne _copy_romfs
  195. #endif /* CONFIG_ROMFS_FS && CONFIG_RAMKERNEL && CONFIG_MTD_UCLINUX */
  196. /*****************************************************************************
  197. * Clear bss region
  198. *****************************************************************************/
  199. lea __bss_start, %a0 /* get start of bss */
  200. lea __bss_stop, %a1 /* get end of bss */
  201. _clear_bss:
  202. movel #0, (%a0)+ /* clear each word */
  203. cmpl %a0, %a1 /* check if at end */
  204. bne _clear_bss
  205. /*****************************************************************************
  206. * Load the current task pointer and stack.
  207. *****************************************************************************/
  208. lea init_thread_union,%a0
  209. lea THREAD_SIZE(%a0),%sp
  210. jsr start_kernel /* start Linux kernel */
  211. _exit:
  212. jmp _exit /* should never get here */