pci-error-recovery.txt 18 KB

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  1. PCI Error Recovery
  2. ------------------
  3. February 2, 2006
  4. Current document maintainer:
  5. Linas Vepstas <linasvepstas@gmail.com>
  6. updated by Richard Lary <rlary@us.ibm.com>
  7. and Mike Mason <mmlnx@us.ibm.com> on 27-Jul-2009
  8. Many PCI bus controllers are able to detect a variety of hardware
  9. PCI errors on the bus, such as parity errors on the data and address
  10. buses, as well as SERR and PERR errors. Some of the more advanced
  11. chipsets are able to deal with these errors; these include PCI-E chipsets,
  12. and the PCI-host bridges found on IBM Power4, Power5 and Power6-based
  13. pSeries boxes. A typical action taken is to disconnect the affected device,
  14. halting all I/O to it. The goal of a disconnection is to avoid system
  15. corruption; for example, to halt system memory corruption due to DMA's
  16. to "wild" addresses. Typically, a reconnection mechanism is also
  17. offered, so that the affected PCI device(s) are reset and put back
  18. into working condition. The reset phase requires coordination
  19. between the affected device drivers and the PCI controller chip.
  20. This document describes a generic API for notifying device drivers
  21. of a bus disconnection, and then performing error recovery.
  22. This API is currently implemented in the 2.6.16 and later kernels.
  23. Reporting and recovery is performed in several steps. First, when
  24. a PCI hardware error has resulted in a bus disconnect, that event
  25. is reported as soon as possible to all affected device drivers,
  26. including multiple instances of a device driver on multi-function
  27. cards. This allows device drivers to avoid deadlocking in spinloops,
  28. waiting for some i/o-space register to change, when it never will.
  29. It also gives the drivers a chance to defer incoming I/O as
  30. needed.
  31. Next, recovery is performed in several stages. Most of the complexity
  32. is forced by the need to handle multi-function devices, that is,
  33. devices that have multiple device drivers associated with them.
  34. In the first stage, each driver is allowed to indicate what type
  35. of reset it desires, the choices being a simple re-enabling of I/O
  36. or requesting a slot reset.
  37. If any driver requests a slot reset, that is what will be done.
  38. After a reset and/or a re-enabling of I/O, all drivers are
  39. again notified, so that they may then perform any device setup/config
  40. that may be required. After these have all completed, a final
  41. "resume normal operations" event is sent out.
  42. The biggest reason for choosing a kernel-based implementation rather
  43. than a user-space implementation was the need to deal with bus
  44. disconnects of PCI devices attached to storage media, and, in particular,
  45. disconnects from devices holding the root file system. If the root
  46. file system is disconnected, a user-space mechanism would have to go
  47. through a large number of contortions to complete recovery. Almost all
  48. of the current Linux file systems are not tolerant of disconnection
  49. from/reconnection to their underlying block device. By contrast,
  50. bus errors are easy to manage in the device driver. Indeed, most
  51. device drivers already handle very similar recovery procedures;
  52. for example, the SCSI-generic layer already provides significant
  53. mechanisms for dealing with SCSI bus errors and SCSI bus resets.
  54. Detailed Design
  55. ---------------
  56. Design and implementation details below, based on a chain of
  57. public email discussions with Ben Herrenschmidt, circa 5 April 2005.
  58. The error recovery API support is exposed to the driver in the form of
  59. a structure of function pointers pointed to by a new field in struct
  60. pci_driver. A driver that fails to provide the structure is "non-aware",
  61. and the actual recovery steps taken are platform dependent. The
  62. arch/powerpc implementation will simulate a PCI hotplug remove/add.
  63. This structure has the form:
  64. struct pci_error_handlers
  65. {
  66. int (*error_detected)(struct pci_dev *dev, enum pci_channel_state);
  67. int (*mmio_enabled)(struct pci_dev *dev);
  68. int (*slot_reset)(struct pci_dev *dev);
  69. void (*resume)(struct pci_dev *dev);
  70. };
  71. The possible channel states are:
  72. enum pci_channel_state {
  73. pci_channel_io_normal, /* I/O channel is in normal state */
  74. pci_channel_io_frozen, /* I/O to channel is blocked */
  75. pci_channel_io_perm_failure, /* PCI card is dead */
  76. };
  77. Possible return values are:
  78. enum pci_ers_result {
  79. PCI_ERS_RESULT_NONE, /* no result/none/not supported in device driver */
  80. PCI_ERS_RESULT_CAN_RECOVER, /* Device driver can recover without slot reset */
  81. PCI_ERS_RESULT_NEED_RESET, /* Device driver wants slot to be reset. */
  82. PCI_ERS_RESULT_DISCONNECT, /* Device has completely failed, is unrecoverable */
  83. PCI_ERS_RESULT_RECOVERED, /* Device driver is fully recovered and operational */
  84. };
  85. A driver does not have to implement all of these callbacks; however,
  86. if it implements any, it must implement error_detected(). If a callback
  87. is not implemented, the corresponding feature is considered unsupported.
  88. For example, if mmio_enabled() and resume() aren't there, then it
  89. is assumed that the driver is not doing any direct recovery and requires
  90. a slot reset. Typically a driver will want to know about
  91. a slot_reset().
  92. The actual steps taken by a platform to recover from a PCI error
  93. event will be platform-dependent, but will follow the general
  94. sequence described below.
  95. STEP 0: Error Event
  96. -------------------
  97. A PCI bus error is detected by the PCI hardware. On powerpc, the slot
  98. is isolated, in that all I/O is blocked: all reads return 0xffffffff,
  99. all writes are ignored.
  100. STEP 1: Notification
  101. --------------------
  102. Platform calls the error_detected() callback on every instance of
  103. every driver affected by the error.
  104. At this point, the device might not be accessible anymore, depending on
  105. the platform (the slot will be isolated on powerpc). The driver may
  106. already have "noticed" the error because of a failing I/O, but this
  107. is the proper "synchronization point", that is, it gives the driver
  108. a chance to cleanup, waiting for pending stuff (timers, whatever, etc...)
  109. to complete; it can take semaphores, schedule, etc... everything but
  110. touch the device. Within this function and after it returns, the driver
  111. shouldn't do any new IOs. Called in task context. This is sort of a
  112. "quiesce" point. See note about interrupts at the end of this doc.
  113. All drivers participating in this system must implement this call.
  114. The driver must return one of the following result codes:
  115. - PCI_ERS_RESULT_CAN_RECOVER:
  116. Driver returns this if it thinks it might be able to recover
  117. the HW by just banging IOs or if it wants to be given
  118. a chance to extract some diagnostic information (see
  119. mmio_enable, below).
  120. - PCI_ERS_RESULT_NEED_RESET:
  121. Driver returns this if it can't recover without a
  122. slot reset.
  123. - PCI_ERS_RESULT_DISCONNECT:
  124. Driver returns this if it doesn't want to recover at all.
  125. The next step taken will depend on the result codes returned by the
  126. drivers.
  127. If all drivers on the segment/slot return PCI_ERS_RESULT_CAN_RECOVER,
  128. then the platform should re-enable IOs on the slot (or do nothing in
  129. particular, if the platform doesn't isolate slots), and recovery
  130. proceeds to STEP 2 (MMIO Enable).
  131. If any driver requested a slot reset (by returning PCI_ERS_RESULT_NEED_RESET),
  132. then recovery proceeds to STEP 4 (Slot Reset).
  133. If the platform is unable to recover the slot, the next step
  134. is STEP 6 (Permanent Failure).
  135. >>> The current powerpc implementation assumes that a device driver will
  136. >>> *not* schedule or semaphore in this routine; the current powerpc
  137. >>> implementation uses one kernel thread to notify all devices;
  138. >>> thus, if one device sleeps/schedules, all devices are affected.
  139. >>> Doing better requires complex multi-threaded logic in the error
  140. >>> recovery implementation (e.g. waiting for all notification threads
  141. >>> to "join" before proceeding with recovery.) This seems excessively
  142. >>> complex and not worth implementing.
  143. >>> The current powerpc implementation doesn't much care if the device
  144. >>> attempts I/O at this point, or not. I/O's will fail, returning
  145. >>> a value of 0xff on read, and writes will be dropped. If more than
  146. >>> EEH_MAX_FAILS I/O's are attempted to a frozen adapter, EEH
  147. >>> assumes that the device driver has gone into an infinite loop
  148. >>> and prints an error to syslog. A reboot is then required to
  149. >>> get the device working again.
  150. STEP 2: MMIO Enabled
  151. -------------------
  152. The platform re-enables MMIO to the device (but typically not the
  153. DMA), and then calls the mmio_enabled() callback on all affected
  154. device drivers.
  155. This is the "early recovery" call. IOs are allowed again, but DMA is
  156. not, with some restrictions. This is NOT a callback for the driver to
  157. start operations again, only to peek/poke at the device, extract diagnostic
  158. information, if any, and eventually do things like trigger a device local
  159. reset or some such, but not restart operations. This callback is made if
  160. all drivers on a segment agree that they can try to recover and if no automatic
  161. link reset was performed by the HW. If the platform can't just re-enable IOs
  162. without a slot reset or a link reset, it will not call this callback, and
  163. instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset)
  164. >>> The following is proposed; no platform implements this yet:
  165. >>> Proposal: All I/O's should be done _synchronously_ from within
  166. >>> this callback, errors triggered by them will be returned via
  167. >>> the normal pci_check_whatever() API, no new error_detected()
  168. >>> callback will be issued due to an error happening here. However,
  169. >>> such an error might cause IOs to be re-blocked for the whole
  170. >>> segment, and thus invalidate the recovery that other devices
  171. >>> on the same segment might have done, forcing the whole segment
  172. >>> into one of the next states, that is, link reset or slot reset.
  173. The driver should return one of the following result codes:
  174. - PCI_ERS_RESULT_RECOVERED
  175. Driver returns this if it thinks the device is fully
  176. functional and thinks it is ready to start
  177. normal driver operations again. There is no
  178. guarantee that the driver will actually be
  179. allowed to proceed, as another driver on the
  180. same segment might have failed and thus triggered a
  181. slot reset on platforms that support it.
  182. - PCI_ERS_RESULT_NEED_RESET
  183. Driver returns this if it thinks the device is not
  184. recoverable in its current state and it needs a slot
  185. reset to proceed.
  186. - PCI_ERS_RESULT_DISCONNECT
  187. Same as above. Total failure, no recovery even after
  188. reset driver dead. (To be defined more precisely)
  189. The next step taken depends on the results returned by the drivers.
  190. If all drivers returned PCI_ERS_RESULT_RECOVERED, then the platform
  191. proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations).
  192. If any driver returned PCI_ERS_RESULT_NEED_RESET, then the platform
  193. proceeds to STEP 4 (Slot Reset)
  194. STEP 3: Link Reset
  195. ------------------
  196. The platform resets the link. This is a PCI-Express specific step
  197. and is done whenever a fatal error has been detected that can be
  198. "solved" by resetting the link.
  199. STEP 4: Slot Reset
  200. ------------------
  201. In response to a return value of PCI_ERS_RESULT_NEED_RESET, the
  202. the platform will perform a slot reset on the requesting PCI device(s).
  203. The actual steps taken by a platform to perform a slot reset
  204. will be platform-dependent. Upon completion of slot reset, the
  205. platform will call the device slot_reset() callback.
  206. Powerpc platforms implement two levels of slot reset:
  207. soft reset(default) and fundamental(optional) reset.
  208. Powerpc soft reset consists of asserting the adapter #RST line and then
  209. restoring the PCI BAR's and PCI configuration header to a state
  210. that is equivalent to what it would be after a fresh system
  211. power-on followed by power-on BIOS/system firmware initialization.
  212. Soft reset is also known as hot-reset.
  213. Powerpc fundamental reset is supported by PCI Express cards only
  214. and results in device's state machines, hardware logic, port states and
  215. configuration registers to initialize to their default conditions.
  216. For most PCI devices, a soft reset will be sufficient for recovery.
  217. Optional fundamental reset is provided to support a limited number
  218. of PCI Express devices for which a soft reset is not sufficient
  219. for recovery.
  220. If the platform supports PCI hotplug, then the reset might be
  221. performed by toggling the slot electrical power off/on.
  222. It is important for the platform to restore the PCI config space
  223. to the "fresh poweron" state, rather than the "last state". After
  224. a slot reset, the device driver will almost always use its standard
  225. device initialization routines, and an unusual config space setup
  226. may result in hung devices, kernel panics, or silent data corruption.
  227. This call gives drivers the chance to re-initialize the hardware
  228. (re-download firmware, etc.). At this point, the driver may assume
  229. that the card is in a fresh state and is fully functional. The slot
  230. is unfrozen and the driver has full access to PCI config space,
  231. memory mapped I/O space and DMA. Interrupts (Legacy, MSI, or MSI-X)
  232. will also be available.
  233. Drivers should not restart normal I/O processing operations
  234. at this point. If all device drivers report success on this
  235. callback, the platform will call resume() to complete the sequence,
  236. and let the driver restart normal I/O processing.
  237. A driver can still return a critical failure for this function if
  238. it can't get the device operational after reset. If the platform
  239. previously tried a soft reset, it might now try a hard reset (power
  240. cycle) and then call slot_reset() again. It the device still can't
  241. be recovered, there is nothing more that can be done; the platform
  242. will typically report a "permanent failure" in such a case. The
  243. device will be considered "dead" in this case.
  244. Drivers for multi-function cards will need to coordinate among
  245. themselves as to which driver instance will perform any "one-shot"
  246. or global device initialization. For example, the Symbios sym53cxx2
  247. driver performs device init only from PCI function 0:
  248. + if (PCI_FUNC(pdev->devfn) == 0)
  249. + sym_reset_scsi_bus(np, 0);
  250. Result codes:
  251. - PCI_ERS_RESULT_DISCONNECT
  252. Same as above.
  253. Drivers for PCI Express cards that require a fundamental reset must
  254. set the needs_freset bit in the pci_dev structure in their probe function.
  255. For example, the QLogic qla2xxx driver sets the needs_freset bit for certain
  256. PCI card types:
  257. + /* Set EEH reset type to fundamental if required by hba */
  258. + if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha))
  259. + pdev->needs_freset = 1;
  260. +
  261. Platform proceeds either to STEP 5 (Resume Operations) or STEP 6 (Permanent
  262. Failure).
  263. >>> The current powerpc implementation does not try a power-cycle
  264. >>> reset if the driver returned PCI_ERS_RESULT_DISCONNECT.
  265. >>> However, it probably should.
  266. STEP 5: Resume Operations
  267. -------------------------
  268. The platform will call the resume() callback on all affected device
  269. drivers if all drivers on the segment have returned
  270. PCI_ERS_RESULT_RECOVERED from one of the 3 previous callbacks.
  271. The goal of this callback is to tell the driver to restart activity,
  272. that everything is back and running. This callback does not return
  273. a result code.
  274. At this point, if a new error happens, the platform will restart
  275. a new error recovery sequence.
  276. STEP 6: Permanent Failure
  277. -------------------------
  278. A "permanent failure" has occurred, and the platform cannot recover
  279. the device. The platform will call error_detected() with a
  280. pci_channel_state value of pci_channel_io_perm_failure.
  281. The device driver should, at this point, assume the worst. It should
  282. cancel all pending I/O, refuse all new I/O, returning -EIO to
  283. higher layers. The device driver should then clean up all of its
  284. memory and remove itself from kernel operations, much as it would
  285. during system shutdown.
  286. The platform will typically notify the system operator of the
  287. permanent failure in some way. If the device is hotplug-capable,
  288. the operator will probably want to remove and replace the device.
  289. Note, however, not all failures are truly "permanent". Some are
  290. caused by over-heating, some by a poorly seated card. Many
  291. PCI error events are caused by software bugs, e.g. DMA's to
  292. wild addresses or bogus split transactions due to programming
  293. errors. See the discussion in powerpc/eeh-pci-error-recovery.txt
  294. for additional detail on real-life experience of the causes of
  295. software errors.
  296. Conclusion; General Remarks
  297. ---------------------------
  298. The way the callbacks are called is platform policy. A platform with
  299. no slot reset capability may want to just "ignore" drivers that can't
  300. recover (disconnect them) and try to let other cards on the same segment
  301. recover. Keep in mind that in most real life cases, though, there will
  302. be only one driver per segment.
  303. Now, a note about interrupts. If you get an interrupt and your
  304. device is dead or has been isolated, there is a problem :)
  305. The current policy is to turn this into a platform policy.
  306. That is, the recovery API only requires that:
  307. - There is no guarantee that interrupt delivery can proceed from any
  308. device on the segment starting from the error detection and until the
  309. slot_reset callback is called, at which point interrupts are expected
  310. to be fully operational.
  311. - There is no guarantee that interrupt delivery is stopped, that is,
  312. a driver that gets an interrupt after detecting an error, or that detects
  313. an error within the interrupt handler such that it prevents proper
  314. ack'ing of the interrupt (and thus removal of the source) should just
  315. return IRQ_NOTHANDLED. It's up to the platform to deal with that
  316. condition, typically by masking the IRQ source during the duration of
  317. the error handling. It is expected that the platform "knows" which
  318. interrupts are routed to error-management capable slots and can deal
  319. with temporarily disabling that IRQ number during error processing (this
  320. isn't terribly complex). That means some IRQ latency for other devices
  321. sharing the interrupt, but there is simply no other way. High end
  322. platforms aren't supposed to share interrupts between many devices
  323. anyway :)
  324. >>> Implementation details for the powerpc platform are discussed in
  325. >>> the file Documentation/powerpc/eeh-pci-error-recovery.txt
  326. >>> As of this writing, there is a growing list of device drivers with
  327. >>> patches implementing error recovery. Not all of these patches are in
  328. >>> mainline yet. These may be used as "examples":
  329. >>>
  330. >>> drivers/scsi/ipr
  331. >>> drivers/scsi/sym53c8xx_2
  332. >>> drivers/scsi/qla2xxx
  333. >>> drivers/scsi/lpfc
  334. >>> drivers/next/bnx2.c
  335. >>> drivers/next/e100.c
  336. >>> drivers/net/e1000
  337. >>> drivers/net/e1000e
  338. >>> drivers/net/ixgb
  339. >>> drivers/net/ixgbe
  340. >>> drivers/net/cxgb3
  341. >>> drivers/net/s2io.c
  342. >>> drivers/net/qlge
  343. The End
  344. -------