vfio_pci.c 38 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <alex.williamson@redhat.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, pugs@cisco.com
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/nospec.h>
  30. #include "vfio_pci_private.h"
  31. #define DRIVER_VERSION "0.2"
  32. #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
  33. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  34. static char ids[1024] __initdata;
  35. module_param_string(ids, ids, sizeof(ids), 0);
  36. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  37. static bool nointxmask;
  38. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  39. MODULE_PARM_DESC(nointxmask,
  40. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
  41. #ifdef CONFIG_VFIO_PCI_VGA
  42. static bool disable_vga;
  43. module_param(disable_vga, bool, S_IRUGO);
  44. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  45. #endif
  46. static bool disable_idle_d3;
  47. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  48. MODULE_PARM_DESC(disable_idle_d3,
  49. "Disable using the PCI D3 low power state for idle, unused devices");
  50. static DEFINE_MUTEX(driver_lock);
  51. static inline bool vfio_vga_disabled(void)
  52. {
  53. #ifdef CONFIG_VFIO_PCI_VGA
  54. return disable_vga;
  55. #else
  56. return true;
  57. #endif
  58. }
  59. /*
  60. * Our VGA arbiter participation is limited since we don't know anything
  61. * about the device itself. However, if the device is the only VGA device
  62. * downstream of a bridge and VFIO VGA support is disabled, then we can
  63. * safely return legacy VGA IO and memory as not decoded since the user
  64. * has no way to get to it and routing can be disabled externally at the
  65. * bridge.
  66. */
  67. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  68. {
  69. struct vfio_pci_device *vdev = opaque;
  70. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  71. unsigned char max_busnr;
  72. unsigned int decodes;
  73. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  74. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  75. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  76. max_busnr = pci_bus_max_busnr(pdev->bus);
  77. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  78. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  79. if (tmp == pdev ||
  80. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  81. pci_is_root_bus(tmp->bus))
  82. continue;
  83. if (tmp->bus->number >= pdev->bus->number &&
  84. tmp->bus->number <= max_busnr) {
  85. pci_dev_put(tmp);
  86. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  87. break;
  88. }
  89. }
  90. return decodes;
  91. }
  92. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  93. {
  94. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  95. }
  96. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  97. {
  98. struct resource *res;
  99. int bar;
  100. struct vfio_pci_dummy_resource *dummy_res;
  101. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  102. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  103. res = vdev->pdev->resource + bar;
  104. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  105. goto no_mmap;
  106. if (!(res->flags & IORESOURCE_MEM))
  107. goto no_mmap;
  108. /*
  109. * The PCI core shouldn't set up a resource with a
  110. * type but zero size. But there may be bugs that
  111. * cause us to do that.
  112. */
  113. if (!resource_size(res))
  114. goto no_mmap;
  115. if (resource_size(res) >= PAGE_SIZE) {
  116. vdev->bar_mmap_supported[bar] = true;
  117. continue;
  118. }
  119. if (!(res->start & ~PAGE_MASK)) {
  120. /*
  121. * Add a dummy resource to reserve the remainder
  122. * of the exclusive page in case that hot-add
  123. * device's bar is assigned into it.
  124. */
  125. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  126. if (dummy_res == NULL)
  127. goto no_mmap;
  128. dummy_res->resource.name = "vfio sub-page reserved";
  129. dummy_res->resource.start = res->end + 1;
  130. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  131. dummy_res->resource.flags = res->flags;
  132. if (request_resource(res->parent,
  133. &dummy_res->resource)) {
  134. kfree(dummy_res);
  135. goto no_mmap;
  136. }
  137. dummy_res->index = bar;
  138. list_add(&dummy_res->res_next,
  139. &vdev->dummy_resources_list);
  140. vdev->bar_mmap_supported[bar] = true;
  141. continue;
  142. }
  143. /*
  144. * Here we don't handle the case when the BAR is not page
  145. * aligned because we can't expect the BAR will be
  146. * assigned into the same location in a page in guest
  147. * when we passthrough the BAR. And it's hard to access
  148. * this BAR in userspace because we have no way to get
  149. * the BAR's location in a page.
  150. */
  151. no_mmap:
  152. vdev->bar_mmap_supported[bar] = false;
  153. }
  154. }
  155. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  156. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  157. /*
  158. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  159. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  160. * If a device implements the former but not the latter we would typically
  161. * expect broken_intx_masking be set and require an exclusive interrupt.
  162. * However since we do have control of the device's ability to assert INTx,
  163. * we can instead pretend that the device does not implement INTx, virtualizing
  164. * the pin register to report zero and maintaining DisINTx set on the host.
  165. */
  166. static bool vfio_pci_nointx(struct pci_dev *pdev)
  167. {
  168. switch (pdev->vendor) {
  169. case PCI_VENDOR_ID_INTEL:
  170. switch (pdev->device) {
  171. /* All i40e (XL710/X710) 10/20/40GbE NICs */
  172. case 0x1572:
  173. case 0x1574:
  174. case 0x1580 ... 0x1581:
  175. case 0x1583 ... 0x1589:
  176. case 0x37d0 ... 0x37d2:
  177. return true;
  178. default:
  179. return false;
  180. }
  181. }
  182. return false;
  183. }
  184. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  185. {
  186. struct pci_dev *pdev = vdev->pdev;
  187. int ret;
  188. u16 cmd;
  189. u8 msix_pos;
  190. pci_set_power_state(pdev, PCI_D0);
  191. /* Don't allow our initial saved state to include busmaster */
  192. pci_clear_master(pdev);
  193. ret = pci_enable_device(pdev);
  194. if (ret)
  195. return ret;
  196. vdev->reset_works = (pci_reset_function(pdev) == 0);
  197. pci_save_state(pdev);
  198. vdev->pci_saved_state = pci_store_saved_state(pdev);
  199. if (!vdev->pci_saved_state)
  200. pr_debug("%s: Couldn't store %s saved state\n",
  201. __func__, dev_name(&pdev->dev));
  202. if (likely(!nointxmask)) {
  203. if (vfio_pci_nointx(pdev)) {
  204. dev_info(&pdev->dev, "Masking broken INTx support\n");
  205. vdev->nointx = true;
  206. pci_intx(pdev, 0);
  207. } else
  208. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  209. }
  210. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  211. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  212. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  213. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  214. }
  215. ret = vfio_config_init(vdev);
  216. if (ret) {
  217. kfree(vdev->pci_saved_state);
  218. vdev->pci_saved_state = NULL;
  219. pci_disable_device(pdev);
  220. return ret;
  221. }
  222. msix_pos = pdev->msix_cap;
  223. if (msix_pos) {
  224. u16 flags;
  225. u32 table;
  226. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  227. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  228. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  229. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  230. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  231. } else
  232. vdev->msix_bar = 0xFF;
  233. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  234. vdev->has_vga = true;
  235. if (vfio_pci_is_vga(pdev) &&
  236. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  237. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  238. ret = vfio_pci_igd_init(vdev);
  239. if (ret) {
  240. dev_warn(&vdev->pdev->dev,
  241. "Failed to setup Intel IGD regions\n");
  242. vfio_pci_disable(vdev);
  243. return ret;
  244. }
  245. }
  246. vfio_pci_probe_mmaps(vdev);
  247. return 0;
  248. }
  249. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  250. {
  251. struct pci_dev *pdev = vdev->pdev;
  252. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  253. int i, bar;
  254. /* Stop the device from further DMA */
  255. pci_clear_master(pdev);
  256. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  257. VFIO_IRQ_SET_ACTION_TRIGGER,
  258. vdev->irq_type, 0, 0, NULL);
  259. vdev->virq_disabled = false;
  260. for (i = 0; i < vdev->num_regions; i++)
  261. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  262. vdev->num_regions = 0;
  263. kfree(vdev->region);
  264. vdev->region = NULL; /* don't krealloc a freed pointer */
  265. vfio_config_free(vdev);
  266. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  267. if (!vdev->barmap[bar])
  268. continue;
  269. pci_iounmap(pdev, vdev->barmap[bar]);
  270. pci_release_selected_regions(pdev, 1 << bar);
  271. vdev->barmap[bar] = NULL;
  272. }
  273. list_for_each_entry_safe(dummy_res, tmp,
  274. &vdev->dummy_resources_list, res_next) {
  275. list_del(&dummy_res->res_next);
  276. release_resource(&dummy_res->resource);
  277. kfree(dummy_res);
  278. }
  279. vdev->needs_reset = true;
  280. /*
  281. * If we have saved state, restore it. If we can reset the device,
  282. * even better. Resetting with current state seems better than
  283. * nothing, but saving and restoring current state without reset
  284. * is just busy work.
  285. */
  286. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  287. pr_info("%s: Couldn't reload %s saved state\n",
  288. __func__, dev_name(&pdev->dev));
  289. if (!vdev->reset_works)
  290. goto out;
  291. pci_save_state(pdev);
  292. }
  293. /*
  294. * Disable INTx and MSI, presumably to avoid spurious interrupts
  295. * during reset. Stolen from pci_reset_function()
  296. */
  297. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  298. /*
  299. * Try to reset the device. The success of this is dependent on
  300. * being able to lock the device, which is not always possible.
  301. */
  302. if (vdev->reset_works && !pci_try_reset_function(pdev))
  303. vdev->needs_reset = false;
  304. pci_restore_state(pdev);
  305. out:
  306. pci_disable_device(pdev);
  307. vfio_pci_try_bus_reset(vdev);
  308. if (!disable_idle_d3)
  309. pci_set_power_state(pdev, PCI_D3hot);
  310. }
  311. static void vfio_pci_release(void *device_data)
  312. {
  313. struct vfio_pci_device *vdev = device_data;
  314. mutex_lock(&driver_lock);
  315. if (!(--vdev->refcnt)) {
  316. vfio_spapr_pci_eeh_release(vdev->pdev);
  317. vfio_pci_disable(vdev);
  318. }
  319. mutex_unlock(&driver_lock);
  320. module_put(THIS_MODULE);
  321. }
  322. static int vfio_pci_open(void *device_data)
  323. {
  324. struct vfio_pci_device *vdev = device_data;
  325. int ret = 0;
  326. if (!try_module_get(THIS_MODULE))
  327. return -ENODEV;
  328. mutex_lock(&driver_lock);
  329. if (!vdev->refcnt) {
  330. ret = vfio_pci_enable(vdev);
  331. if (ret)
  332. goto error;
  333. vfio_spapr_pci_eeh_open(vdev->pdev);
  334. }
  335. vdev->refcnt++;
  336. error:
  337. mutex_unlock(&driver_lock);
  338. if (ret)
  339. module_put(THIS_MODULE);
  340. return ret;
  341. }
  342. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  343. {
  344. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  345. u8 pin;
  346. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  347. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  348. return 1;
  349. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  350. u8 pos;
  351. u16 flags;
  352. pos = vdev->pdev->msi_cap;
  353. if (pos) {
  354. pci_read_config_word(vdev->pdev,
  355. pos + PCI_MSI_FLAGS, &flags);
  356. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  357. }
  358. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  359. u8 pos;
  360. u16 flags;
  361. pos = vdev->pdev->msix_cap;
  362. if (pos) {
  363. pci_read_config_word(vdev->pdev,
  364. pos + PCI_MSIX_FLAGS, &flags);
  365. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  366. }
  367. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  368. if (pci_is_pcie(vdev->pdev))
  369. return 1;
  370. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  371. return 1;
  372. }
  373. return 0;
  374. }
  375. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  376. {
  377. (*(int *)data)++;
  378. return 0;
  379. }
  380. struct vfio_pci_fill_info {
  381. int max;
  382. int cur;
  383. struct vfio_pci_dependent_device *devices;
  384. };
  385. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  386. {
  387. struct vfio_pci_fill_info *fill = data;
  388. struct iommu_group *iommu_group;
  389. if (fill->cur == fill->max)
  390. return -EAGAIN; /* Something changed, try again */
  391. iommu_group = iommu_group_get(&pdev->dev);
  392. if (!iommu_group)
  393. return -EPERM; /* Cannot reset non-isolated devices */
  394. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  395. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  396. fill->devices[fill->cur].bus = pdev->bus->number;
  397. fill->devices[fill->cur].devfn = pdev->devfn;
  398. fill->cur++;
  399. iommu_group_put(iommu_group);
  400. return 0;
  401. }
  402. struct vfio_pci_group_entry {
  403. struct vfio_group *group;
  404. int id;
  405. };
  406. struct vfio_pci_group_info {
  407. int count;
  408. struct vfio_pci_group_entry *groups;
  409. };
  410. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  411. {
  412. struct vfio_pci_group_info *info = data;
  413. struct iommu_group *group;
  414. int id, i;
  415. group = iommu_group_get(&pdev->dev);
  416. if (!group)
  417. return -EPERM;
  418. id = iommu_group_id(group);
  419. for (i = 0; i < info->count; i++)
  420. if (info->groups[i].id == id)
  421. break;
  422. iommu_group_put(group);
  423. return (i == info->count) ? -EINVAL : 0;
  424. }
  425. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  426. {
  427. for (; pdev; pdev = pdev->bus->self)
  428. if (pdev->bus == slot->bus)
  429. return (pdev->slot == slot);
  430. return false;
  431. }
  432. struct vfio_pci_walk_info {
  433. int (*fn)(struct pci_dev *, void *data);
  434. void *data;
  435. struct pci_dev *pdev;
  436. bool slot;
  437. int ret;
  438. };
  439. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  440. {
  441. struct vfio_pci_walk_info *walk = data;
  442. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  443. walk->ret = walk->fn(pdev, walk->data);
  444. return walk->ret;
  445. }
  446. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  447. int (*fn)(struct pci_dev *,
  448. void *data), void *data,
  449. bool slot)
  450. {
  451. struct vfio_pci_walk_info walk = {
  452. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  453. };
  454. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  455. return walk.ret;
  456. }
  457. static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
  458. struct vfio_info_cap *caps)
  459. {
  460. struct vfio_info_cap_header *header;
  461. struct vfio_region_info_cap_sparse_mmap *sparse;
  462. size_t end, size;
  463. int nr_areas = 2, i = 0;
  464. end = pci_resource_len(vdev->pdev, vdev->msix_bar);
  465. /* If MSI-X table is aligned to the start or end, only one area */
  466. if (((vdev->msix_offset & PAGE_MASK) == 0) ||
  467. (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
  468. nr_areas = 1;
  469. size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
  470. header = vfio_info_cap_add(caps, size,
  471. VFIO_REGION_INFO_CAP_SPARSE_MMAP, 1);
  472. if (IS_ERR(header))
  473. return PTR_ERR(header);
  474. sparse = container_of(header,
  475. struct vfio_region_info_cap_sparse_mmap, header);
  476. sparse->nr_areas = nr_areas;
  477. if (vdev->msix_offset & PAGE_MASK) {
  478. sparse->areas[i].offset = 0;
  479. sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
  480. i++;
  481. }
  482. if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
  483. sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
  484. vdev->msix_size);
  485. sparse->areas[i].size = end - sparse->areas[i].offset;
  486. i++;
  487. }
  488. return 0;
  489. }
  490. static int region_type_cap(struct vfio_pci_device *vdev,
  491. struct vfio_info_cap *caps,
  492. unsigned int type, unsigned int subtype)
  493. {
  494. struct vfio_info_cap_header *header;
  495. struct vfio_region_info_cap_type *cap;
  496. header = vfio_info_cap_add(caps, sizeof(*cap),
  497. VFIO_REGION_INFO_CAP_TYPE, 1);
  498. if (IS_ERR(header))
  499. return PTR_ERR(header);
  500. cap = container_of(header, struct vfio_region_info_cap_type, header);
  501. cap->type = type;
  502. cap->subtype = subtype;
  503. return 0;
  504. }
  505. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  506. unsigned int type, unsigned int subtype,
  507. const struct vfio_pci_regops *ops,
  508. size_t size, u32 flags, void *data)
  509. {
  510. struct vfio_pci_region *region;
  511. region = krealloc(vdev->region,
  512. (vdev->num_regions + 1) * sizeof(*region),
  513. GFP_KERNEL);
  514. if (!region)
  515. return -ENOMEM;
  516. vdev->region = region;
  517. vdev->region[vdev->num_regions].type = type;
  518. vdev->region[vdev->num_regions].subtype = subtype;
  519. vdev->region[vdev->num_regions].ops = ops;
  520. vdev->region[vdev->num_regions].size = size;
  521. vdev->region[vdev->num_regions].flags = flags;
  522. vdev->region[vdev->num_regions].data = data;
  523. vdev->num_regions++;
  524. return 0;
  525. }
  526. static long vfio_pci_ioctl(void *device_data,
  527. unsigned int cmd, unsigned long arg)
  528. {
  529. struct vfio_pci_device *vdev = device_data;
  530. unsigned long minsz;
  531. if (cmd == VFIO_DEVICE_GET_INFO) {
  532. struct vfio_device_info info;
  533. minsz = offsetofend(struct vfio_device_info, num_irqs);
  534. if (copy_from_user(&info, (void __user *)arg, minsz))
  535. return -EFAULT;
  536. if (info.argsz < minsz)
  537. return -EINVAL;
  538. info.flags = VFIO_DEVICE_FLAGS_PCI;
  539. if (vdev->reset_works)
  540. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  541. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  542. info.num_irqs = VFIO_PCI_NUM_IRQS;
  543. return copy_to_user((void __user *)arg, &info, minsz) ?
  544. -EFAULT : 0;
  545. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  546. struct pci_dev *pdev = vdev->pdev;
  547. struct vfio_region_info info;
  548. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  549. int i, ret;
  550. minsz = offsetofend(struct vfio_region_info, offset);
  551. if (copy_from_user(&info, (void __user *)arg, minsz))
  552. return -EFAULT;
  553. if (info.argsz < minsz)
  554. return -EINVAL;
  555. switch (info.index) {
  556. case VFIO_PCI_CONFIG_REGION_INDEX:
  557. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  558. info.size = pdev->cfg_size;
  559. info.flags = VFIO_REGION_INFO_FLAG_READ |
  560. VFIO_REGION_INFO_FLAG_WRITE;
  561. break;
  562. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  563. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  564. info.size = pci_resource_len(pdev, info.index);
  565. if (!info.size) {
  566. info.flags = 0;
  567. break;
  568. }
  569. info.flags = VFIO_REGION_INFO_FLAG_READ |
  570. VFIO_REGION_INFO_FLAG_WRITE;
  571. if (vdev->bar_mmap_supported[info.index]) {
  572. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  573. if (info.index == vdev->msix_bar) {
  574. ret = msix_sparse_mmap_cap(vdev, &caps);
  575. if (ret)
  576. return ret;
  577. }
  578. }
  579. break;
  580. case VFIO_PCI_ROM_REGION_INDEX:
  581. {
  582. void __iomem *io;
  583. size_t size;
  584. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  585. info.flags = 0;
  586. /* Report the BAR size, not the ROM size */
  587. info.size = pci_resource_len(pdev, info.index);
  588. if (!info.size) {
  589. /* Shadow ROMs appear as PCI option ROMs */
  590. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  591. IORESOURCE_ROM_SHADOW)
  592. info.size = 0x20000;
  593. else
  594. break;
  595. }
  596. /* Is it really there? */
  597. io = pci_map_rom(pdev, &size);
  598. if (!io || !size) {
  599. info.size = 0;
  600. break;
  601. }
  602. pci_unmap_rom(pdev, io);
  603. info.flags = VFIO_REGION_INFO_FLAG_READ;
  604. break;
  605. }
  606. case VFIO_PCI_VGA_REGION_INDEX:
  607. if (!vdev->has_vga)
  608. return -EINVAL;
  609. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  610. info.size = 0xc0000;
  611. info.flags = VFIO_REGION_INFO_FLAG_READ |
  612. VFIO_REGION_INFO_FLAG_WRITE;
  613. break;
  614. default:
  615. if (info.index >=
  616. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  617. return -EINVAL;
  618. info.index = array_index_nospec(info.index,
  619. VFIO_PCI_NUM_REGIONS +
  620. vdev->num_regions);
  621. i = info.index - VFIO_PCI_NUM_REGIONS;
  622. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  623. info.size = vdev->region[i].size;
  624. info.flags = vdev->region[i].flags;
  625. ret = region_type_cap(vdev, &caps,
  626. vdev->region[i].type,
  627. vdev->region[i].subtype);
  628. if (ret)
  629. return ret;
  630. }
  631. if (caps.size) {
  632. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  633. if (info.argsz < sizeof(info) + caps.size) {
  634. info.argsz = sizeof(info) + caps.size;
  635. info.cap_offset = 0;
  636. } else {
  637. vfio_info_cap_shift(&caps, sizeof(info));
  638. if (copy_to_user((void __user *)arg +
  639. sizeof(info), caps.buf,
  640. caps.size)) {
  641. kfree(caps.buf);
  642. return -EFAULT;
  643. }
  644. info.cap_offset = sizeof(info);
  645. }
  646. kfree(caps.buf);
  647. }
  648. return copy_to_user((void __user *)arg, &info, minsz) ?
  649. -EFAULT : 0;
  650. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  651. struct vfio_irq_info info;
  652. minsz = offsetofend(struct vfio_irq_info, count);
  653. if (copy_from_user(&info, (void __user *)arg, minsz))
  654. return -EFAULT;
  655. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  656. return -EINVAL;
  657. switch (info.index) {
  658. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  659. case VFIO_PCI_REQ_IRQ_INDEX:
  660. break;
  661. case VFIO_PCI_ERR_IRQ_INDEX:
  662. if (pci_is_pcie(vdev->pdev))
  663. break;
  664. /* pass thru to return error */
  665. default:
  666. return -EINVAL;
  667. }
  668. info.flags = VFIO_IRQ_INFO_EVENTFD;
  669. info.count = vfio_pci_get_irq_count(vdev, info.index);
  670. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  671. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  672. VFIO_IRQ_INFO_AUTOMASKED);
  673. else
  674. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  675. return copy_to_user((void __user *)arg, &info, minsz) ?
  676. -EFAULT : 0;
  677. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  678. struct vfio_irq_set hdr;
  679. size_t size;
  680. u8 *data = NULL;
  681. int max, ret = 0;
  682. minsz = offsetofend(struct vfio_irq_set, count);
  683. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  684. return -EFAULT;
  685. if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
  686. hdr.count >= (U32_MAX - hdr.start) ||
  687. hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
  688. VFIO_IRQ_SET_ACTION_TYPE_MASK))
  689. return -EINVAL;
  690. max = vfio_pci_get_irq_count(vdev, hdr.index);
  691. if (hdr.start >= max || hdr.start + hdr.count > max)
  692. return -EINVAL;
  693. switch (hdr.flags & VFIO_IRQ_SET_DATA_TYPE_MASK) {
  694. case VFIO_IRQ_SET_DATA_NONE:
  695. size = 0;
  696. break;
  697. case VFIO_IRQ_SET_DATA_BOOL:
  698. size = sizeof(uint8_t);
  699. break;
  700. case VFIO_IRQ_SET_DATA_EVENTFD:
  701. size = sizeof(int32_t);
  702. break;
  703. default:
  704. return -EINVAL;
  705. }
  706. if (size) {
  707. if (hdr.argsz - minsz < hdr.count * size)
  708. return -EINVAL;
  709. data = memdup_user((void __user *)(arg + minsz),
  710. hdr.count * size);
  711. if (IS_ERR(data))
  712. return PTR_ERR(data);
  713. }
  714. mutex_lock(&vdev->igate);
  715. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  716. hdr.start, hdr.count, data);
  717. mutex_unlock(&vdev->igate);
  718. kfree(data);
  719. return ret;
  720. } else if (cmd == VFIO_DEVICE_RESET) {
  721. return vdev->reset_works ?
  722. pci_try_reset_function(vdev->pdev) : -EINVAL;
  723. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  724. struct vfio_pci_hot_reset_info hdr;
  725. struct vfio_pci_fill_info fill = { 0 };
  726. struct vfio_pci_dependent_device *devices = NULL;
  727. bool slot = false;
  728. int ret = 0;
  729. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  730. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  731. return -EFAULT;
  732. if (hdr.argsz < minsz)
  733. return -EINVAL;
  734. hdr.flags = 0;
  735. /* Can we do a slot or bus reset or neither? */
  736. if (!pci_probe_reset_slot(vdev->pdev->slot))
  737. slot = true;
  738. else if (pci_probe_reset_bus(vdev->pdev->bus))
  739. return -ENODEV;
  740. /* How many devices are affected? */
  741. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  742. vfio_pci_count_devs,
  743. &fill.max, slot);
  744. if (ret)
  745. return ret;
  746. WARN_ON(!fill.max); /* Should always be at least one */
  747. /*
  748. * If there's enough space, fill it now, otherwise return
  749. * -ENOSPC and the number of devices affected.
  750. */
  751. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  752. ret = -ENOSPC;
  753. hdr.count = fill.max;
  754. goto reset_info_exit;
  755. }
  756. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  757. if (!devices)
  758. return -ENOMEM;
  759. fill.devices = devices;
  760. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  761. vfio_pci_fill_devs,
  762. &fill, slot);
  763. /*
  764. * If a device was removed between counting and filling,
  765. * we may come up short of fill.max. If a device was
  766. * added, we'll have a return of -EAGAIN above.
  767. */
  768. if (!ret)
  769. hdr.count = fill.cur;
  770. reset_info_exit:
  771. if (copy_to_user((void __user *)arg, &hdr, minsz))
  772. ret = -EFAULT;
  773. if (!ret) {
  774. if (copy_to_user((void __user *)(arg + minsz), devices,
  775. hdr.count * sizeof(*devices)))
  776. ret = -EFAULT;
  777. }
  778. kfree(devices);
  779. return ret;
  780. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  781. struct vfio_pci_hot_reset hdr;
  782. int32_t *group_fds;
  783. struct vfio_pci_group_entry *groups;
  784. struct vfio_pci_group_info info;
  785. bool slot = false;
  786. int i, count = 0, ret = 0;
  787. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  788. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  789. return -EFAULT;
  790. if (hdr.argsz < minsz || hdr.flags)
  791. return -EINVAL;
  792. /* Can we do a slot or bus reset or neither? */
  793. if (!pci_probe_reset_slot(vdev->pdev->slot))
  794. slot = true;
  795. else if (pci_probe_reset_bus(vdev->pdev->bus))
  796. return -ENODEV;
  797. /*
  798. * We can't let userspace give us an arbitrarily large
  799. * buffer to copy, so verify how many we think there
  800. * could be. Note groups can have multiple devices so
  801. * one group per device is the max.
  802. */
  803. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  804. vfio_pci_count_devs,
  805. &count, slot);
  806. if (ret)
  807. return ret;
  808. /* Somewhere between 1 and count is OK */
  809. if (!hdr.count || hdr.count > count)
  810. return -EINVAL;
  811. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  812. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  813. if (!group_fds || !groups) {
  814. kfree(group_fds);
  815. kfree(groups);
  816. return -ENOMEM;
  817. }
  818. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  819. hdr.count * sizeof(*group_fds))) {
  820. kfree(group_fds);
  821. kfree(groups);
  822. return -EFAULT;
  823. }
  824. /*
  825. * For each group_fd, get the group through the vfio external
  826. * user interface and store the group and iommu ID. This
  827. * ensures the group is held across the reset.
  828. */
  829. for (i = 0; i < hdr.count; i++) {
  830. struct vfio_group *group;
  831. struct fd f = fdget(group_fds[i]);
  832. if (!f.file) {
  833. ret = -EBADF;
  834. break;
  835. }
  836. group = vfio_group_get_external_user(f.file);
  837. fdput(f);
  838. if (IS_ERR(group)) {
  839. ret = PTR_ERR(group);
  840. break;
  841. }
  842. groups[i].group = group;
  843. groups[i].id = vfio_external_user_iommu_id(group);
  844. }
  845. kfree(group_fds);
  846. /* release reference to groups on error */
  847. if (ret)
  848. goto hot_reset_release;
  849. info.count = hdr.count;
  850. info.groups = groups;
  851. /*
  852. * Test whether all the affected devices are contained
  853. * by the set of groups provided by the user.
  854. */
  855. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  856. vfio_pci_validate_devs,
  857. &info, slot);
  858. if (!ret)
  859. /* User has access, do the reset */
  860. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  861. pci_try_reset_bus(vdev->pdev->bus);
  862. hot_reset_release:
  863. for (i--; i >= 0; i--)
  864. vfio_group_put_external_user(groups[i].group);
  865. kfree(groups);
  866. return ret;
  867. }
  868. return -ENOTTY;
  869. }
  870. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  871. size_t count, loff_t *ppos, bool iswrite)
  872. {
  873. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  874. struct vfio_pci_device *vdev = device_data;
  875. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  876. return -EINVAL;
  877. switch (index) {
  878. case VFIO_PCI_CONFIG_REGION_INDEX:
  879. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  880. case VFIO_PCI_ROM_REGION_INDEX:
  881. if (iswrite)
  882. return -EINVAL;
  883. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  884. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  885. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  886. case VFIO_PCI_VGA_REGION_INDEX:
  887. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  888. default:
  889. index -= VFIO_PCI_NUM_REGIONS;
  890. return vdev->region[index].ops->rw(vdev, buf,
  891. count, ppos, iswrite);
  892. }
  893. return -EINVAL;
  894. }
  895. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  896. size_t count, loff_t *ppos)
  897. {
  898. if (!count)
  899. return 0;
  900. return vfio_pci_rw(device_data, buf, count, ppos, false);
  901. }
  902. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  903. size_t count, loff_t *ppos)
  904. {
  905. if (!count)
  906. return 0;
  907. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  908. }
  909. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  910. {
  911. struct vfio_pci_device *vdev = device_data;
  912. struct pci_dev *pdev = vdev->pdev;
  913. unsigned int index;
  914. u64 phys_len, req_len, pgoff, req_start;
  915. int ret;
  916. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  917. if (vma->vm_end < vma->vm_start)
  918. return -EINVAL;
  919. if ((vma->vm_flags & VM_SHARED) == 0)
  920. return -EINVAL;
  921. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  922. return -EINVAL;
  923. if (!vdev->bar_mmap_supported[index])
  924. return -EINVAL;
  925. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  926. req_len = vma->vm_end - vma->vm_start;
  927. pgoff = vma->vm_pgoff &
  928. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  929. req_start = pgoff << PAGE_SHIFT;
  930. if (req_start + req_len > phys_len)
  931. return -EINVAL;
  932. if (index == vdev->msix_bar) {
  933. /*
  934. * Disallow mmaps overlapping the MSI-X table; users don't
  935. * get to touch this directly. We could find somewhere
  936. * else to map the overlap, but page granularity is only
  937. * a recommendation, not a requirement, so the user needs
  938. * to know which bits are real. Requiring them to mmap
  939. * around the table makes that clear.
  940. */
  941. /* If neither entirely above nor below, then it overlaps */
  942. if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
  943. req_start + req_len <= vdev->msix_offset))
  944. return -EINVAL;
  945. }
  946. /*
  947. * Even though we don't make use of the barmap for the mmap,
  948. * we need to request the region and the barmap tracks that.
  949. */
  950. if (!vdev->barmap[index]) {
  951. ret = pci_request_selected_regions(pdev,
  952. 1 << index, "vfio-pci");
  953. if (ret)
  954. return ret;
  955. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  956. if (!vdev->barmap[index]) {
  957. pci_release_selected_regions(pdev, 1 << index);
  958. return -ENOMEM;
  959. }
  960. }
  961. vma->vm_private_data = vdev;
  962. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  963. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  964. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  965. req_len, vma->vm_page_prot);
  966. }
  967. static void vfio_pci_request(void *device_data, unsigned int count)
  968. {
  969. struct vfio_pci_device *vdev = device_data;
  970. mutex_lock(&vdev->igate);
  971. if (vdev->req_trigger) {
  972. if (!(count % 10))
  973. dev_notice_ratelimited(&vdev->pdev->dev,
  974. "Relaying device request to user (#%u)\n",
  975. count);
  976. eventfd_signal(vdev->req_trigger, 1);
  977. } else if (count == 0) {
  978. dev_warn(&vdev->pdev->dev,
  979. "No device request channel registered, blocked until released by user\n");
  980. }
  981. mutex_unlock(&vdev->igate);
  982. }
  983. static const struct vfio_device_ops vfio_pci_ops = {
  984. .name = "vfio-pci",
  985. .open = vfio_pci_open,
  986. .release = vfio_pci_release,
  987. .ioctl = vfio_pci_ioctl,
  988. .read = vfio_pci_read,
  989. .write = vfio_pci_write,
  990. .mmap = vfio_pci_mmap,
  991. .request = vfio_pci_request,
  992. };
  993. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  994. {
  995. struct vfio_pci_device *vdev;
  996. struct iommu_group *group;
  997. int ret;
  998. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  999. return -EINVAL;
  1000. group = vfio_iommu_group_get(&pdev->dev);
  1001. if (!group)
  1002. return -EINVAL;
  1003. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  1004. if (!vdev) {
  1005. vfio_iommu_group_put(group, &pdev->dev);
  1006. return -ENOMEM;
  1007. }
  1008. vdev->pdev = pdev;
  1009. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  1010. mutex_init(&vdev->igate);
  1011. spin_lock_init(&vdev->irqlock);
  1012. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  1013. if (ret) {
  1014. vfio_iommu_group_put(group, &pdev->dev);
  1015. kfree(vdev);
  1016. return ret;
  1017. }
  1018. if (vfio_pci_is_vga(pdev)) {
  1019. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  1020. vga_set_legacy_decoding(pdev,
  1021. vfio_pci_set_vga_decode(vdev, false));
  1022. }
  1023. if (!disable_idle_d3) {
  1024. /*
  1025. * pci-core sets the device power state to an unknown value at
  1026. * bootup and after being removed from a driver. The only
  1027. * transition it allows from this unknown state is to D0, which
  1028. * typically happens when a driver calls pci_enable_device().
  1029. * We're not ready to enable the device yet, but we do want to
  1030. * be able to get to D3. Therefore first do a D0 transition
  1031. * before going to D3.
  1032. */
  1033. pci_set_power_state(pdev, PCI_D0);
  1034. pci_set_power_state(pdev, PCI_D3hot);
  1035. }
  1036. return ret;
  1037. }
  1038. static void vfio_pci_remove(struct pci_dev *pdev)
  1039. {
  1040. struct vfio_pci_device *vdev;
  1041. vdev = vfio_del_group_dev(&pdev->dev);
  1042. if (!vdev)
  1043. return;
  1044. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  1045. kfree(vdev->region);
  1046. kfree(vdev);
  1047. if (vfio_pci_is_vga(pdev)) {
  1048. vga_client_register(pdev, NULL, NULL, NULL);
  1049. vga_set_legacy_decoding(pdev,
  1050. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  1051. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  1052. }
  1053. if (!disable_idle_d3)
  1054. pci_set_power_state(pdev, PCI_D0);
  1055. }
  1056. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  1057. pci_channel_state_t state)
  1058. {
  1059. struct vfio_pci_device *vdev;
  1060. struct vfio_device *device;
  1061. device = vfio_device_get_from_dev(&pdev->dev);
  1062. if (device == NULL)
  1063. return PCI_ERS_RESULT_DISCONNECT;
  1064. vdev = vfio_device_data(device);
  1065. if (vdev == NULL) {
  1066. vfio_device_put(device);
  1067. return PCI_ERS_RESULT_DISCONNECT;
  1068. }
  1069. mutex_lock(&vdev->igate);
  1070. if (vdev->err_trigger)
  1071. eventfd_signal(vdev->err_trigger, 1);
  1072. mutex_unlock(&vdev->igate);
  1073. vfio_device_put(device);
  1074. return PCI_ERS_RESULT_CAN_RECOVER;
  1075. }
  1076. static const struct pci_error_handlers vfio_err_handlers = {
  1077. .error_detected = vfio_pci_aer_err_detected,
  1078. };
  1079. static struct pci_driver vfio_pci_driver = {
  1080. .name = "vfio-pci",
  1081. .id_table = NULL, /* only dynamic ids */
  1082. .probe = vfio_pci_probe,
  1083. .remove = vfio_pci_remove,
  1084. .err_handler = &vfio_err_handlers,
  1085. };
  1086. struct vfio_devices {
  1087. struct vfio_device **devices;
  1088. int cur_index;
  1089. int max_index;
  1090. };
  1091. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1092. {
  1093. struct vfio_devices *devs = data;
  1094. struct vfio_device *device;
  1095. if (devs->cur_index == devs->max_index)
  1096. return -ENOSPC;
  1097. device = vfio_device_get_from_dev(&pdev->dev);
  1098. if (!device)
  1099. return -EINVAL;
  1100. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1101. vfio_device_put(device);
  1102. return -EBUSY;
  1103. }
  1104. devs->devices[devs->cur_index++] = device;
  1105. return 0;
  1106. }
  1107. /*
  1108. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1109. * this device that are needs_reset and all of the affected devices are unused
  1110. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1111. * prevent device opens and concurrent bus reset attempts. We prevent device
  1112. * unbinds by acquiring and holding a reference to the vfio_device.
  1113. *
  1114. * NB: vfio-core considers a group to be viable even if some devices are
  1115. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1116. * to be bound to vfio_pci since that's the only way we can be sure they
  1117. * stay put.
  1118. */
  1119. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1120. {
  1121. struct vfio_devices devs = { .cur_index = 0 };
  1122. int i = 0, ret = -EINVAL;
  1123. bool needs_reset = false, slot = false;
  1124. struct vfio_pci_device *tmp;
  1125. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1126. slot = true;
  1127. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1128. return;
  1129. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1130. &i, slot) || !i)
  1131. return;
  1132. devs.max_index = i;
  1133. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1134. if (!devs.devices)
  1135. return;
  1136. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1137. vfio_pci_get_devs, &devs, slot))
  1138. goto put_devs;
  1139. for (i = 0; i < devs.cur_index; i++) {
  1140. tmp = vfio_device_data(devs.devices[i]);
  1141. if (tmp->needs_reset)
  1142. needs_reset = true;
  1143. if (tmp->refcnt)
  1144. goto put_devs;
  1145. }
  1146. if (needs_reset)
  1147. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1148. pci_try_reset_bus(vdev->pdev->bus);
  1149. put_devs:
  1150. for (i = 0; i < devs.cur_index; i++) {
  1151. tmp = vfio_device_data(devs.devices[i]);
  1152. if (!ret)
  1153. tmp->needs_reset = false;
  1154. if (!tmp->refcnt && !disable_idle_d3)
  1155. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1156. vfio_device_put(devs.devices[i]);
  1157. }
  1158. kfree(devs.devices);
  1159. }
  1160. static void __exit vfio_pci_cleanup(void)
  1161. {
  1162. pci_unregister_driver(&vfio_pci_driver);
  1163. vfio_pci_uninit_perm_bits();
  1164. }
  1165. static void __init vfio_pci_fill_ids(void)
  1166. {
  1167. char *p, *id;
  1168. int rc;
  1169. /* no ids passed actually */
  1170. if (ids[0] == '\0')
  1171. return;
  1172. /* add ids specified in the module parameter */
  1173. p = ids;
  1174. while ((id = strsep(&p, ","))) {
  1175. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1176. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1177. int fields;
  1178. if (!strlen(id))
  1179. continue;
  1180. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1181. &vendor, &device, &subvendor, &subdevice,
  1182. &class, &class_mask);
  1183. if (fields < 2) {
  1184. pr_warn("invalid id string \"%s\"\n", id);
  1185. continue;
  1186. }
  1187. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1188. subvendor, subdevice, class, class_mask, 0);
  1189. if (rc)
  1190. pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
  1191. vendor, device, subvendor, subdevice,
  1192. class, class_mask, rc);
  1193. else
  1194. pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
  1195. vendor, device, subvendor, subdevice,
  1196. class, class_mask);
  1197. }
  1198. }
  1199. static int __init vfio_pci_init(void)
  1200. {
  1201. int ret;
  1202. /* Allocate shared config space permision data used by all devices */
  1203. ret = vfio_pci_init_perm_bits();
  1204. if (ret)
  1205. return ret;
  1206. /* Register and scan for devices */
  1207. ret = pci_register_driver(&vfio_pci_driver);
  1208. if (ret)
  1209. goto out_driver;
  1210. vfio_pci_fill_ids();
  1211. return 0;
  1212. out_driver:
  1213. vfio_pci_uninit_perm_bits();
  1214. return ret;
  1215. }
  1216. module_init(vfio_pci_init);
  1217. module_exit(vfio_pci_cleanup);
  1218. MODULE_VERSION(DRIVER_VERSION);
  1219. MODULE_LICENSE("GPL v2");
  1220. MODULE_AUTHOR(DRIVER_AUTHOR);
  1221. MODULE_DESCRIPTION(DRIVER_DESC);