otg_fsm.c 19 KB

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  1. /*
  2. * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
  3. *
  4. * Copyright (C) 2014 Freescale Semiconductor, Inc.
  5. *
  6. * Author: Jun Li
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. /*
  13. * This file mainly handles OTG fsm, it includes OTG fsm operations
  14. * for HNP and SRP.
  15. *
  16. * TODO List
  17. * - ADP
  18. * - OTG test device
  19. */
  20. #include <linux/usb/otg.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/hcd.h>
  23. #include <linux/usb/chipidea.h>
  24. #include <linux/regulator/consumer.h>
  25. #include "ci.h"
  26. #include "bits.h"
  27. #include "otg.h"
  28. #include "otg_fsm.h"
  29. /* Add for otg: interact with user space app */
  30. static ssize_t
  31. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  32. {
  33. char *next;
  34. unsigned size, t;
  35. struct ci_hdrc *ci = dev_get_drvdata(dev);
  36. next = buf;
  37. size = PAGE_SIZE;
  38. t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req);
  39. size -= t;
  40. next += t;
  41. return PAGE_SIZE - size;
  42. }
  43. static ssize_t
  44. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  45. const char *buf, size_t count)
  46. {
  47. struct ci_hdrc *ci = dev_get_drvdata(dev);
  48. if (count > 2)
  49. return -1;
  50. mutex_lock(&ci->fsm.lock);
  51. if (buf[0] == '0') {
  52. ci->fsm.a_bus_req = 0;
  53. } else if (buf[0] == '1') {
  54. /* If a_bus_drop is TRUE, a_bus_req can't be set */
  55. if (ci->fsm.a_bus_drop) {
  56. mutex_unlock(&ci->fsm.lock);
  57. return count;
  58. }
  59. ci->fsm.a_bus_req = 1;
  60. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  61. ci->gadget.host_request_flag = 1;
  62. mutex_unlock(&ci->fsm.lock);
  63. return count;
  64. }
  65. }
  66. ci_otg_queue_work(ci);
  67. mutex_unlock(&ci->fsm.lock);
  68. return count;
  69. }
  70. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req);
  71. static ssize_t
  72. get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
  73. {
  74. char *next;
  75. unsigned size, t;
  76. struct ci_hdrc *ci = dev_get_drvdata(dev);
  77. next = buf;
  78. size = PAGE_SIZE;
  79. t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop);
  80. size -= t;
  81. next += t;
  82. return PAGE_SIZE - size;
  83. }
  84. static ssize_t
  85. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  86. const char *buf, size_t count)
  87. {
  88. struct ci_hdrc *ci = dev_get_drvdata(dev);
  89. if (count > 2)
  90. return -1;
  91. mutex_lock(&ci->fsm.lock);
  92. if (buf[0] == '0') {
  93. ci->fsm.a_bus_drop = 0;
  94. } else if (buf[0] == '1') {
  95. ci->fsm.a_bus_drop = 1;
  96. ci->fsm.a_bus_req = 0;
  97. }
  98. ci_otg_queue_work(ci);
  99. mutex_unlock(&ci->fsm.lock);
  100. return count;
  101. }
  102. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop,
  103. set_a_bus_drop);
  104. static ssize_t
  105. get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  106. {
  107. char *next;
  108. unsigned size, t;
  109. struct ci_hdrc *ci = dev_get_drvdata(dev);
  110. next = buf;
  111. size = PAGE_SIZE;
  112. t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req);
  113. size -= t;
  114. next += t;
  115. return PAGE_SIZE - size;
  116. }
  117. static ssize_t
  118. set_b_bus_req(struct device *dev, struct device_attribute *attr,
  119. const char *buf, size_t count)
  120. {
  121. struct ci_hdrc *ci = dev_get_drvdata(dev);
  122. if (count > 2)
  123. return -1;
  124. mutex_lock(&ci->fsm.lock);
  125. if (buf[0] == '0')
  126. ci->fsm.b_bus_req = 0;
  127. else if (buf[0] == '1') {
  128. ci->fsm.b_bus_req = 1;
  129. if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  130. ci->gadget.host_request_flag = 1;
  131. mutex_unlock(&ci->fsm.lock);
  132. return count;
  133. }
  134. }
  135. ci_otg_queue_work(ci);
  136. mutex_unlock(&ci->fsm.lock);
  137. return count;
  138. }
  139. static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req);
  140. static ssize_t
  141. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  142. const char *buf, size_t count)
  143. {
  144. struct ci_hdrc *ci = dev_get_drvdata(dev);
  145. if (count > 2)
  146. return -1;
  147. mutex_lock(&ci->fsm.lock);
  148. if (buf[0] == '1')
  149. ci->fsm.a_clr_err = 1;
  150. ci_otg_queue_work(ci);
  151. mutex_unlock(&ci->fsm.lock);
  152. return count;
  153. }
  154. static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
  155. static struct attribute *inputs_attrs[] = {
  156. &dev_attr_a_bus_req.attr,
  157. &dev_attr_a_bus_drop.attr,
  158. &dev_attr_b_bus_req.attr,
  159. &dev_attr_a_clr_err.attr,
  160. NULL,
  161. };
  162. static struct attribute_group inputs_attr_group = {
  163. .name = "inputs",
  164. .attrs = inputs_attrs,
  165. };
  166. /*
  167. * Keep this list in the same order as timers indexed
  168. * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
  169. */
  170. static unsigned otg_timer_ms[] = {
  171. TA_WAIT_VRISE,
  172. TA_WAIT_VFALL,
  173. TA_WAIT_BCON,
  174. TA_AIDL_BDIS,
  175. TB_ASE0_BRST,
  176. TA_BIDL_ADIS,
  177. TB_AIDL_BDIS,
  178. TB_SE0_SRP,
  179. TB_SRP_FAIL,
  180. 0,
  181. TB_DATA_PLS,
  182. TB_SSEND_SRP,
  183. };
  184. /*
  185. * Add timer to active timer list
  186. */
  187. static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
  188. {
  189. unsigned long flags, timer_sec, timer_nsec;
  190. if (t >= NUM_OTG_FSM_TIMERS)
  191. return;
  192. spin_lock_irqsave(&ci->lock, flags);
  193. timer_sec = otg_timer_ms[t] / MSEC_PER_SEC;
  194. timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC;
  195. ci->hr_timeouts[t] = ktime_add(ktime_get(),
  196. ktime_set(timer_sec, timer_nsec));
  197. ci->enabled_otg_timer_bits |= (1 << t);
  198. if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) ||
  199. (ci->hr_timeouts[ci->next_otg_timer].tv64 >
  200. ci->hr_timeouts[t].tv64)) {
  201. ci->next_otg_timer = t;
  202. hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
  203. ci->hr_timeouts[t], NSEC_PER_MSEC,
  204. HRTIMER_MODE_ABS);
  205. }
  206. spin_unlock_irqrestore(&ci->lock, flags);
  207. }
  208. /*
  209. * Remove timer from active timer list
  210. */
  211. static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
  212. {
  213. unsigned long flags, enabled_timer_bits;
  214. enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
  215. if ((t >= NUM_OTG_FSM_TIMERS) ||
  216. !(ci->enabled_otg_timer_bits & (1 << t)))
  217. return;
  218. spin_lock_irqsave(&ci->lock, flags);
  219. ci->enabled_otg_timer_bits &= ~(1 << t);
  220. if (ci->next_otg_timer == t) {
  221. if (ci->enabled_otg_timer_bits == 0) {
  222. /* No enabled timers after delete it */
  223. hrtimer_cancel(&ci->otg_fsm_hrtimer);
  224. ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
  225. } else {
  226. /* Find the next timer */
  227. enabled_timer_bits = ci->enabled_otg_timer_bits;
  228. for_each_set_bit(cur_timer, &enabled_timer_bits,
  229. NUM_OTG_FSM_TIMERS) {
  230. if ((next_timer == NUM_OTG_FSM_TIMERS) ||
  231. (ci->hr_timeouts[next_timer].tv64 <
  232. ci->hr_timeouts[cur_timer].tv64))
  233. next_timer = cur_timer;
  234. }
  235. }
  236. }
  237. if (next_timer != NUM_OTG_FSM_TIMERS) {
  238. ci->next_otg_timer = next_timer;
  239. hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
  240. ci->hr_timeouts[next_timer], NSEC_PER_MSEC,
  241. HRTIMER_MODE_ABS);
  242. }
  243. spin_unlock_irqrestore(&ci->lock, flags);
  244. }
  245. /* OTG FSM timer handlers */
  246. static int a_wait_vrise_tmout(struct ci_hdrc *ci)
  247. {
  248. ci->fsm.a_wait_vrise_tmout = 1;
  249. return 0;
  250. }
  251. static int a_wait_vfall_tmout(struct ci_hdrc *ci)
  252. {
  253. ci->fsm.a_wait_vfall_tmout = 1;
  254. return 0;
  255. }
  256. static int a_wait_bcon_tmout(struct ci_hdrc *ci)
  257. {
  258. ci->fsm.a_wait_bcon_tmout = 1;
  259. return 0;
  260. }
  261. static int a_aidl_bdis_tmout(struct ci_hdrc *ci)
  262. {
  263. ci->fsm.a_aidl_bdis_tmout = 1;
  264. return 0;
  265. }
  266. static int b_ase0_brst_tmout(struct ci_hdrc *ci)
  267. {
  268. ci->fsm.b_ase0_brst_tmout = 1;
  269. return 0;
  270. }
  271. static int a_bidl_adis_tmout(struct ci_hdrc *ci)
  272. {
  273. ci->fsm.a_bidl_adis_tmout = 1;
  274. return 0;
  275. }
  276. static int b_aidl_bdis_tmout(struct ci_hdrc *ci)
  277. {
  278. ci->fsm.a_bus_suspend = 1;
  279. return 0;
  280. }
  281. static int b_se0_srp_tmout(struct ci_hdrc *ci)
  282. {
  283. ci->fsm.b_se0_srp = 1;
  284. return 0;
  285. }
  286. static int b_srp_fail_tmout(struct ci_hdrc *ci)
  287. {
  288. ci->fsm.b_srp_done = 1;
  289. return 1;
  290. }
  291. static int b_data_pls_tmout(struct ci_hdrc *ci)
  292. {
  293. ci->fsm.b_srp_done = 1;
  294. ci->fsm.b_bus_req = 0;
  295. if (ci->fsm.power_up)
  296. ci->fsm.power_up = 0;
  297. hw_write_otgsc(ci, OTGSC_HABA, 0);
  298. pm_runtime_put(ci->dev);
  299. return 0;
  300. }
  301. static int b_ssend_srp_tmout(struct ci_hdrc *ci)
  302. {
  303. ci->fsm.b_ssend_srp = 1;
  304. /* only vbus fall below B_sess_vld in b_idle state */
  305. if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
  306. return 0;
  307. else
  308. return 1;
  309. }
  310. /*
  311. * Keep this list in the same order as timers indexed
  312. * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
  313. */
  314. static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
  315. a_wait_vrise_tmout, /* A_WAIT_VRISE */
  316. a_wait_vfall_tmout, /* A_WAIT_VFALL */
  317. a_wait_bcon_tmout, /* A_WAIT_BCON */
  318. a_aidl_bdis_tmout, /* A_AIDL_BDIS */
  319. b_ase0_brst_tmout, /* B_ASE0_BRST */
  320. a_bidl_adis_tmout, /* A_BIDL_ADIS */
  321. b_aidl_bdis_tmout, /* B_AIDL_BDIS */
  322. b_se0_srp_tmout, /* B_SE0_SRP */
  323. b_srp_fail_tmout, /* B_SRP_FAIL */
  324. NULL, /* A_WAIT_ENUM */
  325. b_data_pls_tmout, /* B_DATA_PLS */
  326. b_ssend_srp_tmout, /* B_SSEND_SRP */
  327. };
  328. /*
  329. * Enable the next nearest enabled timer if have
  330. */
  331. static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t)
  332. {
  333. struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer);
  334. ktime_t now, *timeout;
  335. unsigned long enabled_timer_bits;
  336. unsigned long flags;
  337. enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
  338. int ret = -EINVAL;
  339. spin_lock_irqsave(&ci->lock, flags);
  340. enabled_timer_bits = ci->enabled_otg_timer_bits;
  341. ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
  342. now = ktime_get();
  343. for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) {
  344. if (now.tv64 >= ci->hr_timeouts[cur_timer].tv64) {
  345. ci->enabled_otg_timer_bits &= ~(1 << cur_timer);
  346. if (otg_timer_handlers[cur_timer])
  347. ret = otg_timer_handlers[cur_timer](ci);
  348. } else {
  349. if ((next_timer == NUM_OTG_FSM_TIMERS) ||
  350. (ci->hr_timeouts[cur_timer].tv64 <
  351. ci->hr_timeouts[next_timer].tv64))
  352. next_timer = cur_timer;
  353. }
  354. }
  355. /* Enable the next nearest timer */
  356. if (next_timer < NUM_OTG_FSM_TIMERS) {
  357. timeout = &ci->hr_timeouts[next_timer];
  358. hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout,
  359. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  360. ci->next_otg_timer = next_timer;
  361. }
  362. spin_unlock_irqrestore(&ci->lock, flags);
  363. if (!ret)
  364. ci_otg_queue_work(ci);
  365. return HRTIMER_NORESTART;
  366. }
  367. /* Initialize timers */
  368. static int ci_otg_init_timers(struct ci_hdrc *ci)
  369. {
  370. hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  371. ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func;
  372. return 0;
  373. }
  374. /* -------------------------------------------------------------*/
  375. /* Operations that will be called from OTG Finite State Machine */
  376. /* -------------------------------------------------------------*/
  377. static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  378. {
  379. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  380. if (t < NUM_OTG_FSM_TIMERS)
  381. ci_otg_add_timer(ci, t);
  382. return;
  383. }
  384. static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  385. {
  386. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  387. if (t < NUM_OTG_FSM_TIMERS)
  388. ci_otg_del_timer(ci, t);
  389. return;
  390. }
  391. /*
  392. * A-device drive vbus: turn on vbus regulator and enable port power
  393. * Data pulse irq should be disabled while vbus is on.
  394. */
  395. static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
  396. {
  397. int ret;
  398. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  399. if (on) {
  400. /* Enable power power */
  401. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
  402. PORTSC_PP);
  403. if (ci->platdata->reg_vbus) {
  404. ret = regulator_enable(ci->platdata->reg_vbus);
  405. if (ret) {
  406. dev_err(ci->dev,
  407. "Failed to enable vbus regulator, ret=%d\n",
  408. ret);
  409. return;
  410. }
  411. }
  412. /* Disable data pulse irq */
  413. hw_write_otgsc(ci, OTGSC_DPIE, 0);
  414. fsm->a_srp_det = 0;
  415. fsm->power_up = 0;
  416. } else {
  417. if (ci->platdata->reg_vbus)
  418. regulator_disable(ci->platdata->reg_vbus);
  419. fsm->a_bus_drop = 1;
  420. fsm->a_bus_req = 0;
  421. }
  422. }
  423. /*
  424. * Control data line by Run Stop bit.
  425. */
  426. static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
  427. {
  428. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  429. if (on)
  430. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  431. else
  432. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  433. }
  434. /*
  435. * Generate SOF by host.
  436. * In host mode, controller will automatically send SOF.
  437. * Suspend will block the data on the port.
  438. *
  439. * This is controlled through usbcore by usb autosuspend,
  440. * so the usb device class driver need support autosuspend,
  441. * otherwise the bus suspend will not happen.
  442. */
  443. static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
  444. {
  445. struct usb_device *udev;
  446. if (!fsm->otg->host)
  447. return;
  448. udev = usb_hub_find_child(fsm->otg->host->root_hub, 1);
  449. if (!udev)
  450. return;
  451. if (on) {
  452. usb_disable_autosuspend(udev);
  453. } else {
  454. pm_runtime_set_autosuspend_delay(&udev->dev, 0);
  455. usb_enable_autosuspend(udev);
  456. }
  457. }
  458. /*
  459. * Start SRP pulsing by data-line pulsing,
  460. * no v-bus pulsing followed
  461. */
  462. static void ci_otg_start_pulse(struct otg_fsm *fsm)
  463. {
  464. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  465. /* Hardware Assistant Data pulse */
  466. hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
  467. pm_runtime_get(ci->dev);
  468. ci_otg_add_timer(ci, B_DATA_PLS);
  469. }
  470. static int ci_otg_start_host(struct otg_fsm *fsm, int on)
  471. {
  472. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  473. if (on) {
  474. ci_role_stop(ci);
  475. ci_role_start(ci, CI_ROLE_HOST);
  476. } else {
  477. ci_role_stop(ci);
  478. ci_role_start(ci, CI_ROLE_GADGET);
  479. }
  480. return 0;
  481. }
  482. static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
  483. {
  484. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  485. if (on)
  486. usb_gadget_vbus_connect(&ci->gadget);
  487. else
  488. usb_gadget_vbus_disconnect(&ci->gadget);
  489. return 0;
  490. }
  491. static struct otg_fsm_ops ci_otg_ops = {
  492. .drv_vbus = ci_otg_drv_vbus,
  493. .loc_conn = ci_otg_loc_conn,
  494. .loc_sof = ci_otg_loc_sof,
  495. .start_pulse = ci_otg_start_pulse,
  496. .add_timer = ci_otg_fsm_add_timer,
  497. .del_timer = ci_otg_fsm_del_timer,
  498. .start_host = ci_otg_start_host,
  499. .start_gadget = ci_otg_start_gadget,
  500. };
  501. int ci_otg_fsm_work(struct ci_hdrc *ci)
  502. {
  503. /*
  504. * Don't do fsm transition for B device
  505. * when there is no gadget class driver
  506. */
  507. if (ci->fsm.id && !(ci->driver) &&
  508. ci->fsm.otg->state < OTG_STATE_A_IDLE)
  509. return 0;
  510. pm_runtime_get_sync(ci->dev);
  511. if (otg_statemachine(&ci->fsm)) {
  512. if (ci->fsm.otg->state == OTG_STATE_A_IDLE) {
  513. /*
  514. * Further state change for cases:
  515. * a_idle to b_idle; or
  516. * a_idle to a_wait_vrise due to ID change(1->0), so
  517. * B-dev becomes A-dev can try to start new session
  518. * consequently; or
  519. * a_idle to a_wait_vrise when power up
  520. */
  521. if ((ci->fsm.id) || (ci->id_event) ||
  522. (ci->fsm.power_up)) {
  523. ci_otg_queue_work(ci);
  524. } else {
  525. /* Enable data pulse irq */
  526. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS |
  527. PORTSC_PP, 0);
  528. hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
  529. hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
  530. }
  531. if (ci->id_event)
  532. ci->id_event = false;
  533. } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
  534. if (ci->fsm.b_sess_vld) {
  535. ci->fsm.power_up = 0;
  536. /*
  537. * Further transite to b_periphearl state
  538. * when register gadget driver with vbus on
  539. */
  540. ci_otg_queue_work(ci);
  541. }
  542. } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) {
  543. pm_runtime_mark_last_busy(ci->dev);
  544. pm_runtime_put_autosuspend(ci->dev);
  545. return 0;
  546. }
  547. }
  548. pm_runtime_put_sync(ci->dev);
  549. return 0;
  550. }
  551. /*
  552. * Update fsm variables in each state if catching expected interrupts,
  553. * called by otg fsm isr.
  554. */
  555. static void ci_otg_fsm_event(struct ci_hdrc *ci)
  556. {
  557. u32 intr_sts, otg_bsess_vld, port_conn;
  558. struct otg_fsm *fsm = &ci->fsm;
  559. intr_sts = hw_read_intr_status(ci);
  560. otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV);
  561. port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS);
  562. switch (ci->fsm.otg->state) {
  563. case OTG_STATE_A_WAIT_BCON:
  564. if (port_conn) {
  565. fsm->b_conn = 1;
  566. fsm->a_bus_req = 1;
  567. ci_otg_queue_work(ci);
  568. }
  569. break;
  570. case OTG_STATE_B_IDLE:
  571. if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) {
  572. fsm->b_sess_vld = 1;
  573. ci_otg_queue_work(ci);
  574. }
  575. break;
  576. case OTG_STATE_B_PERIPHERAL:
  577. if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
  578. ci_otg_add_timer(ci, B_AIDL_BDIS);
  579. } else if (intr_sts & USBi_PCI) {
  580. ci_otg_del_timer(ci, B_AIDL_BDIS);
  581. if (fsm->a_bus_suspend == 1)
  582. fsm->a_bus_suspend = 0;
  583. }
  584. break;
  585. case OTG_STATE_B_HOST:
  586. if ((intr_sts & USBi_PCI) && !port_conn) {
  587. fsm->a_conn = 0;
  588. fsm->b_bus_req = 0;
  589. ci_otg_queue_work(ci);
  590. }
  591. break;
  592. case OTG_STATE_A_PERIPHERAL:
  593. if (intr_sts & USBi_SLI) {
  594. fsm->b_bus_suspend = 1;
  595. /*
  596. * Init a timer to know how long this suspend
  597. * will continue, if time out, indicates B no longer
  598. * wants to be host role
  599. */
  600. ci_otg_add_timer(ci, A_BIDL_ADIS);
  601. }
  602. if (intr_sts & USBi_URI)
  603. ci_otg_del_timer(ci, A_BIDL_ADIS);
  604. if (intr_sts & USBi_PCI) {
  605. if (fsm->b_bus_suspend == 1) {
  606. ci_otg_del_timer(ci, A_BIDL_ADIS);
  607. fsm->b_bus_suspend = 0;
  608. }
  609. }
  610. break;
  611. case OTG_STATE_A_SUSPEND:
  612. if ((intr_sts & USBi_PCI) && !port_conn) {
  613. fsm->b_conn = 0;
  614. /* if gadget driver is binded */
  615. if (ci->driver) {
  616. /* A device to be peripheral mode */
  617. ci->gadget.is_a_peripheral = 1;
  618. }
  619. ci_otg_queue_work(ci);
  620. }
  621. break;
  622. case OTG_STATE_A_HOST:
  623. if ((intr_sts & USBi_PCI) && !port_conn) {
  624. fsm->b_conn = 0;
  625. ci_otg_queue_work(ci);
  626. }
  627. break;
  628. case OTG_STATE_B_WAIT_ACON:
  629. if ((intr_sts & USBi_PCI) && port_conn) {
  630. fsm->a_conn = 1;
  631. ci_otg_queue_work(ci);
  632. }
  633. break;
  634. default:
  635. break;
  636. }
  637. }
  638. /*
  639. * ci_otg_irq - otg fsm related irq handling
  640. * and also update otg fsm variable by monitoring usb host and udc
  641. * state change interrupts.
  642. * @ci: ci_hdrc
  643. */
  644. irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
  645. {
  646. irqreturn_t retval = IRQ_NONE;
  647. u32 otgsc, otg_int_src = 0;
  648. struct otg_fsm *fsm = &ci->fsm;
  649. otgsc = hw_read_otgsc(ci, ~0);
  650. otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8);
  651. fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
  652. if (otg_int_src) {
  653. if (otg_int_src & OTGSC_DPIS) {
  654. hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
  655. fsm->a_srp_det = 1;
  656. fsm->a_bus_drop = 0;
  657. } else if (otg_int_src & OTGSC_IDIS) {
  658. hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
  659. if (fsm->id == 0) {
  660. fsm->a_bus_drop = 0;
  661. fsm->a_bus_req = 1;
  662. ci->id_event = true;
  663. }
  664. } else if (otg_int_src & OTGSC_BSVIS) {
  665. hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
  666. if (otgsc & OTGSC_BSV) {
  667. fsm->b_sess_vld = 1;
  668. ci_otg_del_timer(ci, B_SSEND_SRP);
  669. ci_otg_del_timer(ci, B_SRP_FAIL);
  670. fsm->b_ssend_srp = 0;
  671. } else {
  672. fsm->b_sess_vld = 0;
  673. if (fsm->id)
  674. ci_otg_add_timer(ci, B_SSEND_SRP);
  675. }
  676. } else if (otg_int_src & OTGSC_AVVIS) {
  677. hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS);
  678. if (otgsc & OTGSC_AVV) {
  679. fsm->a_vbus_vld = 1;
  680. } else {
  681. fsm->a_vbus_vld = 0;
  682. fsm->b_conn = 0;
  683. }
  684. }
  685. ci_otg_queue_work(ci);
  686. return IRQ_HANDLED;
  687. }
  688. ci_otg_fsm_event(ci);
  689. return retval;
  690. }
  691. void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
  692. {
  693. ci_otg_queue_work(ci);
  694. }
  695. int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
  696. {
  697. int retval = 0;
  698. if (ci->phy)
  699. ci->otg.phy = ci->phy;
  700. else
  701. ci->otg.usb_phy = ci->usb_phy;
  702. ci->otg.gadget = &ci->gadget;
  703. ci->fsm.otg = &ci->otg;
  704. ci->fsm.power_up = 1;
  705. ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
  706. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  707. ci->fsm.ops = &ci_otg_ops;
  708. ci->gadget.hnp_polling_support = 1;
  709. ci->fsm.host_req_flag = devm_kzalloc(ci->dev, 1, GFP_KERNEL);
  710. if (!ci->fsm.host_req_flag)
  711. return -ENOMEM;
  712. mutex_init(&ci->fsm.lock);
  713. retval = ci_otg_init_timers(ci);
  714. if (retval) {
  715. dev_err(ci->dev, "Couldn't init OTG timers\n");
  716. return retval;
  717. }
  718. ci->enabled_otg_timer_bits = 0;
  719. ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
  720. retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
  721. if (retval < 0) {
  722. dev_dbg(ci->dev,
  723. "Can't register sysfs attr group: %d\n", retval);
  724. return retval;
  725. }
  726. /* Enable A vbus valid irq */
  727. hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
  728. if (ci->fsm.id) {
  729. ci->fsm.b_ssend_srp =
  730. hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
  731. ci->fsm.b_sess_vld =
  732. hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
  733. /* Enable BSV irq */
  734. hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
  735. }
  736. return 0;
  737. }
  738. void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci)
  739. {
  740. sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group);
  741. }