otg.c 5.5 KB

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  1. /*
  2. * otg.c - ChipIdea USB IP core OTG driver
  3. *
  4. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  5. *
  6. * Author: Peter Chen
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. /*
  13. * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
  14. * are also included.
  15. */
  16. #include <linux/usb/otg.h>
  17. #include <linux/usb/gadget.h>
  18. #include <linux/usb/chipidea.h>
  19. #include "ci.h"
  20. #include "bits.h"
  21. #include "otg.h"
  22. #include "otg_fsm.h"
  23. /**
  24. * hw_read_otgsc returns otgsc register bits value.
  25. * @mask: bitfield mask
  26. */
  27. u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  28. {
  29. struct ci_hdrc_cable *cable;
  30. u32 val = hw_read(ci, OP_OTGSC, mask);
  31. /*
  32. * If using extcon framework for VBUS and/or ID signal
  33. * detection overwrite OTGSC register value
  34. */
  35. cable = &ci->platdata->vbus_extcon;
  36. if (!IS_ERR(cable->edev)) {
  37. if (cable->changed)
  38. val |= OTGSC_BSVIS;
  39. else
  40. val &= ~OTGSC_BSVIS;
  41. if (cable->state)
  42. val |= OTGSC_BSV;
  43. else
  44. val &= ~OTGSC_BSV;
  45. if (cable->enabled)
  46. val |= OTGSC_BSVIE;
  47. else
  48. val &= ~OTGSC_BSVIE;
  49. }
  50. cable = &ci->platdata->id_extcon;
  51. if (!IS_ERR(cable->edev)) {
  52. if (cable->changed)
  53. val |= OTGSC_IDIS;
  54. else
  55. val &= ~OTGSC_IDIS;
  56. if (cable->state)
  57. val |= OTGSC_ID;
  58. else
  59. val &= ~OTGSC_ID;
  60. if (cable->enabled)
  61. val |= OTGSC_IDIE;
  62. else
  63. val &= ~OTGSC_IDIE;
  64. }
  65. return val & mask;
  66. }
  67. /**
  68. * hw_write_otgsc updates target bits of OTGSC register.
  69. * @mask: bitfield mask
  70. * @data: to be written
  71. */
  72. void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
  73. {
  74. struct ci_hdrc_cable *cable;
  75. cable = &ci->platdata->vbus_extcon;
  76. if (!IS_ERR(cable->edev)) {
  77. if (data & mask & OTGSC_BSVIS)
  78. cable->changed = false;
  79. /* Don't enable vbus interrupt if using external notifier */
  80. if (data & mask & OTGSC_BSVIE) {
  81. cable->enabled = true;
  82. data &= ~OTGSC_BSVIE;
  83. } else if (mask & OTGSC_BSVIE) {
  84. cable->enabled = false;
  85. }
  86. }
  87. cable = &ci->platdata->id_extcon;
  88. if (!IS_ERR(cable->edev)) {
  89. if (data & mask & OTGSC_IDIS)
  90. cable->changed = false;
  91. /* Don't enable id interrupt if using external notifier */
  92. if (data & mask & OTGSC_IDIE) {
  93. cable->enabled = true;
  94. data &= ~OTGSC_IDIE;
  95. } else if (mask & OTGSC_IDIE) {
  96. cable->enabled = false;
  97. }
  98. }
  99. hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
  100. }
  101. /**
  102. * ci_otg_role - pick role based on ID pin state
  103. * @ci: the controller
  104. */
  105. enum ci_role ci_otg_role(struct ci_hdrc *ci)
  106. {
  107. enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
  108. ? CI_ROLE_GADGET
  109. : CI_ROLE_HOST;
  110. return role;
  111. }
  112. void ci_handle_vbus_change(struct ci_hdrc *ci)
  113. {
  114. if (!ci->is_otg)
  115. return;
  116. if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
  117. usb_gadget_vbus_connect(&ci->gadget);
  118. else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
  119. usb_gadget_vbus_disconnect(&ci->gadget);
  120. }
  121. /**
  122. * When we switch to device mode, the vbus value should be lower
  123. * than OTGSC_BSV before connecting to host.
  124. *
  125. * @ci: the controller
  126. *
  127. * This function returns an error code if timeout
  128. */
  129. static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
  130. {
  131. unsigned long elapse = jiffies + msecs_to_jiffies(5000);
  132. u32 mask = OTGSC_BSV;
  133. while (hw_read_otgsc(ci, mask)) {
  134. if (time_after(jiffies, elapse)) {
  135. dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
  136. mask);
  137. return -ETIMEDOUT;
  138. }
  139. msleep(20);
  140. }
  141. return 0;
  142. }
  143. static void ci_handle_id_switch(struct ci_hdrc *ci)
  144. {
  145. enum ci_role role = ci_otg_role(ci);
  146. if (role != ci->role) {
  147. dev_dbg(ci->dev, "switching from %s to %s\n",
  148. ci_role(ci)->name, ci->roles[role]->name);
  149. ci_role_stop(ci);
  150. if (role == CI_ROLE_GADGET &&
  151. IS_ERR(ci->platdata->vbus_extcon.edev))
  152. /*
  153. * Wait vbus lower than OTGSC_BSV before connecting
  154. * to host. If connecting status is from an external
  155. * connector instead of register, we don't need to
  156. * care vbus on the board, since it will not affect
  157. * external connector status.
  158. */
  159. hw_wait_vbus_lower_bsv(ci);
  160. ci_role_start(ci, role);
  161. /* vbus change may have already occurred */
  162. if (role == CI_ROLE_GADGET)
  163. ci_handle_vbus_change(ci);
  164. }
  165. }
  166. /**
  167. * ci_otg_work - perform otg (vbus/id) event handle
  168. * @work: work struct
  169. */
  170. static void ci_otg_work(struct work_struct *work)
  171. {
  172. struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
  173. if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
  174. enable_irq(ci->irq);
  175. return;
  176. }
  177. pm_runtime_get_sync(ci->dev);
  178. if (ci->id_event) {
  179. ci->id_event = false;
  180. ci_handle_id_switch(ci);
  181. } else if (ci->b_sess_valid_event) {
  182. ci->b_sess_valid_event = false;
  183. ci_handle_vbus_change(ci);
  184. } else
  185. dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
  186. pm_runtime_put_sync(ci->dev);
  187. enable_irq(ci->irq);
  188. }
  189. /**
  190. * ci_hdrc_otg_init - initialize otg struct
  191. * ci: the controller
  192. */
  193. int ci_hdrc_otg_init(struct ci_hdrc *ci)
  194. {
  195. INIT_WORK(&ci->work, ci_otg_work);
  196. ci->wq = create_freezable_workqueue("ci_otg");
  197. if (!ci->wq) {
  198. dev_err(ci->dev, "can't create workqueue\n");
  199. return -ENODEV;
  200. }
  201. if (ci_otg_is_fsm_mode(ci))
  202. return ci_hdrc_otg_fsm_init(ci);
  203. return 0;
  204. }
  205. /**
  206. * ci_hdrc_otg_destroy - destroy otg struct
  207. * ci: the controller
  208. */
  209. void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
  210. {
  211. if (ci->wq) {
  212. flush_workqueue(ci->wq);
  213. destroy_workqueue(ci->wq);
  214. }
  215. /* Disable all OTG irq and clear status */
  216. hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
  217. OTGSC_INT_STATUS_BITS);
  218. if (ci_otg_is_fsm_mode(ci))
  219. ci_hdrc_otg_fsm_remove(ci);
  220. }