nhi.c 17 KB

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  1. /*
  2. * Thunderbolt Cactus Ridge driver - NHI driver
  3. *
  4. * The NHI (native host interface) is the pci device that allows us to send and
  5. * receive frames from the thunderbolt bus.
  6. *
  7. * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
  8. */
  9. #include <linux/pm_runtime.h>
  10. #include <linux/slab.h>
  11. #include <linux/errno.h>
  12. #include <linux/pci.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/dmi.h>
  16. #include "nhi.h"
  17. #include "nhi_regs.h"
  18. #include "tb.h"
  19. #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
  20. static int ring_interrupt_index(struct tb_ring *ring)
  21. {
  22. int bit = ring->hop;
  23. if (!ring->is_tx)
  24. bit += ring->nhi->hop_count;
  25. return bit;
  26. }
  27. /**
  28. * ring_interrupt_active() - activate/deactivate interrupts for a single ring
  29. *
  30. * ring->nhi->lock must be held.
  31. */
  32. static void ring_interrupt_active(struct tb_ring *ring, bool active)
  33. {
  34. int reg = REG_RING_INTERRUPT_BASE +
  35. ring_interrupt_index(ring) / 32 * 4;
  36. int bit = ring_interrupt_index(ring) & 31;
  37. int mask = 1 << bit;
  38. u32 old, new;
  39. old = ioread32(ring->nhi->iobase + reg);
  40. if (active)
  41. new = old | mask;
  42. else
  43. new = old & ~mask;
  44. dev_info(&ring->nhi->pdev->dev,
  45. "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
  46. active ? "enabling" : "disabling", reg, bit, old, new);
  47. if (new == old)
  48. dev_WARN(&ring->nhi->pdev->dev,
  49. "interrupt for %s %d is already %s\n",
  50. RING_TYPE(ring), ring->hop,
  51. active ? "enabled" : "disabled");
  52. iowrite32(new, ring->nhi->iobase + reg);
  53. }
  54. /**
  55. * nhi_disable_interrupts() - disable interrupts for all rings
  56. *
  57. * Use only during init and shutdown.
  58. */
  59. static void nhi_disable_interrupts(struct tb_nhi *nhi)
  60. {
  61. int i = 0;
  62. /* disable interrupts */
  63. for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
  64. iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
  65. /* clear interrupt status bits */
  66. for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
  67. ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
  68. }
  69. /* ring helper methods */
  70. static void __iomem *ring_desc_base(struct tb_ring *ring)
  71. {
  72. void __iomem *io = ring->nhi->iobase;
  73. io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
  74. io += ring->hop * 16;
  75. return io;
  76. }
  77. static void __iomem *ring_options_base(struct tb_ring *ring)
  78. {
  79. void __iomem *io = ring->nhi->iobase;
  80. io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
  81. io += ring->hop * 32;
  82. return io;
  83. }
  84. static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset)
  85. {
  86. iowrite16(value, ring_desc_base(ring) + offset);
  87. }
  88. static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
  89. {
  90. iowrite32(value, ring_desc_base(ring) + offset);
  91. }
  92. static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
  93. {
  94. iowrite32(value, ring_desc_base(ring) + offset);
  95. iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
  96. }
  97. static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
  98. {
  99. iowrite32(value, ring_options_base(ring) + offset);
  100. }
  101. static bool ring_full(struct tb_ring *ring)
  102. {
  103. return ((ring->head + 1) % ring->size) == ring->tail;
  104. }
  105. static bool ring_empty(struct tb_ring *ring)
  106. {
  107. return ring->head == ring->tail;
  108. }
  109. /**
  110. * ring_write_descriptors() - post frames from ring->queue to the controller
  111. *
  112. * ring->lock is held.
  113. */
  114. static void ring_write_descriptors(struct tb_ring *ring)
  115. {
  116. struct ring_frame *frame, *n;
  117. struct ring_desc *descriptor;
  118. list_for_each_entry_safe(frame, n, &ring->queue, list) {
  119. if (ring_full(ring))
  120. break;
  121. list_move_tail(&frame->list, &ring->in_flight);
  122. descriptor = &ring->descriptors[ring->head];
  123. descriptor->phys = frame->buffer_phy;
  124. descriptor->time = 0;
  125. descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
  126. if (ring->is_tx) {
  127. descriptor->length = frame->size;
  128. descriptor->eof = frame->eof;
  129. descriptor->sof = frame->sof;
  130. }
  131. ring->head = (ring->head + 1) % ring->size;
  132. ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8);
  133. }
  134. }
  135. /**
  136. * ring_work() - progress completed frames
  137. *
  138. * If the ring is shutting down then all frames are marked as canceled and
  139. * their callbacks are invoked.
  140. *
  141. * Otherwise we collect all completed frame from the ring buffer, write new
  142. * frame to the ring buffer and invoke the callbacks for the completed frames.
  143. */
  144. static void ring_work(struct work_struct *work)
  145. {
  146. struct tb_ring *ring = container_of(work, typeof(*ring), work);
  147. struct ring_frame *frame;
  148. bool canceled = false;
  149. LIST_HEAD(done);
  150. mutex_lock(&ring->lock);
  151. if (!ring->running) {
  152. /* Move all frames to done and mark them as canceled. */
  153. list_splice_tail_init(&ring->in_flight, &done);
  154. list_splice_tail_init(&ring->queue, &done);
  155. canceled = true;
  156. goto invoke_callback;
  157. }
  158. while (!ring_empty(ring)) {
  159. if (!(ring->descriptors[ring->tail].flags
  160. & RING_DESC_COMPLETED))
  161. break;
  162. frame = list_first_entry(&ring->in_flight, typeof(*frame),
  163. list);
  164. list_move_tail(&frame->list, &done);
  165. if (!ring->is_tx) {
  166. frame->size = ring->descriptors[ring->tail].length;
  167. frame->eof = ring->descriptors[ring->tail].eof;
  168. frame->sof = ring->descriptors[ring->tail].sof;
  169. frame->flags = ring->descriptors[ring->tail].flags;
  170. if (frame->sof != 0)
  171. dev_WARN(&ring->nhi->pdev->dev,
  172. "%s %d got unexpected SOF: %#x\n",
  173. RING_TYPE(ring), ring->hop,
  174. frame->sof);
  175. /*
  176. * known flags:
  177. * raw not enabled, interupt not set: 0x2=0010
  178. * raw enabled: 0xa=1010
  179. * raw not enabled: 0xb=1011
  180. * partial frame (>MAX_FRAME_SIZE): 0xe=1110
  181. */
  182. if (frame->flags != 0xa)
  183. dev_WARN(&ring->nhi->pdev->dev,
  184. "%s %d got unexpected flags: %#x\n",
  185. RING_TYPE(ring), ring->hop,
  186. frame->flags);
  187. }
  188. ring->tail = (ring->tail + 1) % ring->size;
  189. }
  190. ring_write_descriptors(ring);
  191. invoke_callback:
  192. mutex_unlock(&ring->lock); /* allow callbacks to schedule new work */
  193. while (!list_empty(&done)) {
  194. frame = list_first_entry(&done, typeof(*frame), list);
  195. /*
  196. * The callback may reenqueue or delete frame.
  197. * Do not hold on to it.
  198. */
  199. list_del_init(&frame->list);
  200. frame->callback(ring, frame, canceled);
  201. }
  202. }
  203. int __ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
  204. {
  205. int ret = 0;
  206. mutex_lock(&ring->lock);
  207. if (ring->running) {
  208. list_add_tail(&frame->list, &ring->queue);
  209. ring_write_descriptors(ring);
  210. } else {
  211. ret = -ESHUTDOWN;
  212. }
  213. mutex_unlock(&ring->lock);
  214. return ret;
  215. }
  216. static struct tb_ring *ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
  217. bool transmit)
  218. {
  219. struct tb_ring *ring = NULL;
  220. dev_info(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
  221. transmit ? "TX" : "RX", hop, size);
  222. mutex_lock(&nhi->lock);
  223. if (hop >= nhi->hop_count) {
  224. dev_WARN(&nhi->pdev->dev, "invalid hop: %d\n", hop);
  225. goto err;
  226. }
  227. if (transmit && nhi->tx_rings[hop]) {
  228. dev_WARN(&nhi->pdev->dev, "TX hop %d already allocated\n", hop);
  229. goto err;
  230. } else if (!transmit && nhi->rx_rings[hop]) {
  231. dev_WARN(&nhi->pdev->dev, "RX hop %d already allocated\n", hop);
  232. goto err;
  233. }
  234. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  235. if (!ring)
  236. goto err;
  237. mutex_init(&ring->lock);
  238. INIT_LIST_HEAD(&ring->queue);
  239. INIT_LIST_HEAD(&ring->in_flight);
  240. INIT_WORK(&ring->work, ring_work);
  241. ring->nhi = nhi;
  242. ring->hop = hop;
  243. ring->is_tx = transmit;
  244. ring->size = size;
  245. ring->head = 0;
  246. ring->tail = 0;
  247. ring->running = false;
  248. ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
  249. size * sizeof(*ring->descriptors),
  250. &ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
  251. if (!ring->descriptors)
  252. goto err;
  253. if (transmit)
  254. nhi->tx_rings[hop] = ring;
  255. else
  256. nhi->rx_rings[hop] = ring;
  257. mutex_unlock(&nhi->lock);
  258. return ring;
  259. err:
  260. if (ring)
  261. mutex_destroy(&ring->lock);
  262. kfree(ring);
  263. mutex_unlock(&nhi->lock);
  264. return NULL;
  265. }
  266. struct tb_ring *ring_alloc_tx(struct tb_nhi *nhi, int hop, int size)
  267. {
  268. return ring_alloc(nhi, hop, size, true);
  269. }
  270. struct tb_ring *ring_alloc_rx(struct tb_nhi *nhi, int hop, int size)
  271. {
  272. return ring_alloc(nhi, hop, size, false);
  273. }
  274. /**
  275. * ring_start() - enable a ring
  276. *
  277. * Must not be invoked in parallel with ring_stop().
  278. */
  279. void ring_start(struct tb_ring *ring)
  280. {
  281. mutex_lock(&ring->nhi->lock);
  282. mutex_lock(&ring->lock);
  283. if (ring->running) {
  284. dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
  285. goto err;
  286. }
  287. dev_info(&ring->nhi->pdev->dev, "starting %s %d\n",
  288. RING_TYPE(ring), ring->hop);
  289. ring_iowrite64desc(ring, ring->descriptors_dma, 0);
  290. if (ring->is_tx) {
  291. ring_iowrite32desc(ring, ring->size, 12);
  292. ring_iowrite32options(ring, 0, 4); /* time releated ? */
  293. ring_iowrite32options(ring,
  294. RING_FLAG_ENABLE | RING_FLAG_RAW, 0);
  295. } else {
  296. ring_iowrite32desc(ring,
  297. (TB_FRAME_SIZE << 16) | ring->size, 12);
  298. ring_iowrite32options(ring, 0xffffffff, 4); /* SOF EOF mask */
  299. ring_iowrite32options(ring,
  300. RING_FLAG_ENABLE | RING_FLAG_RAW, 0);
  301. }
  302. ring_interrupt_active(ring, true);
  303. ring->running = true;
  304. err:
  305. mutex_unlock(&ring->lock);
  306. mutex_unlock(&ring->nhi->lock);
  307. }
  308. /**
  309. * ring_stop() - shutdown a ring
  310. *
  311. * Must not be invoked from a callback.
  312. *
  313. * This method will disable the ring. Further calls to ring_tx/ring_rx will
  314. * return -ESHUTDOWN until ring_stop has been called.
  315. *
  316. * All enqueued frames will be canceled and their callbacks will be executed
  317. * with frame->canceled set to true (on the callback thread). This method
  318. * returns only after all callback invocations have finished.
  319. */
  320. void ring_stop(struct tb_ring *ring)
  321. {
  322. mutex_lock(&ring->nhi->lock);
  323. mutex_lock(&ring->lock);
  324. dev_info(&ring->nhi->pdev->dev, "stopping %s %d\n",
  325. RING_TYPE(ring), ring->hop);
  326. if (!ring->running) {
  327. dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
  328. RING_TYPE(ring), ring->hop);
  329. goto err;
  330. }
  331. ring_interrupt_active(ring, false);
  332. ring_iowrite32options(ring, 0, 0);
  333. ring_iowrite64desc(ring, 0, 0);
  334. ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8);
  335. ring_iowrite32desc(ring, 0, 12);
  336. ring->head = 0;
  337. ring->tail = 0;
  338. ring->running = false;
  339. err:
  340. mutex_unlock(&ring->lock);
  341. mutex_unlock(&ring->nhi->lock);
  342. /*
  343. * schedule ring->work to invoke callbacks on all remaining frames.
  344. */
  345. schedule_work(&ring->work);
  346. flush_work(&ring->work);
  347. }
  348. /*
  349. * ring_free() - free ring
  350. *
  351. * When this method returns all invocations of ring->callback will have
  352. * finished.
  353. *
  354. * Ring must be stopped.
  355. *
  356. * Must NOT be called from ring_frame->callback!
  357. */
  358. void ring_free(struct tb_ring *ring)
  359. {
  360. mutex_lock(&ring->nhi->lock);
  361. /*
  362. * Dissociate the ring from the NHI. This also ensures that
  363. * nhi_interrupt_work cannot reschedule ring->work.
  364. */
  365. if (ring->is_tx)
  366. ring->nhi->tx_rings[ring->hop] = NULL;
  367. else
  368. ring->nhi->rx_rings[ring->hop] = NULL;
  369. if (ring->running) {
  370. dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
  371. RING_TYPE(ring), ring->hop);
  372. }
  373. dma_free_coherent(&ring->nhi->pdev->dev,
  374. ring->size * sizeof(*ring->descriptors),
  375. ring->descriptors, ring->descriptors_dma);
  376. ring->descriptors = NULL;
  377. ring->descriptors_dma = 0;
  378. dev_info(&ring->nhi->pdev->dev,
  379. "freeing %s %d\n",
  380. RING_TYPE(ring),
  381. ring->hop);
  382. mutex_unlock(&ring->nhi->lock);
  383. /**
  384. * ring->work can no longer be scheduled (it is scheduled only by
  385. * nhi_interrupt_work and ring_stop). Wait for it to finish before
  386. * freeing the ring.
  387. */
  388. flush_work(&ring->work);
  389. mutex_destroy(&ring->lock);
  390. kfree(ring);
  391. }
  392. static void nhi_interrupt_work(struct work_struct *work)
  393. {
  394. struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
  395. int value = 0; /* Suppress uninitialized usage warning. */
  396. int bit;
  397. int hop = -1;
  398. int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
  399. struct tb_ring *ring;
  400. mutex_lock(&nhi->lock);
  401. /*
  402. * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
  403. * (TX, RX, RX overflow). We iterate over the bits and read a new
  404. * dwords as required. The registers are cleared on read.
  405. */
  406. for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
  407. if (bit % 32 == 0)
  408. value = ioread32(nhi->iobase
  409. + REG_RING_NOTIFY_BASE
  410. + 4 * (bit / 32));
  411. if (++hop == nhi->hop_count) {
  412. hop = 0;
  413. type++;
  414. }
  415. if ((value & (1 << (bit % 32))) == 0)
  416. continue;
  417. if (type == 2) {
  418. dev_warn(&nhi->pdev->dev,
  419. "RX overflow for ring %d\n",
  420. hop);
  421. continue;
  422. }
  423. if (type == 0)
  424. ring = nhi->tx_rings[hop];
  425. else
  426. ring = nhi->rx_rings[hop];
  427. if (ring == NULL) {
  428. dev_warn(&nhi->pdev->dev,
  429. "got interrupt for inactive %s ring %d\n",
  430. type ? "RX" : "TX",
  431. hop);
  432. continue;
  433. }
  434. /* we do not check ring->running, this is done in ring->work */
  435. schedule_work(&ring->work);
  436. }
  437. mutex_unlock(&nhi->lock);
  438. }
  439. static irqreturn_t nhi_msi(int irq, void *data)
  440. {
  441. struct tb_nhi *nhi = data;
  442. schedule_work(&nhi->interrupt_work);
  443. return IRQ_HANDLED;
  444. }
  445. static int nhi_suspend_noirq(struct device *dev)
  446. {
  447. struct pci_dev *pdev = to_pci_dev(dev);
  448. struct tb *tb = pci_get_drvdata(pdev);
  449. thunderbolt_suspend(tb);
  450. return 0;
  451. }
  452. static int nhi_resume_noirq(struct device *dev)
  453. {
  454. struct pci_dev *pdev = to_pci_dev(dev);
  455. struct tb *tb = pci_get_drvdata(pdev);
  456. thunderbolt_resume(tb);
  457. return 0;
  458. }
  459. static void nhi_shutdown(struct tb_nhi *nhi)
  460. {
  461. int i;
  462. dev_info(&nhi->pdev->dev, "shutdown\n");
  463. for (i = 0; i < nhi->hop_count; i++) {
  464. if (nhi->tx_rings[i])
  465. dev_WARN(&nhi->pdev->dev,
  466. "TX ring %d is still active\n", i);
  467. if (nhi->rx_rings[i])
  468. dev_WARN(&nhi->pdev->dev,
  469. "RX ring %d is still active\n", i);
  470. }
  471. nhi_disable_interrupts(nhi);
  472. /*
  473. * We have to release the irq before calling flush_work. Otherwise an
  474. * already executing IRQ handler could call schedule_work again.
  475. */
  476. devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
  477. flush_work(&nhi->interrupt_work);
  478. mutex_destroy(&nhi->lock);
  479. }
  480. static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  481. {
  482. struct tb_nhi *nhi;
  483. struct tb *tb;
  484. int res;
  485. res = pcim_enable_device(pdev);
  486. if (res) {
  487. dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
  488. return res;
  489. }
  490. res = pci_enable_msi(pdev);
  491. if (res) {
  492. dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
  493. return res;
  494. }
  495. res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
  496. if (res) {
  497. dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
  498. return res;
  499. }
  500. nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
  501. if (!nhi)
  502. return -ENOMEM;
  503. nhi->pdev = pdev;
  504. /* cannot fail - table is allocated bin pcim_iomap_regions */
  505. nhi->iobase = pcim_iomap_table(pdev)[0];
  506. nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
  507. if (nhi->hop_count != 12 && nhi->hop_count != 32)
  508. dev_warn(&pdev->dev, "unexpected hop count: %d\n",
  509. nhi->hop_count);
  510. INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
  511. nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
  512. sizeof(*nhi->tx_rings), GFP_KERNEL);
  513. nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
  514. sizeof(*nhi->rx_rings), GFP_KERNEL);
  515. if (!nhi->tx_rings || !nhi->rx_rings)
  516. return -ENOMEM;
  517. nhi_disable_interrupts(nhi); /* In case someone left them on. */
  518. res = devm_request_irq(&pdev->dev, pdev->irq, nhi_msi,
  519. IRQF_NO_SUSPEND, /* must work during _noirq */
  520. "thunderbolt", nhi);
  521. if (res) {
  522. dev_err(&pdev->dev, "request_irq failed, aborting\n");
  523. return res;
  524. }
  525. mutex_init(&nhi->lock);
  526. pci_set_master(pdev);
  527. /* magic value - clock related? */
  528. iowrite32(3906250 / 10000, nhi->iobase + 0x38c00);
  529. dev_info(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
  530. tb = thunderbolt_alloc_and_start(nhi);
  531. if (!tb) {
  532. /*
  533. * At this point the RX/TX rings might already have been
  534. * activated. Do a proper shutdown.
  535. */
  536. nhi_shutdown(nhi);
  537. return -EIO;
  538. }
  539. pci_set_drvdata(pdev, tb);
  540. return 0;
  541. }
  542. static void nhi_remove(struct pci_dev *pdev)
  543. {
  544. struct tb *tb = pci_get_drvdata(pdev);
  545. struct tb_nhi *nhi = tb->nhi;
  546. thunderbolt_shutdown_and_free(tb);
  547. nhi_shutdown(nhi);
  548. }
  549. /*
  550. * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
  551. * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
  552. * resume_noirq until we are done.
  553. */
  554. static const struct dev_pm_ops nhi_pm_ops = {
  555. .suspend_noirq = nhi_suspend_noirq,
  556. .resume_noirq = nhi_resume_noirq,
  557. .freeze_noirq = nhi_suspend_noirq, /*
  558. * we just disable hotplug, the
  559. * pci-tunnels stay alive.
  560. */
  561. .thaw_noirq = nhi_resume_noirq,
  562. .restore_noirq = nhi_resume_noirq,
  563. };
  564. static struct pci_device_id nhi_ids[] = {
  565. /*
  566. * We have to specify class, the TB bridges use the same device and
  567. * vendor (sub)id on gen 1 and gen 2 controllers.
  568. */
  569. {
  570. .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
  571. .vendor = PCI_VENDOR_ID_INTEL,
  572. .device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
  573. .subvendor = 0x2222, .subdevice = 0x1111,
  574. },
  575. {
  576. .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
  577. .vendor = PCI_VENDOR_ID_INTEL,
  578. .device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
  579. .subvendor = 0x2222, .subdevice = 0x1111,
  580. },
  581. {
  582. .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
  583. .vendor = PCI_VENDOR_ID_INTEL,
  584. .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
  585. .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
  586. },
  587. {
  588. .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
  589. .vendor = PCI_VENDOR_ID_INTEL,
  590. .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
  591. .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
  592. },
  593. { 0,}
  594. };
  595. MODULE_DEVICE_TABLE(pci, nhi_ids);
  596. MODULE_LICENSE("GPL");
  597. static struct pci_driver nhi_driver = {
  598. .name = "thunderbolt",
  599. .id_table = nhi_ids,
  600. .probe = nhi_probe,
  601. .remove = nhi_remove,
  602. .driver.pm = &nhi_pm_ops,
  603. };
  604. static int __init nhi_init(void)
  605. {
  606. if (!dmi_match(DMI_BOARD_VENDOR, "Apple Inc."))
  607. return -ENOSYS;
  608. return pci_register_driver(&nhi_driver);
  609. }
  610. static void __exit nhi_unload(void)
  611. {
  612. pci_unregister_driver(&nhi_driver);
  613. }
  614. module_init(nhi_init);
  615. module_exit(nhi_unload);