intel_soc_dts_thermal.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110
  1. /*
  2. * intel_soc_dts_thermal.c
  3. * Copyright (c) 2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. #include <linux/module.h>
  17. #include <linux/interrupt.h>
  18. #include <asm/cpu_device_id.h>
  19. #include <asm/intel-family.h>
  20. #include "intel_soc_dts_iosf.h"
  21. #define CRITICAL_OFFSET_FROM_TJ_MAX 5000
  22. static int crit_offset = CRITICAL_OFFSET_FROM_TJ_MAX;
  23. module_param(crit_offset, int, 0644);
  24. MODULE_PARM_DESC(crit_offset,
  25. "Critical Temperature offset from tj max in millidegree Celsius.");
  26. /* IRQ 86 is a fixed APIC interrupt for BYT DTS Aux threshold notifications */
  27. #define BYT_SOC_DTS_APIC_IRQ 86
  28. static int soc_dts_thres_irq;
  29. static struct intel_soc_dts_sensors *soc_dts;
  30. static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
  31. {
  32. pr_debug("proc_thermal_interrupt\n");
  33. intel_soc_dts_iosf_interrupt_handler(soc_dts);
  34. return IRQ_HANDLED;
  35. }
  36. static const struct x86_cpu_id soc_thermal_ids[] = {
  37. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1, 0,
  38. BYT_SOC_DTS_APIC_IRQ},
  39. {}
  40. };
  41. MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);
  42. static int __init intel_soc_thermal_init(void)
  43. {
  44. int err = 0;
  45. const struct x86_cpu_id *match_cpu;
  46. match_cpu = x86_match_cpu(soc_thermal_ids);
  47. if (!match_cpu)
  48. return -ENODEV;
  49. /* Create a zone with 2 trips with marked as read only */
  50. soc_dts = intel_soc_dts_iosf_init(INTEL_SOC_DTS_INTERRUPT_APIC, 2, 1);
  51. if (IS_ERR(soc_dts)) {
  52. err = PTR_ERR(soc_dts);
  53. return err;
  54. }
  55. soc_dts_thres_irq = (int)match_cpu->driver_data;
  56. if (soc_dts_thres_irq) {
  57. err = request_threaded_irq(soc_dts_thres_irq, NULL,
  58. soc_irq_thread_fn,
  59. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  60. "soc_dts", soc_dts);
  61. if (err) {
  62. pr_err("request_threaded_irq ret %d\n", err);
  63. goto error_irq;
  64. }
  65. }
  66. err = intel_soc_dts_iosf_add_read_only_critical_trip(soc_dts,
  67. crit_offset);
  68. if (err)
  69. goto error_trips;
  70. return 0;
  71. error_trips:
  72. if (soc_dts_thres_irq)
  73. free_irq(soc_dts_thres_irq, soc_dts);
  74. error_irq:
  75. intel_soc_dts_iosf_exit(soc_dts);
  76. return err;
  77. }
  78. static void __exit intel_soc_thermal_exit(void)
  79. {
  80. if (soc_dts_thres_irq)
  81. free_irq(soc_dts_thres_irq, soc_dts);
  82. intel_soc_dts_iosf_exit(soc_dts);
  83. }
  84. module_init(intel_soc_thermal_init)
  85. module_exit(intel_soc_thermal_exit)
  86. MODULE_DESCRIPTION("Intel SoC DTS Thermal Driver");
  87. MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
  88. MODULE_LICENSE("GPL v2");