slicoss.c 78 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above
  12. * copyright notice, this list of conditions and the following
  13. * disclaimer in the documentation and/or other materials provided
  14. * with the distribution.
  15. *
  16. * Alternatively, this software may be distributed under the terms of the
  17. * GNU General Public License ("GPL") version 2 as published by the Free
  18. * Software Foundation.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
  21. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
  24. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  27. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  30. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31. * SUCH DAMAGE.
  32. *
  33. * The views and conclusions contained in the software and documentation
  34. * are those of the authors and should not be interpreted as representing
  35. * official policies, either expressed or implied, of Alacritech, Inc.
  36. *
  37. **************************************************************************/
  38. /*
  39. * FILENAME: slicoss.c
  40. *
  41. * The SLICOSS driver for Alacritech's IS-NIC products.
  42. *
  43. * This driver is supposed to support:
  44. *
  45. * Mojave cards (single port PCI Gigabit) both copper and fiber
  46. * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
  47. * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
  48. *
  49. * The driver was actually tested on Oasis and Kalahari cards.
  50. *
  51. *
  52. * NOTE: This is the standard, non-accelerated version of Alacritech's
  53. * IS-NIC driver.
  54. */
  55. #define KLUDGE_FOR_4GB_BOUNDARY 1
  56. #define DEBUG_MICROCODE 1
  57. #define DBG 1
  58. #define SLIC_INTERRUPT_PROCESS_LIMIT 1
  59. #define SLIC_OFFLOAD_IP_CHECKSUM 1
  60. #define STATS_TIMER_INTERVAL 2
  61. #define PING_TIMER_INTERVAL 1
  62. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  63. #include <linux/kernel.h>
  64. #include <linux/string.h>
  65. #include <linux/errno.h>
  66. #include <linux/ioport.h>
  67. #include <linux/slab.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/timer.h>
  70. #include <linux/pci.h>
  71. #include <linux/spinlock.h>
  72. #include <linux/init.h>
  73. #include <linux/bitops.h>
  74. #include <linux/io.h>
  75. #include <linux/netdevice.h>
  76. #include <linux/crc32.h>
  77. #include <linux/etherdevice.h>
  78. #include <linux/skbuff.h>
  79. #include <linux/delay.h>
  80. #include <linux/seq_file.h>
  81. #include <linux/kthread.h>
  82. #include <linux/module.h>
  83. #include <linux/firmware.h>
  84. #include <linux/types.h>
  85. #include <linux/dma-mapping.h>
  86. #include <linux/mii.h>
  87. #include <linux/if_vlan.h>
  88. #include <asm/unaligned.h>
  89. #include <linux/ethtool.h>
  90. #include <linux/uaccess.h>
  91. #include "slichw.h"
  92. #include "slic.h"
  93. static uint slic_first_init = 1;
  94. static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
  95. static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
  96. static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
  97. #define DEFAULT_INTAGG_DELAY 100
  98. static unsigned int rcv_count;
  99. #define DRV_NAME "slicoss"
  100. #define DRV_VERSION "2.0.1"
  101. #define DRV_AUTHOR "Alacritech, Inc. Engineering"
  102. #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
  103. "Non-Accelerated Driver"
  104. #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
  105. "All rights reserved."
  106. #define PFX DRV_NAME " "
  107. MODULE_AUTHOR(DRV_AUTHOR);
  108. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  109. MODULE_LICENSE("Dual BSD/GPL");
  110. static const struct pci_device_id slic_pci_tbl[] = {
  111. { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
  112. { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
  113. { 0 }
  114. };
  115. static const struct ethtool_ops slic_ethtool_ops;
  116. MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
  117. static void slic_mcast_set_bit(struct adapter *adapter, char *address)
  118. {
  119. unsigned char crcpoly;
  120. /* Get the CRC polynomial for the mac address */
  121. /*
  122. * we use bits 1-8 (lsb), bitwise reversed,
  123. * msb (= lsb bit 0 before bitrev) is automatically discarded
  124. */
  125. crcpoly = ether_crc(ETH_ALEN, address) >> 23;
  126. /*
  127. * We only have space on the SLIC for 64 entries. Lop
  128. * off the top two bits. (2^6 = 64)
  129. */
  130. crcpoly &= 0x3F;
  131. /* OR in the new bit into our 64 bit mask. */
  132. adapter->mcastmask |= (u64)1 << crcpoly;
  133. }
  134. static void slic_mcast_set_mask(struct adapter *adapter)
  135. {
  136. if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
  137. /*
  138. * Turn on all multicast addresses. We have to do this for
  139. * promiscuous mode as well as ALLMCAST mode. It saves the
  140. * Microcode from having to keep state about the MAC
  141. * configuration.
  142. */
  143. slic_write32(adapter, SLIC_REG_MCASTLOW, 0xFFFFFFFF);
  144. slic_write32(adapter, SLIC_REG_MCASTHIGH, 0xFFFFFFFF);
  145. } else {
  146. /*
  147. * Commit our multicast mast to the SLIC by writing to the
  148. * multicast address mask registers
  149. */
  150. slic_write32(adapter, SLIC_REG_MCASTLOW,
  151. (u32)(adapter->mcastmask & 0xFFFFFFFF));
  152. slic_write32(adapter, SLIC_REG_MCASTHIGH,
  153. (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF));
  154. }
  155. }
  156. static void slic_timer_ping(ulong dev)
  157. {
  158. struct adapter *adapter;
  159. struct sliccard *card;
  160. adapter = netdev_priv((struct net_device *)dev);
  161. card = adapter->card;
  162. adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
  163. add_timer(&adapter->pingtimer);
  164. }
  165. /*
  166. * slic_link_config
  167. *
  168. * Write phy control to configure link duplex/speed
  169. *
  170. */
  171. static void slic_link_config(struct adapter *adapter,
  172. u32 linkspeed, u32 linkduplex)
  173. {
  174. u32 speed;
  175. u32 duplex;
  176. u32 phy_config;
  177. u32 phy_advreg;
  178. u32 phy_gctlreg;
  179. if (adapter->state != ADAPT_UP)
  180. return;
  181. if (linkspeed > LINK_1000MB)
  182. linkspeed = LINK_AUTOSPEED;
  183. if (linkduplex > LINK_AUTOD)
  184. linkduplex = LINK_AUTOD;
  185. if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
  186. if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
  187. /*
  188. * We've got a fiber gigabit interface, and register
  189. * 4 is different in fiber mode than in copper mode
  190. */
  191. /* advertise FD only @1000 Mb */
  192. phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
  193. /* enable PAUSE frames */
  194. phy_advreg |= PAR_ASYMPAUSE_FIBER;
  195. slic_write32(adapter, SLIC_REG_WPHY, phy_advreg);
  196. if (linkspeed == LINK_AUTOSPEED) {
  197. /* reset phy, enable auto-neg */
  198. phy_config =
  199. (MIICR_REG_PCR |
  200. (PCR_RESET | PCR_AUTONEG |
  201. PCR_AUTONEG_RST));
  202. slic_write32(adapter, SLIC_REG_WPHY,
  203. phy_config);
  204. } else { /* forced 1000 Mb FD*/
  205. /*
  206. * power down phy to break link
  207. * this may not work)
  208. */
  209. phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
  210. slic_write32(adapter, SLIC_REG_WPHY,
  211. phy_config);
  212. slic_flush_write(adapter);
  213. /*
  214. * wait, Marvell says 1 sec,
  215. * try to get away with 10 ms
  216. */
  217. mdelay(10);
  218. /*
  219. * disable auto-neg, set speed/duplex,
  220. * soft reset phy, powerup
  221. */
  222. phy_config =
  223. (MIICR_REG_PCR |
  224. (PCR_RESET | PCR_SPEED_1000 |
  225. PCR_DUPLEX_FULL));
  226. slic_write32(adapter, SLIC_REG_WPHY,
  227. phy_config);
  228. }
  229. } else { /* copper gigabit */
  230. /*
  231. * Auto-Negotiate or 1000 Mb must be auto negotiated
  232. * We've got a copper gigabit interface, and
  233. * register 4 is different in copper mode than
  234. * in fiber mode
  235. */
  236. if (linkspeed == LINK_AUTOSPEED) {
  237. /* advertise 10/100 Mb modes */
  238. phy_advreg =
  239. (MIICR_REG_4 |
  240. (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
  241. | PAR_ADV10HD));
  242. } else {
  243. /*
  244. * linkspeed == LINK_1000MB -
  245. * don't advertise 10/100 Mb modes
  246. */
  247. phy_advreg = MIICR_REG_4;
  248. }
  249. /* enable PAUSE frames */
  250. phy_advreg |= PAR_ASYMPAUSE;
  251. /* required by the Cicada PHY */
  252. phy_advreg |= PAR_802_3;
  253. slic_write32(adapter, SLIC_REG_WPHY, phy_advreg);
  254. /* advertise FD only @1000 Mb */
  255. phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
  256. slic_write32(adapter, SLIC_REG_WPHY, phy_gctlreg);
  257. if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
  258. /*
  259. * if a Marvell PHY
  260. * enable auto crossover
  261. */
  262. phy_config =
  263. (MIICR_REG_16 | (MRV_REG16_XOVERON));
  264. slic_write32(adapter, SLIC_REG_WPHY,
  265. phy_config);
  266. /* reset phy, enable auto-neg */
  267. phy_config =
  268. (MIICR_REG_PCR |
  269. (PCR_RESET | PCR_AUTONEG |
  270. PCR_AUTONEG_RST));
  271. slic_write32(adapter, SLIC_REG_WPHY,
  272. phy_config);
  273. } else { /* it's a Cicada PHY */
  274. /* enable and restart auto-neg (don't reset) */
  275. phy_config =
  276. (MIICR_REG_PCR |
  277. (PCR_AUTONEG | PCR_AUTONEG_RST));
  278. slic_write32(adapter, SLIC_REG_WPHY,
  279. phy_config);
  280. }
  281. }
  282. } else {
  283. /* Forced 10/100 */
  284. if (linkspeed == LINK_10MB)
  285. speed = 0;
  286. else
  287. speed = PCR_SPEED_100;
  288. if (linkduplex == LINK_HALFD)
  289. duplex = 0;
  290. else
  291. duplex = PCR_DUPLEX_FULL;
  292. if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
  293. /*
  294. * if a Marvell PHY
  295. * disable auto crossover
  296. */
  297. phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
  298. slic_write32(adapter, SLIC_REG_WPHY, phy_config);
  299. }
  300. /* power down phy to break link (this may not work) */
  301. phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
  302. slic_write32(adapter, SLIC_REG_WPHY, phy_config);
  303. slic_flush_write(adapter);
  304. /* wait, Marvell says 1 sec, try to get away with 10 ms */
  305. mdelay(10);
  306. if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
  307. /*
  308. * if a Marvell PHY
  309. * disable auto-neg, set speed,
  310. * soft reset phy, powerup
  311. */
  312. phy_config =
  313. (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
  314. slic_write32(adapter, SLIC_REG_WPHY, phy_config);
  315. } else { /* it's a Cicada PHY */
  316. /* disable auto-neg, set speed, powerup */
  317. phy_config = (MIICR_REG_PCR | (speed | duplex));
  318. slic_write32(adapter, SLIC_REG_WPHY, phy_config);
  319. }
  320. }
  321. }
  322. static int slic_card_download_gbrcv(struct adapter *adapter)
  323. {
  324. const struct firmware *fw;
  325. const char *file = "";
  326. int ret;
  327. u32 codeaddr;
  328. u32 instruction;
  329. int index = 0;
  330. u32 rcvucodelen = 0;
  331. switch (adapter->devid) {
  332. case SLIC_2GB_DEVICE_ID:
  333. file = "/*(DEBLOBBED)*/";
  334. break;
  335. case SLIC_1GB_DEVICE_ID:
  336. file = "/*(DEBLOBBED)*/";
  337. break;
  338. default:
  339. return -ENOENT;
  340. }
  341. ret = reject_firmware(&fw, file, &adapter->pcidev->dev);
  342. if (ret) {
  343. dev_err(&adapter->pcidev->dev,
  344. "Failed to load firmware %s\n", file);
  345. return ret;
  346. }
  347. rcvucodelen = *(u32 *)(fw->data + index);
  348. index += 4;
  349. switch (adapter->devid) {
  350. case SLIC_2GB_DEVICE_ID:
  351. if (rcvucodelen != OasisRcvUCodeLen) {
  352. release_firmware(fw);
  353. return -EINVAL;
  354. }
  355. break;
  356. case SLIC_1GB_DEVICE_ID:
  357. if (rcvucodelen != GBRcvUCodeLen) {
  358. release_firmware(fw);
  359. return -EINVAL;
  360. }
  361. break;
  362. }
  363. /* start download */
  364. slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_BEGIN);
  365. /* download the rcv sequencer ucode */
  366. for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
  367. /* write out instruction address */
  368. slic_write32(adapter, SLIC_REG_RCV_WCS, codeaddr);
  369. instruction = *(u32 *)(fw->data + index);
  370. index += 4;
  371. /* write out the instruction data low addr */
  372. slic_write32(adapter, SLIC_REG_RCV_WCS, instruction);
  373. instruction = *(u8 *)(fw->data + index);
  374. index++;
  375. /* write out the instruction data high addr */
  376. slic_write32(adapter, SLIC_REG_RCV_WCS, instruction);
  377. }
  378. /* download finished */
  379. release_firmware(fw);
  380. slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_FINISH);
  381. slic_flush_write(adapter);
  382. return 0;
  383. }
  384. /*(DEBLOBBED)*/
  385. static int slic_card_download(struct adapter *adapter)
  386. {
  387. const struct firmware *fw;
  388. const char *file = "";
  389. int ret;
  390. u32 section;
  391. int thissectionsize;
  392. int codeaddr;
  393. u32 instruction;
  394. u32 baseaddress;
  395. u32 i;
  396. u32 numsects = 0;
  397. u32 sectsize[3];
  398. u32 sectstart[3];
  399. int ucode_start, index = 0;
  400. switch (adapter->devid) {
  401. case SLIC_2GB_DEVICE_ID:
  402. file = "/*(DEBLOBBED)*/";
  403. break;
  404. case SLIC_1GB_DEVICE_ID:
  405. file = "/*(DEBLOBBED)*/";
  406. break;
  407. default:
  408. return -ENOENT;
  409. }
  410. ret = reject_firmware(&fw, file, &adapter->pcidev->dev);
  411. if (ret) {
  412. dev_err(&adapter->pcidev->dev,
  413. "Failed to load firmware %s\n", file);
  414. return ret;
  415. }
  416. numsects = *(u32 *)(fw->data + index);
  417. index += 4;
  418. for (i = 0; i < numsects; i++) {
  419. sectsize[i] = *(u32 *)(fw->data + index);
  420. index += 4;
  421. }
  422. for (i = 0; i < numsects; i++) {
  423. sectstart[i] = *(u32 *)(fw->data + index);
  424. index += 4;
  425. }
  426. ucode_start = index;
  427. instruction = *(u32 *)(fw->data + index);
  428. index += 4;
  429. for (section = 0; section < numsects; section++) {
  430. baseaddress = sectstart[section];
  431. thissectionsize = sectsize[section] >> 3;
  432. for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
  433. /* Write out instruction address */
  434. slic_write32(adapter, SLIC_REG_WCS,
  435. baseaddress + codeaddr);
  436. /* Write out instruction to low addr */
  437. slic_write32(adapter, SLIC_REG_WCS,
  438. instruction);
  439. instruction = *(u32 *)(fw->data + index);
  440. index += 4;
  441. /* Write out instruction to high addr */
  442. slic_write32(adapter, SLIC_REG_WCS,
  443. instruction);
  444. instruction = *(u32 *)(fw->data + index);
  445. index += 4;
  446. }
  447. }
  448. index = ucode_start;
  449. for (section = 0; section < numsects; section++) {
  450. instruction = *(u32 *)(fw->data + index);
  451. baseaddress = sectstart[section];
  452. if (baseaddress < 0x8000)
  453. continue;
  454. thissectionsize = sectsize[section] >> 3;
  455. for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
  456. /* Write out instruction address */
  457. slic_write32(adapter, SLIC_REG_WCS,
  458. SLIC_WCS_COMPARE | (baseaddress +
  459. codeaddr));
  460. /* Write out instruction to low addr */
  461. slic_write32(adapter, SLIC_REG_WCS, instruction);
  462. instruction = *(u32 *)(fw->data + index);
  463. index += 4;
  464. /* Write out instruction to high addr */
  465. slic_write32(adapter, SLIC_REG_WCS, instruction);
  466. instruction = *(u32 *)(fw->data + index);
  467. index += 4;
  468. }
  469. }
  470. release_firmware(fw);
  471. /* Everything OK, kick off the card */
  472. mdelay(10);
  473. slic_write32(adapter, SLIC_REG_WCS, SLIC_WCS_START);
  474. slic_flush_write(adapter);
  475. /*
  476. * stall for 20 ms, long enough for ucode to init card
  477. * and reach mainloop
  478. */
  479. mdelay(20);
  480. return 0;
  481. }
  482. /*(DEBLOBBED)*/
  483. static void slic_adapter_set_hwaddr(struct adapter *adapter)
  484. {
  485. struct sliccard *card = adapter->card;
  486. if ((adapter->card) && (card->config_set)) {
  487. memcpy(adapter->macaddr,
  488. card->config.MacInfo[adapter->functionnumber].macaddrA,
  489. sizeof(struct slic_config_mac));
  490. if (is_zero_ether_addr(adapter->currmacaddr))
  491. memcpy(adapter->currmacaddr, adapter->macaddr,
  492. ETH_ALEN);
  493. if (adapter->netdev)
  494. memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
  495. ETH_ALEN);
  496. }
  497. }
  498. static void slic_intagg_set(struct adapter *adapter, u32 value)
  499. {
  500. slic_write32(adapter, SLIC_REG_INTAGG, value);
  501. adapter->card->loadlevel_current = value;
  502. }
  503. static void slic_soft_reset(struct adapter *adapter)
  504. {
  505. if (adapter->card->state == CARD_UP) {
  506. slic_write32(adapter, SLIC_REG_QUIESCE, 0);
  507. slic_flush_write(adapter);
  508. mdelay(1);
  509. }
  510. slic_write32(adapter, SLIC_REG_RESET, SLIC_RESET_MAGIC);
  511. slic_flush_write(adapter);
  512. mdelay(1);
  513. }
  514. static void slic_mac_address_config(struct adapter *adapter)
  515. {
  516. u32 value;
  517. u32 value2;
  518. value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
  519. slic_write32(adapter, SLIC_REG_WRADDRAL, value);
  520. slic_write32(adapter, SLIC_REG_WRADDRBL, value);
  521. value2 = (u32)((adapter->currmacaddr[0] << 8 |
  522. adapter->currmacaddr[1]) & 0xFFFF);
  523. slic_write32(adapter, SLIC_REG_WRADDRAH, value2);
  524. slic_write32(adapter, SLIC_REG_WRADDRBH, value2);
  525. /*
  526. * Write our multicast mask out to the card. This is done
  527. * here in addition to the slic_mcast_addr_set routine
  528. * because ALL_MCAST may have been enabled or disabled
  529. */
  530. slic_mcast_set_mask(adapter);
  531. }
  532. static void slic_mac_config(struct adapter *adapter)
  533. {
  534. u32 value;
  535. /* Setup GMAC gaps */
  536. if (adapter->linkspeed == LINK_1000MB) {
  537. value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
  538. (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
  539. (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
  540. } else {
  541. value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
  542. (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
  543. (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
  544. }
  545. /* enable GMII */
  546. if (adapter->linkspeed == LINK_1000MB)
  547. value |= GMCR_GBIT;
  548. /* enable fullduplex */
  549. if ((adapter->linkduplex == LINK_FULLD)
  550. || (adapter->macopts & MAC_LOOPBACK)) {
  551. value |= GMCR_FULLD;
  552. }
  553. /* write mac config */
  554. slic_write32(adapter, SLIC_REG_WMCFG, value);
  555. /* setup mac addresses */
  556. slic_mac_address_config(adapter);
  557. }
  558. static void slic_config_set(struct adapter *adapter, bool linkchange)
  559. {
  560. u32 value;
  561. u32 RcrReset;
  562. if (linkchange) {
  563. /* Setup MAC */
  564. slic_mac_config(adapter);
  565. RcrReset = GRCR_RESET;
  566. } else {
  567. slic_mac_address_config(adapter);
  568. RcrReset = 0;
  569. }
  570. if (adapter->linkduplex == LINK_FULLD) {
  571. /* setup xmtcfg */
  572. value = (GXCR_RESET | /* Always reset */
  573. GXCR_XMTEN | /* Enable transmit */
  574. GXCR_PAUSEEN); /* Enable pause */
  575. slic_write32(adapter, SLIC_REG_WXCFG, value);
  576. /* Setup rcvcfg last */
  577. value = (RcrReset | /* Reset, if linkchange */
  578. GRCR_CTLEN | /* Enable CTL frames */
  579. GRCR_ADDRAEN | /* Address A enable */
  580. GRCR_RCVBAD | /* Rcv bad frames */
  581. (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
  582. } else {
  583. /* setup xmtcfg */
  584. value = (GXCR_RESET | /* Always reset */
  585. GXCR_XMTEN); /* Enable transmit */
  586. slic_write32(adapter, SLIC_REG_WXCFG, value);
  587. /* Setup rcvcfg last */
  588. value = (RcrReset | /* Reset, if linkchange */
  589. GRCR_ADDRAEN | /* Address A enable */
  590. GRCR_RCVBAD | /* Rcv bad frames */
  591. (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
  592. }
  593. if (adapter->state != ADAPT_DOWN) {
  594. /* Only enable receive if we are restarting or running */
  595. value |= GRCR_RCVEN;
  596. }
  597. if (adapter->macopts & MAC_PROMISC)
  598. value |= GRCR_RCVALL;
  599. slic_write32(adapter, SLIC_REG_WRCFG, value);
  600. }
  601. /*
  602. * Turn off RCV and XMT, power down PHY
  603. */
  604. static void slic_config_clear(struct adapter *adapter)
  605. {
  606. u32 value;
  607. u32 phy_config;
  608. /* Setup xmtcfg */
  609. value = (GXCR_RESET | /* Always reset */
  610. GXCR_PAUSEEN); /* Enable pause */
  611. slic_write32(adapter, SLIC_REG_WXCFG, value);
  612. value = (GRCR_RESET | /* Always reset */
  613. GRCR_CTLEN | /* Enable CTL frames */
  614. GRCR_ADDRAEN | /* Address A enable */
  615. (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
  616. slic_write32(adapter, SLIC_REG_WRCFG, value);
  617. /* power down phy */
  618. phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
  619. slic_write32(adapter, SLIC_REG_WPHY, phy_config);
  620. }
  621. static bool slic_mac_filter(struct adapter *adapter,
  622. struct ether_header *ether_frame)
  623. {
  624. struct net_device *netdev = adapter->netdev;
  625. u32 opts = adapter->macopts;
  626. if (opts & MAC_PROMISC)
  627. return true;
  628. if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
  629. if (opts & MAC_BCAST) {
  630. adapter->rcv_broadcasts++;
  631. return true;
  632. }
  633. return false;
  634. }
  635. if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
  636. if (opts & MAC_ALLMCAST) {
  637. adapter->rcv_multicasts++;
  638. netdev->stats.multicast++;
  639. return true;
  640. }
  641. if (opts & MAC_MCAST) {
  642. struct mcast_address *mcaddr = adapter->mcastaddrs;
  643. while (mcaddr) {
  644. if (ether_addr_equal(mcaddr->address,
  645. ether_frame->ether_dhost)) {
  646. adapter->rcv_multicasts++;
  647. netdev->stats.multicast++;
  648. return true;
  649. }
  650. mcaddr = mcaddr->next;
  651. }
  652. return false;
  653. }
  654. return false;
  655. }
  656. if (opts & MAC_DIRECTED) {
  657. adapter->rcv_unicasts++;
  658. return true;
  659. }
  660. return false;
  661. }
  662. static int slic_mac_set_address(struct net_device *dev, void *ptr)
  663. {
  664. struct adapter *adapter = netdev_priv(dev);
  665. struct sockaddr *addr = ptr;
  666. if (netif_running(dev))
  667. return -EBUSY;
  668. if (!adapter)
  669. return -EBUSY;
  670. if (!is_valid_ether_addr(addr->sa_data))
  671. return -EINVAL;
  672. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  673. memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
  674. slic_config_set(adapter, true);
  675. return 0;
  676. }
  677. static void slic_timer_load_check(ulong cardaddr)
  678. {
  679. struct sliccard *card = (struct sliccard *)cardaddr;
  680. struct adapter *adapter = card->master;
  681. u32 load = card->events;
  682. u32 level = 0;
  683. if ((adapter) && (adapter->state == ADAPT_UP) &&
  684. (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
  685. if (adapter->devid == SLIC_1GB_DEVICE_ID) {
  686. if (adapter->linkspeed == LINK_1000MB)
  687. level = 100;
  688. else {
  689. if (load > SLIC_LOAD_5)
  690. level = SLIC_INTAGG_5;
  691. else if (load > SLIC_LOAD_4)
  692. level = SLIC_INTAGG_4;
  693. else if (load > SLIC_LOAD_3)
  694. level = SLIC_INTAGG_3;
  695. else if (load > SLIC_LOAD_2)
  696. level = SLIC_INTAGG_2;
  697. else if (load > SLIC_LOAD_1)
  698. level = SLIC_INTAGG_1;
  699. else
  700. level = SLIC_INTAGG_0;
  701. }
  702. if (card->loadlevel_current != level) {
  703. card->loadlevel_current = level;
  704. slic_write32(adapter, SLIC_REG_INTAGG, level);
  705. }
  706. } else {
  707. if (load > SLIC_LOAD_5)
  708. level = SLIC_INTAGG_5;
  709. else if (load > SLIC_LOAD_4)
  710. level = SLIC_INTAGG_4;
  711. else if (load > SLIC_LOAD_3)
  712. level = SLIC_INTAGG_3;
  713. else if (load > SLIC_LOAD_2)
  714. level = SLIC_INTAGG_2;
  715. else if (load > SLIC_LOAD_1)
  716. level = SLIC_INTAGG_1;
  717. else
  718. level = SLIC_INTAGG_0;
  719. if (card->loadlevel_current != level) {
  720. card->loadlevel_current = level;
  721. slic_write32(adapter, SLIC_REG_INTAGG, level);
  722. }
  723. }
  724. }
  725. card->events = 0;
  726. card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
  727. add_timer(&card->loadtimer);
  728. }
  729. static int slic_upr_queue_request(struct adapter *adapter,
  730. u32 upr_request,
  731. u32 upr_data,
  732. u32 upr_data_h,
  733. u32 upr_buffer, u32 upr_buffer_h)
  734. {
  735. struct slic_upr *upr;
  736. struct slic_upr *uprqueue;
  737. upr = kmalloc(sizeof(*upr), GFP_ATOMIC);
  738. if (!upr)
  739. return -ENOMEM;
  740. upr->adapter = adapter->port;
  741. upr->upr_request = upr_request;
  742. upr->upr_data = upr_data;
  743. upr->upr_buffer = upr_buffer;
  744. upr->upr_data_h = upr_data_h;
  745. upr->upr_buffer_h = upr_buffer_h;
  746. upr->next = NULL;
  747. if (adapter->upr_list) {
  748. uprqueue = adapter->upr_list;
  749. while (uprqueue->next)
  750. uprqueue = uprqueue->next;
  751. uprqueue->next = upr;
  752. } else {
  753. adapter->upr_list = upr;
  754. }
  755. return 0;
  756. }
  757. static void slic_upr_start(struct adapter *adapter)
  758. {
  759. struct slic_upr *upr;
  760. upr = adapter->upr_list;
  761. if (!upr)
  762. return;
  763. if (adapter->upr_busy)
  764. return;
  765. adapter->upr_busy = 1;
  766. switch (upr->upr_request) {
  767. case SLIC_UPR_STATS:
  768. if (upr->upr_data_h == 0) {
  769. slic_write32(adapter, SLIC_REG_RSTAT, upr->upr_data);
  770. } else {
  771. slic_write64(adapter, SLIC_REG_RSTAT64, upr->upr_data,
  772. upr->upr_data_h);
  773. }
  774. break;
  775. case SLIC_UPR_RLSR:
  776. slic_write64(adapter, SLIC_REG_LSTAT, upr->upr_data,
  777. upr->upr_data_h);
  778. break;
  779. case SLIC_UPR_RCONFIG:
  780. slic_write64(adapter, SLIC_REG_RCONFIG, upr->upr_data,
  781. upr->upr_data_h);
  782. break;
  783. case SLIC_UPR_PING:
  784. slic_write32(adapter, SLIC_REG_PING, 1);
  785. break;
  786. }
  787. slic_flush_write(adapter);
  788. }
  789. static int slic_upr_request(struct adapter *adapter,
  790. u32 upr_request,
  791. u32 upr_data,
  792. u32 upr_data_h,
  793. u32 upr_buffer, u32 upr_buffer_h)
  794. {
  795. unsigned long flags;
  796. int rc;
  797. spin_lock_irqsave(&adapter->upr_lock, flags);
  798. rc = slic_upr_queue_request(adapter,
  799. upr_request,
  800. upr_data,
  801. upr_data_h, upr_buffer, upr_buffer_h);
  802. if (rc)
  803. goto err_unlock_irq;
  804. slic_upr_start(adapter);
  805. err_unlock_irq:
  806. spin_unlock_irqrestore(&adapter->upr_lock, flags);
  807. return rc;
  808. }
  809. static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
  810. {
  811. struct slic_shmemory *sm = &adapter->shmem;
  812. struct slic_shmem_data *sm_data = sm->shmem_data;
  813. u32 lst = sm_data->lnkstatus;
  814. uint linkup;
  815. unsigned char linkspeed;
  816. unsigned char linkduplex;
  817. if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
  818. dma_addr_t phaddr = sm->lnkstatus_phaddr;
  819. slic_upr_queue_request(adapter, SLIC_UPR_RLSR,
  820. cpu_to_le32(lower_32_bits(phaddr)),
  821. cpu_to_le32(upper_32_bits(phaddr)),
  822. 0, 0);
  823. return;
  824. }
  825. if (adapter->state != ADAPT_UP)
  826. return;
  827. linkup = lst & GIG_LINKUP ? LINK_UP : LINK_DOWN;
  828. if (lst & GIG_SPEED_1000)
  829. linkspeed = LINK_1000MB;
  830. else if (lst & GIG_SPEED_100)
  831. linkspeed = LINK_100MB;
  832. else
  833. linkspeed = LINK_10MB;
  834. if (lst & GIG_FULLDUPLEX)
  835. linkduplex = LINK_FULLD;
  836. else
  837. linkduplex = LINK_HALFD;
  838. if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
  839. return;
  840. /* link up event, but nothing has changed */
  841. if ((adapter->linkstate == LINK_UP) &&
  842. (linkup == LINK_UP) &&
  843. (adapter->linkspeed == linkspeed) &&
  844. (adapter->linkduplex == linkduplex))
  845. return;
  846. /* link has changed at this point */
  847. /* link has gone from up to down */
  848. if (linkup == LINK_DOWN) {
  849. adapter->linkstate = LINK_DOWN;
  850. netif_carrier_off(adapter->netdev);
  851. return;
  852. }
  853. /* link has gone from down to up */
  854. adapter->linkspeed = linkspeed;
  855. adapter->linkduplex = linkduplex;
  856. if (adapter->linkstate != LINK_UP) {
  857. /* setup the mac */
  858. slic_config_set(adapter, true);
  859. adapter->linkstate = LINK_UP;
  860. netif_carrier_on(adapter->netdev);
  861. }
  862. }
  863. static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
  864. {
  865. struct sliccard *card = adapter->card;
  866. struct slic_upr *upr;
  867. unsigned long flags;
  868. spin_lock_irqsave(&adapter->upr_lock, flags);
  869. upr = adapter->upr_list;
  870. if (!upr) {
  871. spin_unlock_irqrestore(&adapter->upr_lock, flags);
  872. return;
  873. }
  874. adapter->upr_list = upr->next;
  875. upr->next = NULL;
  876. adapter->upr_busy = 0;
  877. switch (upr->upr_request) {
  878. case SLIC_UPR_STATS: {
  879. struct slic_shmemory *sm = &adapter->shmem;
  880. struct slic_shmem_data *sm_data = sm->shmem_data;
  881. struct slic_stats *stats = &sm_data->stats;
  882. struct slic_stats *old = &adapter->inicstats_prev;
  883. struct slicnet_stats *stst = &adapter->slic_stats;
  884. if (isr & ISR_UPCERR) {
  885. dev_err(&adapter->netdev->dev,
  886. "SLIC_UPR_STATS command failed isr[%x]\n", isr);
  887. break;
  888. }
  889. UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs, stats->xmit_tcp_segs,
  890. old->xmit_tcp_segs);
  891. UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes, stats->xmit_tcp_bytes,
  892. old->xmit_tcp_bytes);
  893. UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs, stats->rcv_tcp_segs,
  894. old->rcv_tcp_segs);
  895. UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes, stats->rcv_tcp_bytes,
  896. old->rcv_tcp_bytes);
  897. UPDATE_STATS_GB(stst->iface.xmt_bytes, stats->xmit_bytes,
  898. old->xmit_bytes);
  899. UPDATE_STATS_GB(stst->iface.xmt_ucast, stats->xmit_unicasts,
  900. old->xmit_unicasts);
  901. UPDATE_STATS_GB(stst->iface.rcv_bytes, stats->rcv_bytes,
  902. old->rcv_bytes);
  903. UPDATE_STATS_GB(stst->iface.rcv_ucast, stats->rcv_unicasts,
  904. old->rcv_unicasts);
  905. UPDATE_STATS_GB(stst->iface.xmt_errors, stats->xmit_collisions,
  906. old->xmit_collisions);
  907. UPDATE_STATS_GB(stst->iface.xmt_errors,
  908. stats->xmit_excess_collisions,
  909. old->xmit_excess_collisions);
  910. UPDATE_STATS_GB(stst->iface.xmt_errors, stats->xmit_other_error,
  911. old->xmit_other_error);
  912. UPDATE_STATS_GB(stst->iface.rcv_errors, stats->rcv_other_error,
  913. old->rcv_other_error);
  914. UPDATE_STATS_GB(stst->iface.rcv_discards, stats->rcv_drops,
  915. old->rcv_drops);
  916. if (stats->rcv_drops > old->rcv_drops)
  917. adapter->rcv_drops += (stats->rcv_drops -
  918. old->rcv_drops);
  919. memcpy_fromio(old, stats, sizeof(*stats));
  920. break;
  921. }
  922. case SLIC_UPR_RLSR:
  923. slic_link_upr_complete(adapter, isr);
  924. break;
  925. case SLIC_UPR_RCONFIG:
  926. break;
  927. case SLIC_UPR_PING:
  928. card->pingstatus |= (isr & ISR_PINGDSMASK);
  929. break;
  930. }
  931. kfree(upr);
  932. slic_upr_start(adapter);
  933. spin_unlock_irqrestore(&adapter->upr_lock, flags);
  934. }
  935. static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
  936. {
  937. return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
  938. 0, 0);
  939. }
  940. /*
  941. * Compute a checksum of the EEPROM according to RFC 1071.
  942. */
  943. static u16 slic_eeprom_cksum(void *eeprom, unsigned int len)
  944. {
  945. u16 *wp = eeprom;
  946. u32 checksum = 0;
  947. while (len > 1) {
  948. checksum += *(wp++);
  949. len -= 2;
  950. }
  951. if (len > 0)
  952. checksum += *(u8 *)wp;
  953. while (checksum >> 16)
  954. checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
  955. return ~checksum;
  956. }
  957. static void slic_rspqueue_free(struct adapter *adapter)
  958. {
  959. int i;
  960. struct slic_rspqueue *rspq = &adapter->rspqueue;
  961. for (i = 0; i < rspq->num_pages; i++) {
  962. if (rspq->vaddr[i]) {
  963. pci_free_consistent(adapter->pcidev, PAGE_SIZE,
  964. rspq->vaddr[i], rspq->paddr[i]);
  965. }
  966. rspq->vaddr[i] = NULL;
  967. rspq->paddr[i] = 0;
  968. }
  969. rspq->offset = 0;
  970. rspq->pageindex = 0;
  971. rspq->rspbuf = NULL;
  972. }
  973. static int slic_rspqueue_init(struct adapter *adapter)
  974. {
  975. int i;
  976. struct slic_rspqueue *rspq = &adapter->rspqueue;
  977. u32 paddrh = 0;
  978. memset(rspq, 0, sizeof(struct slic_rspqueue));
  979. rspq->num_pages = SLIC_RSPQ_PAGES_GB;
  980. for (i = 0; i < rspq->num_pages; i++) {
  981. rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
  982. PAGE_SIZE,
  983. &rspq->paddr[i]);
  984. if (!rspq->vaddr[i]) {
  985. dev_err(&adapter->pcidev->dev,
  986. "pci_alloc_consistent failed\n");
  987. slic_rspqueue_free(adapter);
  988. return -ENOMEM;
  989. }
  990. if (paddrh == 0) {
  991. slic_write32(adapter, SLIC_REG_RBAR,
  992. rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE);
  993. } else {
  994. slic_write64(adapter, SLIC_REG_RBAR64,
  995. rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE,
  996. paddrh);
  997. }
  998. }
  999. rspq->offset = 0;
  1000. rspq->pageindex = 0;
  1001. rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
  1002. return 0;
  1003. }
  1004. static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
  1005. {
  1006. struct slic_rspqueue *rspq = &adapter->rspqueue;
  1007. struct slic_rspbuf *buf;
  1008. if (!(rspq->rspbuf->status))
  1009. return NULL;
  1010. buf = rspq->rspbuf;
  1011. if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
  1012. rspq->rspbuf++;
  1013. } else {
  1014. slic_write64(adapter, SLIC_REG_RBAR64,
  1015. rspq->paddr[rspq->pageindex] |
  1016. SLIC_RSPQ_BUFSINPAGE, 0);
  1017. rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
  1018. rspq->offset = 0;
  1019. rspq->rspbuf = (struct slic_rspbuf *)
  1020. rspq->vaddr[rspq->pageindex];
  1021. }
  1022. return buf;
  1023. }
  1024. static void slic_cmdqmem_free(struct adapter *adapter)
  1025. {
  1026. struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
  1027. int i;
  1028. for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
  1029. if (cmdqmem->pages[i]) {
  1030. pci_free_consistent(adapter->pcidev,
  1031. PAGE_SIZE,
  1032. (void *)cmdqmem->pages[i],
  1033. cmdqmem->dma_pages[i]);
  1034. }
  1035. }
  1036. memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
  1037. }
  1038. static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
  1039. {
  1040. struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
  1041. u32 *pageaddr;
  1042. if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
  1043. return NULL;
  1044. pageaddr = pci_alloc_consistent(adapter->pcidev,
  1045. PAGE_SIZE,
  1046. &cmdqmem->dma_pages[cmdqmem->pagecnt]);
  1047. if (!pageaddr)
  1048. return NULL;
  1049. cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
  1050. cmdqmem->pagecnt++;
  1051. return pageaddr;
  1052. }
  1053. static void slic_cmdq_free(struct adapter *adapter)
  1054. {
  1055. struct slic_hostcmd *cmd;
  1056. cmd = adapter->cmdq_all.head;
  1057. while (cmd) {
  1058. if (cmd->busy) {
  1059. struct sk_buff *tempskb;
  1060. tempskb = cmd->skb;
  1061. if (tempskb) {
  1062. cmd->skb = NULL;
  1063. dev_kfree_skb_irq(tempskb);
  1064. }
  1065. }
  1066. cmd = cmd->next_all;
  1067. }
  1068. memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
  1069. memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
  1070. memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
  1071. slic_cmdqmem_free(adapter);
  1072. }
  1073. static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
  1074. {
  1075. struct slic_hostcmd *cmd;
  1076. struct slic_hostcmd *prev;
  1077. struct slic_hostcmd *tail;
  1078. struct slic_cmdqueue *cmdq;
  1079. int cmdcnt;
  1080. void *cmdaddr;
  1081. ulong phys_addr;
  1082. u32 phys_addrl;
  1083. u32 phys_addrh;
  1084. struct slic_handle *pslic_handle;
  1085. unsigned long flags;
  1086. cmdaddr = page;
  1087. cmd = cmdaddr;
  1088. cmdcnt = 0;
  1089. phys_addr = virt_to_bus((void *)page);
  1090. phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
  1091. phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
  1092. prev = NULL;
  1093. tail = cmd;
  1094. while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
  1095. (adapter->slic_handle_ix < 256)) {
  1096. /* Allocate and initialize a SLIC_HANDLE for this command */
  1097. spin_lock_irqsave(&adapter->handle_lock, flags);
  1098. pslic_handle = adapter->pfree_slic_handles;
  1099. adapter->pfree_slic_handles = pslic_handle->next;
  1100. spin_unlock_irqrestore(&adapter->handle_lock, flags);
  1101. pslic_handle->type = SLIC_HANDLE_CMD;
  1102. pslic_handle->address = (void *)cmd;
  1103. pslic_handle->offset = (ushort)adapter->slic_handle_ix++;
  1104. pslic_handle->other_handle = NULL;
  1105. pslic_handle->next = NULL;
  1106. cmd->pslic_handle = pslic_handle;
  1107. cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
  1108. cmd->busy = false;
  1109. cmd->paddrl = phys_addrl;
  1110. cmd->paddrh = phys_addrh;
  1111. cmd->next_all = prev;
  1112. cmd->next = prev;
  1113. prev = cmd;
  1114. phys_addrl += SLIC_HOSTCMD_SIZE;
  1115. cmdaddr += SLIC_HOSTCMD_SIZE;
  1116. cmd = cmdaddr;
  1117. cmdcnt++;
  1118. }
  1119. cmdq = &adapter->cmdq_all;
  1120. cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
  1121. tail->next_all = cmdq->head;
  1122. cmdq->head = prev;
  1123. cmdq = &adapter->cmdq_free;
  1124. spin_lock_irqsave(&cmdq->lock, flags);
  1125. cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
  1126. tail->next = cmdq->head;
  1127. cmdq->head = prev;
  1128. spin_unlock_irqrestore(&cmdq->lock, flags);
  1129. }
  1130. static int slic_cmdq_init(struct adapter *adapter)
  1131. {
  1132. int i;
  1133. u32 *pageaddr;
  1134. memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
  1135. memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
  1136. memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
  1137. spin_lock_init(&adapter->cmdq_all.lock);
  1138. spin_lock_init(&adapter->cmdq_free.lock);
  1139. spin_lock_init(&adapter->cmdq_done.lock);
  1140. memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
  1141. adapter->slic_handle_ix = 1;
  1142. for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
  1143. pageaddr = slic_cmdqmem_addpage(adapter);
  1144. if (!pageaddr) {
  1145. slic_cmdq_free(adapter);
  1146. return -ENOMEM;
  1147. }
  1148. slic_cmdq_addcmdpage(adapter, pageaddr);
  1149. }
  1150. adapter->slic_handle_ix = 1;
  1151. return 0;
  1152. }
  1153. static void slic_cmdq_reset(struct adapter *adapter)
  1154. {
  1155. struct slic_hostcmd *hcmd;
  1156. struct sk_buff *skb;
  1157. u32 outstanding;
  1158. unsigned long flags;
  1159. spin_lock_irqsave(&adapter->cmdq_free.lock, flags);
  1160. spin_lock(&adapter->cmdq_done.lock);
  1161. outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
  1162. outstanding -= adapter->cmdq_free.count;
  1163. hcmd = adapter->cmdq_all.head;
  1164. while (hcmd) {
  1165. if (hcmd->busy) {
  1166. skb = hcmd->skb;
  1167. hcmd->busy = 0;
  1168. hcmd->skb = NULL;
  1169. dev_kfree_skb_irq(skb);
  1170. }
  1171. hcmd = hcmd->next_all;
  1172. }
  1173. adapter->cmdq_free.count = 0;
  1174. adapter->cmdq_free.head = NULL;
  1175. adapter->cmdq_free.tail = NULL;
  1176. adapter->cmdq_done.count = 0;
  1177. adapter->cmdq_done.head = NULL;
  1178. adapter->cmdq_done.tail = NULL;
  1179. adapter->cmdq_free.head = adapter->cmdq_all.head;
  1180. hcmd = adapter->cmdq_all.head;
  1181. while (hcmd) {
  1182. adapter->cmdq_free.count++;
  1183. hcmd->next = hcmd->next_all;
  1184. hcmd = hcmd->next_all;
  1185. }
  1186. if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
  1187. dev_err(&adapter->netdev->dev,
  1188. "free_count %d != all count %d\n",
  1189. adapter->cmdq_free.count, adapter->cmdq_all.count);
  1190. }
  1191. spin_unlock(&adapter->cmdq_done.lock);
  1192. spin_unlock_irqrestore(&adapter->cmdq_free.lock, flags);
  1193. }
  1194. static void slic_cmdq_getdone(struct adapter *adapter)
  1195. {
  1196. struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
  1197. struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
  1198. unsigned long flags;
  1199. spin_lock_irqsave(&done_cmdq->lock, flags);
  1200. free_cmdq->head = done_cmdq->head;
  1201. free_cmdq->count = done_cmdq->count;
  1202. done_cmdq->head = NULL;
  1203. done_cmdq->tail = NULL;
  1204. done_cmdq->count = 0;
  1205. spin_unlock_irqrestore(&done_cmdq->lock, flags);
  1206. }
  1207. static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
  1208. {
  1209. struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
  1210. struct slic_hostcmd *cmd = NULL;
  1211. unsigned long flags;
  1212. lock_and_retry:
  1213. spin_lock_irqsave(&cmdq->lock, flags);
  1214. retry:
  1215. cmd = cmdq->head;
  1216. if (cmd) {
  1217. cmdq->head = cmd->next;
  1218. cmdq->count--;
  1219. spin_unlock_irqrestore(&cmdq->lock, flags);
  1220. } else {
  1221. slic_cmdq_getdone(adapter);
  1222. cmd = cmdq->head;
  1223. if (cmd) {
  1224. goto retry;
  1225. } else {
  1226. u32 *pageaddr;
  1227. spin_unlock_irqrestore(&cmdq->lock, flags);
  1228. pageaddr = slic_cmdqmem_addpage(adapter);
  1229. if (pageaddr) {
  1230. slic_cmdq_addcmdpage(adapter, pageaddr);
  1231. goto lock_and_retry;
  1232. }
  1233. }
  1234. }
  1235. return cmd;
  1236. }
  1237. static void slic_cmdq_putdone_irq(struct adapter *adapter,
  1238. struct slic_hostcmd *cmd)
  1239. {
  1240. struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
  1241. spin_lock(&cmdq->lock);
  1242. cmd->busy = 0;
  1243. cmd->next = cmdq->head;
  1244. cmdq->head = cmd;
  1245. cmdq->count++;
  1246. if ((adapter->xmitq_full) && (cmdq->count > 10))
  1247. netif_wake_queue(adapter->netdev);
  1248. spin_unlock(&cmdq->lock);
  1249. }
  1250. static int slic_rcvqueue_fill(struct adapter *adapter)
  1251. {
  1252. void *paddr;
  1253. u32 paddrl;
  1254. u32 paddrh;
  1255. struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
  1256. int i = 0;
  1257. struct device *dev = &adapter->netdev->dev;
  1258. while (i < SLIC_RCVQ_FILLENTRIES) {
  1259. struct slic_rcvbuf *rcvbuf;
  1260. struct sk_buff *skb;
  1261. #ifdef KLUDGE_FOR_4GB_BOUNDARY
  1262. retry_rcvqfill:
  1263. #endif
  1264. skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
  1265. if (skb) {
  1266. paddr = (void *)(unsigned long)
  1267. pci_map_single(adapter->pcidev,
  1268. skb->data,
  1269. SLIC_RCVQ_RCVBUFSIZE,
  1270. PCI_DMA_FROMDEVICE);
  1271. paddrl = SLIC_GET_ADDR_LOW(paddr);
  1272. paddrh = SLIC_GET_ADDR_HIGH(paddr);
  1273. skb->len = SLIC_RCVBUF_HEADSIZE;
  1274. rcvbuf = (struct slic_rcvbuf *)skb->head;
  1275. rcvbuf->status = 0;
  1276. skb->next = NULL;
  1277. #ifdef KLUDGE_FOR_4GB_BOUNDARY
  1278. if (paddrl == 0) {
  1279. dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
  1280. __func__);
  1281. dev_err(dev, "skb[%p] PROBLEM\n", skb);
  1282. dev_err(dev, " skbdata[%p]\n",
  1283. skb->data);
  1284. dev_err(dev, " skblen[%x]\n", skb->len);
  1285. dev_err(dev, " paddr[%p]\n", paddr);
  1286. dev_err(dev, " paddrl[%x]\n", paddrl);
  1287. dev_err(dev, " paddrh[%x]\n", paddrh);
  1288. dev_err(dev, " rcvq->head[%p]\n",
  1289. rcvq->head);
  1290. dev_err(dev, " rcvq->tail[%p]\n",
  1291. rcvq->tail);
  1292. dev_err(dev, " rcvq->count[%x]\n",
  1293. rcvq->count);
  1294. dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
  1295. goto retry_rcvqfill;
  1296. }
  1297. #else
  1298. if (paddrl == 0) {
  1299. dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
  1300. __func__);
  1301. dev_err(dev, "skb[%p] PROBLEM\n", skb);
  1302. dev_err(dev, " skbdata[%p]\n",
  1303. skb->data);
  1304. dev_err(dev, " skblen[%x]\n", skb->len);
  1305. dev_err(dev, " paddr[%p]\n", paddr);
  1306. dev_err(dev, " paddrl[%x]\n", paddrl);
  1307. dev_err(dev, " paddrh[%x]\n", paddrh);
  1308. dev_err(dev, " rcvq->head[%p]\n",
  1309. rcvq->head);
  1310. dev_err(dev, " rcvq->tail[%p]\n",
  1311. rcvq->tail);
  1312. dev_err(dev, " rcvq->count[%x]\n",
  1313. rcvq->count);
  1314. dev_err(dev, "GIVE TO CARD ANYWAY\n");
  1315. }
  1316. #endif
  1317. if (paddrh == 0) {
  1318. slic_write32(adapter, SLIC_REG_HBAR,
  1319. (u32)paddrl);
  1320. } else {
  1321. slic_write64(adapter, SLIC_REG_HBAR64, paddrl,
  1322. paddrh);
  1323. }
  1324. if (rcvq->head)
  1325. rcvq->tail->next = skb;
  1326. else
  1327. rcvq->head = skb;
  1328. rcvq->tail = skb;
  1329. rcvq->count++;
  1330. i++;
  1331. } else {
  1332. dev_err(&adapter->netdev->dev,
  1333. "slic_rcvqueue_fill could only get [%d] skbuffs\n",
  1334. i);
  1335. break;
  1336. }
  1337. }
  1338. return i;
  1339. }
  1340. static void slic_rcvqueue_free(struct adapter *adapter)
  1341. {
  1342. struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
  1343. struct sk_buff *skb;
  1344. while (rcvq->head) {
  1345. skb = rcvq->head;
  1346. rcvq->head = rcvq->head->next;
  1347. dev_kfree_skb(skb);
  1348. }
  1349. rcvq->tail = NULL;
  1350. rcvq->head = NULL;
  1351. rcvq->count = 0;
  1352. }
  1353. static int slic_rcvqueue_init(struct adapter *adapter)
  1354. {
  1355. int i, count;
  1356. struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
  1357. rcvq->tail = NULL;
  1358. rcvq->head = NULL;
  1359. rcvq->size = SLIC_RCVQ_ENTRIES;
  1360. rcvq->errors = 0;
  1361. rcvq->count = 0;
  1362. i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
  1363. count = 0;
  1364. while (i) {
  1365. count += slic_rcvqueue_fill(adapter);
  1366. i--;
  1367. }
  1368. if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
  1369. slic_rcvqueue_free(adapter);
  1370. return -ENOMEM;
  1371. }
  1372. return 0;
  1373. }
  1374. static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
  1375. {
  1376. struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
  1377. struct sk_buff *skb;
  1378. struct slic_rcvbuf *rcvbuf;
  1379. int count;
  1380. if (rcvq->count) {
  1381. skb = rcvq->head;
  1382. rcvbuf = (struct slic_rcvbuf *)skb->head;
  1383. if (rcvbuf->status & IRHDDR_SVALID) {
  1384. rcvq->head = rcvq->head->next;
  1385. skb->next = NULL;
  1386. rcvq->count--;
  1387. } else {
  1388. skb = NULL;
  1389. }
  1390. } else {
  1391. dev_err(&adapter->netdev->dev,
  1392. "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
  1393. skb = NULL;
  1394. }
  1395. while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
  1396. count = slic_rcvqueue_fill(adapter);
  1397. if (!count)
  1398. break;
  1399. }
  1400. if (skb)
  1401. rcvq->errors = 0;
  1402. return skb;
  1403. }
  1404. static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
  1405. {
  1406. struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
  1407. void *paddr;
  1408. u32 paddrl;
  1409. u32 paddrh;
  1410. struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
  1411. struct device *dev;
  1412. paddr = (void *)(unsigned long)
  1413. pci_map_single(adapter->pcidev, skb->head,
  1414. SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
  1415. rcvbuf->status = 0;
  1416. skb->next = NULL;
  1417. paddrl = SLIC_GET_ADDR_LOW(paddr);
  1418. paddrh = SLIC_GET_ADDR_HIGH(paddr);
  1419. if (paddrl == 0) {
  1420. dev = &adapter->netdev->dev;
  1421. dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
  1422. __func__);
  1423. dev_err(dev, "skb[%p] PROBLEM\n", skb);
  1424. dev_err(dev, " skbdata[%p]\n", skb->data);
  1425. dev_err(dev, " skblen[%x]\n", skb->len);
  1426. dev_err(dev, " paddr[%p]\n", paddr);
  1427. dev_err(dev, " paddrl[%x]\n", paddrl);
  1428. dev_err(dev, " paddrh[%x]\n", paddrh);
  1429. dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
  1430. dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
  1431. dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
  1432. }
  1433. if (paddrh == 0)
  1434. slic_write32(adapter, SLIC_REG_HBAR, (u32)paddrl);
  1435. else
  1436. slic_write64(adapter, SLIC_REG_HBAR64, paddrl, paddrh);
  1437. if (rcvq->head)
  1438. rcvq->tail->next = skb;
  1439. else
  1440. rcvq->head = skb;
  1441. rcvq->tail = skb;
  1442. rcvq->count++;
  1443. return rcvq->count;
  1444. }
  1445. /*
  1446. * slic_link_event_handler -
  1447. *
  1448. * Initiate a link configuration sequence. The link configuration begins
  1449. * by issuing a READ_LINK_STATUS command to the Utility Processor on the
  1450. * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
  1451. * routine will follow it up witha UP configuration write command, which
  1452. * will also complete asynchronously.
  1453. *
  1454. */
  1455. static int slic_link_event_handler(struct adapter *adapter)
  1456. {
  1457. int status;
  1458. struct slic_shmemory *sm = &adapter->shmem;
  1459. dma_addr_t phaddr = sm->lnkstatus_phaddr;
  1460. if (adapter->state != ADAPT_UP) {
  1461. /* Adapter is not operational. Ignore. */
  1462. return -ENODEV;
  1463. }
  1464. /* no 4GB wrap guaranteed */
  1465. status = slic_upr_request(adapter, SLIC_UPR_RLSR,
  1466. cpu_to_le32(lower_32_bits(phaddr)),
  1467. cpu_to_le32(upper_32_bits(phaddr)), 0, 0);
  1468. return status;
  1469. }
  1470. static void slic_init_cleanup(struct adapter *adapter)
  1471. {
  1472. if (adapter->intrregistered) {
  1473. adapter->intrregistered = 0;
  1474. free_irq(adapter->netdev->irq, adapter->netdev);
  1475. }
  1476. if (adapter->shmem.shmem_data) {
  1477. struct slic_shmemory *sm = &adapter->shmem;
  1478. struct slic_shmem_data *sm_data = sm->shmem_data;
  1479. pci_free_consistent(adapter->pcidev, sizeof(*sm_data), sm_data,
  1480. sm->isr_phaddr);
  1481. }
  1482. if (adapter->pingtimerset) {
  1483. adapter->pingtimerset = 0;
  1484. del_timer(&adapter->pingtimer);
  1485. }
  1486. slic_rspqueue_free(adapter);
  1487. slic_cmdq_free(adapter);
  1488. slic_rcvqueue_free(adapter);
  1489. }
  1490. /*
  1491. * Allocate a mcast_address structure to hold the multicast address.
  1492. * Link it in.
  1493. */
  1494. static int slic_mcast_add_list(struct adapter *adapter, char *address)
  1495. {
  1496. struct mcast_address *mcaddr, *mlist;
  1497. /* Check to see if it already exists */
  1498. mlist = adapter->mcastaddrs;
  1499. while (mlist) {
  1500. if (ether_addr_equal(mlist->address, address))
  1501. return 0;
  1502. mlist = mlist->next;
  1503. }
  1504. /* Doesn't already exist. Allocate a structure to hold it */
  1505. mcaddr = kmalloc(sizeof(*mcaddr), GFP_ATOMIC);
  1506. if (!mcaddr)
  1507. return 1;
  1508. ether_addr_copy(mcaddr->address, address);
  1509. mcaddr->next = adapter->mcastaddrs;
  1510. adapter->mcastaddrs = mcaddr;
  1511. return 0;
  1512. }
  1513. static void slic_mcast_set_list(struct net_device *dev)
  1514. {
  1515. struct adapter *adapter = netdev_priv(dev);
  1516. int status = 0;
  1517. char *addresses;
  1518. struct netdev_hw_addr *ha;
  1519. netdev_for_each_mc_addr(ha, dev) {
  1520. addresses = (char *)&ha->addr;
  1521. status = slic_mcast_add_list(adapter, addresses);
  1522. if (status != 0)
  1523. break;
  1524. slic_mcast_set_bit(adapter, addresses);
  1525. }
  1526. if (adapter->devflags_prev != dev->flags) {
  1527. adapter->macopts = MAC_DIRECTED;
  1528. if (dev->flags) {
  1529. if (dev->flags & IFF_BROADCAST)
  1530. adapter->macopts |= MAC_BCAST;
  1531. if (dev->flags & IFF_PROMISC)
  1532. adapter->macopts |= MAC_PROMISC;
  1533. if (dev->flags & IFF_ALLMULTI)
  1534. adapter->macopts |= MAC_ALLMCAST;
  1535. if (dev->flags & IFF_MULTICAST)
  1536. adapter->macopts |= MAC_MCAST;
  1537. }
  1538. adapter->devflags_prev = dev->flags;
  1539. slic_config_set(adapter, true);
  1540. } else {
  1541. if (status == 0)
  1542. slic_mcast_set_mask(adapter);
  1543. }
  1544. }
  1545. #define XMIT_FAIL_LINK_STATE 1
  1546. #define XMIT_FAIL_ZERO_LENGTH 2
  1547. #define XMIT_FAIL_HOSTCMD_FAIL 3
  1548. static void slic_xmit_build_request(struct adapter *adapter,
  1549. struct slic_hostcmd *hcmd, struct sk_buff *skb)
  1550. {
  1551. struct slic_host64_cmd *ihcmd;
  1552. ulong phys_addr;
  1553. ihcmd = &hcmd->cmd64;
  1554. ihcmd->flags = adapter->port << IHFLG_IFSHFT;
  1555. ihcmd->command = IHCMD_XMT_REQ;
  1556. ihcmd->u.slic_buffers.totlen = skb->len;
  1557. phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
  1558. PCI_DMA_TODEVICE);
  1559. if (pci_dma_mapping_error(adapter->pcidev, phys_addr)) {
  1560. kfree_skb(skb);
  1561. dev_err(&adapter->pcidev->dev, "DMA mapping error\n");
  1562. return;
  1563. }
  1564. ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
  1565. ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
  1566. ihcmd->u.slic_buffers.bufs[0].length = skb->len;
  1567. #if BITS_PER_LONG == 64
  1568. hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] -
  1569. (u64)hcmd) + 31) >> 5);
  1570. #else
  1571. hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
  1572. (u32)hcmd) + 31) >> 5;
  1573. #endif
  1574. }
  1575. static void slic_xmit_fail(struct adapter *adapter,
  1576. struct sk_buff *skb,
  1577. void *cmd, u32 skbtype, u32 status)
  1578. {
  1579. if (adapter->xmitq_full)
  1580. netif_stop_queue(adapter->netdev);
  1581. if ((!cmd) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
  1582. switch (status) {
  1583. case XMIT_FAIL_LINK_STATE:
  1584. dev_err(&adapter->netdev->dev,
  1585. "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
  1586. skb, skb->pkt_type,
  1587. SLIC_LINKSTATE(adapter->linkstate),
  1588. SLIC_ADAPTER_STATE(adapter->state),
  1589. adapter->state,
  1590. SLIC_CARD_STATE(adapter->card->state),
  1591. adapter->card->state);
  1592. break;
  1593. case XMIT_FAIL_ZERO_LENGTH:
  1594. dev_err(&adapter->netdev->dev,
  1595. "xmit_start skb->len == 0 skb[%p] type[%x]\n",
  1596. skb, skb->pkt_type);
  1597. break;
  1598. case XMIT_FAIL_HOSTCMD_FAIL:
  1599. dev_err(&adapter->netdev->dev,
  1600. "xmit_start skb[%p] type[%x] No host commands available\n",
  1601. skb, skb->pkt_type);
  1602. break;
  1603. }
  1604. }
  1605. dev_kfree_skb(skb);
  1606. adapter->netdev->stats.tx_dropped++;
  1607. }
  1608. static void slic_rcv_handle_error(struct adapter *adapter,
  1609. struct slic_rcvbuf *rcvbuf)
  1610. {
  1611. struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
  1612. struct net_device *netdev = adapter->netdev;
  1613. if (adapter->devid != SLIC_1GB_DEVICE_ID) {
  1614. if (hdr->frame_status14 & VRHSTAT_802OE)
  1615. adapter->if_events.oflow802++;
  1616. if (hdr->frame_status14 & VRHSTAT_TPOFLO)
  1617. adapter->if_events.Tprtoflow++;
  1618. if (hdr->frame_status_b14 & VRHSTATB_802UE)
  1619. adapter->if_events.uflow802++;
  1620. if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
  1621. adapter->if_events.rcvearly++;
  1622. netdev->stats.rx_fifo_errors++;
  1623. }
  1624. if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
  1625. adapter->if_events.Bufov++;
  1626. netdev->stats.rx_over_errors++;
  1627. }
  1628. if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
  1629. adapter->if_events.Carre++;
  1630. netdev->stats.tx_carrier_errors++;
  1631. }
  1632. if (hdr->frame_status_b14 & VRHSTATB_LONGE)
  1633. adapter->if_events.Longe++;
  1634. if (hdr->frame_status_b14 & VRHSTATB_PREA)
  1635. adapter->if_events.Invp++;
  1636. if (hdr->frame_status_b14 & VRHSTATB_CRC) {
  1637. adapter->if_events.Crc++;
  1638. netdev->stats.rx_crc_errors++;
  1639. }
  1640. if (hdr->frame_status_b14 & VRHSTATB_DRBL)
  1641. adapter->if_events.Drbl++;
  1642. if (hdr->frame_status_b14 & VRHSTATB_CODE)
  1643. adapter->if_events.Code++;
  1644. if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
  1645. adapter->if_events.TpCsum++;
  1646. if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
  1647. adapter->if_events.TpHlen++;
  1648. if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
  1649. adapter->if_events.IpCsum++;
  1650. if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
  1651. adapter->if_events.IpLen++;
  1652. if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
  1653. adapter->if_events.IpHlen++;
  1654. } else {
  1655. if (hdr->frame_statusGB & VGBSTAT_XPERR) {
  1656. u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
  1657. if (xerr == VGBSTAT_XCSERR)
  1658. adapter->if_events.TpCsum++;
  1659. if (xerr == VGBSTAT_XUFLOW)
  1660. adapter->if_events.Tprtoflow++;
  1661. if (xerr == VGBSTAT_XHLEN)
  1662. adapter->if_events.TpHlen++;
  1663. }
  1664. if (hdr->frame_statusGB & VGBSTAT_NETERR) {
  1665. u32 nerr =
  1666. (hdr->
  1667. frame_statusGB >> VGBSTAT_NERRSHFT) &
  1668. VGBSTAT_NERRMSK;
  1669. if (nerr == VGBSTAT_NCSERR)
  1670. adapter->if_events.IpCsum++;
  1671. if (nerr == VGBSTAT_NUFLOW)
  1672. adapter->if_events.IpLen++;
  1673. if (nerr == VGBSTAT_NHLEN)
  1674. adapter->if_events.IpHlen++;
  1675. }
  1676. if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
  1677. u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
  1678. if (lerr == VGBSTAT_LDEARLY)
  1679. adapter->if_events.rcvearly++;
  1680. if (lerr == VGBSTAT_LBOFLO)
  1681. adapter->if_events.Bufov++;
  1682. if (lerr == VGBSTAT_LCODERR)
  1683. adapter->if_events.Code++;
  1684. if (lerr == VGBSTAT_LDBLNBL)
  1685. adapter->if_events.Drbl++;
  1686. if (lerr == VGBSTAT_LCRCERR)
  1687. adapter->if_events.Crc++;
  1688. if (lerr == VGBSTAT_LOFLO)
  1689. adapter->if_events.oflow802++;
  1690. if (lerr == VGBSTAT_LUFLO)
  1691. adapter->if_events.uflow802++;
  1692. }
  1693. }
  1694. }
  1695. #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
  1696. #define M_FAST_PATH 0x0040
  1697. static void slic_rcv_handler(struct adapter *adapter)
  1698. {
  1699. struct net_device *netdev = adapter->netdev;
  1700. struct sk_buff *skb;
  1701. struct slic_rcvbuf *rcvbuf;
  1702. u32 frames = 0;
  1703. while ((skb = slic_rcvqueue_getnext(adapter))) {
  1704. u32 rx_bytes;
  1705. rcvbuf = (struct slic_rcvbuf *)skb->head;
  1706. adapter->card->events++;
  1707. if (rcvbuf->status & IRHDDR_ERR) {
  1708. adapter->rx_errors++;
  1709. slic_rcv_handle_error(adapter, rcvbuf);
  1710. slic_rcvqueue_reinsert(adapter, skb);
  1711. continue;
  1712. }
  1713. if (!slic_mac_filter(adapter, (struct ether_header *)
  1714. rcvbuf->data)) {
  1715. slic_rcvqueue_reinsert(adapter, skb);
  1716. continue;
  1717. }
  1718. skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
  1719. rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
  1720. skb_put(skb, rx_bytes);
  1721. netdev->stats.rx_packets++;
  1722. netdev->stats.rx_bytes += rx_bytes;
  1723. #if SLIC_OFFLOAD_IP_CHECKSUM
  1724. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1725. #endif
  1726. skb->dev = adapter->netdev;
  1727. skb->protocol = eth_type_trans(skb, skb->dev);
  1728. netif_rx(skb);
  1729. ++frames;
  1730. #if SLIC_INTERRUPT_PROCESS_LIMIT
  1731. if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
  1732. adapter->rcv_interrupt_yields++;
  1733. break;
  1734. }
  1735. #endif
  1736. }
  1737. adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
  1738. }
  1739. static void slic_xmit_complete(struct adapter *adapter)
  1740. {
  1741. struct slic_hostcmd *hcmd;
  1742. struct slic_rspbuf *rspbuf;
  1743. u32 frames = 0;
  1744. struct slic_handle_word slic_handle_word;
  1745. do {
  1746. rspbuf = slic_rspqueue_getnext(adapter);
  1747. if (!rspbuf)
  1748. break;
  1749. adapter->xmit_completes++;
  1750. adapter->card->events++;
  1751. /*
  1752. * Get the complete host command buffer
  1753. */
  1754. slic_handle_word.handle_token = rspbuf->hosthandle;
  1755. hcmd =
  1756. adapter->slic_handles[slic_handle_word.handle_index].
  1757. address;
  1758. /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
  1759. if (hcmd->type == SLIC_CMD_DUMB) {
  1760. if (hcmd->skb)
  1761. dev_kfree_skb_irq(hcmd->skb);
  1762. slic_cmdq_putdone_irq(adapter, hcmd);
  1763. }
  1764. rspbuf->status = 0;
  1765. rspbuf->hosthandle = 0;
  1766. frames++;
  1767. } while (1);
  1768. adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
  1769. }
  1770. static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
  1771. struct net_device *dev)
  1772. {
  1773. if (isr & ~ISR_IO) {
  1774. if (isr & ISR_ERR) {
  1775. adapter->error_interrupts++;
  1776. if (isr & ISR_RMISS) {
  1777. int count;
  1778. int pre_count;
  1779. int errors;
  1780. struct slic_rcvqueue *rcvq =
  1781. &adapter->rcvqueue;
  1782. adapter->error_rmiss_interrupts++;
  1783. if (!rcvq->errors)
  1784. rcv_count = rcvq->count;
  1785. pre_count = rcvq->count;
  1786. errors = rcvq->errors;
  1787. while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
  1788. count = slic_rcvqueue_fill(adapter);
  1789. if (!count)
  1790. break;
  1791. }
  1792. } else if (isr & ISR_XDROP) {
  1793. dev_err(&dev->dev,
  1794. "isr & ISR_ERR [%x] ISR_XDROP\n",
  1795. isr);
  1796. } else {
  1797. dev_err(&dev->dev,
  1798. "isr & ISR_ERR [%x]\n",
  1799. isr);
  1800. }
  1801. }
  1802. if (isr & ISR_LEVENT) {
  1803. adapter->linkevent_interrupts++;
  1804. if (slic_link_event_handler(adapter))
  1805. adapter->linkevent_interrupts--;
  1806. }
  1807. if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
  1808. (isr & ISR_UPCBSY)) {
  1809. adapter->upr_interrupts++;
  1810. slic_upr_request_complete(adapter, isr);
  1811. }
  1812. }
  1813. if (isr & ISR_RCV) {
  1814. adapter->rcv_interrupts++;
  1815. slic_rcv_handler(adapter);
  1816. }
  1817. if (isr & ISR_CMD) {
  1818. adapter->xmit_interrupts++;
  1819. slic_xmit_complete(adapter);
  1820. }
  1821. }
  1822. static irqreturn_t slic_interrupt(int irq, void *dev_id)
  1823. {
  1824. struct net_device *dev = dev_id;
  1825. struct adapter *adapter = netdev_priv(dev);
  1826. struct slic_shmemory *sm = &adapter->shmem;
  1827. struct slic_shmem_data *sm_data = sm->shmem_data;
  1828. u32 isr;
  1829. if (sm_data->isr) {
  1830. slic_write32(adapter, SLIC_REG_ICR, ICR_INT_MASK);
  1831. slic_flush_write(adapter);
  1832. isr = sm_data->isr;
  1833. sm_data->isr = 0;
  1834. adapter->num_isrs++;
  1835. switch (adapter->card->state) {
  1836. case CARD_UP:
  1837. slic_interrupt_card_up(isr, adapter, dev);
  1838. break;
  1839. case CARD_DOWN:
  1840. if ((isr & ISR_UPC) ||
  1841. (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
  1842. adapter->upr_interrupts++;
  1843. slic_upr_request_complete(adapter, isr);
  1844. }
  1845. break;
  1846. }
  1847. adapter->all_reg_writes += 2;
  1848. adapter->isr_reg_writes++;
  1849. slic_write32(adapter, SLIC_REG_ISR, 0);
  1850. } else {
  1851. adapter->false_interrupts++;
  1852. }
  1853. return IRQ_HANDLED;
  1854. }
  1855. #define NORMAL_ETHFRAME 0
  1856. static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
  1857. {
  1858. struct sliccard *card;
  1859. struct adapter *adapter = netdev_priv(dev);
  1860. struct slic_hostcmd *hcmd = NULL;
  1861. u32 status = 0;
  1862. void *offloadcmd = NULL;
  1863. card = adapter->card;
  1864. if ((adapter->linkstate != LINK_UP) ||
  1865. (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
  1866. status = XMIT_FAIL_LINK_STATE;
  1867. goto xmit_fail;
  1868. } else if (skb->len == 0) {
  1869. status = XMIT_FAIL_ZERO_LENGTH;
  1870. goto xmit_fail;
  1871. }
  1872. hcmd = slic_cmdq_getfree(adapter);
  1873. if (!hcmd) {
  1874. adapter->xmitq_full = 1;
  1875. status = XMIT_FAIL_HOSTCMD_FAIL;
  1876. goto xmit_fail;
  1877. }
  1878. hcmd->skb = skb;
  1879. hcmd->busy = 1;
  1880. hcmd->type = SLIC_CMD_DUMB;
  1881. slic_xmit_build_request(adapter, hcmd, skb);
  1882. dev->stats.tx_packets++;
  1883. dev->stats.tx_bytes += skb->len;
  1884. #ifdef DEBUG_DUMP
  1885. if (adapter->kill_card) {
  1886. struct slic_host64_cmd ihcmd;
  1887. ihcmd = &hcmd->cmd64;
  1888. ihcmd->flags |= 0x40;
  1889. adapter->kill_card = 0; /* only do this once */
  1890. }
  1891. #endif
  1892. if (hcmd->paddrh == 0) {
  1893. slic_write32(adapter, SLIC_REG_CBAR, (hcmd->paddrl |
  1894. hcmd->cmdsize));
  1895. } else {
  1896. slic_write64(adapter, SLIC_REG_CBAR64,
  1897. hcmd->paddrl | hcmd->cmdsize, hcmd->paddrh);
  1898. }
  1899. xmit_done:
  1900. return NETDEV_TX_OK;
  1901. xmit_fail:
  1902. slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
  1903. goto xmit_done;
  1904. }
  1905. static void slic_adapter_freeresources(struct adapter *adapter)
  1906. {
  1907. slic_init_cleanup(adapter);
  1908. adapter->error_interrupts = 0;
  1909. adapter->rcv_interrupts = 0;
  1910. adapter->xmit_interrupts = 0;
  1911. adapter->linkevent_interrupts = 0;
  1912. adapter->upr_interrupts = 0;
  1913. adapter->num_isrs = 0;
  1914. adapter->xmit_completes = 0;
  1915. adapter->rcv_broadcasts = 0;
  1916. adapter->rcv_multicasts = 0;
  1917. adapter->rcv_unicasts = 0;
  1918. }
  1919. static int slic_adapter_allocresources(struct adapter *adapter,
  1920. unsigned long *flags)
  1921. {
  1922. if (!adapter->intrregistered) {
  1923. int retval;
  1924. spin_unlock_irqrestore(&slic_global.driver_lock, *flags);
  1925. retval = request_irq(adapter->netdev->irq,
  1926. &slic_interrupt,
  1927. IRQF_SHARED,
  1928. adapter->netdev->name, adapter->netdev);
  1929. spin_lock_irqsave(&slic_global.driver_lock, *flags);
  1930. if (retval) {
  1931. dev_err(&adapter->netdev->dev,
  1932. "request_irq (%s) FAILED [%x]\n",
  1933. adapter->netdev->name, retval);
  1934. return retval;
  1935. }
  1936. adapter->intrregistered = 1;
  1937. }
  1938. return 0;
  1939. }
  1940. /*
  1941. * slic_if_init
  1942. *
  1943. * Perform initialization of our slic interface.
  1944. *
  1945. */
  1946. static int slic_if_init(struct adapter *adapter, unsigned long *flags)
  1947. {
  1948. struct sliccard *card = adapter->card;
  1949. struct net_device *dev = adapter->netdev;
  1950. struct slic_shmemory *sm = &adapter->shmem;
  1951. struct slic_shmem_data *sm_data = sm->shmem_data;
  1952. int rc;
  1953. /* adapter should be down at this point */
  1954. if (adapter->state != ADAPT_DOWN) {
  1955. dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
  1956. __func__);
  1957. rc = -EIO;
  1958. goto err;
  1959. }
  1960. adapter->devflags_prev = dev->flags;
  1961. adapter->macopts = MAC_DIRECTED;
  1962. if (dev->flags) {
  1963. if (dev->flags & IFF_BROADCAST)
  1964. adapter->macopts |= MAC_BCAST;
  1965. if (dev->flags & IFF_PROMISC)
  1966. adapter->macopts |= MAC_PROMISC;
  1967. if (dev->flags & IFF_ALLMULTI)
  1968. adapter->macopts |= MAC_ALLMCAST;
  1969. if (dev->flags & IFF_MULTICAST)
  1970. adapter->macopts |= MAC_MCAST;
  1971. }
  1972. rc = slic_adapter_allocresources(adapter, flags);
  1973. if (rc) {
  1974. dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
  1975. rc);
  1976. slic_adapter_freeresources(adapter);
  1977. goto err;
  1978. }
  1979. if (!adapter->queues_initialized) {
  1980. rc = slic_rspqueue_init(adapter);
  1981. if (rc)
  1982. goto err;
  1983. rc = slic_cmdq_init(adapter);
  1984. if (rc)
  1985. goto err;
  1986. rc = slic_rcvqueue_init(adapter);
  1987. if (rc)
  1988. goto err;
  1989. adapter->queues_initialized = 1;
  1990. }
  1991. slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
  1992. slic_flush_write(adapter);
  1993. mdelay(1);
  1994. if (!adapter->isp_initialized) {
  1995. unsigned long flags;
  1996. spin_lock_irqsave(&adapter->bit64reglock, flags);
  1997. slic_write32(adapter, SLIC_REG_ADDR_UPPER,
  1998. cpu_to_le32(upper_32_bits(sm->isr_phaddr)));
  1999. slic_write32(adapter, SLIC_REG_ISP,
  2000. cpu_to_le32(lower_32_bits(sm->isr_phaddr)));
  2001. spin_unlock_irqrestore(&adapter->bit64reglock, flags);
  2002. adapter->isp_initialized = 1;
  2003. }
  2004. adapter->state = ADAPT_UP;
  2005. if (!card->loadtimerset) {
  2006. setup_timer(&card->loadtimer, &slic_timer_load_check,
  2007. (ulong)card);
  2008. card->loadtimer.expires =
  2009. jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
  2010. add_timer(&card->loadtimer);
  2011. card->loadtimerset = 1;
  2012. }
  2013. if (!adapter->pingtimerset) {
  2014. setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
  2015. adapter->pingtimer.expires =
  2016. jiffies + (PING_TIMER_INTERVAL * HZ);
  2017. add_timer(&adapter->pingtimer);
  2018. adapter->pingtimerset = 1;
  2019. adapter->card->pingstatus = ISR_PINGMASK;
  2020. }
  2021. /*
  2022. * clear any pending events, then enable interrupts
  2023. */
  2024. sm_data->isr = 0;
  2025. slic_write32(adapter, SLIC_REG_ISR, 0);
  2026. slic_write32(adapter, SLIC_REG_ICR, ICR_INT_ON);
  2027. slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
  2028. slic_flush_write(adapter);
  2029. rc = slic_link_event_handler(adapter);
  2030. if (rc) {
  2031. /* disable interrupts then clear pending events */
  2032. slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
  2033. slic_write32(adapter, SLIC_REG_ISR, 0);
  2034. slic_flush_write(adapter);
  2035. if (adapter->pingtimerset) {
  2036. del_timer(&adapter->pingtimer);
  2037. adapter->pingtimerset = 0;
  2038. }
  2039. if (card->loadtimerset) {
  2040. del_timer(&card->loadtimer);
  2041. card->loadtimerset = 0;
  2042. }
  2043. adapter->state = ADAPT_DOWN;
  2044. slic_adapter_freeresources(adapter);
  2045. }
  2046. err:
  2047. return rc;
  2048. }
  2049. static int slic_entry_open(struct net_device *dev)
  2050. {
  2051. struct adapter *adapter = netdev_priv(dev);
  2052. struct sliccard *card = adapter->card;
  2053. unsigned long flags;
  2054. int status;
  2055. netif_carrier_off(dev);
  2056. spin_lock_irqsave(&slic_global.driver_lock, flags);
  2057. if (!adapter->activated) {
  2058. card->adapters_activated++;
  2059. slic_global.num_slic_ports_active++;
  2060. adapter->activated = 1;
  2061. }
  2062. status = slic_if_init(adapter, &flags);
  2063. if (status != 0) {
  2064. if (adapter->activated) {
  2065. card->adapters_activated--;
  2066. slic_global.num_slic_ports_active--;
  2067. adapter->activated = 0;
  2068. }
  2069. goto spin_unlock;
  2070. }
  2071. if (!card->master)
  2072. card->master = adapter;
  2073. spin_unlock:
  2074. spin_unlock_irqrestore(&slic_global.driver_lock, flags);
  2075. netif_start_queue(adapter->netdev);
  2076. return status;
  2077. }
  2078. static void slic_card_cleanup(struct sliccard *card)
  2079. {
  2080. if (card->loadtimerset) {
  2081. card->loadtimerset = 0;
  2082. del_timer_sync(&card->loadtimer);
  2083. }
  2084. kfree(card);
  2085. }
  2086. static void slic_entry_remove(struct pci_dev *pcidev)
  2087. {
  2088. struct net_device *dev = pci_get_drvdata(pcidev);
  2089. struct adapter *adapter = netdev_priv(dev);
  2090. struct sliccard *card;
  2091. struct mcast_address *mcaddr, *mlist;
  2092. unregister_netdev(dev);
  2093. slic_adapter_freeresources(adapter);
  2094. iounmap(adapter->regs);
  2095. /* free multicast addresses */
  2096. mlist = adapter->mcastaddrs;
  2097. while (mlist) {
  2098. mcaddr = mlist;
  2099. mlist = mlist->next;
  2100. kfree(mcaddr);
  2101. }
  2102. card = adapter->card;
  2103. card->adapters_allocated--;
  2104. adapter->allocated = 0;
  2105. if (!card->adapters_allocated) {
  2106. struct sliccard *curr_card = slic_global.slic_card;
  2107. if (curr_card == card) {
  2108. slic_global.slic_card = card->next;
  2109. } else {
  2110. while (curr_card->next != card)
  2111. curr_card = curr_card->next;
  2112. curr_card->next = card->next;
  2113. }
  2114. slic_global.num_slic_cards--;
  2115. slic_card_cleanup(card);
  2116. }
  2117. free_netdev(dev);
  2118. pci_release_regions(pcidev);
  2119. pci_disable_device(pcidev);
  2120. }
  2121. static int slic_entry_halt(struct net_device *dev)
  2122. {
  2123. struct adapter *adapter = netdev_priv(dev);
  2124. struct sliccard *card = adapter->card;
  2125. unsigned long flags;
  2126. spin_lock_irqsave(&slic_global.driver_lock, flags);
  2127. netif_stop_queue(adapter->netdev);
  2128. adapter->state = ADAPT_DOWN;
  2129. adapter->linkstate = LINK_DOWN;
  2130. adapter->upr_list = NULL;
  2131. adapter->upr_busy = 0;
  2132. adapter->devflags_prev = 0;
  2133. slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
  2134. adapter->all_reg_writes++;
  2135. adapter->icr_reg_writes++;
  2136. slic_config_clear(adapter);
  2137. if (adapter->activated) {
  2138. card->adapters_activated--;
  2139. slic_global.num_slic_ports_active--;
  2140. adapter->activated = 0;
  2141. }
  2142. #ifdef AUTOMATIC_RESET
  2143. slic_write32(adapter, SLIC_REG_RESET_IFACE, 0);
  2144. #endif
  2145. slic_flush_write(adapter);
  2146. /*
  2147. * Reset the adapter's cmd queues
  2148. */
  2149. slic_cmdq_reset(adapter);
  2150. #ifdef AUTOMATIC_RESET
  2151. if (!card->adapters_activated)
  2152. slic_card_init(card, adapter);
  2153. #endif
  2154. spin_unlock_irqrestore(&slic_global.driver_lock, flags);
  2155. netif_carrier_off(dev);
  2156. return 0;
  2157. }
  2158. static struct net_device_stats *slic_get_stats(struct net_device *dev)
  2159. {
  2160. struct adapter *adapter = netdev_priv(dev);
  2161. dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
  2162. dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
  2163. dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
  2164. dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
  2165. dev->stats.tx_heartbeat_errors = 0;
  2166. dev->stats.tx_aborted_errors = 0;
  2167. dev->stats.tx_window_errors = 0;
  2168. dev->stats.tx_fifo_errors = 0;
  2169. dev->stats.rx_frame_errors = 0;
  2170. dev->stats.rx_length_errors = 0;
  2171. return &dev->stats;
  2172. }
  2173. static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2174. {
  2175. struct adapter *adapter = netdev_priv(dev);
  2176. struct ethtool_cmd edata;
  2177. struct ethtool_cmd ecmd;
  2178. u32 data[7];
  2179. u32 intagg;
  2180. switch (cmd) {
  2181. case SIOCSLICSETINTAGG:
  2182. if (copy_from_user(data, rq->ifr_data, 28))
  2183. return -EFAULT;
  2184. intagg = data[0];
  2185. dev_err(&dev->dev, "set interrupt aggregation to %d\n",
  2186. intagg);
  2187. slic_intagg_set(adapter, intagg);
  2188. return 0;
  2189. case SIOCETHTOOL:
  2190. if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
  2191. return -EFAULT;
  2192. if (ecmd.cmd == ETHTOOL_GSET) {
  2193. memset(&edata, 0, sizeof(edata));
  2194. edata.supported = (SUPPORTED_10baseT_Half |
  2195. SUPPORTED_10baseT_Full |
  2196. SUPPORTED_100baseT_Half |
  2197. SUPPORTED_100baseT_Full |
  2198. SUPPORTED_Autoneg | SUPPORTED_MII);
  2199. edata.port = PORT_MII;
  2200. edata.transceiver = XCVR_INTERNAL;
  2201. edata.phy_address = 0;
  2202. if (adapter->linkspeed == LINK_100MB)
  2203. edata.speed = SPEED_100;
  2204. else if (adapter->linkspeed == LINK_10MB)
  2205. edata.speed = SPEED_10;
  2206. else
  2207. edata.speed = 0;
  2208. if (adapter->linkduplex == LINK_FULLD)
  2209. edata.duplex = DUPLEX_FULL;
  2210. else
  2211. edata.duplex = DUPLEX_HALF;
  2212. edata.autoneg = AUTONEG_ENABLE;
  2213. edata.maxtxpkt = 1;
  2214. edata.maxrxpkt = 1;
  2215. if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
  2216. return -EFAULT;
  2217. } else if (ecmd.cmd == ETHTOOL_SSET) {
  2218. if (!capable(CAP_NET_ADMIN))
  2219. return -EPERM;
  2220. if (adapter->linkspeed == LINK_100MB)
  2221. edata.speed = SPEED_100;
  2222. else if (adapter->linkspeed == LINK_10MB)
  2223. edata.speed = SPEED_10;
  2224. else
  2225. edata.speed = 0;
  2226. if (adapter->linkduplex == LINK_FULLD)
  2227. edata.duplex = DUPLEX_FULL;
  2228. else
  2229. edata.duplex = DUPLEX_HALF;
  2230. edata.autoneg = AUTONEG_ENABLE;
  2231. edata.maxtxpkt = 1;
  2232. edata.maxrxpkt = 1;
  2233. if ((ecmd.speed != edata.speed) ||
  2234. (ecmd.duplex != edata.duplex)) {
  2235. u32 speed;
  2236. u32 duplex;
  2237. if (ecmd.speed == SPEED_10)
  2238. speed = 0;
  2239. else
  2240. speed = PCR_SPEED_100;
  2241. if (ecmd.duplex == DUPLEX_FULL)
  2242. duplex = PCR_DUPLEX_FULL;
  2243. else
  2244. duplex = 0;
  2245. slic_link_config(adapter, speed, duplex);
  2246. if (slic_link_event_handler(adapter))
  2247. return -EFAULT;
  2248. }
  2249. }
  2250. return 0;
  2251. default:
  2252. return -EOPNOTSUPP;
  2253. }
  2254. }
  2255. static void slic_config_pci(struct pci_dev *pcidev)
  2256. {
  2257. u16 pci_command;
  2258. u16 new_command;
  2259. pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
  2260. new_command = pci_command | PCI_COMMAND_MASTER
  2261. | PCI_COMMAND_MEMORY
  2262. | PCI_COMMAND_INVALIDATE
  2263. | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
  2264. if (pci_command != new_command)
  2265. pci_write_config_word(pcidev, PCI_COMMAND, new_command);
  2266. }
  2267. static int slic_card_init(struct sliccard *card, struct adapter *adapter)
  2268. {
  2269. struct slic_shmemory *sm = &adapter->shmem;
  2270. struct slic_shmem_data *sm_data = sm->shmem_data;
  2271. struct slic_eeprom *peeprom;
  2272. struct oslic_eeprom *pOeeprom;
  2273. dma_addr_t phys_config;
  2274. u32 phys_configh;
  2275. u32 phys_configl;
  2276. u32 i = 0;
  2277. int status;
  2278. uint macaddrs = card->card_size;
  2279. ushort eecodesize;
  2280. ushort dramsize;
  2281. ushort ee_chksum;
  2282. ushort calc_chksum;
  2283. struct slic_config_mac *pmac;
  2284. unsigned char fruformat;
  2285. unsigned char oemfruformat;
  2286. struct atk_fru *patkfru;
  2287. union oemfru *poemfru;
  2288. unsigned long flags;
  2289. /* Reset everything except PCI configuration space */
  2290. slic_soft_reset(adapter);
  2291. /* Download the microcode */
  2292. status = slic_card_download(adapter);
  2293. if (status)
  2294. return status;
  2295. if (!card->config_set) {
  2296. peeprom = pci_alloc_consistent(adapter->pcidev,
  2297. sizeof(struct slic_eeprom),
  2298. &phys_config);
  2299. if (!peeprom) {
  2300. dev_err(&adapter->pcidev->dev,
  2301. "Failed to allocate DMA memory for EEPROM.\n");
  2302. return -ENOMEM;
  2303. }
  2304. phys_configl = SLIC_GET_ADDR_LOW(phys_config);
  2305. phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
  2306. memset(peeprom, 0, sizeof(struct slic_eeprom));
  2307. slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF);
  2308. slic_flush_write(adapter);
  2309. mdelay(1);
  2310. spin_lock_irqsave(&adapter->bit64reglock, flags);
  2311. slic_write32(adapter, SLIC_REG_ADDR_UPPER,
  2312. cpu_to_le32(upper_32_bits(sm->isr_phaddr)));
  2313. slic_write32(adapter, SLIC_REG_ISP,
  2314. cpu_to_le32(lower_32_bits(sm->isr_phaddr)));
  2315. spin_unlock_irqrestore(&adapter->bit64reglock, flags);
  2316. status = slic_config_get(adapter, phys_configl, phys_configh);
  2317. if (status) {
  2318. dev_err(&adapter->pcidev->dev,
  2319. "Failed to fetch config data from device.\n");
  2320. goto card_init_err;
  2321. }
  2322. for (;;) {
  2323. if (sm_data->isr) {
  2324. if (sm_data->isr & ISR_UPC) {
  2325. sm_data->isr = 0;
  2326. slic_write64(adapter, SLIC_REG_ISP, 0,
  2327. 0);
  2328. slic_write32(adapter, SLIC_REG_ISR, 0);
  2329. slic_flush_write(adapter);
  2330. slic_upr_request_complete(adapter, 0);
  2331. break;
  2332. }
  2333. sm_data->isr = 0;
  2334. slic_write32(adapter, SLIC_REG_ISR, 0);
  2335. slic_flush_write(adapter);
  2336. } else {
  2337. mdelay(1);
  2338. i++;
  2339. if (i > 5000) {
  2340. dev_err(&adapter->pcidev->dev,
  2341. "Fetch of config data timed out.\n");
  2342. slic_write64(adapter, SLIC_REG_ISP,
  2343. 0, 0);
  2344. slic_flush_write(adapter);
  2345. status = -EINVAL;
  2346. goto card_init_err;
  2347. }
  2348. }
  2349. }
  2350. switch (adapter->devid) {
  2351. /* Oasis card */
  2352. case SLIC_2GB_DEVICE_ID:
  2353. /* extract EEPROM data and pointers to EEPROM data */
  2354. pOeeprom = (struct oslic_eeprom *)peeprom;
  2355. eecodesize = pOeeprom->EecodeSize;
  2356. dramsize = pOeeprom->DramSize;
  2357. pmac = pOeeprom->MacInfo;
  2358. fruformat = pOeeprom->FruFormat;
  2359. patkfru = &pOeeprom->AtkFru;
  2360. oemfruformat = pOeeprom->OemFruFormat;
  2361. poemfru = &pOeeprom->OemFru;
  2362. macaddrs = 2;
  2363. /*
  2364. * Minor kludge for Oasis card
  2365. * get 2 MAC addresses from the
  2366. * EEPROM to ensure that function 1
  2367. * gets the Port 1 MAC address
  2368. */
  2369. break;
  2370. default:
  2371. /* extract EEPROM data and pointers to EEPROM data */
  2372. eecodesize = peeprom->EecodeSize;
  2373. dramsize = peeprom->DramSize;
  2374. pmac = peeprom->u2.mac.MacInfo;
  2375. fruformat = peeprom->FruFormat;
  2376. patkfru = &peeprom->AtkFru;
  2377. oemfruformat = peeprom->OemFruFormat;
  2378. poemfru = &peeprom->OemFru;
  2379. break;
  2380. }
  2381. card->config.EepromValid = false;
  2382. /* see if the EEPROM is valid by checking it's checksum */
  2383. if ((eecodesize <= MAX_EECODE_SIZE) &&
  2384. (eecodesize >= MIN_EECODE_SIZE)) {
  2385. ee_chksum =
  2386. *(u16 *)((char *)peeprom + (eecodesize - 2));
  2387. /*
  2388. * calculate the EEPROM checksum
  2389. */
  2390. calc_chksum = slic_eeprom_cksum(peeprom,
  2391. eecodesize - 2);
  2392. /*
  2393. * if the ucdoe chksum flag bit worked,
  2394. * we wouldn't need this
  2395. */
  2396. if (ee_chksum == calc_chksum)
  2397. card->config.EepromValid = true;
  2398. }
  2399. /* copy in the DRAM size */
  2400. card->config.DramSize = dramsize;
  2401. /* copy in the MAC address(es) */
  2402. for (i = 0; i < macaddrs; i++) {
  2403. memcpy(&card->config.MacInfo[i],
  2404. &pmac[i], sizeof(struct slic_config_mac));
  2405. }
  2406. /* copy the Alacritech FRU information */
  2407. card->config.FruFormat = fruformat;
  2408. memcpy(&card->config.AtkFru, patkfru,
  2409. sizeof(struct atk_fru));
  2410. pci_free_consistent(adapter->pcidev,
  2411. sizeof(struct slic_eeprom),
  2412. peeprom, phys_config);
  2413. if (!card->config.EepromValid) {
  2414. slic_write64(adapter, SLIC_REG_ISP, 0, 0);
  2415. slic_flush_write(adapter);
  2416. dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
  2417. return -EINVAL;
  2418. }
  2419. card->config_set = 1;
  2420. }
  2421. status = slic_card_download_gbrcv(adapter);
  2422. if (status)
  2423. return status;
  2424. if (slic_global.dynamic_intagg)
  2425. slic_intagg_set(adapter, 0);
  2426. else
  2427. slic_intagg_set(adapter, adapter->intagg_delay);
  2428. /*
  2429. * Initialize ping status to "ok"
  2430. */
  2431. card->pingstatus = ISR_PINGMASK;
  2432. /*
  2433. * Lastly, mark our card state as up and return success
  2434. */
  2435. card->state = CARD_UP;
  2436. card->reset_in_progress = 0;
  2437. return 0;
  2438. card_init_err:
  2439. pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
  2440. peeprom, phys_config);
  2441. return status;
  2442. }
  2443. static int slic_get_coalesce(struct net_device *dev,
  2444. struct ethtool_coalesce *coalesce)
  2445. {
  2446. struct adapter *adapter = netdev_priv(dev);
  2447. adapter->intagg_delay = coalesce->rx_coalesce_usecs;
  2448. adapter->dynamic_intagg = coalesce->use_adaptive_rx_coalesce;
  2449. return 0;
  2450. }
  2451. static int slic_set_coalesce(struct net_device *dev,
  2452. struct ethtool_coalesce *coalesce)
  2453. {
  2454. struct adapter *adapter = netdev_priv(dev);
  2455. coalesce->rx_coalesce_usecs = adapter->intagg_delay;
  2456. coalesce->use_adaptive_rx_coalesce = adapter->dynamic_intagg;
  2457. return 0;
  2458. }
  2459. static void slic_init_driver(void)
  2460. {
  2461. if (slic_first_init) {
  2462. slic_first_init = 0;
  2463. spin_lock_init(&slic_global.driver_lock);
  2464. }
  2465. }
  2466. static int slic_init_adapter(struct net_device *netdev,
  2467. struct pci_dev *pcidev,
  2468. const struct pci_device_id *pci_tbl_entry,
  2469. void __iomem *memaddr, int chip_idx)
  2470. {
  2471. ushort index;
  2472. struct slic_handle *pslic_handle;
  2473. struct adapter *adapter = netdev_priv(netdev);
  2474. struct slic_shmemory *sm = &adapter->shmem;
  2475. struct slic_shmem_data *sm_data;
  2476. dma_addr_t phaddr;
  2477. /* adapter->pcidev = pcidev;*/
  2478. adapter->vendid = pci_tbl_entry->vendor;
  2479. adapter->devid = pci_tbl_entry->device;
  2480. adapter->subsysid = pci_tbl_entry->subdevice;
  2481. adapter->busnumber = pcidev->bus->number;
  2482. adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
  2483. adapter->functionnumber = (pcidev->devfn & 0x7);
  2484. adapter->regs = memaddr;
  2485. adapter->irq = pcidev->irq;
  2486. adapter->chipid = chip_idx;
  2487. adapter->port = 0;
  2488. adapter->cardindex = adapter->port;
  2489. spin_lock_init(&adapter->upr_lock);
  2490. spin_lock_init(&adapter->bit64reglock);
  2491. spin_lock_init(&adapter->adapter_lock);
  2492. spin_lock_init(&adapter->reset_lock);
  2493. spin_lock_init(&adapter->handle_lock);
  2494. adapter->card_size = 1;
  2495. /*
  2496. * Initialize slic_handle array
  2497. */
  2498. /*
  2499. * Start with 1. 0 is an invalid host handle.
  2500. */
  2501. for (index = 1, pslic_handle = &adapter->slic_handles[1];
  2502. index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
  2503. pslic_handle->token.handle_index = index;
  2504. pslic_handle->type = SLIC_HANDLE_FREE;
  2505. pslic_handle->next = adapter->pfree_slic_handles;
  2506. adapter->pfree_slic_handles = pslic_handle;
  2507. }
  2508. sm_data = pci_zalloc_consistent(adapter->pcidev, sizeof(*sm_data),
  2509. &phaddr);
  2510. if (!sm_data)
  2511. return -ENOMEM;
  2512. sm->shmem_data = sm_data;
  2513. sm->isr_phaddr = phaddr;
  2514. sm->lnkstatus_phaddr = phaddr + offsetof(struct slic_shmem_data,
  2515. lnkstatus);
  2516. sm->stats_phaddr = phaddr + offsetof(struct slic_shmem_data, stats);
  2517. return 0;
  2518. }
  2519. static const struct net_device_ops slic_netdev_ops = {
  2520. .ndo_open = slic_entry_open,
  2521. .ndo_stop = slic_entry_halt,
  2522. .ndo_start_xmit = slic_xmit_start,
  2523. .ndo_do_ioctl = slic_ioctl,
  2524. .ndo_set_mac_address = slic_mac_set_address,
  2525. .ndo_get_stats = slic_get_stats,
  2526. .ndo_set_rx_mode = slic_mcast_set_list,
  2527. .ndo_validate_addr = eth_validate_addr,
  2528. .ndo_change_mtu = eth_change_mtu,
  2529. };
  2530. static u32 slic_card_locate(struct adapter *adapter)
  2531. {
  2532. struct sliccard *card = slic_global.slic_card;
  2533. struct physcard *physcard = slic_global.phys_card;
  2534. ushort card_hostid;
  2535. uint i;
  2536. card_hostid = slic_read32(adapter, SLIC_REG_HOSTID);
  2537. /* Initialize a new card structure if need be */
  2538. if (card_hostid == SLIC_HOSTID_DEFAULT) {
  2539. card = kzalloc(sizeof(*card), GFP_KERNEL);
  2540. if (!card)
  2541. return -ENOMEM;
  2542. card->next = slic_global.slic_card;
  2543. slic_global.slic_card = card;
  2544. card->busnumber = adapter->busnumber;
  2545. card->slotnumber = adapter->slotnumber;
  2546. /* Find an available cardnum */
  2547. for (i = 0; i < SLIC_MAX_CARDS; i++) {
  2548. if (slic_global.cardnuminuse[i] == 0) {
  2549. slic_global.cardnuminuse[i] = 1;
  2550. card->cardnum = i;
  2551. break;
  2552. }
  2553. }
  2554. slic_global.num_slic_cards++;
  2555. } else {
  2556. /* Card exists, find the card this adapter belongs to */
  2557. while (card) {
  2558. if (card->cardnum == card_hostid)
  2559. break;
  2560. card = card->next;
  2561. }
  2562. }
  2563. if (!card)
  2564. return -ENXIO;
  2565. /* Put the adapter in the card's adapter list */
  2566. if (!card->adapter[adapter->port]) {
  2567. card->adapter[adapter->port] = adapter;
  2568. adapter->card = card;
  2569. }
  2570. card->card_size = 1; /* one port per *logical* card */
  2571. while (physcard) {
  2572. for (i = 0; i < SLIC_MAX_PORTS; i++) {
  2573. if (physcard->adapter[i])
  2574. break;
  2575. }
  2576. if (i == SLIC_MAX_PORTS)
  2577. break;
  2578. if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
  2579. break;
  2580. physcard = physcard->next;
  2581. }
  2582. if (!physcard) {
  2583. /* no structure allocated for this physical card yet */
  2584. physcard = kzalloc(sizeof(*physcard), GFP_ATOMIC);
  2585. if (!physcard) {
  2586. if (card_hostid == SLIC_HOSTID_DEFAULT)
  2587. kfree(card);
  2588. return -ENOMEM;
  2589. }
  2590. physcard->next = slic_global.phys_card;
  2591. slic_global.phys_card = physcard;
  2592. physcard->adapters_allocd = 1;
  2593. } else {
  2594. physcard->adapters_allocd++;
  2595. }
  2596. /* Note - this is ZERO relative */
  2597. adapter->physport = physcard->adapters_allocd - 1;
  2598. physcard->adapter[adapter->physport] = adapter;
  2599. adapter->physcard = physcard;
  2600. return 0;
  2601. }
  2602. static int slic_entry_probe(struct pci_dev *pcidev,
  2603. const struct pci_device_id *pci_tbl_entry)
  2604. {
  2605. static int cards_found;
  2606. static int did_version;
  2607. int err = -ENODEV;
  2608. struct net_device *netdev;
  2609. struct adapter *adapter;
  2610. void __iomem *memmapped_ioaddr = NULL;
  2611. ulong mmio_start = 0;
  2612. ulong mmio_len = 0;
  2613. struct sliccard *card = NULL;
  2614. int pci_using_dac = 0;
  2615. err = pci_enable_device(pcidev);
  2616. if (err)
  2617. return err;
  2618. if (did_version++ == 0) {
  2619. dev_info(&pcidev->dev, "%s\n", slic_banner);
  2620. dev_info(&pcidev->dev, "%s\n", slic_proc_version);
  2621. }
  2622. if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
  2623. pci_using_dac = 1;
  2624. err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
  2625. if (err) {
  2626. dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
  2627. goto err_out_disable_pci;
  2628. }
  2629. } else {
  2630. err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
  2631. if (err) {
  2632. dev_err(&pcidev->dev, "no usable DMA configuration\n");
  2633. goto err_out_disable_pci;
  2634. }
  2635. pci_using_dac = 0;
  2636. pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
  2637. }
  2638. err = pci_request_regions(pcidev, DRV_NAME);
  2639. if (err) {
  2640. dev_err(&pcidev->dev, "can't obtain PCI resources\n");
  2641. goto err_out_disable_pci;
  2642. }
  2643. pci_set_master(pcidev);
  2644. netdev = alloc_etherdev(sizeof(struct adapter));
  2645. if (!netdev) {
  2646. err = -ENOMEM;
  2647. goto err_out_exit_slic_probe;
  2648. }
  2649. netdev->ethtool_ops = &slic_ethtool_ops;
  2650. SET_NETDEV_DEV(netdev, &pcidev->dev);
  2651. pci_set_drvdata(pcidev, netdev);
  2652. adapter = netdev_priv(netdev);
  2653. adapter->netdev = netdev;
  2654. adapter->pcidev = pcidev;
  2655. slic_global.dynamic_intagg = adapter->dynamic_intagg;
  2656. if (pci_using_dac)
  2657. netdev->features |= NETIF_F_HIGHDMA;
  2658. mmio_start = pci_resource_start(pcidev, 0);
  2659. mmio_len = pci_resource_len(pcidev, 0);
  2660. memmapped_ioaddr = ioremap_nocache(mmio_start, mmio_len);
  2661. if (!memmapped_ioaddr) {
  2662. dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
  2663. mmio_len, mmio_start);
  2664. err = -ENOMEM;
  2665. goto err_out_free_netdev;
  2666. }
  2667. slic_config_pci(pcidev);
  2668. slic_init_driver();
  2669. err = slic_init_adapter(netdev, pcidev, pci_tbl_entry, memmapped_ioaddr,
  2670. cards_found);
  2671. if (err) {
  2672. dev_err(&pcidev->dev, "failed to init adapter: %i\n", err);
  2673. goto err_out_unmap;
  2674. }
  2675. err = slic_card_locate(adapter);
  2676. if (err) {
  2677. dev_err(&pcidev->dev, "cannot locate card\n");
  2678. goto err_clean_init;
  2679. }
  2680. card = adapter->card;
  2681. if (!adapter->allocated) {
  2682. card->adapters_allocated++;
  2683. adapter->allocated = 1;
  2684. }
  2685. err = slic_card_init(card, adapter);
  2686. if (err)
  2687. goto err_clean_init;
  2688. slic_adapter_set_hwaddr(adapter);
  2689. netdev->base_addr = (unsigned long)memmapped_ioaddr;
  2690. netdev->irq = adapter->irq;
  2691. netdev->netdev_ops = &slic_netdev_ops;
  2692. netif_carrier_off(netdev);
  2693. strcpy(netdev->name, "eth%d");
  2694. err = register_netdev(netdev);
  2695. if (err) {
  2696. dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
  2697. goto err_clean_init;
  2698. }
  2699. cards_found++;
  2700. return 0;
  2701. err_clean_init:
  2702. slic_init_cleanup(adapter);
  2703. err_out_unmap:
  2704. iounmap(memmapped_ioaddr);
  2705. err_out_free_netdev:
  2706. free_netdev(netdev);
  2707. err_out_exit_slic_probe:
  2708. pci_release_regions(pcidev);
  2709. err_out_disable_pci:
  2710. pci_disable_device(pcidev);
  2711. return err;
  2712. }
  2713. static struct pci_driver slic_driver = {
  2714. .name = DRV_NAME,
  2715. .id_table = slic_pci_tbl,
  2716. .probe = slic_entry_probe,
  2717. .remove = slic_entry_remove,
  2718. };
  2719. static int __init slic_module_init(void)
  2720. {
  2721. slic_init_driver();
  2722. return pci_register_driver(&slic_driver);
  2723. }
  2724. static void __exit slic_module_cleanup(void)
  2725. {
  2726. pci_unregister_driver(&slic_driver);
  2727. }
  2728. static const struct ethtool_ops slic_ethtool_ops = {
  2729. .get_coalesce = slic_get_coalesce,
  2730. .set_coalesce = slic_set_coalesce
  2731. };
  2732. module_init(slic_module_init);
  2733. module_exit(slic_module_cleanup);