mac_esp.c 16 KB

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  1. /* mac_esp.c: ESP front-end for Macintosh Quadra systems.
  2. *
  3. * Adapted from jazz_esp.c and the old mac_esp.c.
  4. *
  5. * The pseudo DMA algorithm is based on the one used in NetBSD.
  6. * See sys/arch/mac68k/obio/esp.c for some background information.
  7. *
  8. * Copyright (C) 2007-2008 Finn Thain
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/types.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/delay.h>
  19. #include <linux/io.h>
  20. #include <linux/nubus.h>
  21. #include <linux/slab.h>
  22. #include <asm/irq.h>
  23. #include <asm/dma.h>
  24. #include <asm/macints.h>
  25. #include <asm/macintosh.h>
  26. #include <asm/mac_via.h>
  27. #include <scsi/scsi_host.h>
  28. #include "esp_scsi.h"
  29. #define DRV_MODULE_NAME "mac_esp"
  30. #define PFX DRV_MODULE_NAME ": "
  31. #define DRV_VERSION "1.000"
  32. #define DRV_MODULE_RELDATE "Sept 15, 2007"
  33. #define MAC_ESP_IO_BASE 0x50F00000
  34. #define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
  35. #define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
  36. #define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
  37. #define MAC_ESP_REGS_SPACING 0x402
  38. #define MAC_ESP_PDMA_REG 0xF9800024
  39. #define MAC_ESP_PDMA_REG_SPACING 0x4
  40. #define MAC_ESP_PDMA_IO_OFFSET 0x100
  41. #define esp_read8(REG) mac_esp_read8(esp, REG)
  42. #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
  43. struct mac_esp_priv {
  44. struct esp *esp;
  45. void __iomem *pdma_regs;
  46. void __iomem *pdma_io;
  47. int error;
  48. };
  49. static struct esp *esp_chips[2];
  50. static DEFINE_SPINLOCK(esp_chips_lock);
  51. #define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
  52. platform_get_drvdata((struct platform_device *) \
  53. (esp->dev)))
  54. static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
  55. {
  56. nubus_writeb(val, esp->regs + reg * 16);
  57. }
  58. static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
  59. {
  60. return nubus_readb(esp->regs + reg * 16);
  61. }
  62. /* For pseudo DMA and PIO we need the virtual address
  63. * so this address mapping is the identity mapping.
  64. */
  65. static dma_addr_t mac_esp_map_single(struct esp *esp, void *buf,
  66. size_t sz, int dir)
  67. {
  68. return (dma_addr_t)buf;
  69. }
  70. static int mac_esp_map_sg(struct esp *esp, struct scatterlist *sg,
  71. int num_sg, int dir)
  72. {
  73. int i;
  74. for (i = 0; i < num_sg; i++)
  75. sg[i].dma_address = (u32)sg_virt(&sg[i]);
  76. return num_sg;
  77. }
  78. static void mac_esp_unmap_single(struct esp *esp, dma_addr_t addr,
  79. size_t sz, int dir)
  80. {
  81. /* Nothing to do. */
  82. }
  83. static void mac_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
  84. int num_sg, int dir)
  85. {
  86. /* Nothing to do. */
  87. }
  88. static void mac_esp_reset_dma(struct esp *esp)
  89. {
  90. /* Nothing to do. */
  91. }
  92. static void mac_esp_dma_drain(struct esp *esp)
  93. {
  94. /* Nothing to do. */
  95. }
  96. static void mac_esp_dma_invalidate(struct esp *esp)
  97. {
  98. /* Nothing to do. */
  99. }
  100. static int mac_esp_dma_error(struct esp *esp)
  101. {
  102. return MAC_ESP_GET_PRIV(esp)->error;
  103. }
  104. static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
  105. {
  106. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  107. int i = 500000;
  108. do {
  109. if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
  110. return 0;
  111. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  112. return 1;
  113. udelay(2);
  114. } while (--i);
  115. printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
  116. esp_read8(ESP_STATUS));
  117. mep->error = 1;
  118. return 1;
  119. }
  120. static inline int mac_esp_wait_for_dreq(struct esp *esp)
  121. {
  122. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  123. int i = 500000;
  124. do {
  125. if (mep->pdma_regs == NULL) {
  126. if (via2_scsi_drq_pending())
  127. return 0;
  128. } else {
  129. if (nubus_readl(mep->pdma_regs) & 0x200)
  130. return 0;
  131. }
  132. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  133. return 1;
  134. udelay(2);
  135. } while (--i);
  136. printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
  137. esp_read8(ESP_STATUS));
  138. mep->error = 1;
  139. return 1;
  140. }
  141. #define MAC_ESP_PDMA_LOOP(operands) \
  142. asm volatile ( \
  143. " tstw %1 \n" \
  144. " jbeq 20f \n" \
  145. "1: movew " operands " \n" \
  146. "2: movew " operands " \n" \
  147. "3: movew " operands " \n" \
  148. "4: movew " operands " \n" \
  149. "5: movew " operands " \n" \
  150. "6: movew " operands " \n" \
  151. "7: movew " operands " \n" \
  152. "8: movew " operands " \n" \
  153. "9: movew " operands " \n" \
  154. "10: movew " operands " \n" \
  155. "11: movew " operands " \n" \
  156. "12: movew " operands " \n" \
  157. "13: movew " operands " \n" \
  158. "14: movew " operands " \n" \
  159. "15: movew " operands " \n" \
  160. "16: movew " operands " \n" \
  161. " subqw #1,%1 \n" \
  162. " jbne 1b \n" \
  163. "20: tstw %2 \n" \
  164. " jbeq 30f \n" \
  165. "21: movew " operands " \n" \
  166. " subqw #1,%2 \n" \
  167. " jbne 21b \n" \
  168. "30: tstw %3 \n" \
  169. " jbeq 40f \n" \
  170. "31: moveb " operands " \n" \
  171. "32: nop \n" \
  172. "40: \n" \
  173. " \n" \
  174. " .section __ex_table,\"a\" \n" \
  175. " .align 4 \n" \
  176. " .long 1b,40b \n" \
  177. " .long 2b,40b \n" \
  178. " .long 3b,40b \n" \
  179. " .long 4b,40b \n" \
  180. " .long 5b,40b \n" \
  181. " .long 6b,40b \n" \
  182. " .long 7b,40b \n" \
  183. " .long 8b,40b \n" \
  184. " .long 9b,40b \n" \
  185. " .long 10b,40b \n" \
  186. " .long 11b,40b \n" \
  187. " .long 12b,40b \n" \
  188. " .long 13b,40b \n" \
  189. " .long 14b,40b \n" \
  190. " .long 15b,40b \n" \
  191. " .long 16b,40b \n" \
  192. " .long 21b,40b \n" \
  193. " .long 31b,40b \n" \
  194. " .long 32b,40b \n" \
  195. " .previous \n" \
  196. : "+a" (addr), "+r" (count32), "+r" (count2) \
  197. : "g" (count1), "a" (mep->pdma_io))
  198. static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
  199. u32 dma_count, int write, u8 cmd)
  200. {
  201. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  202. mep->error = 0;
  203. if (!write)
  204. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  205. esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
  206. esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
  207. scsi_esp_cmd(esp, cmd);
  208. do {
  209. unsigned int count32 = esp_count >> 5;
  210. unsigned int count2 = (esp_count & 0x1F) >> 1;
  211. unsigned int count1 = esp_count & 1;
  212. unsigned int start_addr = addr;
  213. if (mac_esp_wait_for_dreq(esp))
  214. break;
  215. if (write) {
  216. MAC_ESP_PDMA_LOOP("%4@,%0@+");
  217. esp_count -= addr - start_addr;
  218. } else {
  219. unsigned int n;
  220. MAC_ESP_PDMA_LOOP("%0@+,%4@");
  221. if (mac_esp_wait_for_empty_fifo(esp))
  222. break;
  223. n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
  224. addr = start_addr + esp_count - n;
  225. esp_count = n;
  226. }
  227. } while (esp_count);
  228. }
  229. /*
  230. * Programmed IO routines follow.
  231. */
  232. static inline unsigned int mac_esp_wait_for_fifo(struct esp *esp)
  233. {
  234. int i = 500000;
  235. do {
  236. unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  237. if (fbytes)
  238. return fbytes;
  239. udelay(2);
  240. } while (--i);
  241. printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
  242. esp_read8(ESP_STATUS));
  243. return 0;
  244. }
  245. static inline int mac_esp_wait_for_intr(struct esp *esp)
  246. {
  247. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  248. int i = 500000;
  249. do {
  250. esp->sreg = esp_read8(ESP_STATUS);
  251. if (esp->sreg & ESP_STAT_INTR)
  252. return 0;
  253. udelay(2);
  254. } while (--i);
  255. printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
  256. mep->error = 1;
  257. return 1;
  258. }
  259. #define MAC_ESP_PIO_LOOP(operands, reg1) \
  260. asm volatile ( \
  261. "1: moveb " operands " \n" \
  262. " subqw #1,%1 \n" \
  263. " jbne 1b \n" \
  264. : "+a" (addr), "+r" (reg1) \
  265. : "a" (fifo))
  266. #define MAC_ESP_PIO_FILL(operands, reg1) \
  267. asm volatile ( \
  268. " moveb " operands " \n" \
  269. " moveb " operands " \n" \
  270. " moveb " operands " \n" \
  271. " moveb " operands " \n" \
  272. " moveb " operands " \n" \
  273. " moveb " operands " \n" \
  274. " moveb " operands " \n" \
  275. " moveb " operands " \n" \
  276. " moveb " operands " \n" \
  277. " moveb " operands " \n" \
  278. " moveb " operands " \n" \
  279. " moveb " operands " \n" \
  280. " moveb " operands " \n" \
  281. " moveb " operands " \n" \
  282. " moveb " operands " \n" \
  283. " moveb " operands " \n" \
  284. " subqw #8,%1 \n" \
  285. " subqw #8,%1 \n" \
  286. : "+a" (addr), "+r" (reg1) \
  287. : "a" (fifo))
  288. #define MAC_ESP_FIFO_SIZE 16
  289. static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
  290. u32 dma_count, int write, u8 cmd)
  291. {
  292. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  293. u8 *fifo = esp->regs + ESP_FDATA * 16;
  294. cmd &= ~ESP_CMD_DMA;
  295. mep->error = 0;
  296. if (write) {
  297. scsi_esp_cmd(esp, cmd);
  298. while (1) {
  299. unsigned int n;
  300. n = mac_esp_wait_for_fifo(esp);
  301. if (!n)
  302. break;
  303. if (n > esp_count)
  304. n = esp_count;
  305. esp_count -= n;
  306. MAC_ESP_PIO_LOOP("%2@,%0@+", n);
  307. if (!esp_count)
  308. break;
  309. if (mac_esp_wait_for_intr(esp))
  310. break;
  311. if (((esp->sreg & ESP_STAT_PMASK) != ESP_DIP) &&
  312. ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP))
  313. break;
  314. esp->ireg = esp_read8(ESP_INTRPT);
  315. if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
  316. ESP_INTR_BSERV)
  317. break;
  318. scsi_esp_cmd(esp, ESP_CMD_TI);
  319. }
  320. } else {
  321. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  322. if (esp_count >= MAC_ESP_FIFO_SIZE)
  323. MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
  324. else
  325. MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
  326. scsi_esp_cmd(esp, cmd);
  327. while (esp_count) {
  328. unsigned int n;
  329. if (mac_esp_wait_for_intr(esp))
  330. break;
  331. if (((esp->sreg & ESP_STAT_PMASK) != ESP_DOP) &&
  332. ((esp->sreg & ESP_STAT_PMASK) != ESP_MOP))
  333. break;
  334. esp->ireg = esp_read8(ESP_INTRPT);
  335. if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
  336. ESP_INTR_BSERV)
  337. break;
  338. n = MAC_ESP_FIFO_SIZE -
  339. (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
  340. if (n > esp_count)
  341. n = esp_count;
  342. if (n == MAC_ESP_FIFO_SIZE) {
  343. MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
  344. } else {
  345. esp_count -= n;
  346. MAC_ESP_PIO_LOOP("%0@+,%2@", n);
  347. }
  348. scsi_esp_cmd(esp, ESP_CMD_TI);
  349. }
  350. }
  351. }
  352. static int mac_esp_irq_pending(struct esp *esp)
  353. {
  354. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  355. return 1;
  356. return 0;
  357. }
  358. static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  359. {
  360. return dma_len > 0xFFFF ? 0xFFFF : dma_len;
  361. }
  362. static irqreturn_t mac_scsi_esp_intr(int irq, void *dev_id)
  363. {
  364. int got_intr;
  365. /*
  366. * This is an edge triggered IRQ, so we have to be careful to
  367. * avoid missing a transition when it is shared by two ESP devices.
  368. */
  369. do {
  370. got_intr = 0;
  371. if (esp_chips[0] &&
  372. (mac_esp_read8(esp_chips[0], ESP_STATUS) & ESP_STAT_INTR)) {
  373. (void)scsi_esp_intr(irq, esp_chips[0]);
  374. got_intr = 1;
  375. }
  376. if (esp_chips[1] &&
  377. (mac_esp_read8(esp_chips[1], ESP_STATUS) & ESP_STAT_INTR)) {
  378. (void)scsi_esp_intr(irq, esp_chips[1]);
  379. got_intr = 1;
  380. }
  381. } while (got_intr);
  382. return IRQ_HANDLED;
  383. }
  384. static struct esp_driver_ops mac_esp_ops = {
  385. .esp_write8 = mac_esp_write8,
  386. .esp_read8 = mac_esp_read8,
  387. .map_single = mac_esp_map_single,
  388. .map_sg = mac_esp_map_sg,
  389. .unmap_single = mac_esp_unmap_single,
  390. .unmap_sg = mac_esp_unmap_sg,
  391. .irq_pending = mac_esp_irq_pending,
  392. .dma_length_limit = mac_esp_dma_length_limit,
  393. .reset_dma = mac_esp_reset_dma,
  394. .dma_drain = mac_esp_dma_drain,
  395. .dma_invalidate = mac_esp_dma_invalidate,
  396. .send_dma_cmd = mac_esp_send_pdma_cmd,
  397. .dma_error = mac_esp_dma_error,
  398. };
  399. static int esp_mac_probe(struct platform_device *dev)
  400. {
  401. struct scsi_host_template *tpnt = &scsi_esp_template;
  402. struct Scsi_Host *host;
  403. struct esp *esp;
  404. int err;
  405. struct mac_esp_priv *mep;
  406. if (!MACH_IS_MAC)
  407. return -ENODEV;
  408. if (dev->id > 1)
  409. return -ENODEV;
  410. host = scsi_host_alloc(tpnt, sizeof(struct esp));
  411. err = -ENOMEM;
  412. if (!host)
  413. goto fail;
  414. host->max_id = 8;
  415. host->use_clustering = DISABLE_CLUSTERING;
  416. esp = shost_priv(host);
  417. esp->host = host;
  418. esp->dev = dev;
  419. esp->command_block = kzalloc(16, GFP_KERNEL);
  420. if (!esp->command_block)
  421. goto fail_unlink;
  422. esp->command_block_dma = (dma_addr_t)esp->command_block;
  423. esp->scsi_id = 7;
  424. host->this_id = esp->scsi_id;
  425. esp->scsi_id_mask = 1 << esp->scsi_id;
  426. mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
  427. if (!mep)
  428. goto fail_free_command_block;
  429. mep->esp = esp;
  430. platform_set_drvdata(dev, mep);
  431. switch (macintosh_config->scsi_type) {
  432. case MAC_SCSI_QUADRA:
  433. esp->cfreq = 16500000;
  434. esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
  435. mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
  436. mep->pdma_regs = NULL;
  437. break;
  438. case MAC_SCSI_QUADRA2:
  439. esp->cfreq = 25000000;
  440. esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
  441. dev->id * MAC_ESP_REGS_SPACING);
  442. mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
  443. mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
  444. dev->id * MAC_ESP_PDMA_REG_SPACING);
  445. nubus_writel(0x1d1, mep->pdma_regs);
  446. break;
  447. case MAC_SCSI_QUADRA3:
  448. /* These quadras have a real DMA controller (the PSC) but we
  449. * don't know how to drive it so we must use PIO instead.
  450. */
  451. esp->cfreq = 25000000;
  452. esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
  453. mep->pdma_io = NULL;
  454. mep->pdma_regs = NULL;
  455. break;
  456. }
  457. esp->ops = &mac_esp_ops;
  458. if (mep->pdma_io == NULL) {
  459. printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
  460. esp_write8(0, ESP_TCLOW);
  461. esp_write8(0, ESP_TCMED);
  462. esp->flags = ESP_FLAG_DISABLE_SYNC;
  463. mac_esp_ops.send_dma_cmd = mac_esp_send_pio_cmd;
  464. } else {
  465. printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
  466. }
  467. host->irq = IRQ_MAC_SCSI;
  468. /* The request_irq() call is intended to succeed for the first device
  469. * and fail for the second device.
  470. */
  471. err = request_irq(host->irq, mac_scsi_esp_intr, 0, "ESP", NULL);
  472. spin_lock(&esp_chips_lock);
  473. if (err < 0 && esp_chips[!dev->id] == NULL) {
  474. spin_unlock(&esp_chips_lock);
  475. goto fail_free_priv;
  476. }
  477. esp_chips[dev->id] = esp;
  478. spin_unlock(&esp_chips_lock);
  479. err = scsi_esp_register(esp, &dev->dev);
  480. if (err)
  481. goto fail_free_irq;
  482. return 0;
  483. fail_free_irq:
  484. spin_lock(&esp_chips_lock);
  485. esp_chips[dev->id] = NULL;
  486. if (esp_chips[!dev->id] == NULL) {
  487. spin_unlock(&esp_chips_lock);
  488. free_irq(host->irq, esp);
  489. } else
  490. spin_unlock(&esp_chips_lock);
  491. fail_free_priv:
  492. kfree(mep);
  493. fail_free_command_block:
  494. kfree(esp->command_block);
  495. fail_unlink:
  496. scsi_host_put(host);
  497. fail:
  498. return err;
  499. }
  500. static int esp_mac_remove(struct platform_device *dev)
  501. {
  502. struct mac_esp_priv *mep = platform_get_drvdata(dev);
  503. struct esp *esp = mep->esp;
  504. unsigned int irq = esp->host->irq;
  505. scsi_esp_unregister(esp);
  506. spin_lock(&esp_chips_lock);
  507. esp_chips[dev->id] = NULL;
  508. if (esp_chips[!dev->id] == NULL) {
  509. spin_unlock(&esp_chips_lock);
  510. free_irq(irq, NULL);
  511. } else
  512. spin_unlock(&esp_chips_lock);
  513. kfree(mep);
  514. kfree(esp->command_block);
  515. scsi_host_put(esp->host);
  516. return 0;
  517. }
  518. static struct platform_driver esp_mac_driver = {
  519. .probe = esp_mac_probe,
  520. .remove = esp_mac_remove,
  521. .driver = {
  522. .name = DRV_MODULE_NAME,
  523. },
  524. };
  525. static int __init mac_esp_init(void)
  526. {
  527. return platform_driver_register(&esp_mac_driver);
  528. }
  529. static void __exit mac_esp_exit(void)
  530. {
  531. platform_driver_unregister(&esp_mac_driver);
  532. }
  533. MODULE_DESCRIPTION("Mac ESP SCSI driver");
  534. MODULE_AUTHOR("Finn Thain <fthain@telegraphics.com.au>");
  535. MODULE_LICENSE("GPL v2");
  536. MODULE_VERSION(DRV_VERSION);
  537. MODULE_ALIAS("platform:" DRV_MODULE_NAME);
  538. module_init(mac_esp_init);
  539. module_exit(mac_esp_exit);