hisi_sas.h 7.9 KB

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  1. /*
  2. * Copyright (c) 2015 Linaro Ltd.
  3. * Copyright (c) 2015 Hisilicon Limited.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. */
  11. #ifndef _HISI_SAS_H_
  12. #define _HISI_SAS_H_
  13. #include <linux/acpi.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/mfd/syscon.h>
  16. #include <linux/module.h>
  17. #include <linux/of_address.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/property.h>
  20. #include <linux/regmap.h>
  21. #include <scsi/sas_ata.h>
  22. #include <scsi/libsas.h>
  23. #define DRV_VERSION "v1.6"
  24. #define HISI_SAS_MAX_PHYS 9
  25. #define HISI_SAS_MAX_QUEUES 32
  26. #define HISI_SAS_QUEUE_SLOTS 512
  27. #define HISI_SAS_MAX_ITCT_ENTRIES 2048
  28. #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
  29. #define HISI_SAS_STATUS_BUF_SZ \
  30. (sizeof(struct hisi_sas_err_record) + 1024)
  31. #define HISI_SAS_COMMAND_TABLE_SZ \
  32. (((sizeof(union hisi_sas_command_table)+3)/4)*4)
  33. #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024)
  34. #define HISI_SAS_MAX_SMP_RESP_SZ 1028
  35. #define HISI_SAS_MAX_STP_RESP_SZ 28
  36. #define DEV_IS_EXPANDER(type) \
  37. ((type == SAS_EDGE_EXPANDER_DEVICE) || \
  38. (type == SAS_FANOUT_EXPANDER_DEVICE))
  39. struct hisi_hba;
  40. enum {
  41. PORT_TYPE_SAS = (1U << 1),
  42. PORT_TYPE_SATA = (1U << 0),
  43. };
  44. enum dev_status {
  45. HISI_SAS_DEV_NORMAL,
  46. HISI_SAS_DEV_EH,
  47. };
  48. enum {
  49. HISI_SAS_INT_ABT_CMD = 0,
  50. HISI_SAS_INT_ABT_DEV = 1,
  51. };
  52. enum hisi_sas_dev_type {
  53. HISI_SAS_DEV_TYPE_STP = 0,
  54. HISI_SAS_DEV_TYPE_SSP,
  55. HISI_SAS_DEV_TYPE_SATA,
  56. };
  57. struct hisi_sas_phy {
  58. struct hisi_hba *hisi_hba;
  59. struct hisi_sas_port *port;
  60. struct asd_sas_phy sas_phy;
  61. struct sas_identify identify;
  62. struct timer_list timer;
  63. struct work_struct phyup_ws;
  64. u64 port_id; /* from hw */
  65. u64 dev_sas_addr;
  66. u64 phy_type;
  67. u64 frame_rcvd_size;
  68. u8 frame_rcvd[32];
  69. u8 phy_attached;
  70. u8 reserved[3];
  71. enum sas_linkrate minimum_linkrate;
  72. enum sas_linkrate maximum_linkrate;
  73. };
  74. struct hisi_sas_port {
  75. struct asd_sas_port sas_port;
  76. u8 port_attached;
  77. u8 id; /* from hw */
  78. struct list_head list;
  79. };
  80. struct hisi_sas_cq {
  81. struct hisi_hba *hisi_hba;
  82. int rd_point;
  83. int id;
  84. };
  85. struct hisi_sas_dq {
  86. struct hisi_hba *hisi_hba;
  87. int wr_point;
  88. int id;
  89. };
  90. struct hisi_sas_device {
  91. enum sas_device_type dev_type;
  92. struct hisi_hba *hisi_hba;
  93. struct domain_device *sas_device;
  94. u64 attached_phy;
  95. u64 device_id;
  96. u64 running_req;
  97. u8 dev_status;
  98. };
  99. struct hisi_sas_slot {
  100. struct list_head entry;
  101. struct sas_task *task;
  102. struct hisi_sas_port *port;
  103. u64 n_elem;
  104. int dlvry_queue;
  105. int dlvry_queue_slot;
  106. int cmplt_queue;
  107. int cmplt_queue_slot;
  108. int idx;
  109. int abort;
  110. void *cmd_hdr;
  111. dma_addr_t cmd_hdr_dma;
  112. void *status_buffer;
  113. dma_addr_t status_buffer_dma;
  114. void *command_table;
  115. dma_addr_t command_table_dma;
  116. struct hisi_sas_sge_page *sge_page;
  117. dma_addr_t sge_page_dma;
  118. struct work_struct abort_slot;
  119. };
  120. struct hisi_sas_tmf_task {
  121. u8 tmf;
  122. u16 tag_of_task_to_be_managed;
  123. };
  124. struct hisi_sas_hw {
  125. int (*hw_init)(struct hisi_hba *hisi_hba);
  126. void (*setup_itct)(struct hisi_hba *hisi_hba,
  127. struct hisi_sas_device *device);
  128. int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx,
  129. struct domain_device *device);
  130. struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
  131. void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no);
  132. int (*get_free_slot)(struct hisi_hba *hisi_hba, int *q, int *s);
  133. void (*start_delivery)(struct hisi_hba *hisi_hba);
  134. int (*prep_ssp)(struct hisi_hba *hisi_hba,
  135. struct hisi_sas_slot *slot, int is_tmf,
  136. struct hisi_sas_tmf_task *tmf);
  137. int (*prep_smp)(struct hisi_hba *hisi_hba,
  138. struct hisi_sas_slot *slot);
  139. int (*prep_stp)(struct hisi_hba *hisi_hba,
  140. struct hisi_sas_slot *slot);
  141. int (*prep_abort)(struct hisi_hba *hisi_hba,
  142. struct hisi_sas_slot *slot,
  143. int device_id, int abort_flag, int tag_to_abort);
  144. int (*slot_complete)(struct hisi_hba *hisi_hba,
  145. struct hisi_sas_slot *slot, int abort);
  146. void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no);
  147. void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no);
  148. void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no);
  149. void (*free_device)(struct hisi_hba *hisi_hba,
  150. struct hisi_sas_device *dev);
  151. int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
  152. int max_command_entries;
  153. int complete_hdr_size;
  154. };
  155. struct hisi_hba {
  156. /* This must be the first element, used by SHOST_TO_SAS_HA */
  157. struct sas_ha_struct *p;
  158. struct platform_device *pdev;
  159. void __iomem *regs;
  160. struct regmap *ctrl;
  161. u32 ctrl_reset_reg;
  162. u32 ctrl_reset_sts_reg;
  163. u32 ctrl_clock_ena_reg;
  164. u8 sas_addr[SAS_ADDR_SIZE];
  165. int n_phy;
  166. int scan_finished;
  167. spinlock_t lock;
  168. struct timer_list timer;
  169. struct workqueue_struct *wq;
  170. int slot_index_count;
  171. unsigned long *slot_index_tags;
  172. /* SCSI/SAS glue */
  173. struct sas_ha_struct sha;
  174. struct Scsi_Host *shost;
  175. struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES];
  176. struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES];
  177. struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS];
  178. struct hisi_sas_port port[HISI_SAS_MAX_PHYS];
  179. int queue_count;
  180. int queue;
  181. struct hisi_sas_slot *slot_prep;
  182. struct dma_pool *sge_page_pool;
  183. struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES];
  184. struct dma_pool *command_table_pool;
  185. struct dma_pool *status_buffer_pool;
  186. struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES];
  187. dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES];
  188. void *complete_hdr[HISI_SAS_MAX_QUEUES];
  189. dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES];
  190. struct hisi_sas_initial_fis *initial_fis;
  191. dma_addr_t initial_fis_dma;
  192. struct hisi_sas_itct *itct;
  193. dma_addr_t itct_dma;
  194. struct hisi_sas_iost *iost;
  195. dma_addr_t iost_dma;
  196. struct hisi_sas_breakpoint *breakpoint;
  197. dma_addr_t breakpoint_dma;
  198. struct hisi_sas_breakpoint *sata_breakpoint;
  199. dma_addr_t sata_breakpoint_dma;
  200. struct hisi_sas_slot *slot_info;
  201. const struct hisi_sas_hw *hw; /* Low level hw interface */
  202. };
  203. /* Generic HW DMA host memory structures */
  204. /* Delivery queue header */
  205. struct hisi_sas_cmd_hdr {
  206. /* dw0 */
  207. __le32 dw0;
  208. /* dw1 */
  209. __le32 dw1;
  210. /* dw2 */
  211. __le32 dw2;
  212. /* dw3 */
  213. __le32 transfer_tags;
  214. /* dw4 */
  215. __le32 data_transfer_len;
  216. /* dw5 */
  217. __le32 first_burst_num;
  218. /* dw6 */
  219. __le32 sg_len;
  220. /* dw7 */
  221. __le32 dw7;
  222. /* dw8-9 */
  223. __le64 cmd_table_addr;
  224. /* dw10-11 */
  225. __le64 sts_buffer_addr;
  226. /* dw12-13 */
  227. __le64 prd_table_addr;
  228. /* dw14-15 */
  229. __le64 dif_prd_table_addr;
  230. };
  231. struct hisi_sas_itct {
  232. __le64 qw0;
  233. __le64 sas_addr;
  234. __le64 qw2;
  235. __le64 qw3;
  236. __le64 qw4_15[12];
  237. };
  238. struct hisi_sas_iost {
  239. __le64 qw0;
  240. __le64 qw1;
  241. __le64 qw2;
  242. __le64 qw3;
  243. };
  244. struct hisi_sas_err_record {
  245. u32 data[4];
  246. };
  247. struct hisi_sas_initial_fis {
  248. struct hisi_sas_err_record err_record;
  249. struct dev_to_host_fis fis;
  250. u32 rsvd[3];
  251. };
  252. struct hisi_sas_breakpoint {
  253. u8 data[128]; /*io128 byte*/
  254. };
  255. struct hisi_sas_sge {
  256. __le64 addr;
  257. __le32 page_ctrl_0;
  258. __le32 page_ctrl_1;
  259. __le32 data_len;
  260. __le32 data_off;
  261. };
  262. struct hisi_sas_command_table_smp {
  263. u8 bytes[44];
  264. };
  265. struct hisi_sas_command_table_stp {
  266. struct host_to_dev_fis command_fis;
  267. u8 dummy[12];
  268. u8 atapi_cdb[ATAPI_CDB_LEN];
  269. };
  270. #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE
  271. struct hisi_sas_sge_page {
  272. struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT];
  273. };
  274. struct hisi_sas_command_table_ssp {
  275. struct ssp_frame_hdr hdr;
  276. union {
  277. struct {
  278. struct ssp_command_iu task;
  279. u32 prot[6];
  280. };
  281. struct ssp_tmf_iu ssp_task;
  282. struct xfer_rdy_iu xfer_rdy;
  283. struct ssp_response_iu ssp_res;
  284. } u;
  285. };
  286. union hisi_sas_command_table {
  287. struct hisi_sas_command_table_ssp ssp;
  288. struct hisi_sas_command_table_smp smp;
  289. struct hisi_sas_command_table_stp stp;
  290. };
  291. extern int hisi_sas_probe(struct platform_device *pdev,
  292. const struct hisi_sas_hw *ops);
  293. extern int hisi_sas_remove(struct platform_device *pdev);
  294. extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy);
  295. extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba,
  296. struct sas_task *task,
  297. struct hisi_sas_slot *slot);
  298. #endif