NCR5380.c 72 KB

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  1. /*
  2. * NCR 5380 generic driver routines. These should make it *trivial*
  3. * to implement 5380 SCSI drivers under Linux with a non-trantor
  4. * architecture.
  5. *
  6. * Note that these routines also work with NR53c400 family chips.
  7. *
  8. * Copyright 1993, Drew Eckhardt
  9. * Visionary Computing
  10. * (Unix and Linux consulting and custom programming)
  11. * drew@colorado.edu
  12. * +1 (303) 666-5836
  13. *
  14. * For more information, please consult
  15. *
  16. * NCR 5380 Family
  17. * SCSI Protocol Controller
  18. * Databook
  19. *
  20. * NCR Microelectronics
  21. * 1635 Aeroplaza Drive
  22. * Colorado Springs, CO 80916
  23. * 1+ (719) 578-3400
  24. * 1+ (800) 334-5454
  25. */
  26. /*
  27. * With contributions from Ray Van Tassle, Ingmar Baumgart,
  28. * Ronald van Cuijlenborg, Alan Cox and others.
  29. */
  30. /* Ported to Atari by Roman Hodek and others. */
  31. /* Adapted for the Sun 3 by Sam Creasey. */
  32. /*
  33. * Design
  34. *
  35. * This is a generic 5380 driver. To use it on a different platform,
  36. * one simply writes appropriate system specific macros (ie, data
  37. * transfer - some PC's will use the I/O bus, 68K's must use
  38. * memory mapped) and drops this file in their 'C' wrapper.
  39. *
  40. * As far as command queueing, two queues are maintained for
  41. * each 5380 in the system - commands that haven't been issued yet,
  42. * and commands that are currently executing. This means that an
  43. * unlimited number of commands may be queued, letting
  44. * more commands propagate from the higher driver levels giving higher
  45. * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
  46. * allowing multiple commands to propagate all the way to a SCSI-II device
  47. * while a command is already executing.
  48. *
  49. *
  50. * Issues specific to the NCR5380 :
  51. *
  52. * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
  53. * piece of hardware that requires you to sit in a loop polling for
  54. * the REQ signal as long as you are connected. Some devices are
  55. * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
  56. * while doing long seek operations. [...] These
  57. * broken devices are the exception rather than the rule and I'd rather
  58. * spend my time optimizing for the normal case.
  59. *
  60. * Architecture :
  61. *
  62. * At the heart of the design is a coroutine, NCR5380_main,
  63. * which is started from a workqueue for each NCR5380 host in the
  64. * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
  65. * removing the commands from the issue queue and calling
  66. * NCR5380_select() if a nexus is not established.
  67. *
  68. * Once a nexus is established, the NCR5380_information_transfer()
  69. * phase goes through the various phases as instructed by the target.
  70. * if the target goes into MSG IN and sends a DISCONNECT message,
  71. * the command structure is placed into the per instance disconnected
  72. * queue, and NCR5380_main tries to find more work. If the target is
  73. * idle for too long, the system will try to sleep.
  74. *
  75. * If a command has disconnected, eventually an interrupt will trigger,
  76. * calling NCR5380_intr() which will in turn call NCR5380_reselect
  77. * to reestablish a nexus. This will run main if necessary.
  78. *
  79. * On command termination, the done function will be called as
  80. * appropriate.
  81. *
  82. * SCSI pointers are maintained in the SCp field of SCSI command
  83. * structures, being initialized after the command is connected
  84. * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
  85. * Note that in violation of the standard, an implicit SAVE POINTERS operation
  86. * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
  87. */
  88. /*
  89. * Using this file :
  90. * This file a skeleton Linux SCSI driver for the NCR 5380 series
  91. * of chips. To use it, you write an architecture specific functions
  92. * and macros and include this file in your driver.
  93. *
  94. * These macros control options :
  95. * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
  96. * defined.
  97. *
  98. * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
  99. * for commands that return with a CHECK CONDITION status.
  100. *
  101. * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
  102. * transceivers.
  103. *
  104. * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
  105. *
  106. * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
  107. *
  108. * These macros MUST be defined :
  109. *
  110. * NCR5380_read(register) - read from the specified register
  111. *
  112. * NCR5380_write(register, value) - write to the specific register
  113. *
  114. * NCR5380_implementation_fields - additional fields needed for this
  115. * specific implementation of the NCR5380
  116. *
  117. * Either real DMA *or* pseudo DMA may be implemented
  118. *
  119. * NCR5380_dma_write_setup(instance, src, count) - initialize
  120. * NCR5380_dma_read_setup(instance, dst, count) - initialize
  121. * NCR5380_dma_residual(instance); - residual count
  122. *
  123. * The generic driver is initialized by calling NCR5380_init(instance),
  124. * after setting the appropriate host specific fields and ID. If the
  125. * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
  126. * possible) function may be used.
  127. */
  128. #ifndef NCR5380_io_delay
  129. #define NCR5380_io_delay(x)
  130. #endif
  131. #ifndef NCR5380_acquire_dma_irq
  132. #define NCR5380_acquire_dma_irq(x) (1)
  133. #endif
  134. #ifndef NCR5380_release_dma_irq
  135. #define NCR5380_release_dma_irq(x)
  136. #endif
  137. static int do_abort(struct Scsi_Host *);
  138. static void do_reset(struct Scsi_Host *);
  139. /**
  140. * initialize_SCp - init the scsi pointer field
  141. * @cmd: command block to set up
  142. *
  143. * Set up the internal fields in the SCSI command.
  144. */
  145. static inline void initialize_SCp(struct scsi_cmnd *cmd)
  146. {
  147. /*
  148. * Initialize the Scsi Pointer field so that all of the commands in the
  149. * various queues are valid.
  150. */
  151. if (scsi_bufflen(cmd)) {
  152. cmd->SCp.buffer = scsi_sglist(cmd);
  153. cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
  154. cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
  155. cmd->SCp.this_residual = cmd->SCp.buffer->length;
  156. } else {
  157. cmd->SCp.buffer = NULL;
  158. cmd->SCp.buffers_residual = 0;
  159. cmd->SCp.ptr = NULL;
  160. cmd->SCp.this_residual = 0;
  161. }
  162. cmd->SCp.Status = 0;
  163. cmd->SCp.Message = 0;
  164. }
  165. /**
  166. * NCR5380_poll_politely2 - wait for two chip register values
  167. * @instance: controller to poll
  168. * @reg1: 5380 register to poll
  169. * @bit1: Bitmask to check
  170. * @val1: Expected value
  171. * @reg2: Second 5380 register to poll
  172. * @bit2: Second bitmask to check
  173. * @val2: Second expected value
  174. * @wait: Time-out in jiffies
  175. *
  176. * Polls the chip in a reasonably efficient manner waiting for an
  177. * event to occur. After a short quick poll we begin to yield the CPU
  178. * (if possible). In irq contexts the time-out is arbitrarily limited.
  179. * Callers may hold locks as long as they are held in irq mode.
  180. *
  181. * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
  182. */
  183. static int NCR5380_poll_politely2(struct Scsi_Host *instance,
  184. int reg1, int bit1, int val1,
  185. int reg2, int bit2, int val2, int wait)
  186. {
  187. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  188. unsigned long deadline = jiffies + wait;
  189. unsigned long n;
  190. /* Busy-wait for up to 10 ms */
  191. n = min(10000U, jiffies_to_usecs(wait));
  192. n *= hostdata->accesses_per_ms;
  193. n /= 2000;
  194. do {
  195. if ((NCR5380_read(reg1) & bit1) == val1)
  196. return 0;
  197. if ((NCR5380_read(reg2) & bit2) == val2)
  198. return 0;
  199. cpu_relax();
  200. } while (n--);
  201. if (irqs_disabled() || in_interrupt())
  202. return -ETIMEDOUT;
  203. /* Repeatedly sleep for 1 ms until deadline */
  204. while (time_is_after_jiffies(deadline)) {
  205. schedule_timeout_uninterruptible(1);
  206. if ((NCR5380_read(reg1) & bit1) == val1)
  207. return 0;
  208. if ((NCR5380_read(reg2) & bit2) == val2)
  209. return 0;
  210. }
  211. return -ETIMEDOUT;
  212. }
  213. #if NDEBUG
  214. static struct {
  215. unsigned char mask;
  216. const char *name;
  217. } signals[] = {
  218. {SR_DBP, "PARITY"},
  219. {SR_RST, "RST"},
  220. {SR_BSY, "BSY"},
  221. {SR_REQ, "REQ"},
  222. {SR_MSG, "MSG"},
  223. {SR_CD, "CD"},
  224. {SR_IO, "IO"},
  225. {SR_SEL, "SEL"},
  226. {0, NULL}
  227. },
  228. basrs[] = {
  229. {BASR_END_DMA_TRANSFER, "END OF DMA"},
  230. {BASR_DRQ, "DRQ"},
  231. {BASR_PARITY_ERROR, "PARITY ERROR"},
  232. {BASR_IRQ, "IRQ"},
  233. {BASR_PHASE_MATCH, "PHASE MATCH"},
  234. {BASR_BUSY_ERROR, "BUSY ERROR"},
  235. {BASR_ATN, "ATN"},
  236. {BASR_ACK, "ACK"},
  237. {0, NULL}
  238. },
  239. icrs[] = {
  240. {ICR_ASSERT_RST, "ASSERT RST"},
  241. {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
  242. {ICR_ARBITRATION_LOST, "LOST ARB."},
  243. {ICR_ASSERT_ACK, "ASSERT ACK"},
  244. {ICR_ASSERT_BSY, "ASSERT BSY"},
  245. {ICR_ASSERT_SEL, "ASSERT SEL"},
  246. {ICR_ASSERT_ATN, "ASSERT ATN"},
  247. {ICR_ASSERT_DATA, "ASSERT DATA"},
  248. {0, NULL}
  249. },
  250. mrs[] = {
  251. {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
  252. {MR_TARGET, "TARGET"},
  253. {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
  254. {MR_ENABLE_PAR_INTR, "PARITY INTR"},
  255. {MR_ENABLE_EOP_INTR, "EOP INTR"},
  256. {MR_MONITOR_BSY, "MONITOR BSY"},
  257. {MR_DMA_MODE, "DMA MODE"},
  258. {MR_ARBITRATE, "ARBITRATE"},
  259. {0, NULL}
  260. };
  261. /**
  262. * NCR5380_print - print scsi bus signals
  263. * @instance: adapter state to dump
  264. *
  265. * Print the SCSI bus signals for debugging purposes
  266. */
  267. static void NCR5380_print(struct Scsi_Host *instance)
  268. {
  269. unsigned char status, data, basr, mr, icr, i;
  270. data = NCR5380_read(CURRENT_SCSI_DATA_REG);
  271. status = NCR5380_read(STATUS_REG);
  272. mr = NCR5380_read(MODE_REG);
  273. icr = NCR5380_read(INITIATOR_COMMAND_REG);
  274. basr = NCR5380_read(BUS_AND_STATUS_REG);
  275. printk(KERN_DEBUG "SR = 0x%02x : ", status);
  276. for (i = 0; signals[i].mask; ++i)
  277. if (status & signals[i].mask)
  278. printk(KERN_CONT "%s, ", signals[i].name);
  279. printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
  280. for (i = 0; basrs[i].mask; ++i)
  281. if (basr & basrs[i].mask)
  282. printk(KERN_CONT "%s, ", basrs[i].name);
  283. printk(KERN_CONT "\nICR = 0x%02x : ", icr);
  284. for (i = 0; icrs[i].mask; ++i)
  285. if (icr & icrs[i].mask)
  286. printk(KERN_CONT "%s, ", icrs[i].name);
  287. printk(KERN_CONT "\nMR = 0x%02x : ", mr);
  288. for (i = 0; mrs[i].mask; ++i)
  289. if (mr & mrs[i].mask)
  290. printk(KERN_CONT "%s, ", mrs[i].name);
  291. printk(KERN_CONT "\n");
  292. }
  293. static struct {
  294. unsigned char value;
  295. const char *name;
  296. } phases[] = {
  297. {PHASE_DATAOUT, "DATAOUT"},
  298. {PHASE_DATAIN, "DATAIN"},
  299. {PHASE_CMDOUT, "CMDOUT"},
  300. {PHASE_STATIN, "STATIN"},
  301. {PHASE_MSGOUT, "MSGOUT"},
  302. {PHASE_MSGIN, "MSGIN"},
  303. {PHASE_UNKNOWN, "UNKNOWN"}
  304. };
  305. /**
  306. * NCR5380_print_phase - show SCSI phase
  307. * @instance: adapter to dump
  308. *
  309. * Print the current SCSI phase for debugging purposes
  310. */
  311. static void NCR5380_print_phase(struct Scsi_Host *instance)
  312. {
  313. unsigned char status;
  314. int i;
  315. status = NCR5380_read(STATUS_REG);
  316. if (!(status & SR_REQ))
  317. shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
  318. else {
  319. for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
  320. (phases[i].value != (status & PHASE_MASK)); ++i)
  321. ;
  322. shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
  323. }
  324. }
  325. #endif
  326. static int probe_irq;
  327. /**
  328. * probe_intr - helper for IRQ autoprobe
  329. * @irq: interrupt number
  330. * @dev_id: unused
  331. * @regs: unused
  332. *
  333. * Set a flag to indicate the IRQ in question was received. This is
  334. * used by the IRQ probe code.
  335. */
  336. static irqreturn_t probe_intr(int irq, void *dev_id)
  337. {
  338. probe_irq = irq;
  339. return IRQ_HANDLED;
  340. }
  341. /**
  342. * NCR5380_probe_irq - find the IRQ of an NCR5380
  343. * @instance: NCR5380 controller
  344. * @possible: bitmask of ISA IRQ lines
  345. *
  346. * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ
  347. * and then looking to see what interrupt actually turned up.
  348. */
  349. static int __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
  350. int possible)
  351. {
  352. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  353. unsigned long timeout;
  354. int trying_irqs, i, mask;
  355. for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1)
  356. if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
  357. trying_irqs |= mask;
  358. timeout = jiffies + msecs_to_jiffies(250);
  359. probe_irq = NO_IRQ;
  360. /*
  361. * A interrupt is triggered whenever BSY = false, SEL = true
  362. * and a bit set in the SELECT_ENABLE_REG is asserted on the
  363. * SCSI bus.
  364. *
  365. * Note that the bus is only driven when the phase control signals
  366. * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
  367. * to zero.
  368. */
  369. NCR5380_write(TARGET_COMMAND_REG, 0);
  370. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  371. NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
  372. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
  373. while (probe_irq == NO_IRQ && time_before(jiffies, timeout))
  374. schedule_timeout_uninterruptible(1);
  375. NCR5380_write(SELECT_ENABLE_REG, 0);
  376. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  377. for (i = 1, mask = 2; i < 16; ++i, mask <<= 1)
  378. if (trying_irqs & mask)
  379. free_irq(i, NULL);
  380. return probe_irq;
  381. }
  382. /**
  383. * NCR58380_info - report driver and host information
  384. * @instance: relevant scsi host instance
  385. *
  386. * For use as the host template info() handler.
  387. */
  388. static const char *NCR5380_info(struct Scsi_Host *instance)
  389. {
  390. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  391. return hostdata->info;
  392. }
  393. static void prepare_info(struct Scsi_Host *instance)
  394. {
  395. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  396. snprintf(hostdata->info, sizeof(hostdata->info),
  397. "%s, io_port 0x%lx, n_io_port %d, "
  398. "base 0x%lx, irq %d, "
  399. "can_queue %d, cmd_per_lun %d, "
  400. "sg_tablesize %d, this_id %d, "
  401. "flags { %s%s%s}, "
  402. "options { %s} ",
  403. instance->hostt->name, instance->io_port, instance->n_io_port,
  404. instance->base, instance->irq,
  405. instance->can_queue, instance->cmd_per_lun,
  406. instance->sg_tablesize, instance->this_id,
  407. hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
  408. hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
  409. hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "",
  410. #ifdef DIFFERENTIAL
  411. "DIFFERENTIAL "
  412. #endif
  413. #ifdef PARITY
  414. "PARITY "
  415. #endif
  416. "");
  417. }
  418. /**
  419. * NCR5380_init - initialise an NCR5380
  420. * @instance: adapter to configure
  421. * @flags: control flags
  422. *
  423. * Initializes *instance and corresponding 5380 chip,
  424. * with flags OR'd into the initial flags value.
  425. *
  426. * Notes : I assume that the host, hostno, and id bits have been
  427. * set correctly. I don't care about the irq and other fields.
  428. *
  429. * Returns 0 for success
  430. */
  431. static int NCR5380_init(struct Scsi_Host *instance, int flags)
  432. {
  433. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  434. int i;
  435. unsigned long deadline;
  436. instance->max_lun = 7;
  437. hostdata->host = instance;
  438. hostdata->id_mask = 1 << instance->this_id;
  439. hostdata->id_higher_mask = 0;
  440. for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
  441. if (i > hostdata->id_mask)
  442. hostdata->id_higher_mask |= i;
  443. for (i = 0; i < 8; ++i)
  444. hostdata->busy[i] = 0;
  445. hostdata->dma_len = 0;
  446. spin_lock_init(&hostdata->lock);
  447. hostdata->connected = NULL;
  448. hostdata->sensing = NULL;
  449. INIT_LIST_HEAD(&hostdata->autosense);
  450. INIT_LIST_HEAD(&hostdata->unissued);
  451. INIT_LIST_HEAD(&hostdata->disconnected);
  452. hostdata->flags = flags;
  453. INIT_WORK(&hostdata->main_task, NCR5380_main);
  454. hostdata->work_q = alloc_workqueue("ncr5380_%d",
  455. WQ_UNBOUND | WQ_MEM_RECLAIM,
  456. 1, instance->host_no);
  457. if (!hostdata->work_q)
  458. return -ENOMEM;
  459. prepare_info(instance);
  460. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  461. NCR5380_write(MODE_REG, MR_BASE);
  462. NCR5380_write(TARGET_COMMAND_REG, 0);
  463. NCR5380_write(SELECT_ENABLE_REG, 0);
  464. /* Calibrate register polling loop */
  465. i = 0;
  466. deadline = jiffies + 1;
  467. do {
  468. cpu_relax();
  469. } while (time_is_after_jiffies(deadline));
  470. deadline += msecs_to_jiffies(256);
  471. do {
  472. NCR5380_read(STATUS_REG);
  473. ++i;
  474. cpu_relax();
  475. } while (time_is_after_jiffies(deadline));
  476. hostdata->accesses_per_ms = i / 256;
  477. return 0;
  478. }
  479. /**
  480. * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
  481. * @instance: adapter to check
  482. *
  483. * If the system crashed, it may have crashed with a connected target and
  484. * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
  485. * currently established nexus, which we know nothing about. Failing that
  486. * do a bus reset.
  487. *
  488. * Note that a bus reset will cause the chip to assert IRQ.
  489. *
  490. * Returns 0 if successful, otherwise -ENXIO.
  491. */
  492. static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
  493. {
  494. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  495. int pass;
  496. for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
  497. switch (pass) {
  498. case 1:
  499. case 3:
  500. case 5:
  501. shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
  502. NCR5380_poll_politely(instance,
  503. STATUS_REG, SR_BSY, 0, 5 * HZ);
  504. break;
  505. case 2:
  506. shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
  507. do_abort(instance);
  508. break;
  509. case 4:
  510. shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
  511. do_reset(instance);
  512. /* Wait after a reset; the SCSI standard calls for
  513. * 250ms, we wait 500ms to be on the safe side.
  514. * But some Toshiba CD-ROMs need ten times that.
  515. */
  516. if (hostdata->flags & FLAG_TOSHIBA_DELAY)
  517. msleep(2500);
  518. else
  519. msleep(500);
  520. break;
  521. case 6:
  522. shost_printk(KERN_ERR, instance, "bus locked solid\n");
  523. return -ENXIO;
  524. }
  525. }
  526. return 0;
  527. }
  528. /**
  529. * NCR5380_exit - remove an NCR5380
  530. * @instance: adapter to remove
  531. *
  532. * Assumes that no more work can be queued (e.g. by NCR5380_intr).
  533. */
  534. static void NCR5380_exit(struct Scsi_Host *instance)
  535. {
  536. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  537. cancel_work_sync(&hostdata->main_task);
  538. destroy_workqueue(hostdata->work_q);
  539. }
  540. /**
  541. * complete_cmd - finish processing a command and return it to the SCSI ML
  542. * @instance: the host instance
  543. * @cmd: command to complete
  544. */
  545. static void complete_cmd(struct Scsi_Host *instance,
  546. struct scsi_cmnd *cmd)
  547. {
  548. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  549. dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
  550. if (hostdata->sensing == cmd) {
  551. /* Autosense processing ends here */
  552. if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
  553. scsi_eh_restore_cmnd(cmd, &hostdata->ses);
  554. set_host_byte(cmd, DID_ERROR);
  555. } else
  556. scsi_eh_restore_cmnd(cmd, &hostdata->ses);
  557. hostdata->sensing = NULL;
  558. }
  559. hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
  560. cmd->scsi_done(cmd);
  561. }
  562. /**
  563. * NCR5380_queue_command - queue a command
  564. * @instance: the relevant SCSI adapter
  565. * @cmd: SCSI command
  566. *
  567. * cmd is added to the per-instance issue queue, with minor
  568. * twiddling done to the host specific fields of cmd. If the
  569. * main coroutine is not running, it is restarted.
  570. */
  571. static int NCR5380_queue_command(struct Scsi_Host *instance,
  572. struct scsi_cmnd *cmd)
  573. {
  574. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  575. struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
  576. unsigned long flags;
  577. #if (NDEBUG & NDEBUG_NO_WRITE)
  578. switch (cmd->cmnd[0]) {
  579. case WRITE_6:
  580. case WRITE_10:
  581. shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
  582. cmd->result = (DID_ERROR << 16);
  583. cmd->scsi_done(cmd);
  584. return 0;
  585. }
  586. #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
  587. cmd->result = 0;
  588. if (!NCR5380_acquire_dma_irq(instance))
  589. return SCSI_MLQUEUE_HOST_BUSY;
  590. spin_lock_irqsave(&hostdata->lock, flags);
  591. /*
  592. * Insert the cmd into the issue queue. Note that REQUEST SENSE
  593. * commands are added to the head of the queue since any command will
  594. * clear the contingent allegiance condition that exists and the
  595. * sense data is only guaranteed to be valid while the condition exists.
  596. */
  597. if (cmd->cmnd[0] == REQUEST_SENSE)
  598. list_add(&ncmd->list, &hostdata->unissued);
  599. else
  600. list_add_tail(&ncmd->list, &hostdata->unissued);
  601. spin_unlock_irqrestore(&hostdata->lock, flags);
  602. dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
  603. cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
  604. /* Kick off command processing */
  605. queue_work(hostdata->work_q, &hostdata->main_task);
  606. return 0;
  607. }
  608. static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
  609. {
  610. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  611. /* Caller does the locking needed to set & test these data atomically */
  612. if (list_empty(&hostdata->disconnected) &&
  613. list_empty(&hostdata->unissued) &&
  614. list_empty(&hostdata->autosense) &&
  615. !hostdata->connected &&
  616. !hostdata->selecting)
  617. NCR5380_release_dma_irq(instance);
  618. }
  619. /**
  620. * dequeue_next_cmd - dequeue a command for processing
  621. * @instance: the scsi host instance
  622. *
  623. * Priority is given to commands on the autosense queue. These commands
  624. * need autosense because of a CHECK CONDITION result.
  625. *
  626. * Returns a command pointer if a command is found for a target that is
  627. * not already busy. Otherwise returns NULL.
  628. */
  629. static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
  630. {
  631. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  632. struct NCR5380_cmd *ncmd;
  633. struct scsi_cmnd *cmd;
  634. if (hostdata->sensing || list_empty(&hostdata->autosense)) {
  635. list_for_each_entry(ncmd, &hostdata->unissued, list) {
  636. cmd = NCR5380_to_scmd(ncmd);
  637. dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
  638. cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
  639. if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
  640. list_del(&ncmd->list);
  641. dsprintk(NDEBUG_QUEUES, instance,
  642. "dequeue: removed %p from issue queue\n", cmd);
  643. return cmd;
  644. }
  645. }
  646. } else {
  647. /* Autosense processing begins here */
  648. ncmd = list_first_entry(&hostdata->autosense,
  649. struct NCR5380_cmd, list);
  650. list_del(&ncmd->list);
  651. cmd = NCR5380_to_scmd(ncmd);
  652. dsprintk(NDEBUG_QUEUES, instance,
  653. "dequeue: removed %p from autosense queue\n", cmd);
  654. scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
  655. hostdata->sensing = cmd;
  656. return cmd;
  657. }
  658. return NULL;
  659. }
  660. static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
  661. {
  662. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  663. struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
  664. if (hostdata->sensing == cmd) {
  665. scsi_eh_restore_cmnd(cmd, &hostdata->ses);
  666. list_add(&ncmd->list, &hostdata->autosense);
  667. hostdata->sensing = NULL;
  668. } else
  669. list_add(&ncmd->list, &hostdata->unissued);
  670. }
  671. /**
  672. * NCR5380_main - NCR state machines
  673. *
  674. * NCR5380_main is a coroutine that runs as long as more work can
  675. * be done on the NCR5380 host adapters in a system. Both
  676. * NCR5380_queue_command() and NCR5380_intr() will try to start it
  677. * in case it is not running.
  678. */
  679. static void NCR5380_main(struct work_struct *work)
  680. {
  681. struct NCR5380_hostdata *hostdata =
  682. container_of(work, struct NCR5380_hostdata, main_task);
  683. struct Scsi_Host *instance = hostdata->host;
  684. int done;
  685. do {
  686. done = 1;
  687. spin_lock_irq(&hostdata->lock);
  688. while (!hostdata->connected && !hostdata->selecting) {
  689. struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
  690. if (!cmd)
  691. break;
  692. dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
  693. /*
  694. * Attempt to establish an I_T_L nexus here.
  695. * On success, instance->hostdata->connected is set.
  696. * On failure, we must add the command back to the
  697. * issue queue so we can keep trying.
  698. */
  699. /*
  700. * REQUEST SENSE commands are issued without tagged
  701. * queueing, even on SCSI-II devices because the
  702. * contingent allegiance condition exists for the
  703. * entire unit.
  704. */
  705. if (!NCR5380_select(instance, cmd)) {
  706. dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
  707. maybe_release_dma_irq(instance);
  708. } else {
  709. dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
  710. "main: select failed, returning %p to queue\n", cmd);
  711. requeue_cmd(instance, cmd);
  712. }
  713. }
  714. if (hostdata->connected && !hostdata->dma_len) {
  715. dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
  716. NCR5380_information_transfer(instance);
  717. done = 0;
  718. }
  719. spin_unlock_irq(&hostdata->lock);
  720. if (!done)
  721. cond_resched();
  722. } while (!done);
  723. }
  724. /*
  725. * NCR5380_dma_complete - finish DMA transfer
  726. * @instance: the scsi host instance
  727. *
  728. * Called by the interrupt handler when DMA finishes or a phase
  729. * mismatch occurs (which would end the DMA transfer).
  730. */
  731. static void NCR5380_dma_complete(struct Scsi_Host *instance)
  732. {
  733. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  734. int transferred;
  735. unsigned char **data;
  736. int *count;
  737. int saved_data = 0, overrun = 0;
  738. unsigned char p;
  739. if (hostdata->read_overruns) {
  740. p = hostdata->connected->SCp.phase;
  741. if (p & SR_IO) {
  742. udelay(10);
  743. if ((NCR5380_read(BUS_AND_STATUS_REG) &
  744. (BASR_PHASE_MATCH | BASR_ACK)) ==
  745. (BASR_PHASE_MATCH | BASR_ACK)) {
  746. saved_data = NCR5380_read(INPUT_DATA_REG);
  747. overrun = 1;
  748. dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
  749. }
  750. }
  751. }
  752. #ifdef CONFIG_SUN3
  753. if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
  754. pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
  755. instance->host_no);
  756. BUG();
  757. }
  758. if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
  759. (BASR_PHASE_MATCH | BASR_ACK)) {
  760. pr_err("scsi%d: BASR %02x\n", instance->host_no,
  761. NCR5380_read(BUS_AND_STATUS_REG));
  762. pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
  763. instance->host_no);
  764. BUG();
  765. }
  766. #endif
  767. NCR5380_write(MODE_REG, MR_BASE);
  768. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  769. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  770. transferred = hostdata->dma_len - NCR5380_dma_residual(instance);
  771. hostdata->dma_len = 0;
  772. data = (unsigned char **)&hostdata->connected->SCp.ptr;
  773. count = &hostdata->connected->SCp.this_residual;
  774. *data += transferred;
  775. *count -= transferred;
  776. if (hostdata->read_overruns) {
  777. int cnt, toPIO;
  778. if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
  779. cnt = toPIO = hostdata->read_overruns;
  780. if (overrun) {
  781. dsprintk(NDEBUG_DMA, instance,
  782. "Got an input overrun, using saved byte\n");
  783. *(*data)++ = saved_data;
  784. (*count)--;
  785. cnt--;
  786. toPIO--;
  787. }
  788. if (toPIO > 0) {
  789. dsprintk(NDEBUG_DMA, instance,
  790. "Doing %d byte PIO to 0x%p\n", cnt, *data);
  791. NCR5380_transfer_pio(instance, &p, &cnt, data);
  792. *count -= toPIO - cnt;
  793. }
  794. }
  795. }
  796. }
  797. /**
  798. * NCR5380_intr - generic NCR5380 irq handler
  799. * @irq: interrupt number
  800. * @dev_id: device info
  801. *
  802. * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
  803. * from the disconnected queue, and restarting NCR5380_main()
  804. * as required.
  805. *
  806. * The chip can assert IRQ in any of six different conditions. The IRQ flag
  807. * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
  808. * Three of these six conditions are latched in the Bus and Status Register:
  809. * - End of DMA (cleared by ending DMA Mode)
  810. * - Parity error (cleared by reading RPIR)
  811. * - Loss of BSY (cleared by reading RPIR)
  812. * Two conditions have flag bits that are not latched:
  813. * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
  814. * - Bus reset (non-maskable)
  815. * The remaining condition has no flag bit at all:
  816. * - Selection/reselection
  817. *
  818. * Hence, establishing the cause(s) of any interrupt is partly guesswork.
  819. * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
  820. * claimed that "the design of the [DP8490] interrupt logic ensures
  821. * interrupts will not be lost (they can be on the DP5380)."
  822. * The L5380/53C80 datasheet from LOGIC Devices has more details.
  823. *
  824. * Checking for bus reset by reading RST is futile because of interrupt
  825. * latency, but a bus reset will reset chip logic. Checking for parity error
  826. * is unnecessary because that interrupt is never enabled. A Loss of BSY
  827. * condition will clear DMA Mode. We can tell when this occurs because the
  828. * the Busy Monitor interrupt is enabled together with DMA Mode.
  829. */
  830. static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
  831. {
  832. struct Scsi_Host *instance = dev_id;
  833. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  834. int handled = 0;
  835. unsigned char basr;
  836. unsigned long flags;
  837. spin_lock_irqsave(&hostdata->lock, flags);
  838. basr = NCR5380_read(BUS_AND_STATUS_REG);
  839. if (basr & BASR_IRQ) {
  840. unsigned char mr = NCR5380_read(MODE_REG);
  841. unsigned char sr = NCR5380_read(STATUS_REG);
  842. dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
  843. irq, basr, sr, mr);
  844. if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
  845. /* Probably End of DMA, Phase Mismatch or Loss of BSY.
  846. * We ack IRQ after clearing Mode Register. Workarounds
  847. * for End of DMA errata need to happen in DMA Mode.
  848. */
  849. dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
  850. if (hostdata->connected) {
  851. NCR5380_dma_complete(instance);
  852. queue_work(hostdata->work_q, &hostdata->main_task);
  853. } else {
  854. NCR5380_write(MODE_REG, MR_BASE);
  855. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  856. }
  857. } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
  858. (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
  859. /* Probably reselected */
  860. NCR5380_write(SELECT_ENABLE_REG, 0);
  861. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  862. dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
  863. if (!hostdata->connected) {
  864. NCR5380_reselect(instance);
  865. queue_work(hostdata->work_q, &hostdata->main_task);
  866. }
  867. if (!hostdata->connected)
  868. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  869. } else {
  870. /* Probably Bus Reset */
  871. NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  872. dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
  873. #ifdef SUN3_SCSI_VME
  874. dregs->csr |= CSR_DMA_ENABLE;
  875. #endif
  876. }
  877. handled = 1;
  878. } else {
  879. shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n");
  880. #ifdef SUN3_SCSI_VME
  881. dregs->csr |= CSR_DMA_ENABLE;
  882. #endif
  883. }
  884. spin_unlock_irqrestore(&hostdata->lock, flags);
  885. return IRQ_RETVAL(handled);
  886. }
  887. /*
  888. * Function : int NCR5380_select(struct Scsi_Host *instance,
  889. * struct scsi_cmnd *cmd)
  890. *
  891. * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
  892. * including ARBITRATION, SELECTION, and initial message out for
  893. * IDENTIFY and queue messages.
  894. *
  895. * Inputs : instance - instantiation of the 5380 driver on which this
  896. * target lives, cmd - SCSI command to execute.
  897. *
  898. * Returns cmd if selection failed but should be retried,
  899. * NULL if selection failed and should not be retried, or
  900. * NULL if selection succeeded (hostdata->connected == cmd).
  901. *
  902. * Side effects :
  903. * If bus busy, arbitration failed, etc, NCR5380_select() will exit
  904. * with registers as they should have been on entry - ie
  905. * SELECT_ENABLE will be set appropriately, the NCR5380
  906. * will cease to drive any SCSI bus signals.
  907. *
  908. * If successful : I_T_L or I_T_L_Q nexus will be established,
  909. * instance->connected will be set to cmd.
  910. * SELECT interrupt will be disabled.
  911. *
  912. * If failed (no target) : cmd->scsi_done() will be called, and the
  913. * cmd->result host byte set to DID_BAD_TARGET.
  914. */
  915. static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
  916. struct scsi_cmnd *cmd)
  917. {
  918. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  919. unsigned char tmp[3], phase;
  920. unsigned char *data;
  921. int len;
  922. int err;
  923. NCR5380_dprint(NDEBUG_ARBITRATION, instance);
  924. dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
  925. instance->this_id);
  926. /*
  927. * Arbitration and selection phases are slow and involve dropping the
  928. * lock, so we have to watch out for EH. An exception handler may
  929. * change 'selecting' to NULL. This function will then return NULL
  930. * so that the caller will forget about 'cmd'. (During information
  931. * transfer phases, EH may change 'connected' to NULL.)
  932. */
  933. hostdata->selecting = cmd;
  934. /*
  935. * Set the phase bits to 0, otherwise the NCR5380 won't drive the
  936. * data bus during SELECTION.
  937. */
  938. NCR5380_write(TARGET_COMMAND_REG, 0);
  939. /*
  940. * Start arbitration.
  941. */
  942. NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
  943. NCR5380_write(MODE_REG, MR_ARBITRATE);
  944. /* The chip now waits for BUS FREE phase. Then after the 800 ns
  945. * Bus Free Delay, arbitration will begin.
  946. */
  947. spin_unlock_irq(&hostdata->lock);
  948. err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0,
  949. INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
  950. ICR_ARBITRATION_PROGRESS, HZ);
  951. spin_lock_irq(&hostdata->lock);
  952. if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
  953. /* Reselection interrupt */
  954. goto out;
  955. }
  956. if (!hostdata->selecting) {
  957. /* Command was aborted */
  958. NCR5380_write(MODE_REG, MR_BASE);
  959. goto out;
  960. }
  961. if (err < 0) {
  962. NCR5380_write(MODE_REG, MR_BASE);
  963. shost_printk(KERN_ERR, instance,
  964. "select: arbitration timeout\n");
  965. goto out;
  966. }
  967. spin_unlock_irq(&hostdata->lock);
  968. /* The SCSI-2 arbitration delay is 2.4 us */
  969. udelay(3);
  970. /* Check for lost arbitration */
  971. if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
  972. (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
  973. (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
  974. NCR5380_write(MODE_REG, MR_BASE);
  975. dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
  976. spin_lock_irq(&hostdata->lock);
  977. goto out;
  978. }
  979. /* After/during arbitration, BSY should be asserted.
  980. * IBM DPES-31080 Version S31Q works now
  981. * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
  982. */
  983. NCR5380_write(INITIATOR_COMMAND_REG,
  984. ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
  985. /*
  986. * Again, bus clear + bus settle time is 1.2us, however, this is
  987. * a minimum so we'll udelay ceil(1.2)
  988. */
  989. if (hostdata->flags & FLAG_TOSHIBA_DELAY)
  990. udelay(15);
  991. else
  992. udelay(2);
  993. spin_lock_irq(&hostdata->lock);
  994. /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
  995. if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
  996. goto out;
  997. if (!hostdata->selecting) {
  998. NCR5380_write(MODE_REG, MR_BASE);
  999. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1000. goto out;
  1001. }
  1002. dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
  1003. /*
  1004. * Now that we have won arbitration, start Selection process, asserting
  1005. * the host and target ID's on the SCSI bus.
  1006. */
  1007. NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
  1008. /*
  1009. * Raise ATN while SEL is true before BSY goes false from arbitration,
  1010. * since this is the only way to guarantee that we'll get a MESSAGE OUT
  1011. * phase immediately after selection.
  1012. */
  1013. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
  1014. ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
  1015. NCR5380_write(MODE_REG, MR_BASE);
  1016. /*
  1017. * Reselect interrupts must be turned off prior to the dropping of BSY,
  1018. * otherwise we will trigger an interrupt.
  1019. */
  1020. NCR5380_write(SELECT_ENABLE_REG, 0);
  1021. spin_unlock_irq(&hostdata->lock);
  1022. /*
  1023. * The initiator shall then wait at least two deskew delays and release
  1024. * the BSY signal.
  1025. */
  1026. udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
  1027. /* Reset BSY */
  1028. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
  1029. ICR_ASSERT_ATN | ICR_ASSERT_SEL);
  1030. /*
  1031. * Something weird happens when we cease to drive BSY - looks
  1032. * like the board/chip is letting us do another read before the
  1033. * appropriate propagation delay has expired, and we're confusing
  1034. * a BSY signal from ourselves as the target's response to SELECTION.
  1035. *
  1036. * A small delay (the 'C++' frontend breaks the pipeline with an
  1037. * unnecessary jump, making it work on my 386-33/Trantor T128, the
  1038. * tighter 'C' code breaks and requires this) solves the problem -
  1039. * the 1 us delay is arbitrary, and only used because this delay will
  1040. * be the same on other platforms and since it works here, it should
  1041. * work there.
  1042. *
  1043. * wingel suggests that this could be due to failing to wait
  1044. * one deskew delay.
  1045. */
  1046. udelay(1);
  1047. dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
  1048. /*
  1049. * The SCSI specification calls for a 250 ms timeout for the actual
  1050. * selection.
  1051. */
  1052. err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY,
  1053. msecs_to_jiffies(250));
  1054. if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
  1055. spin_lock_irq(&hostdata->lock);
  1056. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1057. NCR5380_reselect(instance);
  1058. if (!hostdata->connected)
  1059. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  1060. shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
  1061. goto out;
  1062. }
  1063. if (err < 0) {
  1064. spin_lock_irq(&hostdata->lock);
  1065. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1066. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  1067. /* Can't touch cmd if it has been reclaimed by the scsi ML */
  1068. if (hostdata->selecting) {
  1069. cmd->result = DID_BAD_TARGET << 16;
  1070. complete_cmd(instance, cmd);
  1071. dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
  1072. cmd = NULL;
  1073. }
  1074. goto out;
  1075. }
  1076. /*
  1077. * No less than two deskew delays after the initiator detects the
  1078. * BSY signal is true, it shall release the SEL signal and may
  1079. * change the DATA BUS. -wingel
  1080. */
  1081. udelay(1);
  1082. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1083. /*
  1084. * Since we followed the SCSI spec, and raised ATN while SEL
  1085. * was true but before BSY was false during selection, the information
  1086. * transfer phase should be a MESSAGE OUT phase so that we can send the
  1087. * IDENTIFY message.
  1088. */
  1089. /* Wait for start of REQ/ACK handshake */
  1090. err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
  1091. spin_lock_irq(&hostdata->lock);
  1092. if (err < 0) {
  1093. shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
  1094. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1095. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  1096. goto out;
  1097. }
  1098. if (!hostdata->selecting) {
  1099. do_abort(instance);
  1100. goto out;
  1101. }
  1102. dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
  1103. scmd_id(cmd));
  1104. tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
  1105. len = 1;
  1106. data = tmp;
  1107. phase = PHASE_MSGOUT;
  1108. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1109. dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
  1110. /* XXX need to handle errors here */
  1111. hostdata->connected = cmd;
  1112. hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
  1113. #ifdef SUN3_SCSI_VME
  1114. dregs->csr |= CSR_INTR;
  1115. #endif
  1116. initialize_SCp(cmd);
  1117. cmd = NULL;
  1118. out:
  1119. if (!hostdata->selecting)
  1120. return NULL;
  1121. hostdata->selecting = NULL;
  1122. return cmd;
  1123. }
  1124. /*
  1125. * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
  1126. * unsigned char *phase, int *count, unsigned char **data)
  1127. *
  1128. * Purpose : transfers data in given phase using polled I/O
  1129. *
  1130. * Inputs : instance - instance of driver, *phase - pointer to
  1131. * what phase is expected, *count - pointer to number of
  1132. * bytes to transfer, **data - pointer to data pointer.
  1133. *
  1134. * Returns : -1 when different phase is entered without transferring
  1135. * maximum number of bytes, 0 if all bytes are transferred or exit
  1136. * is in same phase.
  1137. *
  1138. * Also, *phase, *count, *data are modified in place.
  1139. *
  1140. * XXX Note : handling for bus free may be useful.
  1141. */
  1142. /*
  1143. * Note : this code is not as quick as it could be, however it
  1144. * IS 100% reliable, and for the actual data transfer where speed
  1145. * counts, we will always do a pseudo DMA or DMA transfer.
  1146. */
  1147. static int NCR5380_transfer_pio(struct Scsi_Host *instance,
  1148. unsigned char *phase, int *count,
  1149. unsigned char **data)
  1150. {
  1151. unsigned char p = *phase, tmp;
  1152. int c = *count;
  1153. unsigned char *d = *data;
  1154. /*
  1155. * The NCR5380 chip will only drive the SCSI bus when the
  1156. * phase specified in the appropriate bits of the TARGET COMMAND
  1157. * REGISTER match the STATUS REGISTER
  1158. */
  1159. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
  1160. do {
  1161. /*
  1162. * Wait for assertion of REQ, after which the phase bits will be
  1163. * valid
  1164. */
  1165. if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
  1166. break;
  1167. dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
  1168. /* Check for phase mismatch */
  1169. if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
  1170. dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
  1171. NCR5380_dprint_phase(NDEBUG_PIO, instance);
  1172. break;
  1173. }
  1174. /* Do actual transfer from SCSI bus to / from memory */
  1175. if (!(p & SR_IO))
  1176. NCR5380_write(OUTPUT_DATA_REG, *d);
  1177. else
  1178. *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
  1179. ++d;
  1180. /*
  1181. * The SCSI standard suggests that in MSGOUT phase, the initiator
  1182. * should drop ATN on the last byte of the message phase
  1183. * after REQ has been asserted for the handshake but before
  1184. * the initiator raises ACK.
  1185. */
  1186. if (!(p & SR_IO)) {
  1187. if (!((p & SR_MSG) && c > 1)) {
  1188. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
  1189. NCR5380_dprint(NDEBUG_PIO, instance);
  1190. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1191. ICR_ASSERT_DATA | ICR_ASSERT_ACK);
  1192. } else {
  1193. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1194. ICR_ASSERT_DATA | ICR_ASSERT_ATN);
  1195. NCR5380_dprint(NDEBUG_PIO, instance);
  1196. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1197. ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
  1198. }
  1199. } else {
  1200. NCR5380_dprint(NDEBUG_PIO, instance);
  1201. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
  1202. }
  1203. if (NCR5380_poll_politely(instance,
  1204. STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
  1205. break;
  1206. dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
  1207. /*
  1208. * We have several special cases to consider during REQ/ACK handshaking :
  1209. * 1. We were in MSGOUT phase, and we are on the last byte of the
  1210. * message. ATN must be dropped as ACK is dropped.
  1211. *
  1212. * 2. We are in a MSGIN phase, and we are on the last byte of the
  1213. * message. We must exit with ACK asserted, so that the calling
  1214. * code may raise ATN before dropping ACK to reject the message.
  1215. *
  1216. * 3. ACK and ATN are clear and the target may proceed as normal.
  1217. */
  1218. if (!(p == PHASE_MSGIN && c == 1)) {
  1219. if (p == PHASE_MSGOUT && c > 1)
  1220. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1221. else
  1222. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1223. }
  1224. } while (--c);
  1225. dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
  1226. *count = c;
  1227. *data = d;
  1228. tmp = NCR5380_read(STATUS_REG);
  1229. /* The phase read from the bus is valid if either REQ is (already)
  1230. * asserted or if ACK hasn't been released yet. The latter applies if
  1231. * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
  1232. */
  1233. if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
  1234. *phase = tmp & PHASE_MASK;
  1235. else
  1236. *phase = PHASE_UNKNOWN;
  1237. if (!c || (*phase == p))
  1238. return 0;
  1239. else
  1240. return -1;
  1241. }
  1242. /**
  1243. * do_reset - issue a reset command
  1244. * @instance: adapter to reset
  1245. *
  1246. * Issue a reset sequence to the NCR5380 and try and get the bus
  1247. * back into sane shape.
  1248. *
  1249. * This clears the reset interrupt flag because there may be no handler for
  1250. * it. When the driver is initialized, the NCR5380_intr() handler has not yet
  1251. * been installed. And when in EH we may have released the ST DMA interrupt.
  1252. */
  1253. static void do_reset(struct Scsi_Host *instance)
  1254. {
  1255. unsigned long flags;
  1256. local_irq_save(flags);
  1257. NCR5380_write(TARGET_COMMAND_REG,
  1258. PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
  1259. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
  1260. udelay(50);
  1261. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1262. (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
  1263. local_irq_restore(flags);
  1264. }
  1265. /**
  1266. * do_abort - abort the currently established nexus by going to
  1267. * MESSAGE OUT phase and sending an ABORT message.
  1268. * @instance: relevant scsi host instance
  1269. *
  1270. * Returns 0 on success, -1 on failure.
  1271. */
  1272. static int do_abort(struct Scsi_Host *instance)
  1273. {
  1274. unsigned char *msgptr, phase, tmp;
  1275. int len;
  1276. int rc;
  1277. /* Request message out phase */
  1278. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1279. /*
  1280. * Wait for the target to indicate a valid phase by asserting
  1281. * REQ. Once this happens, we'll have either a MSGOUT phase
  1282. * and can immediately send the ABORT message, or we'll have some
  1283. * other phase and will have to source/sink data.
  1284. *
  1285. * We really don't care what value was on the bus or what value
  1286. * the target sees, so we just handshake.
  1287. */
  1288. rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
  1289. if (rc < 0)
  1290. goto timeout;
  1291. tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
  1292. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
  1293. if (tmp != PHASE_MSGOUT) {
  1294. NCR5380_write(INITIATOR_COMMAND_REG,
  1295. ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
  1296. rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ);
  1297. if (rc < 0)
  1298. goto timeout;
  1299. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1300. }
  1301. tmp = ABORT;
  1302. msgptr = &tmp;
  1303. len = 1;
  1304. phase = PHASE_MSGOUT;
  1305. NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
  1306. /*
  1307. * If we got here, and the command completed successfully,
  1308. * we're about to go into bus free state.
  1309. */
  1310. return len ? -1 : 0;
  1311. timeout:
  1312. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1313. return -1;
  1314. }
  1315. /*
  1316. * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
  1317. * unsigned char *phase, int *count, unsigned char **data)
  1318. *
  1319. * Purpose : transfers data in given phase using either real
  1320. * or pseudo DMA.
  1321. *
  1322. * Inputs : instance - instance of driver, *phase - pointer to
  1323. * what phase is expected, *count - pointer to number of
  1324. * bytes to transfer, **data - pointer to data pointer.
  1325. *
  1326. * Returns : -1 when different phase is entered without transferring
  1327. * maximum number of bytes, 0 if all bytes or transferred or exit
  1328. * is in same phase.
  1329. *
  1330. * Also, *phase, *count, *data are modified in place.
  1331. */
  1332. static int NCR5380_transfer_dma(struct Scsi_Host *instance,
  1333. unsigned char *phase, int *count,
  1334. unsigned char **data)
  1335. {
  1336. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1337. int c = *count;
  1338. unsigned char p = *phase;
  1339. unsigned char *d = *data;
  1340. unsigned char tmp;
  1341. int result = 0;
  1342. if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
  1343. *phase = tmp;
  1344. return -1;
  1345. }
  1346. hostdata->connected->SCp.phase = p;
  1347. if (p & SR_IO) {
  1348. if (hostdata->read_overruns)
  1349. c -= hostdata->read_overruns;
  1350. else if (hostdata->flags & FLAG_DMA_FIXUP)
  1351. --c;
  1352. }
  1353. dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
  1354. (p & SR_IO) ? "receive" : "send", c, d);
  1355. #ifdef CONFIG_SUN3
  1356. /* send start chain */
  1357. sun3scsi_dma_start(c, *data);
  1358. #endif
  1359. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
  1360. NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
  1361. MR_ENABLE_EOP_INTR);
  1362. if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
  1363. /* On the Medusa, it is a must to initialize the DMA before
  1364. * starting the NCR. This is also the cleaner way for the TT.
  1365. */
  1366. if (p & SR_IO)
  1367. result = NCR5380_dma_recv_setup(instance, d, c);
  1368. else
  1369. result = NCR5380_dma_send_setup(instance, d, c);
  1370. }
  1371. /*
  1372. * On the PAS16 at least I/O recovery delays are not needed here.
  1373. * Everyone else seems to want them.
  1374. */
  1375. if (p & SR_IO) {
  1376. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1377. NCR5380_io_delay(1);
  1378. NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
  1379. } else {
  1380. NCR5380_io_delay(1);
  1381. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
  1382. NCR5380_io_delay(1);
  1383. NCR5380_write(START_DMA_SEND_REG, 0);
  1384. NCR5380_io_delay(1);
  1385. }
  1386. #ifdef CONFIG_SUN3
  1387. #ifdef SUN3_SCSI_VME
  1388. dregs->csr |= CSR_DMA_ENABLE;
  1389. #endif
  1390. sun3_dma_active = 1;
  1391. #endif
  1392. if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
  1393. /* On the Falcon, the DMA setup must be done after the last
  1394. * NCR access, else the DMA setup gets trashed!
  1395. */
  1396. if (p & SR_IO)
  1397. result = NCR5380_dma_recv_setup(instance, d, c);
  1398. else
  1399. result = NCR5380_dma_send_setup(instance, d, c);
  1400. }
  1401. /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
  1402. if (result < 0)
  1403. return result;
  1404. /* For real DMA, result is the byte count. DMA interrupt is expected. */
  1405. if (result > 0) {
  1406. hostdata->dma_len = result;
  1407. return 0;
  1408. }
  1409. /* The result is zero iff pseudo DMA send/receive was completed. */
  1410. hostdata->dma_len = c;
  1411. /*
  1412. * A note regarding the DMA errata workarounds for early NMOS silicon.
  1413. *
  1414. * For DMA sends, we want to wait until the last byte has been
  1415. * transferred out over the bus before we turn off DMA mode. Alas, there
  1416. * seems to be no terribly good way of doing this on a 5380 under all
  1417. * conditions. For non-scatter-gather operations, we can wait until REQ
  1418. * and ACK both go false, or until a phase mismatch occurs. Gather-sends
  1419. * are nastier, since the device will be expecting more data than we
  1420. * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
  1421. * could test Last Byte Sent to assure transfer (I imagine this is precisely
  1422. * why this signal was added to the newer chips) but on the older 538[01]
  1423. * this signal does not exist. The workaround for this lack is a watchdog;
  1424. * we bail out of the wait-loop after a modest amount of wait-time if
  1425. * the usual exit conditions are not met. Not a terribly clean or
  1426. * correct solution :-%
  1427. *
  1428. * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
  1429. * If the chip is in DMA receive mode, it will respond to a target's
  1430. * REQ by latching the SCSI data into the INPUT DATA register and asserting
  1431. * ACK, even if it has _already_ been notified by the DMA controller that
  1432. * the current DMA transfer has completed! If the NCR5380 is then taken
  1433. * out of DMA mode, this already-acknowledged byte is lost. This is
  1434. * not a problem for "one DMA transfer per READ command", because
  1435. * the situation will never arise... either all of the data is DMA'ed
  1436. * properly, or the target switches to MESSAGE IN phase to signal a
  1437. * disconnection (either operation bringing the DMA to a clean halt).
  1438. * However, in order to handle scatter-receive, we must work around the
  1439. * problem. The chosen fix is to DMA fewer bytes, then check for the
  1440. * condition before taking the NCR5380 out of DMA mode. One or two extra
  1441. * bytes are transferred via PIO as necessary to fill out the original
  1442. * request.
  1443. */
  1444. if (hostdata->flags & FLAG_DMA_FIXUP) {
  1445. if (p & SR_IO) {
  1446. /*
  1447. * The workaround was to transfer fewer bytes than we
  1448. * intended to with the pseudo-DMA read function, wait for
  1449. * the chip to latch the last byte, read it, and then disable
  1450. * pseudo-DMA mode.
  1451. *
  1452. * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
  1453. * REQ is deasserted when ACK is asserted, and not reasserted
  1454. * until ACK goes false. Since the NCR5380 won't lower ACK
  1455. * until DACK is asserted, which won't happen unless we twiddle
  1456. * the DMA port or we take the NCR5380 out of DMA mode, we
  1457. * can guarantee that we won't handshake another extra
  1458. * byte.
  1459. */
  1460. if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG,
  1461. BASR_DRQ, BASR_DRQ, HZ) < 0) {
  1462. result = -1;
  1463. shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
  1464. }
  1465. if (NCR5380_poll_politely(instance, STATUS_REG,
  1466. SR_REQ, 0, HZ) < 0) {
  1467. result = -1;
  1468. shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
  1469. }
  1470. d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
  1471. } else {
  1472. /*
  1473. * Wait for the last byte to be sent. If REQ is being asserted for
  1474. * the byte we're interested, we'll ACK it and it will go false.
  1475. */
  1476. if (NCR5380_poll_politely2(instance,
  1477. BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
  1478. BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
  1479. result = -1;
  1480. shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
  1481. }
  1482. }
  1483. }
  1484. NCR5380_dma_complete(instance);
  1485. return result;
  1486. }
  1487. /*
  1488. * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
  1489. *
  1490. * Purpose : run through the various SCSI phases and do as the target
  1491. * directs us to. Operates on the currently connected command,
  1492. * instance->connected.
  1493. *
  1494. * Inputs : instance, instance for which we are doing commands
  1495. *
  1496. * Side effects : SCSI things happen, the disconnected queue will be
  1497. * modified if a command disconnects, *instance->connected will
  1498. * change.
  1499. *
  1500. * XXX Note : we need to watch for bus free or a reset condition here
  1501. * to recover from an unexpected bus free condition.
  1502. */
  1503. static void NCR5380_information_transfer(struct Scsi_Host *instance)
  1504. {
  1505. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1506. unsigned char msgout = NOP;
  1507. int sink = 0;
  1508. int len;
  1509. int transfersize;
  1510. unsigned char *data;
  1511. unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
  1512. struct scsi_cmnd *cmd;
  1513. #ifdef SUN3_SCSI_VME
  1514. dregs->csr |= CSR_INTR;
  1515. #endif
  1516. while ((cmd = hostdata->connected)) {
  1517. struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
  1518. tmp = NCR5380_read(STATUS_REG);
  1519. /* We only have a valid SCSI phase when REQ is asserted */
  1520. if (tmp & SR_REQ) {
  1521. phase = (tmp & PHASE_MASK);
  1522. if (phase != old_phase) {
  1523. old_phase = phase;
  1524. NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
  1525. }
  1526. #ifdef CONFIG_SUN3
  1527. if (phase == PHASE_CMDOUT) {
  1528. void *d;
  1529. unsigned long count;
  1530. if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
  1531. count = cmd->SCp.buffer->length;
  1532. d = sg_virt(cmd->SCp.buffer);
  1533. } else {
  1534. count = cmd->SCp.this_residual;
  1535. d = cmd->SCp.ptr;
  1536. }
  1537. if (sun3_dma_setup_done != cmd &&
  1538. sun3scsi_dma_xfer_len(count, cmd) > 0) {
  1539. sun3scsi_dma_setup(instance, d, count,
  1540. rq_data_dir(cmd->request));
  1541. sun3_dma_setup_done = cmd;
  1542. }
  1543. #ifdef SUN3_SCSI_VME
  1544. dregs->csr |= CSR_INTR;
  1545. #endif
  1546. }
  1547. #endif /* CONFIG_SUN3 */
  1548. if (sink && (phase != PHASE_MSGOUT)) {
  1549. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
  1550. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
  1551. ICR_ASSERT_ACK);
  1552. while (NCR5380_read(STATUS_REG) & SR_REQ)
  1553. ;
  1554. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
  1555. ICR_ASSERT_ATN);
  1556. sink = 0;
  1557. continue;
  1558. }
  1559. switch (phase) {
  1560. case PHASE_DATAOUT:
  1561. #if (NDEBUG & NDEBUG_NO_DATAOUT)
  1562. shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
  1563. sink = 1;
  1564. do_abort(instance);
  1565. cmd->result = DID_ERROR << 16;
  1566. complete_cmd(instance, cmd);
  1567. hostdata->connected = NULL;
  1568. return;
  1569. #endif
  1570. case PHASE_DATAIN:
  1571. /*
  1572. * If there is no room left in the current buffer in the
  1573. * scatter-gather list, move onto the next one.
  1574. */
  1575. if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
  1576. ++cmd->SCp.buffer;
  1577. --cmd->SCp.buffers_residual;
  1578. cmd->SCp.this_residual = cmd->SCp.buffer->length;
  1579. cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
  1580. dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
  1581. cmd->SCp.this_residual,
  1582. cmd->SCp.buffers_residual);
  1583. }
  1584. /*
  1585. * The preferred transfer method is going to be
  1586. * PSEUDO-DMA for systems that are strictly PIO,
  1587. * since we can let the hardware do the handshaking.
  1588. *
  1589. * For this to work, we need to know the transfersize
  1590. * ahead of time, since the pseudo-DMA code will sit
  1591. * in an unconditional loop.
  1592. */
  1593. transfersize = 0;
  1594. if (!cmd->device->borken)
  1595. transfersize = NCR5380_dma_xfer_len(instance, cmd, phase);
  1596. if (transfersize > 0) {
  1597. len = transfersize;
  1598. if (NCR5380_transfer_dma(instance, &phase,
  1599. &len, (unsigned char **)&cmd->SCp.ptr)) {
  1600. /*
  1601. * If the watchdog timer fires, all future
  1602. * accesses to this device will use the
  1603. * polled-IO.
  1604. */
  1605. scmd_printk(KERN_INFO, cmd,
  1606. "switching to slow handshake\n");
  1607. cmd->device->borken = 1;
  1608. sink = 1;
  1609. do_abort(instance);
  1610. cmd->result = DID_ERROR << 16;
  1611. /* XXX - need to source or sink data here, as appropriate */
  1612. }
  1613. } else {
  1614. /* Transfer a small chunk so that the
  1615. * irq mode lock is not held too long.
  1616. */
  1617. transfersize = min(cmd->SCp.this_residual,
  1618. NCR5380_PIO_CHUNK_SIZE);
  1619. len = transfersize;
  1620. NCR5380_transfer_pio(instance, &phase, &len,
  1621. (unsigned char **)&cmd->SCp.ptr);
  1622. cmd->SCp.this_residual -= transfersize - len;
  1623. }
  1624. #ifdef CONFIG_SUN3
  1625. if (sun3_dma_setup_done == cmd)
  1626. sun3_dma_setup_done = NULL;
  1627. #endif
  1628. return;
  1629. case PHASE_MSGIN:
  1630. len = 1;
  1631. data = &tmp;
  1632. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1633. cmd->SCp.Message = tmp;
  1634. switch (tmp) {
  1635. case ABORT:
  1636. case COMMAND_COMPLETE:
  1637. /* Accept message by clearing ACK */
  1638. sink = 1;
  1639. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1640. dsprintk(NDEBUG_QUEUES, instance,
  1641. "COMMAND COMPLETE %p target %d lun %llu\n",
  1642. cmd, scmd_id(cmd), cmd->device->lun);
  1643. hostdata->connected = NULL;
  1644. cmd->result &= ~0xffff;
  1645. cmd->result |= cmd->SCp.Status;
  1646. cmd->result |= cmd->SCp.Message << 8;
  1647. if (cmd->cmnd[0] == REQUEST_SENSE)
  1648. complete_cmd(instance, cmd);
  1649. else {
  1650. if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
  1651. cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
  1652. dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
  1653. cmd);
  1654. list_add_tail(&ncmd->list,
  1655. &hostdata->autosense);
  1656. } else
  1657. complete_cmd(instance, cmd);
  1658. }
  1659. /*
  1660. * Restore phase bits to 0 so an interrupted selection,
  1661. * arbitration can resume.
  1662. */
  1663. NCR5380_write(TARGET_COMMAND_REG, 0);
  1664. /* Enable reselect interrupts */
  1665. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  1666. maybe_release_dma_irq(instance);
  1667. return;
  1668. case MESSAGE_REJECT:
  1669. /* Accept message by clearing ACK */
  1670. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1671. switch (hostdata->last_message) {
  1672. case HEAD_OF_QUEUE_TAG:
  1673. case ORDERED_QUEUE_TAG:
  1674. case SIMPLE_QUEUE_TAG:
  1675. cmd->device->simple_tags = 0;
  1676. hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
  1677. break;
  1678. default:
  1679. break;
  1680. }
  1681. break;
  1682. case DISCONNECT:
  1683. /* Accept message by clearing ACK */
  1684. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1685. hostdata->connected = NULL;
  1686. list_add(&ncmd->list, &hostdata->disconnected);
  1687. dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
  1688. instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
  1689. cmd, scmd_id(cmd), cmd->device->lun);
  1690. /*
  1691. * Restore phase bits to 0 so an interrupted selection,
  1692. * arbitration can resume.
  1693. */
  1694. NCR5380_write(TARGET_COMMAND_REG, 0);
  1695. /* Enable reselect interrupts */
  1696. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  1697. #ifdef SUN3_SCSI_VME
  1698. dregs->csr |= CSR_DMA_ENABLE;
  1699. #endif
  1700. return;
  1701. /*
  1702. * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
  1703. * operation, in violation of the SCSI spec so we can safely
  1704. * ignore SAVE/RESTORE pointers calls.
  1705. *
  1706. * Unfortunately, some disks violate the SCSI spec and
  1707. * don't issue the required SAVE_POINTERS message before
  1708. * disconnecting, and we have to break spec to remain
  1709. * compatible.
  1710. */
  1711. case SAVE_POINTERS:
  1712. case RESTORE_POINTERS:
  1713. /* Accept message by clearing ACK */
  1714. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1715. break;
  1716. case EXTENDED_MESSAGE:
  1717. /*
  1718. * Start the message buffer with the EXTENDED_MESSAGE
  1719. * byte, since spi_print_msg() wants the whole thing.
  1720. */
  1721. extended_msg[0] = EXTENDED_MESSAGE;
  1722. /* Accept first byte by clearing ACK */
  1723. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1724. spin_unlock_irq(&hostdata->lock);
  1725. dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
  1726. len = 2;
  1727. data = extended_msg + 1;
  1728. phase = PHASE_MSGIN;
  1729. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1730. dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
  1731. (int)extended_msg[1],
  1732. (int)extended_msg[2]);
  1733. if (!len && extended_msg[1] > 0 &&
  1734. extended_msg[1] <= sizeof(extended_msg) - 2) {
  1735. /* Accept third byte by clearing ACK */
  1736. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1737. len = extended_msg[1] - 1;
  1738. data = extended_msg + 3;
  1739. phase = PHASE_MSGIN;
  1740. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1741. dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
  1742. len);
  1743. switch (extended_msg[2]) {
  1744. case EXTENDED_SDTR:
  1745. case EXTENDED_WDTR:
  1746. case EXTENDED_MODIFY_DATA_POINTER:
  1747. case EXTENDED_EXTENDED_IDENTIFY:
  1748. tmp = 0;
  1749. }
  1750. } else if (len) {
  1751. shost_printk(KERN_ERR, instance, "error receiving extended message\n");
  1752. tmp = 0;
  1753. } else {
  1754. shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
  1755. extended_msg[2], extended_msg[1]);
  1756. tmp = 0;
  1757. }
  1758. spin_lock_irq(&hostdata->lock);
  1759. if (!hostdata->connected)
  1760. return;
  1761. /* Fall through to reject message */
  1762. /*
  1763. * If we get something weird that we aren't expecting,
  1764. * reject it.
  1765. */
  1766. default:
  1767. if (!tmp) {
  1768. shost_printk(KERN_ERR, instance, "rejecting message ");
  1769. spi_print_msg(extended_msg);
  1770. printk("\n");
  1771. } else if (tmp != EXTENDED_MESSAGE)
  1772. scmd_printk(KERN_INFO, cmd,
  1773. "rejecting unknown message %02x\n",
  1774. tmp);
  1775. else
  1776. scmd_printk(KERN_INFO, cmd,
  1777. "rejecting unknown extended message code %02x, length %d\n",
  1778. extended_msg[1], extended_msg[0]);
  1779. msgout = MESSAGE_REJECT;
  1780. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
  1781. break;
  1782. } /* switch (tmp) */
  1783. break;
  1784. case PHASE_MSGOUT:
  1785. len = 1;
  1786. data = &msgout;
  1787. hostdata->last_message = msgout;
  1788. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1789. if (msgout == ABORT) {
  1790. hostdata->connected = NULL;
  1791. cmd->result = DID_ERROR << 16;
  1792. complete_cmd(instance, cmd);
  1793. maybe_release_dma_irq(instance);
  1794. NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
  1795. return;
  1796. }
  1797. msgout = NOP;
  1798. break;
  1799. case PHASE_CMDOUT:
  1800. len = cmd->cmd_len;
  1801. data = cmd->cmnd;
  1802. /*
  1803. * XXX for performance reasons, on machines with a
  1804. * PSEUDO-DMA architecture we should probably
  1805. * use the dma transfer function.
  1806. */
  1807. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1808. break;
  1809. case PHASE_STATIN:
  1810. len = 1;
  1811. data = &tmp;
  1812. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1813. cmd->SCp.Status = tmp;
  1814. break;
  1815. default:
  1816. shost_printk(KERN_ERR, instance, "unknown phase\n");
  1817. NCR5380_dprint(NDEBUG_ANY, instance);
  1818. } /* switch(phase) */
  1819. } else {
  1820. spin_unlock_irq(&hostdata->lock);
  1821. NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
  1822. spin_lock_irq(&hostdata->lock);
  1823. }
  1824. }
  1825. }
  1826. /*
  1827. * Function : void NCR5380_reselect (struct Scsi_Host *instance)
  1828. *
  1829. * Purpose : does reselection, initializing the instance->connected
  1830. * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
  1831. * nexus has been reestablished,
  1832. *
  1833. * Inputs : instance - this instance of the NCR5380.
  1834. */
  1835. static void NCR5380_reselect(struct Scsi_Host *instance)
  1836. {
  1837. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  1838. unsigned char target_mask;
  1839. unsigned char lun;
  1840. unsigned char msg[3];
  1841. struct NCR5380_cmd *ncmd;
  1842. struct scsi_cmnd *tmp;
  1843. /*
  1844. * Disable arbitration, etc. since the host adapter obviously
  1845. * lost, and tell an interrupted NCR5380_select() to restart.
  1846. */
  1847. NCR5380_write(MODE_REG, MR_BASE);
  1848. target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
  1849. dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
  1850. /*
  1851. * At this point, we have detected that our SCSI ID is on the bus,
  1852. * SEL is true and BSY was false for at least one bus settle delay
  1853. * (400 ns).
  1854. *
  1855. * We must assert BSY ourselves, until the target drops the SEL
  1856. * signal.
  1857. */
  1858. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
  1859. if (NCR5380_poll_politely(instance,
  1860. STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
  1861. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1862. return;
  1863. }
  1864. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1865. /*
  1866. * Wait for target to go into MSGIN.
  1867. */
  1868. if (NCR5380_poll_politely(instance,
  1869. STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
  1870. do_abort(instance);
  1871. return;
  1872. }
  1873. #ifdef CONFIG_SUN3
  1874. /* acknowledge toggle to MSGIN */
  1875. NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
  1876. /* peek at the byte without really hitting the bus */
  1877. msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
  1878. #else
  1879. {
  1880. int len = 1;
  1881. unsigned char *data = msg;
  1882. unsigned char phase = PHASE_MSGIN;
  1883. NCR5380_transfer_pio(instance, &phase, &len, &data);
  1884. if (len) {
  1885. do_abort(instance);
  1886. return;
  1887. }
  1888. }
  1889. #endif /* CONFIG_SUN3 */
  1890. if (!(msg[0] & 0x80)) {
  1891. shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
  1892. spi_print_msg(msg);
  1893. printk("\n");
  1894. do_abort(instance);
  1895. return;
  1896. }
  1897. lun = msg[0] & 0x07;
  1898. /*
  1899. * We need to add code for SCSI-II to track which devices have
  1900. * I_T_L_Q nexuses established, and which have simple I_T_L
  1901. * nexuses so we can chose to do additional data transfer.
  1902. */
  1903. /*
  1904. * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
  1905. * just reestablished, and remove it from the disconnected queue.
  1906. */
  1907. tmp = NULL;
  1908. list_for_each_entry(ncmd, &hostdata->disconnected, list) {
  1909. struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
  1910. if (target_mask == (1 << scmd_id(cmd)) &&
  1911. lun == (u8)cmd->device->lun) {
  1912. list_del(&ncmd->list);
  1913. tmp = cmd;
  1914. break;
  1915. }
  1916. }
  1917. if (tmp) {
  1918. dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
  1919. "reselect: removed %p from disconnected queue\n", tmp);
  1920. } else {
  1921. shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
  1922. target_mask, lun);
  1923. /*
  1924. * Since we have an established nexus that we can't do anything
  1925. * with, we must abort it.
  1926. */
  1927. do_abort(instance);
  1928. return;
  1929. }
  1930. #ifdef CONFIG_SUN3
  1931. {
  1932. void *d;
  1933. unsigned long count;
  1934. if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) {
  1935. count = tmp->SCp.buffer->length;
  1936. d = sg_virt(tmp->SCp.buffer);
  1937. } else {
  1938. count = tmp->SCp.this_residual;
  1939. d = tmp->SCp.ptr;
  1940. }
  1941. if (sun3_dma_setup_done != tmp &&
  1942. sun3scsi_dma_xfer_len(count, tmp) > 0) {
  1943. sun3scsi_dma_setup(instance, d, count,
  1944. rq_data_dir(tmp->request));
  1945. sun3_dma_setup_done = tmp;
  1946. }
  1947. }
  1948. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
  1949. #endif /* CONFIG_SUN3 */
  1950. /* Accept message by clearing ACK */
  1951. NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
  1952. hostdata->connected = tmp;
  1953. dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
  1954. scmd_id(tmp), tmp->device->lun);
  1955. }
  1956. /**
  1957. * list_find_cmd - test for presence of a command in a linked list
  1958. * @haystack: list of commands
  1959. * @needle: command to search for
  1960. */
  1961. static bool list_find_cmd(struct list_head *haystack,
  1962. struct scsi_cmnd *needle)
  1963. {
  1964. struct NCR5380_cmd *ncmd;
  1965. list_for_each_entry(ncmd, haystack, list)
  1966. if (NCR5380_to_scmd(ncmd) == needle)
  1967. return true;
  1968. return false;
  1969. }
  1970. /**
  1971. * list_remove_cmd - remove a command from linked list
  1972. * @haystack: list of commands
  1973. * @needle: command to remove
  1974. */
  1975. static bool list_del_cmd(struct list_head *haystack,
  1976. struct scsi_cmnd *needle)
  1977. {
  1978. if (list_find_cmd(haystack, needle)) {
  1979. struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
  1980. list_del(&ncmd->list);
  1981. return true;
  1982. }
  1983. return false;
  1984. }
  1985. /**
  1986. * NCR5380_abort - scsi host eh_abort_handler() method
  1987. * @cmd: the command to be aborted
  1988. *
  1989. * Try to abort a given command by removing it from queues and/or sending
  1990. * the target an abort message. This may not succeed in causing a target
  1991. * to abort the command. Nonetheless, the low-level driver must forget about
  1992. * the command because the mid-layer reclaims it and it may be re-issued.
  1993. *
  1994. * The normal path taken by a command is as follows. For EH we trace this
  1995. * same path to locate and abort the command.
  1996. *
  1997. * unissued -> selecting -> [unissued -> selecting ->]... connected ->
  1998. * [disconnected -> connected ->]...
  1999. * [autosense -> connected ->] done
  2000. *
  2001. * If cmd was not found at all then presumably it has already been completed,
  2002. * in which case return SUCCESS to try to avoid further EH measures.
  2003. *
  2004. * If the command has not completed yet, we must not fail to find it.
  2005. * We have no option but to forget the aborted command (even if it still
  2006. * lacks sense data). The mid-layer may re-issue a command that is in error
  2007. * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
  2008. * this driver are such that a command can appear on one queue only.
  2009. *
  2010. * The lock protects driver data structures, but EH handlers also use it
  2011. * to serialize their own execution and prevent their own re-entry.
  2012. */
  2013. static int NCR5380_abort(struct scsi_cmnd *cmd)
  2014. {
  2015. struct Scsi_Host *instance = cmd->device->host;
  2016. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  2017. unsigned long flags;
  2018. int result = SUCCESS;
  2019. spin_lock_irqsave(&hostdata->lock, flags);
  2020. #if (NDEBUG & NDEBUG_ANY)
  2021. scmd_printk(KERN_INFO, cmd, __func__);
  2022. #endif
  2023. NCR5380_dprint(NDEBUG_ANY, instance);
  2024. NCR5380_dprint_phase(NDEBUG_ANY, instance);
  2025. if (list_del_cmd(&hostdata->unissued, cmd)) {
  2026. dsprintk(NDEBUG_ABORT, instance,
  2027. "abort: removed %p from issue queue\n", cmd);
  2028. cmd->result = DID_ABORT << 16;
  2029. cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
  2030. goto out;
  2031. }
  2032. if (hostdata->selecting == cmd) {
  2033. dsprintk(NDEBUG_ABORT, instance,
  2034. "abort: cmd %p == selecting\n", cmd);
  2035. hostdata->selecting = NULL;
  2036. cmd->result = DID_ABORT << 16;
  2037. complete_cmd(instance, cmd);
  2038. goto out;
  2039. }
  2040. if (list_del_cmd(&hostdata->disconnected, cmd)) {
  2041. dsprintk(NDEBUG_ABORT, instance,
  2042. "abort: removed %p from disconnected list\n", cmd);
  2043. /* Can't call NCR5380_select() and send ABORT because that
  2044. * means releasing the lock. Need a bus reset.
  2045. */
  2046. set_host_byte(cmd, DID_ERROR);
  2047. complete_cmd(instance, cmd);
  2048. result = FAILED;
  2049. goto out;
  2050. }
  2051. if (hostdata->connected == cmd) {
  2052. dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
  2053. hostdata->connected = NULL;
  2054. hostdata->dma_len = 0;
  2055. if (do_abort(instance)) {
  2056. set_host_byte(cmd, DID_ERROR);
  2057. complete_cmd(instance, cmd);
  2058. result = FAILED;
  2059. goto out;
  2060. }
  2061. set_host_byte(cmd, DID_ABORT);
  2062. complete_cmd(instance, cmd);
  2063. goto out;
  2064. }
  2065. if (list_del_cmd(&hostdata->autosense, cmd)) {
  2066. dsprintk(NDEBUG_ABORT, instance,
  2067. "abort: removed %p from sense queue\n", cmd);
  2068. set_host_byte(cmd, DID_ERROR);
  2069. complete_cmd(instance, cmd);
  2070. }
  2071. out:
  2072. if (result == FAILED)
  2073. dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
  2074. else
  2075. dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
  2076. queue_work(hostdata->work_q, &hostdata->main_task);
  2077. maybe_release_dma_irq(instance);
  2078. spin_unlock_irqrestore(&hostdata->lock, flags);
  2079. return result;
  2080. }
  2081. /**
  2082. * NCR5380_bus_reset - reset the SCSI bus
  2083. * @cmd: SCSI command undergoing EH
  2084. *
  2085. * Returns SUCCESS
  2086. */
  2087. static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
  2088. {
  2089. struct Scsi_Host *instance = cmd->device->host;
  2090. struct NCR5380_hostdata *hostdata = shost_priv(instance);
  2091. int i;
  2092. unsigned long flags;
  2093. struct NCR5380_cmd *ncmd;
  2094. spin_lock_irqsave(&hostdata->lock, flags);
  2095. #if (NDEBUG & NDEBUG_ANY)
  2096. scmd_printk(KERN_INFO, cmd, __func__);
  2097. #endif
  2098. NCR5380_dprint(NDEBUG_ANY, instance);
  2099. NCR5380_dprint_phase(NDEBUG_ANY, instance);
  2100. do_reset(instance);
  2101. /* reset NCR registers */
  2102. NCR5380_write(MODE_REG, MR_BASE);
  2103. NCR5380_write(TARGET_COMMAND_REG, 0);
  2104. NCR5380_write(SELECT_ENABLE_REG, 0);
  2105. /* After the reset, there are no more connected or disconnected commands
  2106. * and no busy units; so clear the low-level status here to avoid
  2107. * conflicts when the mid-level code tries to wake up the affected
  2108. * commands!
  2109. */
  2110. if (list_del_cmd(&hostdata->unissued, cmd)) {
  2111. cmd->result = DID_RESET << 16;
  2112. cmd->scsi_done(cmd);
  2113. }
  2114. if (hostdata->selecting) {
  2115. hostdata->selecting->result = DID_RESET << 16;
  2116. complete_cmd(instance, hostdata->selecting);
  2117. hostdata->selecting = NULL;
  2118. }
  2119. list_for_each_entry(ncmd, &hostdata->disconnected, list) {
  2120. struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
  2121. set_host_byte(cmd, DID_RESET);
  2122. complete_cmd(instance, cmd);
  2123. }
  2124. INIT_LIST_HEAD(&hostdata->disconnected);
  2125. list_for_each_entry(ncmd, &hostdata->autosense, list) {
  2126. struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
  2127. set_host_byte(cmd, DID_RESET);
  2128. cmd->scsi_done(cmd);
  2129. }
  2130. INIT_LIST_HEAD(&hostdata->autosense);
  2131. if (hostdata->connected) {
  2132. set_host_byte(hostdata->connected, DID_RESET);
  2133. complete_cmd(instance, hostdata->connected);
  2134. hostdata->connected = NULL;
  2135. }
  2136. for (i = 0; i < 8; ++i)
  2137. hostdata->busy[i] = 0;
  2138. hostdata->dma_len = 0;
  2139. queue_work(hostdata->work_q, &hostdata->main_task);
  2140. maybe_release_dma_irq(instance);
  2141. spin_unlock_irqrestore(&hostdata->lock, flags);
  2142. return SUCCESS;
  2143. }