qeth_core_main.c 173 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <linux/if_vlan.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/netdev_features.h>
  23. #include <linux/skbuff.h>
  24. #include <net/iucv/af_iucv.h>
  25. #include <net/dsfield.h>
  26. #include <asm/ebcdic.h>
  27. #include <asm/chpid.h>
  28. #include <asm/io.h>
  29. #include <asm/sysinfo.h>
  30. #include <asm/compat.h>
  31. #include "qeth_core.h"
  32. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  33. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  34. /* N P A M L V H */
  35. [QETH_DBF_SETUP] = {"qeth_setup",
  36. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  37. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  38. &debug_sprintf_view, NULL},
  39. [QETH_DBF_CTRL] = {"qeth_control",
  40. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  41. };
  42. EXPORT_SYMBOL_GPL(qeth_dbf);
  43. struct qeth_card_list_struct qeth_core_card_list;
  44. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  45. struct kmem_cache *qeth_core_header_cache;
  46. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  47. static struct kmem_cache *qeth_qdio_outbuf_cache;
  48. static struct device *qeth_core_root_dev;
  49. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  50. static struct lock_class_key qdio_out_skb_queue_key;
  51. static struct mutex qeth_mod_mutex;
  52. static void qeth_send_control_data_cb(struct qeth_channel *,
  53. struct qeth_cmd_buffer *);
  54. static int qeth_issue_next_read(struct qeth_card *);
  55. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  56. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  57. static void qeth_free_buffer_pool(struct qeth_card *);
  58. static int qeth_qdio_establish(struct qeth_card *);
  59. static void qeth_free_qdio_buffers(struct qeth_card *);
  60. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  61. struct qeth_qdio_out_buffer *buf,
  62. enum iucv_tx_notify notification);
  63. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  64. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  65. struct qeth_qdio_out_buffer *buf,
  66. enum qeth_qdio_buffer_states newbufstate);
  67. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  68. struct workqueue_struct *qeth_wq;
  69. EXPORT_SYMBOL_GPL(qeth_wq);
  70. int qeth_card_hw_is_reachable(struct qeth_card *card)
  71. {
  72. return (card->state == CARD_STATE_SOFTSETUP) ||
  73. (card->state == CARD_STATE_UP);
  74. }
  75. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  76. static void qeth_close_dev_handler(struct work_struct *work)
  77. {
  78. struct qeth_card *card;
  79. card = container_of(work, struct qeth_card, close_dev_work);
  80. QETH_CARD_TEXT(card, 2, "cldevhdl");
  81. rtnl_lock();
  82. dev_close(card->dev);
  83. rtnl_unlock();
  84. ccwgroup_set_offline(card->gdev);
  85. }
  86. void qeth_close_dev(struct qeth_card *card)
  87. {
  88. QETH_CARD_TEXT(card, 2, "cldevsubm");
  89. queue_work(qeth_wq, &card->close_dev_work);
  90. }
  91. EXPORT_SYMBOL_GPL(qeth_close_dev);
  92. static inline const char *qeth_get_cardname(struct qeth_card *card)
  93. {
  94. if (card->info.guestlan) {
  95. switch (card->info.type) {
  96. case QETH_CARD_TYPE_OSD:
  97. return " Virtual NIC QDIO";
  98. case QETH_CARD_TYPE_IQD:
  99. return " Virtual NIC Hiper";
  100. case QETH_CARD_TYPE_OSM:
  101. return " Virtual NIC QDIO - OSM";
  102. case QETH_CARD_TYPE_OSX:
  103. return " Virtual NIC QDIO - OSX";
  104. default:
  105. return " unknown";
  106. }
  107. } else {
  108. switch (card->info.type) {
  109. case QETH_CARD_TYPE_OSD:
  110. return " OSD Express";
  111. case QETH_CARD_TYPE_IQD:
  112. return " HiperSockets";
  113. case QETH_CARD_TYPE_OSN:
  114. return " OSN QDIO";
  115. case QETH_CARD_TYPE_OSM:
  116. return " OSM QDIO";
  117. case QETH_CARD_TYPE_OSX:
  118. return " OSX QDIO";
  119. default:
  120. return " unknown";
  121. }
  122. }
  123. return " n/a";
  124. }
  125. /* max length to be returned: 14 */
  126. const char *qeth_get_cardname_short(struct qeth_card *card)
  127. {
  128. if (card->info.guestlan) {
  129. switch (card->info.type) {
  130. case QETH_CARD_TYPE_OSD:
  131. return "Virt.NIC QDIO";
  132. case QETH_CARD_TYPE_IQD:
  133. return "Virt.NIC Hiper";
  134. case QETH_CARD_TYPE_OSM:
  135. return "Virt.NIC OSM";
  136. case QETH_CARD_TYPE_OSX:
  137. return "Virt.NIC OSX";
  138. default:
  139. return "unknown";
  140. }
  141. } else {
  142. switch (card->info.type) {
  143. case QETH_CARD_TYPE_OSD:
  144. switch (card->info.link_type) {
  145. case QETH_LINK_TYPE_FAST_ETH:
  146. return "OSD_100";
  147. case QETH_LINK_TYPE_HSTR:
  148. return "HSTR";
  149. case QETH_LINK_TYPE_GBIT_ETH:
  150. return "OSD_1000";
  151. case QETH_LINK_TYPE_10GBIT_ETH:
  152. return "OSD_10GIG";
  153. case QETH_LINK_TYPE_LANE_ETH100:
  154. return "OSD_FE_LANE";
  155. case QETH_LINK_TYPE_LANE_TR:
  156. return "OSD_TR_LANE";
  157. case QETH_LINK_TYPE_LANE_ETH1000:
  158. return "OSD_GbE_LANE";
  159. case QETH_LINK_TYPE_LANE:
  160. return "OSD_ATM_LANE";
  161. default:
  162. return "OSD_Express";
  163. }
  164. case QETH_CARD_TYPE_IQD:
  165. return "HiperSockets";
  166. case QETH_CARD_TYPE_OSN:
  167. return "OSN";
  168. case QETH_CARD_TYPE_OSM:
  169. return "OSM_1000";
  170. case QETH_CARD_TYPE_OSX:
  171. return "OSX_10GIG";
  172. default:
  173. return "unknown";
  174. }
  175. }
  176. return "n/a";
  177. }
  178. void qeth_set_recovery_task(struct qeth_card *card)
  179. {
  180. card->recovery_task = current;
  181. }
  182. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  183. void qeth_clear_recovery_task(struct qeth_card *card)
  184. {
  185. card->recovery_task = NULL;
  186. }
  187. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  188. static bool qeth_is_recovery_task(const struct qeth_card *card)
  189. {
  190. return card->recovery_task == current;
  191. }
  192. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  193. int clear_start_mask)
  194. {
  195. unsigned long flags;
  196. spin_lock_irqsave(&card->thread_mask_lock, flags);
  197. card->thread_allowed_mask = threads;
  198. if (clear_start_mask)
  199. card->thread_start_mask &= threads;
  200. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  201. wake_up(&card->wait_q);
  202. }
  203. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  204. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  205. {
  206. unsigned long flags;
  207. int rc = 0;
  208. spin_lock_irqsave(&card->thread_mask_lock, flags);
  209. rc = (card->thread_running_mask & threads);
  210. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  211. return rc;
  212. }
  213. EXPORT_SYMBOL_GPL(qeth_threads_running);
  214. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  215. {
  216. if (qeth_is_recovery_task(card))
  217. return 0;
  218. return wait_event_interruptible(card->wait_q,
  219. qeth_threads_running(card, threads) == 0);
  220. }
  221. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  222. void qeth_clear_working_pool_list(struct qeth_card *card)
  223. {
  224. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  225. QETH_CARD_TEXT(card, 5, "clwrklst");
  226. list_for_each_entry_safe(pool_entry, tmp,
  227. &card->qdio.in_buf_pool.entry_list, list){
  228. list_del(&pool_entry->list);
  229. }
  230. }
  231. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  232. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  233. {
  234. struct qeth_buffer_pool_entry *pool_entry;
  235. void *ptr;
  236. int i, j;
  237. QETH_CARD_TEXT(card, 5, "alocpool");
  238. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  239. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  240. if (!pool_entry) {
  241. qeth_free_buffer_pool(card);
  242. return -ENOMEM;
  243. }
  244. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  245. ptr = (void *) __get_free_page(GFP_KERNEL);
  246. if (!ptr) {
  247. while (j > 0)
  248. free_page((unsigned long)
  249. pool_entry->elements[--j]);
  250. kfree(pool_entry);
  251. qeth_free_buffer_pool(card);
  252. return -ENOMEM;
  253. }
  254. pool_entry->elements[j] = ptr;
  255. }
  256. list_add(&pool_entry->init_list,
  257. &card->qdio.init_pool.entry_list);
  258. }
  259. return 0;
  260. }
  261. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  262. {
  263. QETH_CARD_TEXT(card, 2, "realcbp");
  264. if ((card->state != CARD_STATE_DOWN) &&
  265. (card->state != CARD_STATE_RECOVER))
  266. return -EPERM;
  267. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  268. qeth_clear_working_pool_list(card);
  269. qeth_free_buffer_pool(card);
  270. card->qdio.in_buf_pool.buf_count = bufcnt;
  271. card->qdio.init_pool.buf_count = bufcnt;
  272. return qeth_alloc_buffer_pool(card);
  273. }
  274. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  275. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  276. {
  277. if (!q)
  278. return;
  279. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  280. kfree(q);
  281. }
  282. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  283. {
  284. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  285. int i;
  286. if (!q)
  287. return NULL;
  288. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  289. kfree(q);
  290. return NULL;
  291. }
  292. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  293. q->bufs[i].buffer = q->qdio_bufs[i];
  294. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  295. return q;
  296. }
  297. static inline int qeth_cq_init(struct qeth_card *card)
  298. {
  299. int rc;
  300. if (card->options.cq == QETH_CQ_ENABLED) {
  301. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  302. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  303. QDIO_MAX_BUFFERS_PER_Q);
  304. card->qdio.c_q->next_buf_to_init = 127;
  305. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  306. card->qdio.no_in_queues - 1, 0,
  307. 127);
  308. if (rc) {
  309. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  310. goto out;
  311. }
  312. }
  313. rc = 0;
  314. out:
  315. return rc;
  316. }
  317. static inline int qeth_alloc_cq(struct qeth_card *card)
  318. {
  319. int rc;
  320. if (card->options.cq == QETH_CQ_ENABLED) {
  321. int i;
  322. struct qdio_outbuf_state *outbuf_states;
  323. QETH_DBF_TEXT(SETUP, 2, "cqon");
  324. card->qdio.c_q = qeth_alloc_qdio_queue();
  325. if (!card->qdio.c_q) {
  326. rc = -1;
  327. goto kmsg_out;
  328. }
  329. card->qdio.no_in_queues = 2;
  330. card->qdio.out_bufstates =
  331. kzalloc(card->qdio.no_out_queues *
  332. QDIO_MAX_BUFFERS_PER_Q *
  333. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  334. outbuf_states = card->qdio.out_bufstates;
  335. if (outbuf_states == NULL) {
  336. rc = -1;
  337. goto free_cq_out;
  338. }
  339. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  340. card->qdio.out_qs[i]->bufstates = outbuf_states;
  341. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  342. }
  343. } else {
  344. QETH_DBF_TEXT(SETUP, 2, "nocq");
  345. card->qdio.c_q = NULL;
  346. card->qdio.no_in_queues = 1;
  347. }
  348. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  349. rc = 0;
  350. out:
  351. return rc;
  352. free_cq_out:
  353. qeth_free_qdio_queue(card->qdio.c_q);
  354. card->qdio.c_q = NULL;
  355. kmsg_out:
  356. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  357. goto out;
  358. }
  359. static inline void qeth_free_cq(struct qeth_card *card)
  360. {
  361. if (card->qdio.c_q) {
  362. --card->qdio.no_in_queues;
  363. qeth_free_qdio_queue(card->qdio.c_q);
  364. card->qdio.c_q = NULL;
  365. }
  366. kfree(card->qdio.out_bufstates);
  367. card->qdio.out_bufstates = NULL;
  368. }
  369. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  370. int delayed) {
  371. enum iucv_tx_notify n;
  372. switch (sbalf15) {
  373. case 0:
  374. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  375. break;
  376. case 4:
  377. case 16:
  378. case 17:
  379. case 18:
  380. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  381. TX_NOTIFY_UNREACHABLE;
  382. break;
  383. default:
  384. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  385. TX_NOTIFY_GENERALERROR;
  386. break;
  387. }
  388. return n;
  389. }
  390. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  391. int bidx, int forced_cleanup)
  392. {
  393. if (q->card->options.cq != QETH_CQ_ENABLED)
  394. return;
  395. if (q->bufs[bidx]->next_pending != NULL) {
  396. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  397. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  398. while (c) {
  399. if (forced_cleanup ||
  400. atomic_read(&c->state) ==
  401. QETH_QDIO_BUF_HANDLED_DELAYED) {
  402. struct qeth_qdio_out_buffer *f = c;
  403. QETH_CARD_TEXT(f->q->card, 5, "fp");
  404. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  405. /* release here to avoid interleaving between
  406. outbound tasklet and inbound tasklet
  407. regarding notifications and lifecycle */
  408. qeth_release_skbs(c);
  409. c = f->next_pending;
  410. WARN_ON_ONCE(head->next_pending != f);
  411. head->next_pending = c;
  412. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  413. } else {
  414. head = c;
  415. c = c->next_pending;
  416. }
  417. }
  418. }
  419. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  420. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  421. /* for recovery situations */
  422. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  423. qeth_init_qdio_out_buf(q, bidx);
  424. QETH_CARD_TEXT(q->card, 2, "clprecov");
  425. }
  426. }
  427. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  428. unsigned long phys_aob_addr) {
  429. struct qaob *aob;
  430. struct qeth_qdio_out_buffer *buffer;
  431. enum iucv_tx_notify notification;
  432. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  433. QETH_CARD_TEXT(card, 5, "haob");
  434. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  435. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  436. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  437. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  438. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  439. notification = TX_NOTIFY_OK;
  440. } else {
  441. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  442. QETH_QDIO_BUF_PENDING);
  443. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  444. notification = TX_NOTIFY_DELAYED_OK;
  445. }
  446. if (aob->aorc != 0) {
  447. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  448. notification = qeth_compute_cq_notification(aob->aorc, 1);
  449. }
  450. qeth_notify_skbs(buffer->q, buffer, notification);
  451. buffer->aob = NULL;
  452. qeth_clear_output_buffer(buffer->q, buffer,
  453. QETH_QDIO_BUF_HANDLED_DELAYED);
  454. /* from here on: do not touch buffer anymore */
  455. qdio_release_aob(aob);
  456. }
  457. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  458. {
  459. return card->options.cq == QETH_CQ_ENABLED &&
  460. card->qdio.c_q != NULL &&
  461. queue != 0 &&
  462. queue == card->qdio.no_in_queues - 1;
  463. }
  464. static int __qeth_issue_next_read(struct qeth_card *card)
  465. {
  466. int rc;
  467. struct qeth_cmd_buffer *iob;
  468. QETH_CARD_TEXT(card, 5, "issnxrd");
  469. if (card->read.state != CH_STATE_UP)
  470. return -EIO;
  471. iob = qeth_get_buffer(&card->read);
  472. if (!iob) {
  473. dev_warn(&card->gdev->dev, "The qeth device driver "
  474. "failed to recover an error on the device\n");
  475. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  476. "available\n", dev_name(&card->gdev->dev));
  477. return -ENOMEM;
  478. }
  479. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  480. QETH_CARD_TEXT(card, 6, "noirqpnd");
  481. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  482. (addr_t) iob, 0, 0);
  483. if (rc) {
  484. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  485. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  486. atomic_set(&card->read.irq_pending, 0);
  487. card->read_or_write_problem = 1;
  488. qeth_schedule_recovery(card);
  489. wake_up(&card->wait_q);
  490. }
  491. return rc;
  492. }
  493. static int qeth_issue_next_read(struct qeth_card *card)
  494. {
  495. int ret;
  496. spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  497. ret = __qeth_issue_next_read(card);
  498. spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  499. return ret;
  500. }
  501. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  502. {
  503. struct qeth_reply *reply;
  504. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  505. if (reply) {
  506. atomic_set(&reply->refcnt, 1);
  507. atomic_set(&reply->received, 0);
  508. reply->card = card;
  509. }
  510. return reply;
  511. }
  512. static void qeth_get_reply(struct qeth_reply *reply)
  513. {
  514. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  515. atomic_inc(&reply->refcnt);
  516. }
  517. static void qeth_put_reply(struct qeth_reply *reply)
  518. {
  519. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  520. if (atomic_dec_and_test(&reply->refcnt))
  521. kfree(reply);
  522. }
  523. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  524. struct qeth_card *card)
  525. {
  526. char *ipa_name;
  527. int com = cmd->hdr.command;
  528. ipa_name = qeth_get_ipa_cmd_name(com);
  529. if (rc)
  530. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  531. "x%X \"%s\"\n",
  532. ipa_name, com, dev_name(&card->gdev->dev),
  533. QETH_CARD_IFNAME(card), rc,
  534. qeth_get_ipa_msg(rc));
  535. else
  536. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  537. ipa_name, com, dev_name(&card->gdev->dev),
  538. QETH_CARD_IFNAME(card));
  539. }
  540. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  541. struct qeth_cmd_buffer *iob)
  542. {
  543. struct qeth_ipa_cmd *cmd = NULL;
  544. QETH_CARD_TEXT(card, 5, "chkipad");
  545. if (IS_IPA(iob->data)) {
  546. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  547. if (IS_IPA_REPLY(cmd)) {
  548. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  549. cmd->hdr.command != IPA_CMD_DELCCID &&
  550. cmd->hdr.command != IPA_CMD_MODCCID &&
  551. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  552. qeth_issue_ipa_msg(cmd,
  553. cmd->hdr.return_code, card);
  554. return cmd;
  555. } else {
  556. switch (cmd->hdr.command) {
  557. case IPA_CMD_STOPLAN:
  558. if (cmd->hdr.return_code ==
  559. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  560. dev_err(&card->gdev->dev,
  561. "Interface %s is down because the "
  562. "adjacent port is no longer in "
  563. "reflective relay mode\n",
  564. QETH_CARD_IFNAME(card));
  565. qeth_close_dev(card);
  566. } else {
  567. dev_warn(&card->gdev->dev,
  568. "The link for interface %s on CHPID"
  569. " 0x%X failed\n",
  570. QETH_CARD_IFNAME(card),
  571. card->info.chpid);
  572. qeth_issue_ipa_msg(cmd,
  573. cmd->hdr.return_code, card);
  574. }
  575. card->lan_online = 0;
  576. if (card->dev && netif_carrier_ok(card->dev))
  577. netif_carrier_off(card->dev);
  578. return NULL;
  579. case IPA_CMD_STARTLAN:
  580. dev_info(&card->gdev->dev,
  581. "The link for %s on CHPID 0x%X has"
  582. " been restored\n",
  583. QETH_CARD_IFNAME(card),
  584. card->info.chpid);
  585. netif_carrier_on(card->dev);
  586. card->lan_online = 1;
  587. if (card->info.hwtrap)
  588. card->info.hwtrap = 2;
  589. qeth_schedule_recovery(card);
  590. return NULL;
  591. case IPA_CMD_SETBRIDGEPORT_IQD:
  592. case IPA_CMD_SETBRIDGEPORT_OSA:
  593. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  594. if (card->discipline->control_event_handler
  595. (card, cmd))
  596. return cmd;
  597. else
  598. return NULL;
  599. case IPA_CMD_MODCCID:
  600. return cmd;
  601. case IPA_CMD_REGISTER_LOCAL_ADDR:
  602. QETH_CARD_TEXT(card, 3, "irla");
  603. break;
  604. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  605. QETH_CARD_TEXT(card, 3, "urla");
  606. break;
  607. default:
  608. QETH_DBF_MESSAGE(2, "Received data is IPA "
  609. "but not a reply!\n");
  610. break;
  611. }
  612. }
  613. }
  614. return cmd;
  615. }
  616. void qeth_clear_ipacmd_list(struct qeth_card *card)
  617. {
  618. struct qeth_reply *reply, *r;
  619. unsigned long flags;
  620. QETH_CARD_TEXT(card, 4, "clipalst");
  621. spin_lock_irqsave(&card->lock, flags);
  622. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  623. qeth_get_reply(reply);
  624. reply->rc = -EIO;
  625. atomic_inc(&reply->received);
  626. list_del_init(&reply->list);
  627. wake_up(&reply->wait_q);
  628. qeth_put_reply(reply);
  629. }
  630. spin_unlock_irqrestore(&card->lock, flags);
  631. atomic_set(&card->write.irq_pending, 0);
  632. }
  633. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  634. static int qeth_check_idx_response(struct qeth_card *card,
  635. unsigned char *buffer)
  636. {
  637. if (!buffer)
  638. return 0;
  639. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  640. if ((buffer[2] & 0xc0) == 0xc0) {
  641. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  642. "with cause code 0x%02x%s\n",
  643. buffer[4],
  644. ((buffer[4] == 0x22) ?
  645. " -- try another portname" : ""));
  646. QETH_CARD_TEXT(card, 2, "ckidxres");
  647. QETH_CARD_TEXT(card, 2, " idxterm");
  648. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  649. if (buffer[4] == 0xf6) {
  650. dev_err(&card->gdev->dev,
  651. "The qeth device is not configured "
  652. "for the OSI layer required by z/VM\n");
  653. return -EPERM;
  654. }
  655. return -EIO;
  656. }
  657. return 0;
  658. }
  659. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  660. {
  661. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  662. dev_get_drvdata(&cdev->dev))->dev);
  663. return card;
  664. }
  665. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  666. __u32 len)
  667. {
  668. struct qeth_card *card;
  669. card = CARD_FROM_CDEV(channel->ccwdev);
  670. QETH_CARD_TEXT(card, 4, "setupccw");
  671. if (channel == &card->read)
  672. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  673. else
  674. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  675. channel->ccw.count = len;
  676. channel->ccw.cda = (__u32) __pa(iob);
  677. }
  678. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  679. {
  680. __u8 index;
  681. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  682. index = channel->io_buf_no;
  683. do {
  684. if (channel->iob[index].state == BUF_STATE_FREE) {
  685. channel->iob[index].state = BUF_STATE_LOCKED;
  686. channel->io_buf_no = (channel->io_buf_no + 1) %
  687. QETH_CMD_BUFFER_NO;
  688. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  689. return channel->iob + index;
  690. }
  691. index = (index + 1) % QETH_CMD_BUFFER_NO;
  692. } while (index != channel->io_buf_no);
  693. return NULL;
  694. }
  695. void qeth_release_buffer(struct qeth_channel *channel,
  696. struct qeth_cmd_buffer *iob)
  697. {
  698. unsigned long flags;
  699. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  700. spin_lock_irqsave(&channel->iob_lock, flags);
  701. memset(iob->data, 0, QETH_BUFSIZE);
  702. iob->state = BUF_STATE_FREE;
  703. iob->callback = qeth_send_control_data_cb;
  704. iob->rc = 0;
  705. spin_unlock_irqrestore(&channel->iob_lock, flags);
  706. wake_up(&channel->wait_q);
  707. }
  708. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  709. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  710. {
  711. struct qeth_cmd_buffer *buffer = NULL;
  712. unsigned long flags;
  713. spin_lock_irqsave(&channel->iob_lock, flags);
  714. buffer = __qeth_get_buffer(channel);
  715. spin_unlock_irqrestore(&channel->iob_lock, flags);
  716. return buffer;
  717. }
  718. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  719. {
  720. struct qeth_cmd_buffer *buffer;
  721. wait_event(channel->wait_q,
  722. ((buffer = qeth_get_buffer(channel)) != NULL));
  723. return buffer;
  724. }
  725. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  726. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  727. {
  728. int cnt;
  729. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  730. qeth_release_buffer(channel, &channel->iob[cnt]);
  731. channel->buf_no = 0;
  732. channel->io_buf_no = 0;
  733. }
  734. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  735. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  736. struct qeth_cmd_buffer *iob)
  737. {
  738. struct qeth_card *card;
  739. struct qeth_reply *reply, *r;
  740. struct qeth_ipa_cmd *cmd;
  741. unsigned long flags;
  742. int keep_reply;
  743. int rc = 0;
  744. card = CARD_FROM_CDEV(channel->ccwdev);
  745. QETH_CARD_TEXT(card, 4, "sndctlcb");
  746. rc = qeth_check_idx_response(card, iob->data);
  747. switch (rc) {
  748. case 0:
  749. break;
  750. case -EIO:
  751. qeth_clear_ipacmd_list(card);
  752. qeth_schedule_recovery(card);
  753. /* fall through */
  754. default:
  755. goto out;
  756. }
  757. cmd = qeth_check_ipa_data(card, iob);
  758. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  759. goto out;
  760. /*in case of OSN : check if cmd is set */
  761. if (card->info.type == QETH_CARD_TYPE_OSN &&
  762. cmd &&
  763. cmd->hdr.command != IPA_CMD_STARTLAN &&
  764. card->osn_info.assist_cb != NULL) {
  765. card->osn_info.assist_cb(card->dev, cmd);
  766. goto out;
  767. }
  768. spin_lock_irqsave(&card->lock, flags);
  769. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  770. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  771. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  772. qeth_get_reply(reply);
  773. list_del_init(&reply->list);
  774. spin_unlock_irqrestore(&card->lock, flags);
  775. keep_reply = 0;
  776. if (reply->callback != NULL) {
  777. if (cmd) {
  778. reply->offset = (__u16)((char *)cmd -
  779. (char *)iob->data);
  780. keep_reply = reply->callback(card,
  781. reply,
  782. (unsigned long)cmd);
  783. } else
  784. keep_reply = reply->callback(card,
  785. reply,
  786. (unsigned long)iob);
  787. }
  788. if (cmd)
  789. reply->rc = (u16) cmd->hdr.return_code;
  790. else if (iob->rc)
  791. reply->rc = iob->rc;
  792. if (keep_reply) {
  793. spin_lock_irqsave(&card->lock, flags);
  794. list_add_tail(&reply->list,
  795. &card->cmd_waiter_list);
  796. spin_unlock_irqrestore(&card->lock, flags);
  797. } else {
  798. atomic_inc(&reply->received);
  799. wake_up(&reply->wait_q);
  800. }
  801. qeth_put_reply(reply);
  802. goto out;
  803. }
  804. }
  805. spin_unlock_irqrestore(&card->lock, flags);
  806. out:
  807. memcpy(&card->seqno.pdu_hdr_ack,
  808. QETH_PDU_HEADER_SEQ_NO(iob->data),
  809. QETH_SEQ_NO_LENGTH);
  810. qeth_release_buffer(channel, iob);
  811. }
  812. static int qeth_setup_channel(struct qeth_channel *channel)
  813. {
  814. int cnt;
  815. QETH_DBF_TEXT(SETUP, 2, "setupch");
  816. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  817. channel->iob[cnt].data =
  818. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  819. if (channel->iob[cnt].data == NULL)
  820. break;
  821. channel->iob[cnt].state = BUF_STATE_FREE;
  822. channel->iob[cnt].channel = channel;
  823. channel->iob[cnt].callback = qeth_send_control_data_cb;
  824. channel->iob[cnt].rc = 0;
  825. }
  826. if (cnt < QETH_CMD_BUFFER_NO) {
  827. while (cnt-- > 0)
  828. kfree(channel->iob[cnt].data);
  829. return -ENOMEM;
  830. }
  831. channel->buf_no = 0;
  832. channel->io_buf_no = 0;
  833. atomic_set(&channel->irq_pending, 0);
  834. spin_lock_init(&channel->iob_lock);
  835. init_waitqueue_head(&channel->wait_q);
  836. return 0;
  837. }
  838. static int qeth_set_thread_start_bit(struct qeth_card *card,
  839. unsigned long thread)
  840. {
  841. unsigned long flags;
  842. spin_lock_irqsave(&card->thread_mask_lock, flags);
  843. if (!(card->thread_allowed_mask & thread) ||
  844. (card->thread_start_mask & thread)) {
  845. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  846. return -EPERM;
  847. }
  848. card->thread_start_mask |= thread;
  849. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  850. return 0;
  851. }
  852. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  853. {
  854. unsigned long flags;
  855. spin_lock_irqsave(&card->thread_mask_lock, flags);
  856. card->thread_start_mask &= ~thread;
  857. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  858. wake_up(&card->wait_q);
  859. }
  860. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  861. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  862. {
  863. unsigned long flags;
  864. spin_lock_irqsave(&card->thread_mask_lock, flags);
  865. card->thread_running_mask &= ~thread;
  866. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  867. wake_up_all(&card->wait_q);
  868. }
  869. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  870. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  871. {
  872. unsigned long flags;
  873. int rc = 0;
  874. spin_lock_irqsave(&card->thread_mask_lock, flags);
  875. if (card->thread_start_mask & thread) {
  876. if ((card->thread_allowed_mask & thread) &&
  877. !(card->thread_running_mask & thread)) {
  878. rc = 1;
  879. card->thread_start_mask &= ~thread;
  880. card->thread_running_mask |= thread;
  881. } else
  882. rc = -EPERM;
  883. }
  884. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  885. return rc;
  886. }
  887. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  888. {
  889. int rc = 0;
  890. wait_event(card->wait_q,
  891. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  892. return rc;
  893. }
  894. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  895. void qeth_schedule_recovery(struct qeth_card *card)
  896. {
  897. QETH_CARD_TEXT(card, 2, "startrec");
  898. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  899. schedule_work(&card->kernel_thread_starter);
  900. }
  901. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  902. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  903. {
  904. int dstat, cstat;
  905. char *sense;
  906. struct qeth_card *card;
  907. sense = (char *) irb->ecw;
  908. cstat = irb->scsw.cmd.cstat;
  909. dstat = irb->scsw.cmd.dstat;
  910. card = CARD_FROM_CDEV(cdev);
  911. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  912. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  913. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  914. QETH_CARD_TEXT(card, 2, "CGENCHK");
  915. dev_warn(&cdev->dev, "The qeth device driver "
  916. "failed to recover an error on the device\n");
  917. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  918. dev_name(&cdev->dev), dstat, cstat);
  919. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  920. 16, 1, irb, 64, 1);
  921. return 1;
  922. }
  923. if (dstat & DEV_STAT_UNIT_CHECK) {
  924. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  925. SENSE_RESETTING_EVENT_FLAG) {
  926. QETH_CARD_TEXT(card, 2, "REVIND");
  927. return 1;
  928. }
  929. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  930. SENSE_COMMAND_REJECT_FLAG) {
  931. QETH_CARD_TEXT(card, 2, "CMDREJi");
  932. return 1;
  933. }
  934. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  935. QETH_CARD_TEXT(card, 2, "AFFE");
  936. return 1;
  937. }
  938. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  939. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  940. return 0;
  941. }
  942. QETH_CARD_TEXT(card, 2, "DGENCHK");
  943. return 1;
  944. }
  945. return 0;
  946. }
  947. static long __qeth_check_irb_error(struct ccw_device *cdev,
  948. unsigned long intparm, struct irb *irb)
  949. {
  950. struct qeth_card *card;
  951. card = CARD_FROM_CDEV(cdev);
  952. if (!card || !IS_ERR(irb))
  953. return 0;
  954. switch (PTR_ERR(irb)) {
  955. case -EIO:
  956. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  957. dev_name(&cdev->dev));
  958. QETH_CARD_TEXT(card, 2, "ckirberr");
  959. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  960. break;
  961. case -ETIMEDOUT:
  962. dev_warn(&cdev->dev, "A hardware operation timed out"
  963. " on the device\n");
  964. QETH_CARD_TEXT(card, 2, "ckirberr");
  965. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  966. if (intparm == QETH_RCD_PARM) {
  967. if (card->data.ccwdev == cdev) {
  968. card->data.state = CH_STATE_DOWN;
  969. wake_up(&card->wait_q);
  970. }
  971. }
  972. break;
  973. default:
  974. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  975. dev_name(&cdev->dev), PTR_ERR(irb));
  976. QETH_CARD_TEXT(card, 2, "ckirberr");
  977. QETH_CARD_TEXT(card, 2, " rc???");
  978. }
  979. return PTR_ERR(irb);
  980. }
  981. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  982. struct irb *irb)
  983. {
  984. int rc;
  985. int cstat, dstat;
  986. struct qeth_cmd_buffer *buffer;
  987. struct qeth_channel *channel;
  988. struct qeth_card *card;
  989. struct qeth_cmd_buffer *iob;
  990. __u8 index;
  991. if (__qeth_check_irb_error(cdev, intparm, irb))
  992. return;
  993. cstat = irb->scsw.cmd.cstat;
  994. dstat = irb->scsw.cmd.dstat;
  995. card = CARD_FROM_CDEV(cdev);
  996. if (!card)
  997. return;
  998. QETH_CARD_TEXT(card, 5, "irq");
  999. if (card->read.ccwdev == cdev) {
  1000. channel = &card->read;
  1001. QETH_CARD_TEXT(card, 5, "read");
  1002. } else if (card->write.ccwdev == cdev) {
  1003. channel = &card->write;
  1004. QETH_CARD_TEXT(card, 5, "write");
  1005. } else {
  1006. channel = &card->data;
  1007. QETH_CARD_TEXT(card, 5, "data");
  1008. }
  1009. atomic_set(&channel->irq_pending, 0);
  1010. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  1011. channel->state = CH_STATE_STOPPED;
  1012. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1013. channel->state = CH_STATE_HALTED;
  1014. /*let's wake up immediately on data channel*/
  1015. if ((channel == &card->data) && (intparm != 0) &&
  1016. (intparm != QETH_RCD_PARM))
  1017. goto out;
  1018. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1019. QETH_CARD_TEXT(card, 6, "clrchpar");
  1020. /* we don't have to handle this further */
  1021. intparm = 0;
  1022. }
  1023. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1024. QETH_CARD_TEXT(card, 6, "hltchpar");
  1025. /* we don't have to handle this further */
  1026. intparm = 0;
  1027. }
  1028. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1029. (dstat & DEV_STAT_UNIT_CHECK) ||
  1030. (cstat)) {
  1031. if (irb->esw.esw0.erw.cons) {
  1032. dev_warn(&channel->ccwdev->dev,
  1033. "The qeth device driver failed to recover "
  1034. "an error on the device\n");
  1035. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1036. "0x%X dstat 0x%X\n",
  1037. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1038. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1039. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1040. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1041. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1042. }
  1043. if (intparm == QETH_RCD_PARM) {
  1044. channel->state = CH_STATE_DOWN;
  1045. goto out;
  1046. }
  1047. rc = qeth_get_problem(cdev, irb);
  1048. if (rc) {
  1049. card->read_or_write_problem = 1;
  1050. qeth_clear_ipacmd_list(card);
  1051. qeth_schedule_recovery(card);
  1052. goto out;
  1053. }
  1054. }
  1055. if (intparm == QETH_RCD_PARM) {
  1056. channel->state = CH_STATE_RCD_DONE;
  1057. goto out;
  1058. }
  1059. if (intparm) {
  1060. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1061. buffer->state = BUF_STATE_PROCESSED;
  1062. }
  1063. if (channel == &card->data)
  1064. return;
  1065. if (channel == &card->read &&
  1066. channel->state == CH_STATE_UP)
  1067. __qeth_issue_next_read(card);
  1068. iob = channel->iob;
  1069. index = channel->buf_no;
  1070. while (iob[index].state == BUF_STATE_PROCESSED) {
  1071. if (iob[index].callback != NULL)
  1072. iob[index].callback(channel, iob + index);
  1073. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1074. }
  1075. channel->buf_no = index;
  1076. out:
  1077. wake_up(&card->wait_q);
  1078. return;
  1079. }
  1080. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1081. struct qeth_qdio_out_buffer *buf,
  1082. enum iucv_tx_notify notification)
  1083. {
  1084. struct sk_buff *skb;
  1085. if (skb_queue_empty(&buf->skb_list))
  1086. goto out;
  1087. skb = skb_peek(&buf->skb_list);
  1088. while (skb) {
  1089. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1090. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1091. if (skb->protocol == ETH_P_AF_IUCV) {
  1092. if (skb->sk) {
  1093. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1094. iucv->sk_txnotify(skb, notification);
  1095. }
  1096. }
  1097. if (skb_queue_is_last(&buf->skb_list, skb))
  1098. skb = NULL;
  1099. else
  1100. skb = skb_queue_next(&buf->skb_list, skb);
  1101. }
  1102. out:
  1103. return;
  1104. }
  1105. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1106. {
  1107. struct sk_buff *skb;
  1108. struct iucv_sock *iucv;
  1109. int notify_general_error = 0;
  1110. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1111. notify_general_error = 1;
  1112. /* release may never happen from within CQ tasklet scope */
  1113. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1114. skb = skb_dequeue(&buf->skb_list);
  1115. while (skb) {
  1116. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1117. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1118. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1119. if (skb->sk) {
  1120. iucv = iucv_sk(skb->sk);
  1121. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1122. }
  1123. }
  1124. atomic_dec(&skb->users);
  1125. dev_kfree_skb_any(skb);
  1126. skb = skb_dequeue(&buf->skb_list);
  1127. }
  1128. }
  1129. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1130. struct qeth_qdio_out_buffer *buf,
  1131. enum qeth_qdio_buffer_states newbufstate)
  1132. {
  1133. int i;
  1134. /* is PCI flag set on buffer? */
  1135. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1136. atomic_dec(&queue->set_pci_flags_count);
  1137. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1138. qeth_release_skbs(buf);
  1139. }
  1140. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1141. if (buf->buffer->element[i].addr && buf->is_header[i])
  1142. kmem_cache_free(qeth_core_header_cache,
  1143. buf->buffer->element[i].addr);
  1144. buf->is_header[i] = 0;
  1145. buf->buffer->element[i].length = 0;
  1146. buf->buffer->element[i].addr = NULL;
  1147. buf->buffer->element[i].eflags = 0;
  1148. buf->buffer->element[i].sflags = 0;
  1149. }
  1150. buf->buffer->element[15].eflags = 0;
  1151. buf->buffer->element[15].sflags = 0;
  1152. buf->next_element_to_fill = 0;
  1153. atomic_set(&buf->state, newbufstate);
  1154. }
  1155. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1156. {
  1157. int j;
  1158. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1159. if (!q->bufs[j])
  1160. continue;
  1161. qeth_cleanup_handled_pending(q, j, 1);
  1162. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1163. if (free) {
  1164. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1165. q->bufs[j] = NULL;
  1166. }
  1167. }
  1168. }
  1169. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1170. {
  1171. int i;
  1172. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1173. /* clear outbound buffers to free skbs */
  1174. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1175. if (card->qdio.out_qs[i]) {
  1176. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1177. }
  1178. }
  1179. }
  1180. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1181. static void qeth_free_buffer_pool(struct qeth_card *card)
  1182. {
  1183. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1184. int i = 0;
  1185. list_for_each_entry_safe(pool_entry, tmp,
  1186. &card->qdio.init_pool.entry_list, init_list){
  1187. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1188. free_page((unsigned long)pool_entry->elements[i]);
  1189. list_del(&pool_entry->init_list);
  1190. kfree(pool_entry);
  1191. }
  1192. }
  1193. static void qeth_clean_channel(struct qeth_channel *channel)
  1194. {
  1195. int cnt;
  1196. QETH_DBF_TEXT(SETUP, 2, "freech");
  1197. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1198. kfree(channel->iob[cnt].data);
  1199. }
  1200. static void qeth_set_single_write_queues(struct qeth_card *card)
  1201. {
  1202. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1203. (card->qdio.no_out_queues == 4))
  1204. qeth_free_qdio_buffers(card);
  1205. card->qdio.no_out_queues = 1;
  1206. if (card->qdio.default_out_queue != 0)
  1207. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1208. card->qdio.default_out_queue = 0;
  1209. }
  1210. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1211. {
  1212. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1213. (card->qdio.no_out_queues == 1)) {
  1214. qeth_free_qdio_buffers(card);
  1215. card->qdio.default_out_queue = 2;
  1216. }
  1217. card->qdio.no_out_queues = 4;
  1218. }
  1219. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1220. {
  1221. struct ccw_device *ccwdev;
  1222. struct channel_path_desc *chp_dsc;
  1223. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1224. ccwdev = card->data.ccwdev;
  1225. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1226. if (!chp_dsc)
  1227. goto out;
  1228. card->info.func_level = 0x4100 + chp_dsc->desc;
  1229. if (card->info.type == QETH_CARD_TYPE_IQD)
  1230. goto out;
  1231. /* CHPP field bit 6 == 1 -> single queue */
  1232. if ((chp_dsc->chpp & 0x02) == 0x02)
  1233. qeth_set_single_write_queues(card);
  1234. else
  1235. qeth_set_multiple_write_queues(card);
  1236. out:
  1237. kfree(chp_dsc);
  1238. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1239. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1240. }
  1241. static void qeth_init_qdio_info(struct qeth_card *card)
  1242. {
  1243. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1244. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1245. /* inbound */
  1246. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1247. if (card->info.type == QETH_CARD_TYPE_IQD)
  1248. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1249. else
  1250. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1251. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1252. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1253. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1254. }
  1255. static void qeth_set_intial_options(struct qeth_card *card)
  1256. {
  1257. card->options.route4.type = NO_ROUTER;
  1258. card->options.route6.type = NO_ROUTER;
  1259. card->options.fake_broadcast = 0;
  1260. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1261. card->options.performance_stats = 0;
  1262. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1263. card->options.isolation = ISOLATION_MODE_NONE;
  1264. card->options.cq = QETH_CQ_DISABLED;
  1265. }
  1266. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1267. {
  1268. unsigned long flags;
  1269. int rc = 0;
  1270. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1271. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1272. (u8) card->thread_start_mask,
  1273. (u8) card->thread_allowed_mask,
  1274. (u8) card->thread_running_mask);
  1275. rc = (card->thread_start_mask & thread);
  1276. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1277. return rc;
  1278. }
  1279. static void qeth_start_kernel_thread(struct work_struct *work)
  1280. {
  1281. struct task_struct *ts;
  1282. struct qeth_card *card = container_of(work, struct qeth_card,
  1283. kernel_thread_starter);
  1284. QETH_CARD_TEXT(card , 2, "strthrd");
  1285. if (card->read.state != CH_STATE_UP &&
  1286. card->write.state != CH_STATE_UP)
  1287. return;
  1288. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1289. ts = kthread_run(card->discipline->recover, (void *)card,
  1290. "qeth_recover");
  1291. if (IS_ERR(ts)) {
  1292. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1293. qeth_clear_thread_running_bit(card,
  1294. QETH_RECOVER_THREAD);
  1295. }
  1296. }
  1297. }
  1298. static void qeth_buffer_reclaim_work(struct work_struct *);
  1299. static int qeth_setup_card(struct qeth_card *card)
  1300. {
  1301. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1302. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1303. card->read.state = CH_STATE_DOWN;
  1304. card->write.state = CH_STATE_DOWN;
  1305. card->data.state = CH_STATE_DOWN;
  1306. card->state = CARD_STATE_DOWN;
  1307. card->lan_online = 0;
  1308. card->read_or_write_problem = 0;
  1309. card->dev = NULL;
  1310. spin_lock_init(&card->vlanlock);
  1311. spin_lock_init(&card->mclock);
  1312. spin_lock_init(&card->lock);
  1313. spin_lock_init(&card->ip_lock);
  1314. spin_lock_init(&card->thread_mask_lock);
  1315. mutex_init(&card->conf_mutex);
  1316. mutex_init(&card->discipline_mutex);
  1317. card->thread_start_mask = 0;
  1318. card->thread_allowed_mask = 0;
  1319. card->thread_running_mask = 0;
  1320. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1321. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1322. init_waitqueue_head(&card->wait_q);
  1323. /* initial options */
  1324. qeth_set_intial_options(card);
  1325. /* IP address takeover */
  1326. INIT_LIST_HEAD(&card->ipato.entries);
  1327. card->ipato.enabled = false;
  1328. card->ipato.invert4 = false;
  1329. card->ipato.invert6 = false;
  1330. /* init QDIO stuff */
  1331. qeth_init_qdio_info(card);
  1332. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1333. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1334. return 0;
  1335. }
  1336. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1337. {
  1338. struct qeth_card *card = container_of(slr, struct qeth_card,
  1339. qeth_service_level);
  1340. if (card->info.mcl_level[0])
  1341. seq_printf(m, "qeth: %s firmware level %s\n",
  1342. CARD_BUS_ID(card), card->info.mcl_level);
  1343. }
  1344. static struct qeth_card *qeth_alloc_card(void)
  1345. {
  1346. struct qeth_card *card;
  1347. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1348. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1349. if (!card)
  1350. goto out;
  1351. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1352. if (qeth_setup_channel(&card->read))
  1353. goto out_ip;
  1354. if (qeth_setup_channel(&card->write))
  1355. goto out_channel;
  1356. card->options.layer2 = -1;
  1357. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1358. register_service_level(&card->qeth_service_level);
  1359. return card;
  1360. out_channel:
  1361. qeth_clean_channel(&card->read);
  1362. out_ip:
  1363. kfree(card);
  1364. out:
  1365. return NULL;
  1366. }
  1367. static int qeth_determine_card_type(struct qeth_card *card)
  1368. {
  1369. int i = 0;
  1370. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1371. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1372. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1373. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1374. if ((CARD_RDEV(card)->id.dev_type ==
  1375. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1376. (CARD_RDEV(card)->id.dev_model ==
  1377. known_devices[i][QETH_DEV_MODEL_IND])) {
  1378. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1379. card->qdio.no_out_queues =
  1380. known_devices[i][QETH_QUEUE_NO_IND];
  1381. card->qdio.no_in_queues = 1;
  1382. card->info.is_multicast_different =
  1383. known_devices[i][QETH_MULTICAST_IND];
  1384. qeth_update_from_chp_desc(card);
  1385. return 0;
  1386. }
  1387. i++;
  1388. }
  1389. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1390. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1391. "unknown type\n");
  1392. return -ENOENT;
  1393. }
  1394. static int qeth_clear_channel(struct qeth_channel *channel)
  1395. {
  1396. unsigned long flags;
  1397. struct qeth_card *card;
  1398. int rc;
  1399. card = CARD_FROM_CDEV(channel->ccwdev);
  1400. QETH_CARD_TEXT(card, 3, "clearch");
  1401. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1402. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1403. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1404. if (rc)
  1405. return rc;
  1406. rc = wait_event_interruptible_timeout(card->wait_q,
  1407. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1408. if (rc == -ERESTARTSYS)
  1409. return rc;
  1410. if (channel->state != CH_STATE_STOPPED)
  1411. return -ETIME;
  1412. channel->state = CH_STATE_DOWN;
  1413. return 0;
  1414. }
  1415. static int qeth_halt_channel(struct qeth_channel *channel)
  1416. {
  1417. unsigned long flags;
  1418. struct qeth_card *card;
  1419. int rc;
  1420. card = CARD_FROM_CDEV(channel->ccwdev);
  1421. QETH_CARD_TEXT(card, 3, "haltch");
  1422. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1423. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1424. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1425. if (rc)
  1426. return rc;
  1427. rc = wait_event_interruptible_timeout(card->wait_q,
  1428. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1429. if (rc == -ERESTARTSYS)
  1430. return rc;
  1431. if (channel->state != CH_STATE_HALTED)
  1432. return -ETIME;
  1433. return 0;
  1434. }
  1435. static int qeth_halt_channels(struct qeth_card *card)
  1436. {
  1437. int rc1 = 0, rc2 = 0, rc3 = 0;
  1438. QETH_CARD_TEXT(card, 3, "haltchs");
  1439. rc1 = qeth_halt_channel(&card->read);
  1440. rc2 = qeth_halt_channel(&card->write);
  1441. rc3 = qeth_halt_channel(&card->data);
  1442. if (rc1)
  1443. return rc1;
  1444. if (rc2)
  1445. return rc2;
  1446. return rc3;
  1447. }
  1448. static int qeth_clear_channels(struct qeth_card *card)
  1449. {
  1450. int rc1 = 0, rc2 = 0, rc3 = 0;
  1451. QETH_CARD_TEXT(card, 3, "clearchs");
  1452. rc1 = qeth_clear_channel(&card->read);
  1453. rc2 = qeth_clear_channel(&card->write);
  1454. rc3 = qeth_clear_channel(&card->data);
  1455. if (rc1)
  1456. return rc1;
  1457. if (rc2)
  1458. return rc2;
  1459. return rc3;
  1460. }
  1461. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1462. {
  1463. int rc = 0;
  1464. QETH_CARD_TEXT(card, 3, "clhacrd");
  1465. if (halt)
  1466. rc = qeth_halt_channels(card);
  1467. if (rc)
  1468. return rc;
  1469. return qeth_clear_channels(card);
  1470. }
  1471. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1472. {
  1473. int rc = 0;
  1474. QETH_CARD_TEXT(card, 3, "qdioclr");
  1475. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1476. QETH_QDIO_CLEANING)) {
  1477. case QETH_QDIO_ESTABLISHED:
  1478. if (card->info.type == QETH_CARD_TYPE_IQD)
  1479. rc = qdio_shutdown(CARD_DDEV(card),
  1480. QDIO_FLAG_CLEANUP_USING_HALT);
  1481. else
  1482. rc = qdio_shutdown(CARD_DDEV(card),
  1483. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1484. if (rc)
  1485. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1486. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1487. break;
  1488. case QETH_QDIO_CLEANING:
  1489. return rc;
  1490. default:
  1491. break;
  1492. }
  1493. rc = qeth_clear_halt_card(card, use_halt);
  1494. if (rc)
  1495. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1496. card->state = CARD_STATE_DOWN;
  1497. return rc;
  1498. }
  1499. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1500. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1501. int *length)
  1502. {
  1503. struct ciw *ciw;
  1504. char *rcd_buf;
  1505. int ret;
  1506. struct qeth_channel *channel = &card->data;
  1507. unsigned long flags;
  1508. /*
  1509. * scan for RCD command in extended SenseID data
  1510. */
  1511. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1512. if (!ciw || ciw->cmd == 0)
  1513. return -EOPNOTSUPP;
  1514. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1515. if (!rcd_buf)
  1516. return -ENOMEM;
  1517. channel->ccw.cmd_code = ciw->cmd;
  1518. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1519. channel->ccw.count = ciw->count;
  1520. channel->ccw.flags = CCW_FLAG_SLI;
  1521. channel->state = CH_STATE_RCD;
  1522. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1523. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1524. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1525. QETH_RCD_TIMEOUT);
  1526. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1527. if (!ret)
  1528. wait_event(card->wait_q,
  1529. (channel->state == CH_STATE_RCD_DONE ||
  1530. channel->state == CH_STATE_DOWN));
  1531. if (channel->state == CH_STATE_DOWN)
  1532. ret = -EIO;
  1533. else
  1534. channel->state = CH_STATE_DOWN;
  1535. if (ret) {
  1536. kfree(rcd_buf);
  1537. *buffer = NULL;
  1538. *length = 0;
  1539. } else {
  1540. *length = ciw->count;
  1541. *buffer = rcd_buf;
  1542. }
  1543. return ret;
  1544. }
  1545. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1546. {
  1547. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1548. card->info.chpid = prcd[30];
  1549. card->info.unit_addr2 = prcd[31];
  1550. card->info.cula = prcd[63];
  1551. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1552. (prcd[0x11] == _ascebc['M']));
  1553. }
  1554. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1555. {
  1556. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1557. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1558. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1559. card->info.blkt.time_total = 0;
  1560. card->info.blkt.inter_packet = 0;
  1561. card->info.blkt.inter_packet_jumbo = 0;
  1562. } else {
  1563. card->info.blkt.time_total = 250;
  1564. card->info.blkt.inter_packet = 5;
  1565. card->info.blkt.inter_packet_jumbo = 15;
  1566. }
  1567. }
  1568. static void qeth_init_tokens(struct qeth_card *card)
  1569. {
  1570. card->token.issuer_rm_w = 0x00010103UL;
  1571. card->token.cm_filter_w = 0x00010108UL;
  1572. card->token.cm_connection_w = 0x0001010aUL;
  1573. card->token.ulp_filter_w = 0x0001010bUL;
  1574. card->token.ulp_connection_w = 0x0001010dUL;
  1575. }
  1576. static void qeth_init_func_level(struct qeth_card *card)
  1577. {
  1578. switch (card->info.type) {
  1579. case QETH_CARD_TYPE_IQD:
  1580. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1581. break;
  1582. case QETH_CARD_TYPE_OSD:
  1583. case QETH_CARD_TYPE_OSN:
  1584. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1585. break;
  1586. default:
  1587. break;
  1588. }
  1589. }
  1590. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1591. void (*idx_reply_cb)(struct qeth_channel *,
  1592. struct qeth_cmd_buffer *))
  1593. {
  1594. struct qeth_cmd_buffer *iob;
  1595. unsigned long flags;
  1596. int rc;
  1597. struct qeth_card *card;
  1598. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1599. card = CARD_FROM_CDEV(channel->ccwdev);
  1600. iob = qeth_get_buffer(channel);
  1601. if (!iob)
  1602. return -ENOMEM;
  1603. iob->callback = idx_reply_cb;
  1604. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1605. channel->ccw.count = QETH_BUFSIZE;
  1606. channel->ccw.cda = (__u32) __pa(iob->data);
  1607. wait_event(card->wait_q,
  1608. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1609. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1610. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1611. rc = ccw_device_start(channel->ccwdev,
  1612. &channel->ccw, (addr_t) iob, 0, 0);
  1613. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1614. if (rc) {
  1615. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1616. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1617. atomic_set(&channel->irq_pending, 0);
  1618. wake_up(&card->wait_q);
  1619. return rc;
  1620. }
  1621. rc = wait_event_interruptible_timeout(card->wait_q,
  1622. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1623. if (rc == -ERESTARTSYS)
  1624. return rc;
  1625. if (channel->state != CH_STATE_UP) {
  1626. rc = -ETIME;
  1627. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1628. qeth_clear_cmd_buffers(channel);
  1629. } else
  1630. rc = 0;
  1631. return rc;
  1632. }
  1633. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1634. void (*idx_reply_cb)(struct qeth_channel *,
  1635. struct qeth_cmd_buffer *))
  1636. {
  1637. struct qeth_card *card;
  1638. struct qeth_cmd_buffer *iob;
  1639. unsigned long flags;
  1640. __u16 temp;
  1641. __u8 tmp;
  1642. int rc;
  1643. struct ccw_dev_id temp_devid;
  1644. card = CARD_FROM_CDEV(channel->ccwdev);
  1645. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1646. iob = qeth_get_buffer(channel);
  1647. if (!iob)
  1648. return -ENOMEM;
  1649. iob->callback = idx_reply_cb;
  1650. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1651. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1652. channel->ccw.cda = (__u32) __pa(iob->data);
  1653. if (channel == &card->write) {
  1654. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1655. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1656. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1657. card->seqno.trans_hdr++;
  1658. } else {
  1659. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1660. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1661. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1662. }
  1663. tmp = ((__u8)card->info.portno) | 0x80;
  1664. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1665. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1666. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1667. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1668. &card->info.func_level, sizeof(__u16));
  1669. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1670. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1671. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1672. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1673. wait_event(card->wait_q,
  1674. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1675. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1676. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1677. rc = ccw_device_start(channel->ccwdev,
  1678. &channel->ccw, (addr_t) iob, 0, 0);
  1679. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1680. if (rc) {
  1681. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1682. rc);
  1683. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1684. atomic_set(&channel->irq_pending, 0);
  1685. wake_up(&card->wait_q);
  1686. return rc;
  1687. }
  1688. rc = wait_event_interruptible_timeout(card->wait_q,
  1689. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1690. if (rc == -ERESTARTSYS)
  1691. return rc;
  1692. if (channel->state != CH_STATE_ACTIVATING) {
  1693. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1694. " failed to recover an error on the device\n");
  1695. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1696. dev_name(&channel->ccwdev->dev));
  1697. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1698. qeth_clear_cmd_buffers(channel);
  1699. return -ETIME;
  1700. }
  1701. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1702. }
  1703. static int qeth_peer_func_level(int level)
  1704. {
  1705. if ((level & 0xff) == 8)
  1706. return (level & 0xff) + 0x400;
  1707. if (((level >> 8) & 3) == 1)
  1708. return (level & 0xff) + 0x200;
  1709. return level;
  1710. }
  1711. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1712. struct qeth_cmd_buffer *iob)
  1713. {
  1714. struct qeth_card *card;
  1715. __u16 temp;
  1716. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1717. if (channel->state == CH_STATE_DOWN) {
  1718. channel->state = CH_STATE_ACTIVATING;
  1719. goto out;
  1720. }
  1721. card = CARD_FROM_CDEV(channel->ccwdev);
  1722. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1723. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1724. dev_err(&card->write.ccwdev->dev,
  1725. "The adapter is used exclusively by another "
  1726. "host\n");
  1727. else
  1728. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1729. " negative reply\n",
  1730. dev_name(&card->write.ccwdev->dev));
  1731. goto out;
  1732. }
  1733. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1734. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1735. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1736. "function level mismatch (sent: 0x%x, received: "
  1737. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1738. card->info.func_level, temp);
  1739. goto out;
  1740. }
  1741. channel->state = CH_STATE_UP;
  1742. out:
  1743. qeth_release_buffer(channel, iob);
  1744. }
  1745. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1746. struct qeth_cmd_buffer *iob)
  1747. {
  1748. struct qeth_card *card;
  1749. __u16 temp;
  1750. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1751. if (channel->state == CH_STATE_DOWN) {
  1752. channel->state = CH_STATE_ACTIVATING;
  1753. goto out;
  1754. }
  1755. card = CARD_FROM_CDEV(channel->ccwdev);
  1756. if (qeth_check_idx_response(card, iob->data))
  1757. goto out;
  1758. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1759. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1760. case QETH_IDX_ACT_ERR_EXCL:
  1761. dev_err(&card->write.ccwdev->dev,
  1762. "The adapter is used exclusively by another "
  1763. "host\n");
  1764. break;
  1765. case QETH_IDX_ACT_ERR_AUTH:
  1766. case QETH_IDX_ACT_ERR_AUTH_USER:
  1767. dev_err(&card->read.ccwdev->dev,
  1768. "Setting the device online failed because of "
  1769. "insufficient authorization\n");
  1770. break;
  1771. default:
  1772. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1773. " negative reply\n",
  1774. dev_name(&card->read.ccwdev->dev));
  1775. }
  1776. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1777. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1778. goto out;
  1779. }
  1780. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1781. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1782. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1783. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1784. dev_name(&card->read.ccwdev->dev),
  1785. card->info.func_level, temp);
  1786. goto out;
  1787. }
  1788. memcpy(&card->token.issuer_rm_r,
  1789. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1790. QETH_MPC_TOKEN_LENGTH);
  1791. memcpy(&card->info.mcl_level[0],
  1792. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1793. channel->state = CH_STATE_UP;
  1794. out:
  1795. qeth_release_buffer(channel, iob);
  1796. }
  1797. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1798. struct qeth_cmd_buffer *iob)
  1799. {
  1800. qeth_setup_ccw(&card->write, iob->data, len);
  1801. iob->callback = qeth_release_buffer;
  1802. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1803. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1804. card->seqno.trans_hdr++;
  1805. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1806. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1807. card->seqno.pdu_hdr++;
  1808. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1809. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1810. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1811. }
  1812. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1813. /**
  1814. * qeth_send_control_data() - send control command to the card
  1815. * @card: qeth_card structure pointer
  1816. * @len: size of the command buffer
  1817. * @iob: qeth_cmd_buffer pointer
  1818. * @reply_cb: callback function pointer
  1819. * @cb_card: pointer to the qeth_card structure
  1820. * @cb_reply: pointer to the qeth_reply structure
  1821. * @cb_cmd: pointer to the original iob for non-IPA
  1822. * commands, or to the qeth_ipa_cmd structure
  1823. * for the IPA commands.
  1824. * @reply_param: private pointer passed to the callback
  1825. *
  1826. * Returns the value of the `return_code' field of the response
  1827. * block returned from the hardware, or other error indication.
  1828. * Value of zero indicates successful execution of the command.
  1829. *
  1830. * Callback function gets called one or more times, with cb_cmd
  1831. * pointing to the response returned by the hardware. Callback
  1832. * function must return non-zero if more reply blocks are expected,
  1833. * and zero if the last or only reply block is received. Callback
  1834. * function can get the value of the reply_param pointer from the
  1835. * field 'param' of the structure qeth_reply.
  1836. */
  1837. int qeth_send_control_data(struct qeth_card *card, int len,
  1838. struct qeth_cmd_buffer *iob,
  1839. int (*reply_cb)(struct qeth_card *cb_card,
  1840. struct qeth_reply *cb_reply,
  1841. unsigned long cb_cmd),
  1842. void *reply_param)
  1843. {
  1844. int rc;
  1845. unsigned long flags;
  1846. struct qeth_reply *reply = NULL;
  1847. unsigned long timeout, event_timeout;
  1848. struct qeth_ipa_cmd *cmd = NULL;
  1849. QETH_CARD_TEXT(card, 2, "sendctl");
  1850. if (card->read_or_write_problem) {
  1851. qeth_release_buffer(iob->channel, iob);
  1852. return -EIO;
  1853. }
  1854. reply = qeth_alloc_reply(card);
  1855. if (!reply) {
  1856. return -ENOMEM;
  1857. }
  1858. reply->callback = reply_cb;
  1859. reply->param = reply_param;
  1860. init_waitqueue_head(&reply->wait_q);
  1861. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1862. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1863. if (IS_IPA(iob->data)) {
  1864. cmd = __ipa_cmd(iob);
  1865. cmd->hdr.seqno = card->seqno.ipa++;
  1866. reply->seqno = cmd->hdr.seqno;
  1867. event_timeout = QETH_IPA_TIMEOUT;
  1868. } else {
  1869. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1870. event_timeout = QETH_TIMEOUT;
  1871. }
  1872. qeth_prepare_control_data(card, len, iob);
  1873. spin_lock_irqsave(&card->lock, flags);
  1874. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1875. spin_unlock_irqrestore(&card->lock, flags);
  1876. timeout = jiffies + event_timeout;
  1877. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1878. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1879. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1880. (addr_t) iob, 0, 0);
  1881. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1882. if (rc) {
  1883. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1884. "ccw_device_start rc = %i\n",
  1885. dev_name(&card->write.ccwdev->dev), rc);
  1886. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1887. spin_lock_irqsave(&card->lock, flags);
  1888. list_del_init(&reply->list);
  1889. qeth_put_reply(reply);
  1890. spin_unlock_irqrestore(&card->lock, flags);
  1891. qeth_release_buffer(iob->channel, iob);
  1892. atomic_set(&card->write.irq_pending, 0);
  1893. wake_up(&card->wait_q);
  1894. return rc;
  1895. }
  1896. /* we have only one long running ipassist, since we can ensure
  1897. process context of this command we can sleep */
  1898. if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
  1899. cmd->hdr.prot_version == QETH_PROT_IPV4) {
  1900. if (!wait_event_timeout(reply->wait_q,
  1901. atomic_read(&reply->received), event_timeout))
  1902. goto time_err;
  1903. } else {
  1904. while (!atomic_read(&reply->received)) {
  1905. if (time_after(jiffies, timeout))
  1906. goto time_err;
  1907. cpu_relax();
  1908. }
  1909. }
  1910. if (reply->rc == -EIO)
  1911. goto error;
  1912. rc = reply->rc;
  1913. qeth_put_reply(reply);
  1914. return rc;
  1915. time_err:
  1916. reply->rc = -ETIME;
  1917. spin_lock_irqsave(&reply->card->lock, flags);
  1918. list_del_init(&reply->list);
  1919. spin_unlock_irqrestore(&reply->card->lock, flags);
  1920. atomic_inc(&reply->received);
  1921. error:
  1922. atomic_set(&card->write.irq_pending, 0);
  1923. qeth_release_buffer(iob->channel, iob);
  1924. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1925. rc = reply->rc;
  1926. qeth_put_reply(reply);
  1927. return rc;
  1928. }
  1929. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1930. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1931. unsigned long data)
  1932. {
  1933. struct qeth_cmd_buffer *iob;
  1934. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1935. iob = (struct qeth_cmd_buffer *) data;
  1936. memcpy(&card->token.cm_filter_r,
  1937. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1938. QETH_MPC_TOKEN_LENGTH);
  1939. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1940. return 0;
  1941. }
  1942. static int qeth_cm_enable(struct qeth_card *card)
  1943. {
  1944. int rc;
  1945. struct qeth_cmd_buffer *iob;
  1946. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1947. iob = qeth_wait_for_buffer(&card->write);
  1948. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1949. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1950. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1951. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1952. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1953. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1954. qeth_cm_enable_cb, NULL);
  1955. return rc;
  1956. }
  1957. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1958. unsigned long data)
  1959. {
  1960. struct qeth_cmd_buffer *iob;
  1961. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1962. iob = (struct qeth_cmd_buffer *) data;
  1963. memcpy(&card->token.cm_connection_r,
  1964. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1965. QETH_MPC_TOKEN_LENGTH);
  1966. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1967. return 0;
  1968. }
  1969. static int qeth_cm_setup(struct qeth_card *card)
  1970. {
  1971. int rc;
  1972. struct qeth_cmd_buffer *iob;
  1973. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1974. iob = qeth_wait_for_buffer(&card->write);
  1975. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1976. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1977. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1978. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1979. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1980. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1981. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1982. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1983. qeth_cm_setup_cb, NULL);
  1984. return rc;
  1985. }
  1986. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1987. {
  1988. switch (card->info.type) {
  1989. case QETH_CARD_TYPE_UNKNOWN:
  1990. return 1500;
  1991. case QETH_CARD_TYPE_IQD:
  1992. return card->info.max_mtu;
  1993. case QETH_CARD_TYPE_OSD:
  1994. switch (card->info.link_type) {
  1995. case QETH_LINK_TYPE_HSTR:
  1996. case QETH_LINK_TYPE_LANE_TR:
  1997. return 2000;
  1998. default:
  1999. return card->options.layer2 ? 1500 : 1492;
  2000. }
  2001. case QETH_CARD_TYPE_OSM:
  2002. case QETH_CARD_TYPE_OSX:
  2003. return card->options.layer2 ? 1500 : 1492;
  2004. default:
  2005. return 1500;
  2006. }
  2007. }
  2008. static inline int qeth_get_mtu_outof_framesize(int framesize)
  2009. {
  2010. switch (framesize) {
  2011. case 0x4000:
  2012. return 8192;
  2013. case 0x6000:
  2014. return 16384;
  2015. case 0xa000:
  2016. return 32768;
  2017. case 0xffff:
  2018. return 57344;
  2019. default:
  2020. return 0;
  2021. }
  2022. }
  2023. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2024. {
  2025. switch (card->info.type) {
  2026. case QETH_CARD_TYPE_OSD:
  2027. case QETH_CARD_TYPE_OSM:
  2028. case QETH_CARD_TYPE_OSX:
  2029. case QETH_CARD_TYPE_IQD:
  2030. return ((mtu >= 576) &&
  2031. (mtu <= card->info.max_mtu));
  2032. case QETH_CARD_TYPE_OSN:
  2033. case QETH_CARD_TYPE_UNKNOWN:
  2034. default:
  2035. return 1;
  2036. }
  2037. }
  2038. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2039. unsigned long data)
  2040. {
  2041. __u16 mtu, framesize;
  2042. __u16 len;
  2043. __u8 link_type;
  2044. struct qeth_cmd_buffer *iob;
  2045. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2046. iob = (struct qeth_cmd_buffer *) data;
  2047. memcpy(&card->token.ulp_filter_r,
  2048. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2049. QETH_MPC_TOKEN_LENGTH);
  2050. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2051. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2052. mtu = qeth_get_mtu_outof_framesize(framesize);
  2053. if (!mtu) {
  2054. iob->rc = -EINVAL;
  2055. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2056. return 0;
  2057. }
  2058. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2059. /* frame size has changed */
  2060. if (card->dev &&
  2061. ((card->dev->mtu == card->info.initial_mtu) ||
  2062. (card->dev->mtu > mtu)))
  2063. card->dev->mtu = mtu;
  2064. qeth_free_qdio_buffers(card);
  2065. }
  2066. card->info.initial_mtu = mtu;
  2067. card->info.max_mtu = mtu;
  2068. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2069. } else {
  2070. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2071. iob->data);
  2072. card->info.initial_mtu = min(card->info.max_mtu,
  2073. qeth_get_initial_mtu_for_card(card));
  2074. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2075. }
  2076. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2077. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2078. memcpy(&link_type,
  2079. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2080. card->info.link_type = link_type;
  2081. } else
  2082. card->info.link_type = 0;
  2083. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2084. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2085. return 0;
  2086. }
  2087. static int qeth_ulp_enable(struct qeth_card *card)
  2088. {
  2089. int rc;
  2090. char prot_type;
  2091. struct qeth_cmd_buffer *iob;
  2092. /*FIXME: trace view callbacks*/
  2093. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2094. iob = qeth_wait_for_buffer(&card->write);
  2095. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2096. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2097. (__u8) card->info.portno;
  2098. if (card->options.layer2)
  2099. if (card->info.type == QETH_CARD_TYPE_OSN)
  2100. prot_type = QETH_PROT_OSN2;
  2101. else
  2102. prot_type = QETH_PROT_LAYER2;
  2103. else
  2104. prot_type = QETH_PROT_TCPIP;
  2105. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2106. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2107. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2108. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2109. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2110. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2111. qeth_ulp_enable_cb, NULL);
  2112. return rc;
  2113. }
  2114. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2115. unsigned long data)
  2116. {
  2117. struct qeth_cmd_buffer *iob;
  2118. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2119. iob = (struct qeth_cmd_buffer *) data;
  2120. memcpy(&card->token.ulp_connection_r,
  2121. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2122. QETH_MPC_TOKEN_LENGTH);
  2123. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2124. 3)) {
  2125. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2126. dev_err(&card->gdev->dev, "A connection could not be "
  2127. "established because of an OLM limit\n");
  2128. iob->rc = -EMLINK;
  2129. }
  2130. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2131. return 0;
  2132. }
  2133. static int qeth_ulp_setup(struct qeth_card *card)
  2134. {
  2135. int rc;
  2136. __u16 temp;
  2137. struct qeth_cmd_buffer *iob;
  2138. struct ccw_dev_id dev_id;
  2139. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2140. iob = qeth_wait_for_buffer(&card->write);
  2141. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2142. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2143. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2144. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2145. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2146. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2147. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2148. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2149. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2150. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2151. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2152. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2153. qeth_ulp_setup_cb, NULL);
  2154. return rc;
  2155. }
  2156. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2157. {
  2158. int rc;
  2159. struct qeth_qdio_out_buffer *newbuf;
  2160. rc = 0;
  2161. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2162. if (!newbuf) {
  2163. rc = -ENOMEM;
  2164. goto out;
  2165. }
  2166. newbuf->buffer = q->qdio_bufs[bidx];
  2167. skb_queue_head_init(&newbuf->skb_list);
  2168. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2169. newbuf->q = q;
  2170. newbuf->aob = NULL;
  2171. newbuf->next_pending = q->bufs[bidx];
  2172. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2173. q->bufs[bidx] = newbuf;
  2174. if (q->bufstates) {
  2175. q->bufstates[bidx].user = newbuf;
  2176. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2177. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2178. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2179. (long) newbuf->next_pending);
  2180. }
  2181. out:
  2182. return rc;
  2183. }
  2184. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2185. {
  2186. if (!q)
  2187. return;
  2188. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2189. kfree(q);
  2190. }
  2191. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2192. {
  2193. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2194. if (!q)
  2195. return NULL;
  2196. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2197. kfree(q);
  2198. return NULL;
  2199. }
  2200. return q;
  2201. }
  2202. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2203. {
  2204. int i, j;
  2205. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2206. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2207. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2208. return 0;
  2209. QETH_DBF_TEXT(SETUP, 2, "inq");
  2210. card->qdio.in_q = qeth_alloc_qdio_queue();
  2211. if (!card->qdio.in_q)
  2212. goto out_nomem;
  2213. /* inbound buffer pool */
  2214. if (qeth_alloc_buffer_pool(card))
  2215. goto out_freeinq;
  2216. /* outbound */
  2217. card->qdio.out_qs =
  2218. kzalloc(card->qdio.no_out_queues *
  2219. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2220. if (!card->qdio.out_qs)
  2221. goto out_freepool;
  2222. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2223. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2224. if (!card->qdio.out_qs[i])
  2225. goto out_freeoutq;
  2226. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2227. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2228. card->qdio.out_qs[i]->queue_no = i;
  2229. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2230. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2231. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2232. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2233. goto out_freeoutqbufs;
  2234. }
  2235. }
  2236. /* completion */
  2237. if (qeth_alloc_cq(card))
  2238. goto out_freeoutq;
  2239. return 0;
  2240. out_freeoutqbufs:
  2241. while (j > 0) {
  2242. --j;
  2243. kmem_cache_free(qeth_qdio_outbuf_cache,
  2244. card->qdio.out_qs[i]->bufs[j]);
  2245. card->qdio.out_qs[i]->bufs[j] = NULL;
  2246. }
  2247. out_freeoutq:
  2248. while (i > 0) {
  2249. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2250. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2251. }
  2252. kfree(card->qdio.out_qs);
  2253. card->qdio.out_qs = NULL;
  2254. out_freepool:
  2255. qeth_free_buffer_pool(card);
  2256. out_freeinq:
  2257. qeth_free_qdio_queue(card->qdio.in_q);
  2258. card->qdio.in_q = NULL;
  2259. out_nomem:
  2260. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2261. return -ENOMEM;
  2262. }
  2263. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2264. {
  2265. int i, j;
  2266. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2267. QETH_QDIO_UNINITIALIZED)
  2268. return;
  2269. qeth_free_cq(card);
  2270. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2271. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2272. if (card->qdio.in_q->bufs[j].rx_skb)
  2273. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2274. }
  2275. qeth_free_qdio_queue(card->qdio.in_q);
  2276. card->qdio.in_q = NULL;
  2277. /* inbound buffer pool */
  2278. qeth_free_buffer_pool(card);
  2279. /* free outbound qdio_qs */
  2280. if (card->qdio.out_qs) {
  2281. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2282. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2283. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2284. }
  2285. kfree(card->qdio.out_qs);
  2286. card->qdio.out_qs = NULL;
  2287. }
  2288. }
  2289. static void qeth_create_qib_param_field(struct qeth_card *card,
  2290. char *param_field)
  2291. {
  2292. param_field[0] = _ascebc['P'];
  2293. param_field[1] = _ascebc['C'];
  2294. param_field[2] = _ascebc['I'];
  2295. param_field[3] = _ascebc['T'];
  2296. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2297. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2298. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2299. }
  2300. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2301. char *param_field)
  2302. {
  2303. param_field[16] = _ascebc['B'];
  2304. param_field[17] = _ascebc['L'];
  2305. param_field[18] = _ascebc['K'];
  2306. param_field[19] = _ascebc['T'];
  2307. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2308. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2309. *((unsigned int *) (&param_field[28])) =
  2310. card->info.blkt.inter_packet_jumbo;
  2311. }
  2312. static int qeth_qdio_activate(struct qeth_card *card)
  2313. {
  2314. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2315. return qdio_activate(CARD_DDEV(card));
  2316. }
  2317. static int qeth_dm_act(struct qeth_card *card)
  2318. {
  2319. int rc;
  2320. struct qeth_cmd_buffer *iob;
  2321. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2322. iob = qeth_wait_for_buffer(&card->write);
  2323. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2324. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2325. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2326. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2327. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2328. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2329. return rc;
  2330. }
  2331. static int qeth_mpc_initialize(struct qeth_card *card)
  2332. {
  2333. int rc;
  2334. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2335. rc = qeth_issue_next_read(card);
  2336. if (rc) {
  2337. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2338. return rc;
  2339. }
  2340. rc = qeth_cm_enable(card);
  2341. if (rc) {
  2342. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2343. goto out_qdio;
  2344. }
  2345. rc = qeth_cm_setup(card);
  2346. if (rc) {
  2347. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2348. goto out_qdio;
  2349. }
  2350. rc = qeth_ulp_enable(card);
  2351. if (rc) {
  2352. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2353. goto out_qdio;
  2354. }
  2355. rc = qeth_ulp_setup(card);
  2356. if (rc) {
  2357. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2358. goto out_qdio;
  2359. }
  2360. rc = qeth_alloc_qdio_buffers(card);
  2361. if (rc) {
  2362. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2363. goto out_qdio;
  2364. }
  2365. rc = qeth_qdio_establish(card);
  2366. if (rc) {
  2367. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2368. qeth_free_qdio_buffers(card);
  2369. goto out_qdio;
  2370. }
  2371. rc = qeth_qdio_activate(card);
  2372. if (rc) {
  2373. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2374. goto out_qdio;
  2375. }
  2376. rc = qeth_dm_act(card);
  2377. if (rc) {
  2378. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2379. goto out_qdio;
  2380. }
  2381. return 0;
  2382. out_qdio:
  2383. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2384. qdio_free(CARD_DDEV(card));
  2385. return rc;
  2386. }
  2387. void qeth_print_status_message(struct qeth_card *card)
  2388. {
  2389. switch (card->info.type) {
  2390. case QETH_CARD_TYPE_OSD:
  2391. case QETH_CARD_TYPE_OSM:
  2392. case QETH_CARD_TYPE_OSX:
  2393. /* VM will use a non-zero first character
  2394. * to indicate a HiperSockets like reporting
  2395. * of the level OSA sets the first character to zero
  2396. * */
  2397. if (!card->info.mcl_level[0]) {
  2398. sprintf(card->info.mcl_level, "%02x%02x",
  2399. card->info.mcl_level[2],
  2400. card->info.mcl_level[3]);
  2401. break;
  2402. }
  2403. /* fallthrough */
  2404. case QETH_CARD_TYPE_IQD:
  2405. if ((card->info.guestlan) ||
  2406. (card->info.mcl_level[0] & 0x80)) {
  2407. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2408. card->info.mcl_level[0]];
  2409. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2410. card->info.mcl_level[1]];
  2411. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2412. card->info.mcl_level[2]];
  2413. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2414. card->info.mcl_level[3]];
  2415. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2416. }
  2417. break;
  2418. default:
  2419. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2420. }
  2421. dev_info(&card->gdev->dev,
  2422. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2423. qeth_get_cardname(card),
  2424. (card->info.mcl_level[0]) ? " (level: " : "",
  2425. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2426. (card->info.mcl_level[0]) ? ")" : "",
  2427. qeth_get_cardname_short(card));
  2428. }
  2429. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2430. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2431. {
  2432. struct qeth_buffer_pool_entry *entry;
  2433. QETH_CARD_TEXT(card, 5, "inwrklst");
  2434. list_for_each_entry(entry,
  2435. &card->qdio.init_pool.entry_list, init_list) {
  2436. qeth_put_buffer_pool_entry(card, entry);
  2437. }
  2438. }
  2439. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2440. struct qeth_card *card)
  2441. {
  2442. struct list_head *plh;
  2443. struct qeth_buffer_pool_entry *entry;
  2444. int i, free;
  2445. struct page *page;
  2446. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2447. return NULL;
  2448. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2449. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2450. free = 1;
  2451. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2452. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2453. free = 0;
  2454. break;
  2455. }
  2456. }
  2457. if (free) {
  2458. list_del_init(&entry->list);
  2459. return entry;
  2460. }
  2461. }
  2462. /* no free buffer in pool so take first one and swap pages */
  2463. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2464. struct qeth_buffer_pool_entry, list);
  2465. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2466. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2467. page = alloc_page(GFP_ATOMIC);
  2468. if (!page) {
  2469. return NULL;
  2470. } else {
  2471. free_page((unsigned long)entry->elements[i]);
  2472. entry->elements[i] = page_address(page);
  2473. if (card->options.performance_stats)
  2474. card->perf_stats.sg_alloc_page_rx++;
  2475. }
  2476. }
  2477. }
  2478. list_del_init(&entry->list);
  2479. return entry;
  2480. }
  2481. static int qeth_init_input_buffer(struct qeth_card *card,
  2482. struct qeth_qdio_buffer *buf)
  2483. {
  2484. struct qeth_buffer_pool_entry *pool_entry;
  2485. int i;
  2486. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2487. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2488. if (!buf->rx_skb)
  2489. return 1;
  2490. }
  2491. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2492. if (!pool_entry)
  2493. return 1;
  2494. /*
  2495. * since the buffer is accessed only from the input_tasklet
  2496. * there shouldn't be a need to synchronize; also, since we use
  2497. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2498. * buffers
  2499. */
  2500. buf->pool_entry = pool_entry;
  2501. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2502. buf->buffer->element[i].length = PAGE_SIZE;
  2503. buf->buffer->element[i].addr = pool_entry->elements[i];
  2504. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2505. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2506. else
  2507. buf->buffer->element[i].eflags = 0;
  2508. buf->buffer->element[i].sflags = 0;
  2509. }
  2510. return 0;
  2511. }
  2512. int qeth_init_qdio_queues(struct qeth_card *card)
  2513. {
  2514. int i, j;
  2515. int rc;
  2516. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2517. /* inbound queue */
  2518. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2519. QDIO_MAX_BUFFERS_PER_Q);
  2520. qeth_initialize_working_pool_list(card);
  2521. /*give only as many buffers to hardware as we have buffer pool entries*/
  2522. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2523. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2524. card->qdio.in_q->next_buf_to_init =
  2525. card->qdio.in_buf_pool.buf_count - 1;
  2526. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2527. card->qdio.in_buf_pool.buf_count - 1);
  2528. if (rc) {
  2529. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2530. return rc;
  2531. }
  2532. /* completion */
  2533. rc = qeth_cq_init(card);
  2534. if (rc) {
  2535. return rc;
  2536. }
  2537. /* outbound queue */
  2538. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2539. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2540. QDIO_MAX_BUFFERS_PER_Q);
  2541. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2542. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2543. card->qdio.out_qs[i]->bufs[j],
  2544. QETH_QDIO_BUF_EMPTY);
  2545. }
  2546. card->qdio.out_qs[i]->card = card;
  2547. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2548. card->qdio.out_qs[i]->do_pack = 0;
  2549. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2550. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2551. atomic_set(&card->qdio.out_qs[i]->state,
  2552. QETH_OUT_Q_UNLOCKED);
  2553. }
  2554. return 0;
  2555. }
  2556. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2557. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2558. {
  2559. switch (link_type) {
  2560. case QETH_LINK_TYPE_HSTR:
  2561. return 2;
  2562. default:
  2563. return 1;
  2564. }
  2565. }
  2566. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2567. struct qeth_ipa_cmd *cmd, __u8 command,
  2568. enum qeth_prot_versions prot)
  2569. {
  2570. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2571. cmd->hdr.command = command;
  2572. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2573. /* cmd->hdr.seqno is set by qeth_send_control_data() */
  2574. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2575. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2576. if (card->options.layer2)
  2577. cmd->hdr.prim_version_no = 2;
  2578. else
  2579. cmd->hdr.prim_version_no = 1;
  2580. cmd->hdr.param_count = 1;
  2581. cmd->hdr.prot_version = prot;
  2582. cmd->hdr.ipa_supported = 0;
  2583. cmd->hdr.ipa_enabled = 0;
  2584. }
  2585. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2586. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2587. {
  2588. struct qeth_cmd_buffer *iob;
  2589. struct qeth_ipa_cmd *cmd;
  2590. iob = qeth_get_buffer(&card->write);
  2591. if (iob) {
  2592. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2593. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2594. } else {
  2595. dev_warn(&card->gdev->dev,
  2596. "The qeth driver ran out of channel command buffers\n");
  2597. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2598. dev_name(&card->gdev->dev));
  2599. }
  2600. return iob;
  2601. }
  2602. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2603. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2604. char prot_type)
  2605. {
  2606. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2607. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2608. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2609. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2610. }
  2611. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2612. /**
  2613. * qeth_send_ipa_cmd() - send an IPA command
  2614. *
  2615. * See qeth_send_control_data() for explanation of the arguments.
  2616. */
  2617. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2618. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2619. unsigned long),
  2620. void *reply_param)
  2621. {
  2622. int rc;
  2623. char prot_type;
  2624. QETH_CARD_TEXT(card, 4, "sendipa");
  2625. if (card->options.layer2)
  2626. if (card->info.type == QETH_CARD_TYPE_OSN)
  2627. prot_type = QETH_PROT_OSN2;
  2628. else
  2629. prot_type = QETH_PROT_LAYER2;
  2630. else
  2631. prot_type = QETH_PROT_TCPIP;
  2632. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2633. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2634. iob, reply_cb, reply_param);
  2635. if (rc == -ETIME) {
  2636. qeth_clear_ipacmd_list(card);
  2637. qeth_schedule_recovery(card);
  2638. }
  2639. return rc;
  2640. }
  2641. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2642. static int qeth_send_startlan(struct qeth_card *card)
  2643. {
  2644. int rc;
  2645. struct qeth_cmd_buffer *iob;
  2646. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2647. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2648. if (!iob)
  2649. return -ENOMEM;
  2650. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2651. return rc;
  2652. }
  2653. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2654. struct qeth_reply *reply, unsigned long data)
  2655. {
  2656. struct qeth_ipa_cmd *cmd;
  2657. QETH_CARD_TEXT(card, 4, "defadpcb");
  2658. cmd = (struct qeth_ipa_cmd *) data;
  2659. if (cmd->hdr.return_code == 0)
  2660. cmd->hdr.return_code =
  2661. cmd->data.setadapterparms.hdr.return_code;
  2662. return 0;
  2663. }
  2664. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2665. struct qeth_reply *reply, unsigned long data)
  2666. {
  2667. struct qeth_ipa_cmd *cmd;
  2668. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2669. cmd = (struct qeth_ipa_cmd *) data;
  2670. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2671. card->info.link_type =
  2672. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2673. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2674. }
  2675. card->options.adp.supported_funcs =
  2676. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2677. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2678. }
  2679. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2680. __u32 command, __u32 cmdlen)
  2681. {
  2682. struct qeth_cmd_buffer *iob;
  2683. struct qeth_ipa_cmd *cmd;
  2684. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2685. QETH_PROT_IPV4);
  2686. if (iob) {
  2687. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2688. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2689. cmd->data.setadapterparms.hdr.command_code = command;
  2690. cmd->data.setadapterparms.hdr.used_total = 1;
  2691. cmd->data.setadapterparms.hdr.seq_no = 1;
  2692. }
  2693. return iob;
  2694. }
  2695. int qeth_query_setadapterparms(struct qeth_card *card)
  2696. {
  2697. int rc;
  2698. struct qeth_cmd_buffer *iob;
  2699. QETH_CARD_TEXT(card, 3, "queryadp");
  2700. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2701. sizeof(struct qeth_ipacmd_setadpparms));
  2702. if (!iob)
  2703. return -ENOMEM;
  2704. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2705. return rc;
  2706. }
  2707. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2708. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2709. struct qeth_reply *reply, unsigned long data)
  2710. {
  2711. struct qeth_ipa_cmd *cmd;
  2712. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2713. cmd = (struct qeth_ipa_cmd *) data;
  2714. switch (cmd->hdr.return_code) {
  2715. case IPA_RC_NOTSUPP:
  2716. case IPA_RC_L2_UNSUPPORTED_CMD:
  2717. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2718. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2719. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2720. return -0;
  2721. default:
  2722. if (cmd->hdr.return_code) {
  2723. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2724. "rc=%d\n",
  2725. dev_name(&card->gdev->dev),
  2726. cmd->hdr.return_code);
  2727. return 0;
  2728. }
  2729. }
  2730. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2731. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2732. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2733. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2734. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2735. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2736. } else
  2737. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2738. "\n", dev_name(&card->gdev->dev));
  2739. return 0;
  2740. }
  2741. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2742. {
  2743. int rc;
  2744. struct qeth_cmd_buffer *iob;
  2745. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2746. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2747. if (!iob)
  2748. return -ENOMEM;
  2749. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2750. return rc;
  2751. }
  2752. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2753. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2754. struct qeth_reply *reply, unsigned long data)
  2755. {
  2756. struct qeth_ipa_cmd *cmd;
  2757. struct qeth_switch_info *sw_info;
  2758. struct qeth_query_switch_attributes *attrs;
  2759. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2760. cmd = (struct qeth_ipa_cmd *) data;
  2761. sw_info = (struct qeth_switch_info *)reply->param;
  2762. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2763. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2764. sw_info->capabilities = attrs->capabilities;
  2765. sw_info->settings = attrs->settings;
  2766. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2767. sw_info->settings);
  2768. }
  2769. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2770. return 0;
  2771. }
  2772. int qeth_query_switch_attributes(struct qeth_card *card,
  2773. struct qeth_switch_info *sw_info)
  2774. {
  2775. struct qeth_cmd_buffer *iob;
  2776. QETH_CARD_TEXT(card, 2, "qswiattr");
  2777. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2778. return -EOPNOTSUPP;
  2779. if (!netif_carrier_ok(card->dev))
  2780. return -ENOMEDIUM;
  2781. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2782. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2783. if (!iob)
  2784. return -ENOMEM;
  2785. return qeth_send_ipa_cmd(card, iob,
  2786. qeth_query_switch_attributes_cb, sw_info);
  2787. }
  2788. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2789. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2790. struct qeth_reply *reply, unsigned long data)
  2791. {
  2792. struct qeth_ipa_cmd *cmd;
  2793. __u16 rc;
  2794. cmd = (struct qeth_ipa_cmd *)data;
  2795. rc = cmd->hdr.return_code;
  2796. if (rc)
  2797. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2798. else
  2799. card->info.diagass_support = cmd->data.diagass.ext;
  2800. return 0;
  2801. }
  2802. static int qeth_query_setdiagass(struct qeth_card *card)
  2803. {
  2804. struct qeth_cmd_buffer *iob;
  2805. struct qeth_ipa_cmd *cmd;
  2806. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2807. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2808. if (!iob)
  2809. return -ENOMEM;
  2810. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2811. cmd->data.diagass.subcmd_len = 16;
  2812. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2813. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2814. }
  2815. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2816. {
  2817. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2818. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2819. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2820. struct ccw_dev_id ccwid;
  2821. int level;
  2822. tid->chpid = card->info.chpid;
  2823. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2824. tid->ssid = ccwid.ssid;
  2825. tid->devno = ccwid.devno;
  2826. if (!info)
  2827. return;
  2828. level = stsi(NULL, 0, 0, 0);
  2829. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2830. tid->lparnr = info222->lpar_number;
  2831. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2832. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2833. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2834. }
  2835. free_page(info);
  2836. return;
  2837. }
  2838. static int qeth_hw_trap_cb(struct qeth_card *card,
  2839. struct qeth_reply *reply, unsigned long data)
  2840. {
  2841. struct qeth_ipa_cmd *cmd;
  2842. __u16 rc;
  2843. cmd = (struct qeth_ipa_cmd *)data;
  2844. rc = cmd->hdr.return_code;
  2845. if (rc)
  2846. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2847. return 0;
  2848. }
  2849. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2850. {
  2851. struct qeth_cmd_buffer *iob;
  2852. struct qeth_ipa_cmd *cmd;
  2853. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2854. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2855. if (!iob)
  2856. return -ENOMEM;
  2857. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2858. cmd->data.diagass.subcmd_len = 80;
  2859. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2860. cmd->data.diagass.type = 1;
  2861. cmd->data.diagass.action = action;
  2862. switch (action) {
  2863. case QETH_DIAGS_TRAP_ARM:
  2864. cmd->data.diagass.options = 0x0003;
  2865. cmd->data.diagass.ext = 0x00010000 +
  2866. sizeof(struct qeth_trap_id);
  2867. qeth_get_trap_id(card,
  2868. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2869. break;
  2870. case QETH_DIAGS_TRAP_DISARM:
  2871. cmd->data.diagass.options = 0x0001;
  2872. break;
  2873. case QETH_DIAGS_TRAP_CAPTURE:
  2874. break;
  2875. }
  2876. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2877. }
  2878. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2879. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2880. unsigned int qdio_error, const char *dbftext)
  2881. {
  2882. if (qdio_error) {
  2883. QETH_CARD_TEXT(card, 2, dbftext);
  2884. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2885. buf->element[15].sflags);
  2886. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2887. buf->element[14].sflags);
  2888. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2889. if ((buf->element[15].sflags) == 0x12) {
  2890. card->stats.rx_dropped++;
  2891. return 0;
  2892. } else
  2893. return 1;
  2894. }
  2895. return 0;
  2896. }
  2897. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2898. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2899. {
  2900. struct qeth_card *card = container_of(work, struct qeth_card,
  2901. buffer_reclaim_work.work);
  2902. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2903. qeth_queue_input_buffer(card, card->reclaim_index);
  2904. }
  2905. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2906. {
  2907. struct qeth_qdio_q *queue = card->qdio.in_q;
  2908. struct list_head *lh;
  2909. int count;
  2910. int i;
  2911. int rc;
  2912. int newcount = 0;
  2913. count = (index < queue->next_buf_to_init)?
  2914. card->qdio.in_buf_pool.buf_count -
  2915. (queue->next_buf_to_init - index) :
  2916. card->qdio.in_buf_pool.buf_count -
  2917. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2918. /* only requeue at a certain threshold to avoid SIGAs */
  2919. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2920. for (i = queue->next_buf_to_init;
  2921. i < queue->next_buf_to_init + count; ++i) {
  2922. if (qeth_init_input_buffer(card,
  2923. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2924. break;
  2925. } else {
  2926. newcount++;
  2927. }
  2928. }
  2929. if (newcount < count) {
  2930. /* we are in memory shortage so we switch back to
  2931. traditional skb allocation and drop packages */
  2932. atomic_set(&card->force_alloc_skb, 3);
  2933. count = newcount;
  2934. } else {
  2935. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2936. }
  2937. if (!count) {
  2938. i = 0;
  2939. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2940. i++;
  2941. if (i == card->qdio.in_buf_pool.buf_count) {
  2942. QETH_CARD_TEXT(card, 2, "qsarbw");
  2943. card->reclaim_index = index;
  2944. schedule_delayed_work(
  2945. &card->buffer_reclaim_work,
  2946. QETH_RECLAIM_WORK_TIME);
  2947. }
  2948. return;
  2949. }
  2950. /*
  2951. * according to old code it should be avoided to requeue all
  2952. * 128 buffers in order to benefit from PCI avoidance.
  2953. * this function keeps at least one buffer (the buffer at
  2954. * 'index') un-requeued -> this buffer is the first buffer that
  2955. * will be requeued the next time
  2956. */
  2957. if (card->options.performance_stats) {
  2958. card->perf_stats.inbound_do_qdio_cnt++;
  2959. card->perf_stats.inbound_do_qdio_start_time =
  2960. qeth_get_micros();
  2961. }
  2962. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2963. queue->next_buf_to_init, count);
  2964. if (card->options.performance_stats)
  2965. card->perf_stats.inbound_do_qdio_time +=
  2966. qeth_get_micros() -
  2967. card->perf_stats.inbound_do_qdio_start_time;
  2968. if (rc) {
  2969. QETH_CARD_TEXT(card, 2, "qinberr");
  2970. }
  2971. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2972. QDIO_MAX_BUFFERS_PER_Q;
  2973. }
  2974. }
  2975. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  2976. static int qeth_handle_send_error(struct qeth_card *card,
  2977. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2978. {
  2979. int sbalf15 = buffer->buffer->element[15].sflags;
  2980. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2981. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2982. if (sbalf15 == 0) {
  2983. qdio_err = 0;
  2984. } else {
  2985. qdio_err = 1;
  2986. }
  2987. }
  2988. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2989. if (!qdio_err)
  2990. return QETH_SEND_ERROR_NONE;
  2991. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2992. return QETH_SEND_ERROR_RETRY;
  2993. QETH_CARD_TEXT(card, 1, "lnkfail");
  2994. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2995. (u16)qdio_err, (u8)sbalf15);
  2996. return QETH_SEND_ERROR_LINK_FAILURE;
  2997. }
  2998. /*
  2999. * Switched to packing state if the number of used buffers on a queue
  3000. * reaches a certain limit.
  3001. */
  3002. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3003. {
  3004. if (!queue->do_pack) {
  3005. if (atomic_read(&queue->used_buffers)
  3006. >= QETH_HIGH_WATERMARK_PACK){
  3007. /* switch non-PACKING -> PACKING */
  3008. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3009. if (queue->card->options.performance_stats)
  3010. queue->card->perf_stats.sc_dp_p++;
  3011. queue->do_pack = 1;
  3012. }
  3013. }
  3014. }
  3015. /*
  3016. * Switches from packing to non-packing mode. If there is a packing
  3017. * buffer on the queue this buffer will be prepared to be flushed.
  3018. * In that case 1 is returned to inform the caller. If no buffer
  3019. * has to be flushed, zero is returned.
  3020. */
  3021. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3022. {
  3023. struct qeth_qdio_out_buffer *buffer;
  3024. int flush_count = 0;
  3025. if (queue->do_pack) {
  3026. if (atomic_read(&queue->used_buffers)
  3027. <= QETH_LOW_WATERMARK_PACK) {
  3028. /* switch PACKING -> non-PACKING */
  3029. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3030. if (queue->card->options.performance_stats)
  3031. queue->card->perf_stats.sc_p_dp++;
  3032. queue->do_pack = 0;
  3033. /* flush packing buffers */
  3034. buffer = queue->bufs[queue->next_buf_to_fill];
  3035. if ((atomic_read(&buffer->state) ==
  3036. QETH_QDIO_BUF_EMPTY) &&
  3037. (buffer->next_element_to_fill > 0)) {
  3038. atomic_set(&buffer->state,
  3039. QETH_QDIO_BUF_PRIMED);
  3040. flush_count++;
  3041. queue->next_buf_to_fill =
  3042. (queue->next_buf_to_fill + 1) %
  3043. QDIO_MAX_BUFFERS_PER_Q;
  3044. }
  3045. }
  3046. }
  3047. return flush_count;
  3048. }
  3049. /*
  3050. * Called to flush a packing buffer if no more pci flags are on the queue.
  3051. * Checks if there is a packing buffer and prepares it to be flushed.
  3052. * In that case returns 1, otherwise zero.
  3053. */
  3054. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  3055. {
  3056. struct qeth_qdio_out_buffer *buffer;
  3057. buffer = queue->bufs[queue->next_buf_to_fill];
  3058. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3059. (buffer->next_element_to_fill > 0)) {
  3060. /* it's a packing buffer */
  3061. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3062. queue->next_buf_to_fill =
  3063. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3064. return 1;
  3065. }
  3066. return 0;
  3067. }
  3068. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3069. int count)
  3070. {
  3071. struct qeth_qdio_out_buffer *buf;
  3072. int rc;
  3073. int i;
  3074. unsigned int qdio_flags;
  3075. for (i = index; i < index + count; ++i) {
  3076. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3077. buf = queue->bufs[bidx];
  3078. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3079. SBAL_EFLAGS_LAST_ENTRY;
  3080. if (queue->bufstates)
  3081. queue->bufstates[bidx].user = buf;
  3082. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3083. continue;
  3084. if (!queue->do_pack) {
  3085. if ((atomic_read(&queue->used_buffers) >=
  3086. (QETH_HIGH_WATERMARK_PACK -
  3087. QETH_WATERMARK_PACK_FUZZ)) &&
  3088. !atomic_read(&queue->set_pci_flags_count)) {
  3089. /* it's likely that we'll go to packing
  3090. * mode soon */
  3091. atomic_inc(&queue->set_pci_flags_count);
  3092. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3093. }
  3094. } else {
  3095. if (!atomic_read(&queue->set_pci_flags_count)) {
  3096. /*
  3097. * there's no outstanding PCI any more, so we
  3098. * have to request a PCI to be sure the the PCI
  3099. * will wake at some time in the future then we
  3100. * can flush packed buffers that might still be
  3101. * hanging around, which can happen if no
  3102. * further send was requested by the stack
  3103. */
  3104. atomic_inc(&queue->set_pci_flags_count);
  3105. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3106. }
  3107. }
  3108. }
  3109. netif_trans_update(queue->card->dev);
  3110. if (queue->card->options.performance_stats) {
  3111. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3112. queue->card->perf_stats.outbound_do_qdio_start_time =
  3113. qeth_get_micros();
  3114. }
  3115. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3116. if (atomic_read(&queue->set_pci_flags_count))
  3117. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3118. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3119. queue->queue_no, index, count);
  3120. if (queue->card->options.performance_stats)
  3121. queue->card->perf_stats.outbound_do_qdio_time +=
  3122. qeth_get_micros() -
  3123. queue->card->perf_stats.outbound_do_qdio_start_time;
  3124. atomic_add(count, &queue->used_buffers);
  3125. if (rc) {
  3126. queue->card->stats.tx_errors += count;
  3127. /* ignore temporary SIGA errors without busy condition */
  3128. if (rc == -ENOBUFS)
  3129. return;
  3130. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3131. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3132. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3133. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3134. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3135. /* this must not happen under normal circumstances. if it
  3136. * happens something is really wrong -> recover */
  3137. qeth_schedule_recovery(queue->card);
  3138. return;
  3139. }
  3140. if (queue->card->options.performance_stats)
  3141. queue->card->perf_stats.bufs_sent += count;
  3142. }
  3143. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3144. {
  3145. int index;
  3146. int flush_cnt = 0;
  3147. int q_was_packing = 0;
  3148. /*
  3149. * check if weed have to switch to non-packing mode or if
  3150. * we have to get a pci flag out on the queue
  3151. */
  3152. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3153. !atomic_read(&queue->set_pci_flags_count)) {
  3154. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3155. QETH_OUT_Q_UNLOCKED) {
  3156. /*
  3157. * If we get in here, there was no action in
  3158. * do_send_packet. So, we check if there is a
  3159. * packing buffer to be flushed here.
  3160. */
  3161. netif_stop_queue(queue->card->dev);
  3162. index = queue->next_buf_to_fill;
  3163. q_was_packing = queue->do_pack;
  3164. /* queue->do_pack may change */
  3165. barrier();
  3166. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3167. if (!flush_cnt &&
  3168. !atomic_read(&queue->set_pci_flags_count))
  3169. flush_cnt +=
  3170. qeth_flush_buffers_on_no_pci(queue);
  3171. if (queue->card->options.performance_stats &&
  3172. q_was_packing)
  3173. queue->card->perf_stats.bufs_sent_pack +=
  3174. flush_cnt;
  3175. if (flush_cnt)
  3176. qeth_flush_buffers(queue, index, flush_cnt);
  3177. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3178. }
  3179. }
  3180. }
  3181. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3182. unsigned long card_ptr)
  3183. {
  3184. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3185. if (card->dev && (card->dev->flags & IFF_UP))
  3186. napi_schedule(&card->napi);
  3187. }
  3188. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3189. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3190. {
  3191. int rc;
  3192. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3193. rc = -1;
  3194. goto out;
  3195. } else {
  3196. if (card->options.cq == cq) {
  3197. rc = 0;
  3198. goto out;
  3199. }
  3200. if (card->state != CARD_STATE_DOWN &&
  3201. card->state != CARD_STATE_RECOVER) {
  3202. rc = -1;
  3203. goto out;
  3204. }
  3205. qeth_free_qdio_buffers(card);
  3206. card->options.cq = cq;
  3207. rc = 0;
  3208. }
  3209. out:
  3210. return rc;
  3211. }
  3212. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3213. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3214. unsigned int qdio_err,
  3215. unsigned int queue, int first_element, int count) {
  3216. struct qeth_qdio_q *cq = card->qdio.c_q;
  3217. int i;
  3218. int rc;
  3219. if (!qeth_is_cq(card, queue))
  3220. goto out;
  3221. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3222. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3223. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3224. if (qdio_err) {
  3225. netif_stop_queue(card->dev);
  3226. qeth_schedule_recovery(card);
  3227. goto out;
  3228. }
  3229. if (card->options.performance_stats) {
  3230. card->perf_stats.cq_cnt++;
  3231. card->perf_stats.cq_start_time = qeth_get_micros();
  3232. }
  3233. for (i = first_element; i < first_element + count; ++i) {
  3234. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3235. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3236. int e;
  3237. e = 0;
  3238. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3239. buffer->element[e].addr) {
  3240. unsigned long phys_aob_addr;
  3241. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3242. qeth_qdio_handle_aob(card, phys_aob_addr);
  3243. buffer->element[e].addr = NULL;
  3244. buffer->element[e].eflags = 0;
  3245. buffer->element[e].sflags = 0;
  3246. buffer->element[e].length = 0;
  3247. ++e;
  3248. }
  3249. buffer->element[15].eflags = 0;
  3250. buffer->element[15].sflags = 0;
  3251. }
  3252. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3253. card->qdio.c_q->next_buf_to_init,
  3254. count);
  3255. if (rc) {
  3256. dev_warn(&card->gdev->dev,
  3257. "QDIO reported an error, rc=%i\n", rc);
  3258. QETH_CARD_TEXT(card, 2, "qcqherr");
  3259. }
  3260. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3261. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3262. netif_wake_queue(card->dev);
  3263. if (card->options.performance_stats) {
  3264. int delta_t = qeth_get_micros();
  3265. delta_t -= card->perf_stats.cq_start_time;
  3266. card->perf_stats.cq_time += delta_t;
  3267. }
  3268. out:
  3269. return;
  3270. }
  3271. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3272. unsigned int queue, int first_elem, int count,
  3273. unsigned long card_ptr)
  3274. {
  3275. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3276. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3277. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3278. if (qeth_is_cq(card, queue))
  3279. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3280. else if (qdio_err)
  3281. qeth_schedule_recovery(card);
  3282. }
  3283. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3284. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3285. unsigned int qdio_error, int __queue, int first_element,
  3286. int count, unsigned long card_ptr)
  3287. {
  3288. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3289. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3290. struct qeth_qdio_out_buffer *buffer;
  3291. int i;
  3292. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3293. if (qdio_error & QDIO_ERROR_FATAL) {
  3294. QETH_CARD_TEXT(card, 2, "achkcond");
  3295. netif_stop_queue(card->dev);
  3296. qeth_schedule_recovery(card);
  3297. return;
  3298. }
  3299. if (card->options.performance_stats) {
  3300. card->perf_stats.outbound_handler_cnt++;
  3301. card->perf_stats.outbound_handler_start_time =
  3302. qeth_get_micros();
  3303. }
  3304. for (i = first_element; i < (first_element + count); ++i) {
  3305. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3306. buffer = queue->bufs[bidx];
  3307. qeth_handle_send_error(card, buffer, qdio_error);
  3308. if (queue->bufstates &&
  3309. (queue->bufstates[bidx].flags &
  3310. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3311. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3312. if (atomic_cmpxchg(&buffer->state,
  3313. QETH_QDIO_BUF_PRIMED,
  3314. QETH_QDIO_BUF_PENDING) ==
  3315. QETH_QDIO_BUF_PRIMED) {
  3316. qeth_notify_skbs(queue, buffer,
  3317. TX_NOTIFY_PENDING);
  3318. }
  3319. buffer->aob = queue->bufstates[bidx].aob;
  3320. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3321. QETH_CARD_TEXT(queue->card, 5, "aob");
  3322. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3323. virt_to_phys(buffer->aob));
  3324. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3325. QETH_CARD_TEXT(card, 2, "outofbuf");
  3326. qeth_schedule_recovery(card);
  3327. }
  3328. } else {
  3329. if (card->options.cq == QETH_CQ_ENABLED) {
  3330. enum iucv_tx_notify n;
  3331. n = qeth_compute_cq_notification(
  3332. buffer->buffer->element[15].sflags, 0);
  3333. qeth_notify_skbs(queue, buffer, n);
  3334. }
  3335. qeth_clear_output_buffer(queue, buffer,
  3336. QETH_QDIO_BUF_EMPTY);
  3337. }
  3338. qeth_cleanup_handled_pending(queue, bidx, 0);
  3339. }
  3340. atomic_sub(count, &queue->used_buffers);
  3341. /* check if we need to do something on this outbound queue */
  3342. if (card->info.type != QETH_CARD_TYPE_IQD)
  3343. qeth_check_outbound_queue(queue);
  3344. netif_wake_queue(queue->card->dev);
  3345. if (card->options.performance_stats)
  3346. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3347. card->perf_stats.outbound_handler_start_time;
  3348. }
  3349. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3350. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3351. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3352. {
  3353. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3354. return 2;
  3355. return queue_num;
  3356. }
  3357. /**
  3358. * Note: Function assumes that we have 4 outbound queues.
  3359. */
  3360. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3361. int ipv, int cast_type)
  3362. {
  3363. __be16 *tci;
  3364. u8 tos;
  3365. if (cast_type && card->info.is_multicast_different)
  3366. return card->info.is_multicast_different &
  3367. (card->qdio.no_out_queues - 1);
  3368. switch (card->qdio.do_prio_queueing) {
  3369. case QETH_PRIO_Q_ING_TOS:
  3370. case QETH_PRIO_Q_ING_PREC:
  3371. switch (ipv) {
  3372. case 4:
  3373. tos = ipv4_get_dsfield(ip_hdr(skb));
  3374. break;
  3375. case 6:
  3376. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3377. break;
  3378. default:
  3379. return card->qdio.default_out_queue;
  3380. }
  3381. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3382. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3383. if (tos & IPTOS_MINCOST)
  3384. return qeth_cut_iqd_prio(card, 3);
  3385. if (tos & IPTOS_RELIABILITY)
  3386. return 2;
  3387. if (tos & IPTOS_THROUGHPUT)
  3388. return 1;
  3389. if (tos & IPTOS_LOWDELAY)
  3390. return 0;
  3391. break;
  3392. case QETH_PRIO_Q_ING_SKB:
  3393. if (skb->priority > 5)
  3394. return 0;
  3395. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3396. case QETH_PRIO_Q_ING_VLAN:
  3397. tci = &((struct ethhdr *)skb->data)->h_proto;
  3398. if (*tci == ETH_P_8021Q)
  3399. return qeth_cut_iqd_prio(card, ~*(tci + 1) >>
  3400. (VLAN_PRIO_SHIFT + 1) & 3);
  3401. break;
  3402. default:
  3403. break;
  3404. }
  3405. return card->qdio.default_out_queue;
  3406. }
  3407. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3408. /**
  3409. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3410. * @skb: SKB address
  3411. *
  3412. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3413. * fragmented part of the SKB. Returns zero for linear SKB.
  3414. */
  3415. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3416. {
  3417. int cnt, elements = 0;
  3418. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3419. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3420. elements += qeth_get_elements_for_range(
  3421. (addr_t)skb_frag_address(frag),
  3422. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3423. }
  3424. return elements;
  3425. }
  3426. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3427. /**
  3428. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3429. * @card: qeth card structure, to check max. elems.
  3430. * @skb: SKB address
  3431. * @extra_elems: extra elems needed, to check against max.
  3432. * @data_offset: range starts at skb->data + data_offset
  3433. *
  3434. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3435. * skb data, including linear part and fragments. Checks if the result plus
  3436. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3437. * Note: extra_elems is not included in the returned result.
  3438. */
  3439. int qeth_get_elements_no(struct qeth_card *card,
  3440. struct sk_buff *skb, int extra_elems, int data_offset)
  3441. {
  3442. addr_t end = (addr_t)skb->data + skb_headlen(skb);
  3443. int elements = qeth_get_elements_for_frags(skb);
  3444. addr_t start = (addr_t)skb->data + data_offset;
  3445. if (start != end)
  3446. elements += qeth_get_elements_for_range(start, end);
  3447. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3448. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3449. "(Number=%d / Length=%d). Discarded.\n",
  3450. elements + extra_elems, skb->len);
  3451. return 0;
  3452. }
  3453. return elements;
  3454. }
  3455. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3456. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3457. {
  3458. int hroom, inpage, rest;
  3459. if (((unsigned long)skb->data & PAGE_MASK) !=
  3460. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3461. hroom = skb_headroom(skb);
  3462. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3463. rest = len - inpage;
  3464. if (rest > hroom)
  3465. return 1;
  3466. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3467. skb->data -= rest;
  3468. skb->tail -= rest;
  3469. *hdr = (struct qeth_hdr *)skb->data;
  3470. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3471. }
  3472. return 0;
  3473. }
  3474. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3475. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3476. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3477. int offset)
  3478. {
  3479. int length = skb_headlen(skb);
  3480. int length_here;
  3481. int element;
  3482. char *data;
  3483. int first_lap, cnt;
  3484. struct skb_frag_struct *frag;
  3485. element = *next_element_to_fill;
  3486. data = skb->data;
  3487. first_lap = (is_tso == 0 ? 1 : 0);
  3488. if (offset >= 0) {
  3489. data = skb->data + offset;
  3490. length -= offset;
  3491. first_lap = 0;
  3492. }
  3493. while (length > 0) {
  3494. /* length_here is the remaining amount of data in this page */
  3495. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3496. if (length < length_here)
  3497. length_here = length;
  3498. buffer->element[element].addr = data;
  3499. buffer->element[element].length = length_here;
  3500. length -= length_here;
  3501. if (!length) {
  3502. if (first_lap)
  3503. if (skb_shinfo(skb)->nr_frags)
  3504. buffer->element[element].eflags =
  3505. SBAL_EFLAGS_FIRST_FRAG;
  3506. else
  3507. buffer->element[element].eflags = 0;
  3508. else
  3509. buffer->element[element].eflags =
  3510. SBAL_EFLAGS_MIDDLE_FRAG;
  3511. } else {
  3512. if (first_lap)
  3513. buffer->element[element].eflags =
  3514. SBAL_EFLAGS_FIRST_FRAG;
  3515. else
  3516. buffer->element[element].eflags =
  3517. SBAL_EFLAGS_MIDDLE_FRAG;
  3518. }
  3519. data += length_here;
  3520. element++;
  3521. first_lap = 0;
  3522. }
  3523. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3524. frag = &skb_shinfo(skb)->frags[cnt];
  3525. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3526. frag->page_offset;
  3527. length = frag->size;
  3528. while (length > 0) {
  3529. length_here = PAGE_SIZE -
  3530. ((unsigned long) data % PAGE_SIZE);
  3531. if (length < length_here)
  3532. length_here = length;
  3533. buffer->element[element].addr = data;
  3534. buffer->element[element].length = length_here;
  3535. buffer->element[element].eflags =
  3536. SBAL_EFLAGS_MIDDLE_FRAG;
  3537. length -= length_here;
  3538. data += length_here;
  3539. element++;
  3540. }
  3541. }
  3542. if (buffer->element[element - 1].eflags)
  3543. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3544. *next_element_to_fill = element;
  3545. }
  3546. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3547. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3548. struct qeth_hdr *hdr, int offset, int hd_len)
  3549. {
  3550. struct qdio_buffer *buffer;
  3551. int flush_cnt = 0, hdr_len, large_send = 0;
  3552. buffer = buf->buffer;
  3553. atomic_inc(&skb->users);
  3554. skb_queue_tail(&buf->skb_list, skb);
  3555. /*check first on TSO ....*/
  3556. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3557. int element = buf->next_element_to_fill;
  3558. hdr_len = sizeof(struct qeth_hdr_tso) +
  3559. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3560. /*fill first buffer entry only with header information */
  3561. buffer->element[element].addr = skb->data;
  3562. buffer->element[element].length = hdr_len;
  3563. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3564. buf->next_element_to_fill++;
  3565. skb->data += hdr_len;
  3566. skb->len -= hdr_len;
  3567. large_send = 1;
  3568. }
  3569. if (offset >= 0) {
  3570. int element = buf->next_element_to_fill;
  3571. buffer->element[element].addr = hdr;
  3572. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3573. hd_len;
  3574. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3575. buf->is_header[element] = 1;
  3576. buf->next_element_to_fill++;
  3577. }
  3578. __qeth_fill_buffer(skb, buffer, large_send,
  3579. (int *)&buf->next_element_to_fill, offset);
  3580. if (!queue->do_pack) {
  3581. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3582. /* set state to PRIMED -> will be flushed */
  3583. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3584. flush_cnt = 1;
  3585. } else {
  3586. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3587. if (queue->card->options.performance_stats)
  3588. queue->card->perf_stats.skbs_sent_pack++;
  3589. if (buf->next_element_to_fill >=
  3590. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3591. /*
  3592. * packed buffer if full -> set state PRIMED
  3593. * -> will be flushed
  3594. */
  3595. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3596. flush_cnt = 1;
  3597. }
  3598. }
  3599. return flush_cnt;
  3600. }
  3601. int qeth_do_send_packet_fast(struct qeth_card *card,
  3602. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3603. struct qeth_hdr *hdr, int elements_needed,
  3604. int offset, int hd_len)
  3605. {
  3606. struct qeth_qdio_out_buffer *buffer;
  3607. int index;
  3608. /* spin until we get the queue ... */
  3609. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3610. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3611. /* ... now we've got the queue */
  3612. index = queue->next_buf_to_fill;
  3613. buffer = queue->bufs[queue->next_buf_to_fill];
  3614. /*
  3615. * check if buffer is empty to make sure that we do not 'overtake'
  3616. * ourselves and try to fill a buffer that is already primed
  3617. */
  3618. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3619. goto out;
  3620. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3621. QDIO_MAX_BUFFERS_PER_Q;
  3622. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3623. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3624. qeth_flush_buffers(queue, index, 1);
  3625. return 0;
  3626. out:
  3627. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3628. return -EBUSY;
  3629. }
  3630. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3631. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3632. struct sk_buff *skb, struct qeth_hdr *hdr,
  3633. int elements_needed)
  3634. {
  3635. struct qeth_qdio_out_buffer *buffer;
  3636. int start_index;
  3637. int flush_count = 0;
  3638. int do_pack = 0;
  3639. int tmp;
  3640. int rc = 0;
  3641. /* spin until we get the queue ... */
  3642. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3643. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3644. start_index = queue->next_buf_to_fill;
  3645. buffer = queue->bufs[queue->next_buf_to_fill];
  3646. /*
  3647. * check if buffer is empty to make sure that we do not 'overtake'
  3648. * ourselves and try to fill a buffer that is already primed
  3649. */
  3650. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3651. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3652. return -EBUSY;
  3653. }
  3654. /* check if we need to switch packing state of this queue */
  3655. qeth_switch_to_packing_if_needed(queue);
  3656. if (queue->do_pack) {
  3657. do_pack = 1;
  3658. /* does packet fit in current buffer? */
  3659. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3660. buffer->next_element_to_fill) < elements_needed) {
  3661. /* ... no -> set state PRIMED */
  3662. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3663. flush_count++;
  3664. queue->next_buf_to_fill =
  3665. (queue->next_buf_to_fill + 1) %
  3666. QDIO_MAX_BUFFERS_PER_Q;
  3667. buffer = queue->bufs[queue->next_buf_to_fill];
  3668. /* we did a step forward, so check buffer state
  3669. * again */
  3670. if (atomic_read(&buffer->state) !=
  3671. QETH_QDIO_BUF_EMPTY) {
  3672. qeth_flush_buffers(queue, start_index,
  3673. flush_count);
  3674. atomic_set(&queue->state,
  3675. QETH_OUT_Q_UNLOCKED);
  3676. return -EBUSY;
  3677. }
  3678. }
  3679. }
  3680. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3681. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3682. QDIO_MAX_BUFFERS_PER_Q;
  3683. flush_count += tmp;
  3684. if (flush_count)
  3685. qeth_flush_buffers(queue, start_index, flush_count);
  3686. else if (!atomic_read(&queue->set_pci_flags_count))
  3687. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3688. /*
  3689. * queue->state will go from LOCKED -> UNLOCKED or from
  3690. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3691. * (switch packing state or flush buffer to get another pci flag out).
  3692. * In that case we will enter this loop
  3693. */
  3694. while (atomic_dec_return(&queue->state)) {
  3695. flush_count = 0;
  3696. start_index = queue->next_buf_to_fill;
  3697. /* check if we can go back to non-packing state */
  3698. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3699. /*
  3700. * check if we need to flush a packing buffer to get a pci
  3701. * flag out on the queue
  3702. */
  3703. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3704. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3705. if (flush_count)
  3706. qeth_flush_buffers(queue, start_index, flush_count);
  3707. }
  3708. /* at this point the queue is UNLOCKED again */
  3709. if (queue->card->options.performance_stats && do_pack)
  3710. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3711. return rc;
  3712. }
  3713. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3714. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3715. struct qeth_reply *reply, unsigned long data)
  3716. {
  3717. struct qeth_ipa_cmd *cmd;
  3718. struct qeth_ipacmd_setadpparms *setparms;
  3719. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3720. cmd = (struct qeth_ipa_cmd *) data;
  3721. setparms = &(cmd->data.setadapterparms);
  3722. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3723. if (cmd->hdr.return_code) {
  3724. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3725. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3726. }
  3727. card->info.promisc_mode = setparms->data.mode;
  3728. return 0;
  3729. }
  3730. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3731. {
  3732. enum qeth_ipa_promisc_modes mode;
  3733. struct net_device *dev = card->dev;
  3734. struct qeth_cmd_buffer *iob;
  3735. struct qeth_ipa_cmd *cmd;
  3736. QETH_CARD_TEXT(card, 4, "setprom");
  3737. if (((dev->flags & IFF_PROMISC) &&
  3738. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3739. (!(dev->flags & IFF_PROMISC) &&
  3740. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3741. return;
  3742. mode = SET_PROMISC_MODE_OFF;
  3743. if (dev->flags & IFF_PROMISC)
  3744. mode = SET_PROMISC_MODE_ON;
  3745. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3746. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3747. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3748. if (!iob)
  3749. return;
  3750. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3751. cmd->data.setadapterparms.data.mode = mode;
  3752. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3753. }
  3754. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3755. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3756. {
  3757. struct qeth_card *card;
  3758. char dbf_text[15];
  3759. card = dev->ml_priv;
  3760. QETH_CARD_TEXT(card, 4, "chgmtu");
  3761. sprintf(dbf_text, "%8x", new_mtu);
  3762. QETH_CARD_TEXT(card, 4, dbf_text);
  3763. if (new_mtu < 64)
  3764. return -EINVAL;
  3765. if (new_mtu > 65535)
  3766. return -EINVAL;
  3767. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3768. (!qeth_mtu_is_valid(card, new_mtu)))
  3769. return -EINVAL;
  3770. dev->mtu = new_mtu;
  3771. return 0;
  3772. }
  3773. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3774. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3775. {
  3776. struct qeth_card *card;
  3777. card = dev->ml_priv;
  3778. QETH_CARD_TEXT(card, 5, "getstat");
  3779. return &card->stats;
  3780. }
  3781. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3782. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3783. struct qeth_reply *reply, unsigned long data)
  3784. {
  3785. struct qeth_ipa_cmd *cmd;
  3786. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3787. cmd = (struct qeth_ipa_cmd *) data;
  3788. if (!card->options.layer2 ||
  3789. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3790. memcpy(card->dev->dev_addr,
  3791. &cmd->data.setadapterparms.data.change_addr.addr,
  3792. OSA_ADDR_LEN);
  3793. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3794. }
  3795. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3796. return 0;
  3797. }
  3798. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3799. {
  3800. int rc;
  3801. struct qeth_cmd_buffer *iob;
  3802. struct qeth_ipa_cmd *cmd;
  3803. QETH_CARD_TEXT(card, 4, "chgmac");
  3804. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3805. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3806. sizeof(struct qeth_change_addr));
  3807. if (!iob)
  3808. return -ENOMEM;
  3809. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3810. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3811. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3812. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3813. card->dev->dev_addr, OSA_ADDR_LEN);
  3814. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3815. NULL);
  3816. return rc;
  3817. }
  3818. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3819. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3820. struct qeth_reply *reply, unsigned long data)
  3821. {
  3822. struct qeth_ipa_cmd *cmd;
  3823. struct qeth_set_access_ctrl *access_ctrl_req;
  3824. int fallback = *(int *)reply->param;
  3825. QETH_CARD_TEXT(card, 4, "setaccb");
  3826. cmd = (struct qeth_ipa_cmd *) data;
  3827. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3828. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3829. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3830. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3831. cmd->data.setadapterparms.hdr.return_code);
  3832. if (cmd->data.setadapterparms.hdr.return_code !=
  3833. SET_ACCESS_CTRL_RC_SUCCESS)
  3834. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3835. card->gdev->dev.kobj.name,
  3836. access_ctrl_req->subcmd_code,
  3837. cmd->data.setadapterparms.hdr.return_code);
  3838. switch (cmd->data.setadapterparms.hdr.return_code) {
  3839. case SET_ACCESS_CTRL_RC_SUCCESS:
  3840. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3841. dev_info(&card->gdev->dev,
  3842. "QDIO data connection isolation is deactivated\n");
  3843. } else {
  3844. dev_info(&card->gdev->dev,
  3845. "QDIO data connection isolation is activated\n");
  3846. }
  3847. break;
  3848. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3849. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3850. "deactivated\n", dev_name(&card->gdev->dev));
  3851. if (fallback)
  3852. card->options.isolation = card->options.prev_isolation;
  3853. break;
  3854. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3855. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3856. " activated\n", dev_name(&card->gdev->dev));
  3857. if (fallback)
  3858. card->options.isolation = card->options.prev_isolation;
  3859. break;
  3860. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3861. dev_err(&card->gdev->dev, "Adapter does not "
  3862. "support QDIO data connection isolation\n");
  3863. break;
  3864. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3865. dev_err(&card->gdev->dev,
  3866. "Adapter is dedicated. "
  3867. "QDIO data connection isolation not supported\n");
  3868. if (fallback)
  3869. card->options.isolation = card->options.prev_isolation;
  3870. break;
  3871. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3872. dev_err(&card->gdev->dev,
  3873. "TSO does not permit QDIO data connection isolation\n");
  3874. if (fallback)
  3875. card->options.isolation = card->options.prev_isolation;
  3876. break;
  3877. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3878. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3879. "support reflective relay mode\n");
  3880. if (fallback)
  3881. card->options.isolation = card->options.prev_isolation;
  3882. break;
  3883. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3884. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3885. "enabled at the adjacent switch port");
  3886. if (fallback)
  3887. card->options.isolation = card->options.prev_isolation;
  3888. break;
  3889. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3890. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3891. "at the adjacent switch failed\n");
  3892. break;
  3893. default:
  3894. /* this should never happen */
  3895. if (fallback)
  3896. card->options.isolation = card->options.prev_isolation;
  3897. break;
  3898. }
  3899. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3900. return 0;
  3901. }
  3902. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3903. enum qeth_ipa_isolation_modes isolation, int fallback)
  3904. {
  3905. int rc;
  3906. struct qeth_cmd_buffer *iob;
  3907. struct qeth_ipa_cmd *cmd;
  3908. struct qeth_set_access_ctrl *access_ctrl_req;
  3909. QETH_CARD_TEXT(card, 4, "setacctl");
  3910. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3911. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3912. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3913. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3914. sizeof(struct qeth_set_access_ctrl));
  3915. if (!iob)
  3916. return -ENOMEM;
  3917. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3918. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3919. access_ctrl_req->subcmd_code = isolation;
  3920. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3921. &fallback);
  3922. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3923. return rc;
  3924. }
  3925. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3926. {
  3927. int rc = 0;
  3928. QETH_CARD_TEXT(card, 4, "setactlo");
  3929. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3930. card->info.type == QETH_CARD_TYPE_OSX) &&
  3931. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3932. rc = qeth_setadpparms_set_access_ctrl(card,
  3933. card->options.isolation, fallback);
  3934. if (rc) {
  3935. QETH_DBF_MESSAGE(3,
  3936. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3937. card->gdev->dev.kobj.name,
  3938. rc);
  3939. rc = -EOPNOTSUPP;
  3940. }
  3941. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3942. card->options.isolation = ISOLATION_MODE_NONE;
  3943. dev_err(&card->gdev->dev, "Adapter does not "
  3944. "support QDIO data connection isolation\n");
  3945. rc = -EOPNOTSUPP;
  3946. }
  3947. return rc;
  3948. }
  3949. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3950. void qeth_tx_timeout(struct net_device *dev)
  3951. {
  3952. struct qeth_card *card;
  3953. card = dev->ml_priv;
  3954. QETH_CARD_TEXT(card, 4, "txtimeo");
  3955. card->stats.tx_errors++;
  3956. qeth_schedule_recovery(card);
  3957. }
  3958. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3959. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3960. {
  3961. struct qeth_card *card = dev->ml_priv;
  3962. int rc = 0;
  3963. switch (regnum) {
  3964. case MII_BMCR: /* Basic mode control register */
  3965. rc = BMCR_FULLDPLX;
  3966. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3967. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3968. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3969. rc |= BMCR_SPEED100;
  3970. break;
  3971. case MII_BMSR: /* Basic mode status register */
  3972. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3973. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3974. BMSR_100BASE4;
  3975. break;
  3976. case MII_PHYSID1: /* PHYS ID 1 */
  3977. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3978. dev->dev_addr[2];
  3979. rc = (rc >> 5) & 0xFFFF;
  3980. break;
  3981. case MII_PHYSID2: /* PHYS ID 2 */
  3982. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3983. break;
  3984. case MII_ADVERTISE: /* Advertisement control reg */
  3985. rc = ADVERTISE_ALL;
  3986. break;
  3987. case MII_LPA: /* Link partner ability reg */
  3988. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3989. LPA_100BASE4 | LPA_LPACK;
  3990. break;
  3991. case MII_EXPANSION: /* Expansion register */
  3992. break;
  3993. case MII_DCOUNTER: /* disconnect counter */
  3994. break;
  3995. case MII_FCSCOUNTER: /* false carrier counter */
  3996. break;
  3997. case MII_NWAYTEST: /* N-way auto-neg test register */
  3998. break;
  3999. case MII_RERRCOUNTER: /* rx error counter */
  4000. rc = card->stats.rx_errors;
  4001. break;
  4002. case MII_SREVISION: /* silicon revision */
  4003. break;
  4004. case MII_RESV1: /* reserved 1 */
  4005. break;
  4006. case MII_LBRERROR: /* loopback, rx, bypass error */
  4007. break;
  4008. case MII_PHYADDR: /* physical address */
  4009. break;
  4010. case MII_RESV2: /* reserved 2 */
  4011. break;
  4012. case MII_TPISTATUS: /* TPI status for 10mbps */
  4013. break;
  4014. case MII_NCONFIG: /* network interface config */
  4015. break;
  4016. default:
  4017. break;
  4018. }
  4019. return rc;
  4020. }
  4021. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  4022. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4023. struct qeth_cmd_buffer *iob, int len,
  4024. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4025. unsigned long),
  4026. void *reply_param)
  4027. {
  4028. u16 s1, s2;
  4029. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4030. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4031. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4032. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4033. /* adjust PDU length fields in IPA_PDU_HEADER */
  4034. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4035. s2 = (u32) len;
  4036. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4037. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4038. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4039. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4040. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4041. reply_cb, reply_param);
  4042. }
  4043. static int qeth_snmp_command_cb(struct qeth_card *card,
  4044. struct qeth_reply *reply, unsigned long sdata)
  4045. {
  4046. struct qeth_ipa_cmd *cmd;
  4047. struct qeth_arp_query_info *qinfo;
  4048. struct qeth_snmp_cmd *snmp;
  4049. unsigned char *data;
  4050. __u16 data_len;
  4051. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4052. cmd = (struct qeth_ipa_cmd *) sdata;
  4053. data = (unsigned char *)((char *)cmd - reply->offset);
  4054. qinfo = (struct qeth_arp_query_info *) reply->param;
  4055. snmp = &cmd->data.setadapterparms.data.snmp;
  4056. if (cmd->hdr.return_code) {
  4057. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4058. return 0;
  4059. }
  4060. if (cmd->data.setadapterparms.hdr.return_code) {
  4061. cmd->hdr.return_code =
  4062. cmd->data.setadapterparms.hdr.return_code;
  4063. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4064. return 0;
  4065. }
  4066. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4067. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4068. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4069. else
  4070. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4071. /* check if there is enough room in userspace */
  4072. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4073. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4074. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4075. return 0;
  4076. }
  4077. QETH_CARD_TEXT_(card, 4, "snore%i",
  4078. cmd->data.setadapterparms.hdr.used_total);
  4079. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4080. cmd->data.setadapterparms.hdr.seq_no);
  4081. /*copy entries to user buffer*/
  4082. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4083. memcpy(qinfo->udata + qinfo->udata_offset,
  4084. (char *)snmp,
  4085. data_len + offsetof(struct qeth_snmp_cmd, data));
  4086. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4087. } else {
  4088. memcpy(qinfo->udata + qinfo->udata_offset,
  4089. (char *)&snmp->request, data_len);
  4090. }
  4091. qinfo->udata_offset += data_len;
  4092. /* check if all replies received ... */
  4093. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4094. cmd->data.setadapterparms.hdr.used_total);
  4095. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4096. cmd->data.setadapterparms.hdr.seq_no);
  4097. if (cmd->data.setadapterparms.hdr.seq_no <
  4098. cmd->data.setadapterparms.hdr.used_total)
  4099. return 1;
  4100. return 0;
  4101. }
  4102. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4103. {
  4104. struct qeth_cmd_buffer *iob;
  4105. struct qeth_ipa_cmd *cmd;
  4106. struct qeth_snmp_ureq *ureq;
  4107. unsigned int req_len;
  4108. struct qeth_arp_query_info qinfo = {0, };
  4109. int rc = 0;
  4110. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4111. if (card->info.guestlan)
  4112. return -EOPNOTSUPP;
  4113. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4114. (!card->options.layer2)) {
  4115. return -EOPNOTSUPP;
  4116. }
  4117. /* skip 4 bytes (data_len struct member) to get req_len */
  4118. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4119. return -EFAULT;
  4120. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4121. sizeof(struct qeth_ipacmd_hdr) -
  4122. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4123. return -EINVAL;
  4124. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4125. if (IS_ERR(ureq)) {
  4126. QETH_CARD_TEXT(card, 2, "snmpnome");
  4127. return PTR_ERR(ureq);
  4128. }
  4129. qinfo.udata_len = ureq->hdr.data_len;
  4130. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4131. if (!qinfo.udata) {
  4132. kfree(ureq);
  4133. return -ENOMEM;
  4134. }
  4135. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4136. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4137. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4138. if (!iob) {
  4139. rc = -ENOMEM;
  4140. goto out;
  4141. }
  4142. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4143. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4144. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4145. qeth_snmp_command_cb, (void *)&qinfo);
  4146. if (rc)
  4147. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4148. QETH_CARD_IFNAME(card), rc);
  4149. else {
  4150. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4151. rc = -EFAULT;
  4152. }
  4153. out:
  4154. kfree(ureq);
  4155. kfree(qinfo.udata);
  4156. return rc;
  4157. }
  4158. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4159. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4160. struct qeth_reply *reply, unsigned long data)
  4161. {
  4162. struct qeth_ipa_cmd *cmd;
  4163. struct qeth_qoat_priv *priv;
  4164. char *resdata;
  4165. int resdatalen;
  4166. QETH_CARD_TEXT(card, 3, "qoatcb");
  4167. cmd = (struct qeth_ipa_cmd *)data;
  4168. priv = (struct qeth_qoat_priv *)reply->param;
  4169. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4170. resdata = (char *)data + 28;
  4171. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4172. cmd->hdr.return_code = IPA_RC_FFFF;
  4173. return 0;
  4174. }
  4175. memcpy((priv->buffer + priv->response_len), resdata,
  4176. resdatalen);
  4177. priv->response_len += resdatalen;
  4178. if (cmd->data.setadapterparms.hdr.seq_no <
  4179. cmd->data.setadapterparms.hdr.used_total)
  4180. return 1;
  4181. return 0;
  4182. }
  4183. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4184. {
  4185. int rc = 0;
  4186. struct qeth_cmd_buffer *iob;
  4187. struct qeth_ipa_cmd *cmd;
  4188. struct qeth_query_oat *oat_req;
  4189. struct qeth_query_oat_data oat_data;
  4190. struct qeth_qoat_priv priv;
  4191. void __user *tmp;
  4192. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4193. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4194. rc = -EOPNOTSUPP;
  4195. goto out;
  4196. }
  4197. if (copy_from_user(&oat_data, udata,
  4198. sizeof(struct qeth_query_oat_data))) {
  4199. rc = -EFAULT;
  4200. goto out;
  4201. }
  4202. priv.buffer_len = oat_data.buffer_len;
  4203. priv.response_len = 0;
  4204. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4205. if (!priv.buffer) {
  4206. rc = -ENOMEM;
  4207. goto out;
  4208. }
  4209. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4210. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4211. sizeof(struct qeth_query_oat));
  4212. if (!iob) {
  4213. rc = -ENOMEM;
  4214. goto out_free;
  4215. }
  4216. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4217. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4218. oat_req->subcmd_code = oat_data.command;
  4219. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4220. &priv);
  4221. if (!rc) {
  4222. if (is_compat_task())
  4223. tmp = compat_ptr(oat_data.ptr);
  4224. else
  4225. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4226. if (copy_to_user(tmp, priv.buffer,
  4227. priv.response_len)) {
  4228. rc = -EFAULT;
  4229. goto out_free;
  4230. }
  4231. oat_data.response_len = priv.response_len;
  4232. if (copy_to_user(udata, &oat_data,
  4233. sizeof(struct qeth_query_oat_data)))
  4234. rc = -EFAULT;
  4235. } else
  4236. if (rc == IPA_RC_FFFF)
  4237. rc = -EFAULT;
  4238. out_free:
  4239. kfree(priv.buffer);
  4240. out:
  4241. return rc;
  4242. }
  4243. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4244. static int qeth_query_card_info_cb(struct qeth_card *card,
  4245. struct qeth_reply *reply, unsigned long data)
  4246. {
  4247. struct qeth_ipa_cmd *cmd;
  4248. struct qeth_query_card_info *card_info;
  4249. struct carrier_info *carrier_info;
  4250. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4251. carrier_info = (struct carrier_info *)reply->param;
  4252. cmd = (struct qeth_ipa_cmd *)data;
  4253. card_info = &cmd->data.setadapterparms.data.card_info;
  4254. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4255. carrier_info->card_type = card_info->card_type;
  4256. carrier_info->port_mode = card_info->port_mode;
  4257. carrier_info->port_speed = card_info->port_speed;
  4258. }
  4259. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4260. return 0;
  4261. }
  4262. static int qeth_query_card_info(struct qeth_card *card,
  4263. struct carrier_info *carrier_info)
  4264. {
  4265. struct qeth_cmd_buffer *iob;
  4266. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4267. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4268. return -EOPNOTSUPP;
  4269. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4270. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4271. if (!iob)
  4272. return -ENOMEM;
  4273. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4274. (void *)carrier_info);
  4275. }
  4276. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4277. {
  4278. switch (card->info.type) {
  4279. case QETH_CARD_TYPE_IQD:
  4280. return 2;
  4281. default:
  4282. return 0;
  4283. }
  4284. }
  4285. static void qeth_determine_capabilities(struct qeth_card *card)
  4286. {
  4287. int rc;
  4288. int length;
  4289. char *prcd;
  4290. struct ccw_device *ddev;
  4291. int ddev_offline = 0;
  4292. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4293. ddev = CARD_DDEV(card);
  4294. if (!ddev->online) {
  4295. ddev_offline = 1;
  4296. rc = ccw_device_set_online(ddev);
  4297. if (rc) {
  4298. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4299. goto out;
  4300. }
  4301. }
  4302. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4303. if (rc) {
  4304. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4305. dev_name(&card->gdev->dev), rc);
  4306. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4307. goto out_offline;
  4308. }
  4309. qeth_configure_unitaddr(card, prcd);
  4310. if (ddev_offline)
  4311. qeth_configure_blkt_default(card, prcd);
  4312. kfree(prcd);
  4313. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4314. if (rc)
  4315. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4316. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4317. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4318. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4319. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4320. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4321. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4322. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4323. dev_info(&card->gdev->dev,
  4324. "Completion Queueing supported\n");
  4325. } else {
  4326. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4327. }
  4328. out_offline:
  4329. if (ddev_offline == 1)
  4330. ccw_device_set_offline(ddev);
  4331. out:
  4332. return;
  4333. }
  4334. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4335. struct qdio_buffer **in_sbal_ptrs,
  4336. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4337. int i;
  4338. if (card->options.cq == QETH_CQ_ENABLED) {
  4339. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4340. (card->qdio.no_in_queues - 1);
  4341. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4342. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4343. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4344. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4345. }
  4346. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4347. }
  4348. }
  4349. static int qeth_qdio_establish(struct qeth_card *card)
  4350. {
  4351. struct qdio_initialize init_data;
  4352. char *qib_param_field;
  4353. struct qdio_buffer **in_sbal_ptrs;
  4354. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4355. struct qdio_buffer **out_sbal_ptrs;
  4356. int i, j, k;
  4357. int rc = 0;
  4358. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4359. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4360. GFP_KERNEL);
  4361. if (!qib_param_field) {
  4362. rc = -ENOMEM;
  4363. goto out_free_nothing;
  4364. }
  4365. qeth_create_qib_param_field(card, qib_param_field);
  4366. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4367. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4368. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4369. GFP_KERNEL);
  4370. if (!in_sbal_ptrs) {
  4371. rc = -ENOMEM;
  4372. goto out_free_qib_param;
  4373. }
  4374. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4375. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4376. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4377. }
  4378. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4379. GFP_KERNEL);
  4380. if (!queue_start_poll) {
  4381. rc = -ENOMEM;
  4382. goto out_free_in_sbals;
  4383. }
  4384. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4385. queue_start_poll[i] = card->discipline->start_poll;
  4386. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4387. out_sbal_ptrs =
  4388. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4389. sizeof(void *), GFP_KERNEL);
  4390. if (!out_sbal_ptrs) {
  4391. rc = -ENOMEM;
  4392. goto out_free_queue_start_poll;
  4393. }
  4394. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4395. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4396. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4397. card->qdio.out_qs[i]->bufs[j]->buffer);
  4398. }
  4399. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4400. init_data.cdev = CARD_DDEV(card);
  4401. init_data.q_format = qeth_get_qdio_q_format(card);
  4402. init_data.qib_param_field_format = 0;
  4403. init_data.qib_param_field = qib_param_field;
  4404. init_data.no_input_qs = card->qdio.no_in_queues;
  4405. init_data.no_output_qs = card->qdio.no_out_queues;
  4406. init_data.input_handler = card->discipline->input_handler;
  4407. init_data.output_handler = card->discipline->output_handler;
  4408. init_data.queue_start_poll_array = queue_start_poll;
  4409. init_data.int_parm = (unsigned long) card;
  4410. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4411. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4412. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4413. init_data.scan_threshold =
  4414. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4415. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4416. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4417. rc = qdio_allocate(&init_data);
  4418. if (rc) {
  4419. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4420. goto out;
  4421. }
  4422. rc = qdio_establish(&init_data);
  4423. if (rc) {
  4424. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4425. qdio_free(CARD_DDEV(card));
  4426. }
  4427. }
  4428. switch (card->options.cq) {
  4429. case QETH_CQ_ENABLED:
  4430. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4431. break;
  4432. case QETH_CQ_DISABLED:
  4433. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4434. break;
  4435. default:
  4436. break;
  4437. }
  4438. out:
  4439. kfree(out_sbal_ptrs);
  4440. out_free_queue_start_poll:
  4441. kfree(queue_start_poll);
  4442. out_free_in_sbals:
  4443. kfree(in_sbal_ptrs);
  4444. out_free_qib_param:
  4445. kfree(qib_param_field);
  4446. out_free_nothing:
  4447. return rc;
  4448. }
  4449. static void qeth_core_free_card(struct qeth_card *card)
  4450. {
  4451. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4452. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4453. qeth_clean_channel(&card->read);
  4454. qeth_clean_channel(&card->write);
  4455. qeth_free_qdio_buffers(card);
  4456. unregister_service_level(&card->qeth_service_level);
  4457. kfree(card);
  4458. }
  4459. void qeth_trace_features(struct qeth_card *card)
  4460. {
  4461. QETH_CARD_TEXT(card, 2, "features");
  4462. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4463. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4464. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4465. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4466. sizeof(card->info.diagass_support));
  4467. }
  4468. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4469. static struct ccw_device_id qeth_ids[] = {
  4470. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4471. .driver_info = QETH_CARD_TYPE_OSD},
  4472. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4473. .driver_info = QETH_CARD_TYPE_IQD},
  4474. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4475. .driver_info = QETH_CARD_TYPE_OSN},
  4476. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4477. .driver_info = QETH_CARD_TYPE_OSM},
  4478. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4479. .driver_info = QETH_CARD_TYPE_OSX},
  4480. {},
  4481. };
  4482. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4483. static struct ccw_driver qeth_ccw_driver = {
  4484. .driver = {
  4485. .owner = THIS_MODULE,
  4486. .name = "qeth",
  4487. },
  4488. .ids = qeth_ids,
  4489. .probe = ccwgroup_probe_ccwdev,
  4490. .remove = ccwgroup_remove_ccwdev,
  4491. };
  4492. int qeth_core_hardsetup_card(struct qeth_card *card)
  4493. {
  4494. int retries = 3;
  4495. int rc;
  4496. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4497. atomic_set(&card->force_alloc_skb, 0);
  4498. qeth_update_from_chp_desc(card);
  4499. retry:
  4500. if (retries < 3)
  4501. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4502. dev_name(&card->gdev->dev));
  4503. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4504. ccw_device_set_offline(CARD_DDEV(card));
  4505. ccw_device_set_offline(CARD_WDEV(card));
  4506. ccw_device_set_offline(CARD_RDEV(card));
  4507. qdio_free(CARD_DDEV(card));
  4508. rc = ccw_device_set_online(CARD_RDEV(card));
  4509. if (rc)
  4510. goto retriable;
  4511. rc = ccw_device_set_online(CARD_WDEV(card));
  4512. if (rc)
  4513. goto retriable;
  4514. rc = ccw_device_set_online(CARD_DDEV(card));
  4515. if (rc)
  4516. goto retriable;
  4517. retriable:
  4518. if (rc == -ERESTARTSYS) {
  4519. QETH_DBF_TEXT(SETUP, 2, "break1");
  4520. return rc;
  4521. } else if (rc) {
  4522. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4523. if (--retries < 0)
  4524. goto out;
  4525. else
  4526. goto retry;
  4527. }
  4528. qeth_determine_capabilities(card);
  4529. qeth_init_tokens(card);
  4530. qeth_init_func_level(card);
  4531. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4532. if (rc == -ERESTARTSYS) {
  4533. QETH_DBF_TEXT(SETUP, 2, "break2");
  4534. return rc;
  4535. } else if (rc) {
  4536. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4537. if (--retries < 0)
  4538. goto out;
  4539. else
  4540. goto retry;
  4541. }
  4542. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4543. if (rc == -ERESTARTSYS) {
  4544. QETH_DBF_TEXT(SETUP, 2, "break3");
  4545. return rc;
  4546. } else if (rc) {
  4547. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4548. if (--retries < 0)
  4549. goto out;
  4550. else
  4551. goto retry;
  4552. }
  4553. card->read_or_write_problem = 0;
  4554. rc = qeth_mpc_initialize(card);
  4555. if (rc) {
  4556. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4557. goto out;
  4558. }
  4559. rc = qeth_send_startlan(card);
  4560. if (rc) {
  4561. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4562. if (rc == IPA_RC_LAN_OFFLINE) {
  4563. dev_warn(&card->gdev->dev,
  4564. "The LAN is offline\n");
  4565. card->lan_online = 0;
  4566. } else {
  4567. rc = -ENODEV;
  4568. goto out;
  4569. }
  4570. } else
  4571. card->lan_online = 1;
  4572. card->options.ipa4.supported_funcs = 0;
  4573. card->options.ipa6.supported_funcs = 0;
  4574. card->options.adp.supported_funcs = 0;
  4575. card->options.sbp.supported_funcs = 0;
  4576. card->info.diagass_support = 0;
  4577. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4578. if (rc == -ENOMEM)
  4579. goto out;
  4580. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4581. rc = qeth_query_setadapterparms(card);
  4582. if (rc < 0) {
  4583. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4584. goto out;
  4585. }
  4586. }
  4587. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4588. rc = qeth_query_setdiagass(card);
  4589. if (rc < 0) {
  4590. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4591. goto out;
  4592. }
  4593. }
  4594. return 0;
  4595. out:
  4596. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4597. "an error on the device\n");
  4598. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4599. dev_name(&card->gdev->dev), rc);
  4600. return rc;
  4601. }
  4602. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4603. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4604. struct qdio_buffer_element *element,
  4605. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4606. {
  4607. struct page *page = virt_to_page(element->addr);
  4608. if (*pskb == NULL) {
  4609. if (qethbuffer->rx_skb) {
  4610. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4611. *pskb = qethbuffer->rx_skb;
  4612. qethbuffer->rx_skb = NULL;
  4613. } else {
  4614. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4615. if (!(*pskb))
  4616. return -ENOMEM;
  4617. }
  4618. skb_reserve(*pskb, ETH_HLEN);
  4619. if (data_len <= QETH_RX_PULL_LEN) {
  4620. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4621. data_len);
  4622. } else {
  4623. get_page(page);
  4624. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4625. element->addr + offset, QETH_RX_PULL_LEN);
  4626. skb_fill_page_desc(*pskb, *pfrag, page,
  4627. offset + QETH_RX_PULL_LEN,
  4628. data_len - QETH_RX_PULL_LEN);
  4629. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4630. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4631. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4632. (*pfrag)++;
  4633. }
  4634. } else {
  4635. get_page(page);
  4636. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4637. (*pskb)->data_len += data_len;
  4638. (*pskb)->len += data_len;
  4639. (*pskb)->truesize += data_len;
  4640. (*pfrag)++;
  4641. }
  4642. return 0;
  4643. }
  4644. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4645. {
  4646. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4647. }
  4648. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4649. struct qeth_qdio_buffer *qethbuffer,
  4650. struct qdio_buffer_element **__element, int *__offset,
  4651. struct qeth_hdr **hdr)
  4652. {
  4653. struct qdio_buffer_element *element = *__element;
  4654. struct qdio_buffer *buffer = qethbuffer->buffer;
  4655. int offset = *__offset;
  4656. struct sk_buff *skb = NULL;
  4657. int skb_len = 0;
  4658. void *data_ptr;
  4659. int data_len;
  4660. int headroom = 0;
  4661. int use_rx_sg = 0;
  4662. int frag = 0;
  4663. /* qeth_hdr must not cross element boundaries */
  4664. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4665. if (qeth_is_last_sbale(element))
  4666. return NULL;
  4667. element++;
  4668. offset = 0;
  4669. if (element->length < sizeof(struct qeth_hdr))
  4670. return NULL;
  4671. }
  4672. *hdr = element->addr + offset;
  4673. offset += sizeof(struct qeth_hdr);
  4674. switch ((*hdr)->hdr.l2.id) {
  4675. case QETH_HEADER_TYPE_LAYER2:
  4676. skb_len = (*hdr)->hdr.l2.pkt_length;
  4677. break;
  4678. case QETH_HEADER_TYPE_LAYER3:
  4679. skb_len = (*hdr)->hdr.l3.length;
  4680. headroom = ETH_HLEN;
  4681. break;
  4682. case QETH_HEADER_TYPE_OSN:
  4683. skb_len = (*hdr)->hdr.osn.pdu_length;
  4684. headroom = sizeof(struct qeth_hdr);
  4685. break;
  4686. default:
  4687. break;
  4688. }
  4689. if (!skb_len)
  4690. return NULL;
  4691. if (((skb_len >= card->options.rx_sg_cb) &&
  4692. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4693. (!atomic_read(&card->force_alloc_skb))) ||
  4694. (card->options.cq == QETH_CQ_ENABLED)) {
  4695. use_rx_sg = 1;
  4696. } else {
  4697. skb = dev_alloc_skb(skb_len + headroom);
  4698. if (!skb)
  4699. goto no_mem;
  4700. if (headroom)
  4701. skb_reserve(skb, headroom);
  4702. }
  4703. data_ptr = element->addr + offset;
  4704. while (skb_len) {
  4705. data_len = min(skb_len, (int)(element->length - offset));
  4706. if (data_len) {
  4707. if (use_rx_sg) {
  4708. if (qeth_create_skb_frag(qethbuffer, element,
  4709. &skb, offset, &frag, data_len))
  4710. goto no_mem;
  4711. } else {
  4712. memcpy(skb_put(skb, data_len), data_ptr,
  4713. data_len);
  4714. }
  4715. }
  4716. skb_len -= data_len;
  4717. if (skb_len) {
  4718. if (qeth_is_last_sbale(element)) {
  4719. QETH_CARD_TEXT(card, 4, "unexeob");
  4720. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4721. dev_kfree_skb_any(skb);
  4722. card->stats.rx_errors++;
  4723. return NULL;
  4724. }
  4725. element++;
  4726. offset = 0;
  4727. data_ptr = element->addr;
  4728. } else {
  4729. offset += data_len;
  4730. }
  4731. }
  4732. *__element = element;
  4733. *__offset = offset;
  4734. if (use_rx_sg && card->options.performance_stats) {
  4735. card->perf_stats.sg_skbs_rx++;
  4736. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4737. }
  4738. return skb;
  4739. no_mem:
  4740. if (net_ratelimit()) {
  4741. QETH_CARD_TEXT(card, 2, "noskbmem");
  4742. }
  4743. card->stats.rx_dropped++;
  4744. return NULL;
  4745. }
  4746. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4747. int qeth_setassparms_cb(struct qeth_card *card,
  4748. struct qeth_reply *reply, unsigned long data)
  4749. {
  4750. struct qeth_ipa_cmd *cmd;
  4751. QETH_CARD_TEXT(card, 4, "defadpcb");
  4752. cmd = (struct qeth_ipa_cmd *) data;
  4753. if (cmd->hdr.return_code == 0) {
  4754. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4755. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4756. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4757. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4758. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4759. }
  4760. if (cmd->data.setassparms.hdr.assist_no == IPA_INBOUND_CHECKSUM &&
  4761. cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  4762. card->info.csum_mask = cmd->data.setassparms.data.flags_32bit;
  4763. QETH_CARD_TEXT_(card, 3, "csum:%d", card->info.csum_mask);
  4764. }
  4765. if (cmd->data.setassparms.hdr.assist_no == IPA_OUTBOUND_CHECKSUM &&
  4766. cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  4767. card->info.tx_csum_mask =
  4768. cmd->data.setassparms.data.flags_32bit;
  4769. QETH_CARD_TEXT_(card, 3, "tcsu:%d", card->info.tx_csum_mask);
  4770. }
  4771. return 0;
  4772. }
  4773. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4774. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4775. enum qeth_ipa_funcs ipa_func,
  4776. __u16 cmd_code, __u16 len,
  4777. enum qeth_prot_versions prot)
  4778. {
  4779. struct qeth_cmd_buffer *iob;
  4780. struct qeth_ipa_cmd *cmd;
  4781. QETH_CARD_TEXT(card, 4, "getasscm");
  4782. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4783. if (iob) {
  4784. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4785. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4786. cmd->data.setassparms.hdr.length = 8 + len;
  4787. cmd->data.setassparms.hdr.command_code = cmd_code;
  4788. cmd->data.setassparms.hdr.return_code = 0;
  4789. cmd->data.setassparms.hdr.seq_no = 0;
  4790. }
  4791. return iob;
  4792. }
  4793. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4794. int qeth_send_setassparms(struct qeth_card *card,
  4795. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4796. int (*reply_cb)(struct qeth_card *,
  4797. struct qeth_reply *, unsigned long),
  4798. void *reply_param)
  4799. {
  4800. int rc;
  4801. struct qeth_ipa_cmd *cmd;
  4802. QETH_CARD_TEXT(card, 4, "sendassp");
  4803. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4804. if (len <= sizeof(__u32))
  4805. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4806. else /* (len > sizeof(__u32)) */
  4807. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4808. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4809. return rc;
  4810. }
  4811. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4812. int qeth_send_simple_setassparms(struct qeth_card *card,
  4813. enum qeth_ipa_funcs ipa_func,
  4814. __u16 cmd_code, long data)
  4815. {
  4816. int rc;
  4817. int length = 0;
  4818. struct qeth_cmd_buffer *iob;
  4819. QETH_CARD_TEXT(card, 4, "simassp4");
  4820. if (data)
  4821. length = sizeof(__u32);
  4822. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  4823. length, QETH_PROT_IPV4);
  4824. if (!iob)
  4825. return -ENOMEM;
  4826. rc = qeth_send_setassparms(card, iob, length, data,
  4827. qeth_setassparms_cb, NULL);
  4828. return rc;
  4829. }
  4830. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
  4831. static void qeth_unregister_dbf_views(void)
  4832. {
  4833. int x;
  4834. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4835. debug_unregister(qeth_dbf[x].id);
  4836. qeth_dbf[x].id = NULL;
  4837. }
  4838. }
  4839. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4840. {
  4841. char dbf_txt_buf[32];
  4842. va_list args;
  4843. if (!debug_level_enabled(id, level))
  4844. return;
  4845. va_start(args, fmt);
  4846. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4847. va_end(args);
  4848. debug_text_event(id, level, dbf_txt_buf);
  4849. }
  4850. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4851. static int qeth_register_dbf_views(void)
  4852. {
  4853. int ret;
  4854. int x;
  4855. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4856. /* register the areas */
  4857. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4858. qeth_dbf[x].pages,
  4859. qeth_dbf[x].areas,
  4860. qeth_dbf[x].len);
  4861. if (qeth_dbf[x].id == NULL) {
  4862. qeth_unregister_dbf_views();
  4863. return -ENOMEM;
  4864. }
  4865. /* register a view */
  4866. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4867. if (ret) {
  4868. qeth_unregister_dbf_views();
  4869. return ret;
  4870. }
  4871. /* set a passing level */
  4872. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4873. }
  4874. return 0;
  4875. }
  4876. int qeth_core_load_discipline(struct qeth_card *card,
  4877. enum qeth_discipline_id discipline)
  4878. {
  4879. int rc = 0;
  4880. mutex_lock(&qeth_mod_mutex);
  4881. switch (discipline) {
  4882. case QETH_DISCIPLINE_LAYER3:
  4883. card->discipline = try_then_request_module(
  4884. symbol_get(qeth_l3_discipline), "qeth_l3");
  4885. break;
  4886. case QETH_DISCIPLINE_LAYER2:
  4887. card->discipline = try_then_request_module(
  4888. symbol_get(qeth_l2_discipline), "qeth_l2");
  4889. break;
  4890. }
  4891. if (!card->discipline) {
  4892. dev_err(&card->gdev->dev, "There is no kernel module to "
  4893. "support discipline %d\n", discipline);
  4894. rc = -EINVAL;
  4895. }
  4896. mutex_unlock(&qeth_mod_mutex);
  4897. return rc;
  4898. }
  4899. void qeth_core_free_discipline(struct qeth_card *card)
  4900. {
  4901. if (card->options.layer2)
  4902. symbol_put(qeth_l2_discipline);
  4903. else
  4904. symbol_put(qeth_l3_discipline);
  4905. card->discipline = NULL;
  4906. }
  4907. const struct device_type qeth_generic_devtype = {
  4908. .name = "qeth_generic",
  4909. .groups = qeth_generic_attr_groups,
  4910. };
  4911. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  4912. static const struct device_type qeth_osn_devtype = {
  4913. .name = "qeth_osn",
  4914. .groups = qeth_osn_attr_groups,
  4915. };
  4916. #define DBF_NAME_LEN 20
  4917. struct qeth_dbf_entry {
  4918. char dbf_name[DBF_NAME_LEN];
  4919. debug_info_t *dbf_info;
  4920. struct list_head dbf_list;
  4921. };
  4922. static LIST_HEAD(qeth_dbf_list);
  4923. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4924. static debug_info_t *qeth_get_dbf_entry(char *name)
  4925. {
  4926. struct qeth_dbf_entry *entry;
  4927. debug_info_t *rc = NULL;
  4928. mutex_lock(&qeth_dbf_list_mutex);
  4929. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4930. if (strcmp(entry->dbf_name, name) == 0) {
  4931. rc = entry->dbf_info;
  4932. break;
  4933. }
  4934. }
  4935. mutex_unlock(&qeth_dbf_list_mutex);
  4936. return rc;
  4937. }
  4938. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4939. {
  4940. struct qeth_dbf_entry *new_entry;
  4941. card->debug = debug_register(name, 2, 1, 8);
  4942. if (!card->debug) {
  4943. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4944. goto err;
  4945. }
  4946. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4947. goto err_dbg;
  4948. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4949. if (!new_entry)
  4950. goto err_dbg;
  4951. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4952. new_entry->dbf_info = card->debug;
  4953. mutex_lock(&qeth_dbf_list_mutex);
  4954. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4955. mutex_unlock(&qeth_dbf_list_mutex);
  4956. return 0;
  4957. err_dbg:
  4958. debug_unregister(card->debug);
  4959. err:
  4960. return -ENOMEM;
  4961. }
  4962. static void qeth_clear_dbf_list(void)
  4963. {
  4964. struct qeth_dbf_entry *entry, *tmp;
  4965. mutex_lock(&qeth_dbf_list_mutex);
  4966. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4967. list_del(&entry->dbf_list);
  4968. debug_unregister(entry->dbf_info);
  4969. kfree(entry);
  4970. }
  4971. mutex_unlock(&qeth_dbf_list_mutex);
  4972. }
  4973. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4974. {
  4975. struct qeth_card *card;
  4976. struct device *dev;
  4977. int rc;
  4978. unsigned long flags;
  4979. char dbf_name[DBF_NAME_LEN];
  4980. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4981. dev = &gdev->dev;
  4982. if (!get_device(dev))
  4983. return -ENODEV;
  4984. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4985. card = qeth_alloc_card();
  4986. if (!card) {
  4987. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4988. rc = -ENOMEM;
  4989. goto err_dev;
  4990. }
  4991. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4992. dev_name(&gdev->dev));
  4993. card->debug = qeth_get_dbf_entry(dbf_name);
  4994. if (!card->debug) {
  4995. rc = qeth_add_dbf_entry(card, dbf_name);
  4996. if (rc)
  4997. goto err_card;
  4998. }
  4999. card->read.ccwdev = gdev->cdev[0];
  5000. card->write.ccwdev = gdev->cdev[1];
  5001. card->data.ccwdev = gdev->cdev[2];
  5002. dev_set_drvdata(&gdev->dev, card);
  5003. card->gdev = gdev;
  5004. gdev->cdev[0]->handler = qeth_irq;
  5005. gdev->cdev[1]->handler = qeth_irq;
  5006. gdev->cdev[2]->handler = qeth_irq;
  5007. rc = qeth_determine_card_type(card);
  5008. if (rc) {
  5009. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  5010. goto err_card;
  5011. }
  5012. rc = qeth_setup_card(card);
  5013. if (rc) {
  5014. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  5015. goto err_card;
  5016. }
  5017. switch (card->info.type) {
  5018. case QETH_CARD_TYPE_OSN:
  5019. case QETH_CARD_TYPE_OSM:
  5020. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  5021. if (rc)
  5022. goto err_card;
  5023. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5024. ? card->discipline->devtype
  5025. : &qeth_osn_devtype;
  5026. rc = card->discipline->setup(card->gdev);
  5027. if (rc)
  5028. goto err_disc;
  5029. break;
  5030. default:
  5031. gdev->dev.type = &qeth_generic_devtype;
  5032. break;
  5033. }
  5034. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5035. list_add_tail(&card->list, &qeth_core_card_list.list);
  5036. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5037. qeth_determine_capabilities(card);
  5038. return 0;
  5039. err_disc:
  5040. qeth_core_free_discipline(card);
  5041. err_card:
  5042. qeth_core_free_card(card);
  5043. err_dev:
  5044. put_device(dev);
  5045. return rc;
  5046. }
  5047. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5048. {
  5049. unsigned long flags;
  5050. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5051. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5052. if (card->discipline) {
  5053. card->discipline->remove(gdev);
  5054. qeth_core_free_discipline(card);
  5055. }
  5056. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5057. list_del(&card->list);
  5058. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5059. qeth_core_free_card(card);
  5060. dev_set_drvdata(&gdev->dev, NULL);
  5061. put_device(&gdev->dev);
  5062. return;
  5063. }
  5064. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5065. {
  5066. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5067. int rc = 0;
  5068. int def_discipline;
  5069. if (!card->discipline) {
  5070. if (card->info.type == QETH_CARD_TYPE_IQD)
  5071. def_discipline = QETH_DISCIPLINE_LAYER3;
  5072. else
  5073. def_discipline = QETH_DISCIPLINE_LAYER2;
  5074. rc = qeth_core_load_discipline(card, def_discipline);
  5075. if (rc)
  5076. goto err;
  5077. rc = card->discipline->setup(card->gdev);
  5078. if (rc) {
  5079. qeth_core_free_discipline(card);
  5080. goto err;
  5081. }
  5082. }
  5083. rc = card->discipline->set_online(gdev);
  5084. err:
  5085. return rc;
  5086. }
  5087. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5088. {
  5089. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5090. return card->discipline->set_offline(gdev);
  5091. }
  5092. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5093. {
  5094. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5095. if (card->discipline && card->discipline->shutdown)
  5096. card->discipline->shutdown(gdev);
  5097. }
  5098. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  5099. {
  5100. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5101. if (card->discipline && card->discipline->prepare)
  5102. return card->discipline->prepare(gdev);
  5103. return 0;
  5104. }
  5105. static void qeth_core_complete(struct ccwgroup_device *gdev)
  5106. {
  5107. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5108. if (card->discipline && card->discipline->complete)
  5109. card->discipline->complete(gdev);
  5110. }
  5111. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5112. {
  5113. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5114. if (card->discipline && card->discipline->freeze)
  5115. return card->discipline->freeze(gdev);
  5116. return 0;
  5117. }
  5118. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5119. {
  5120. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5121. if (card->discipline && card->discipline->thaw)
  5122. return card->discipline->thaw(gdev);
  5123. return 0;
  5124. }
  5125. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5126. {
  5127. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5128. if (card->discipline && card->discipline->restore)
  5129. return card->discipline->restore(gdev);
  5130. return 0;
  5131. }
  5132. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5133. .driver = {
  5134. .owner = THIS_MODULE,
  5135. .name = "qeth",
  5136. },
  5137. .setup = qeth_core_probe_device,
  5138. .remove = qeth_core_remove_device,
  5139. .set_online = qeth_core_set_online,
  5140. .set_offline = qeth_core_set_offline,
  5141. .shutdown = qeth_core_shutdown,
  5142. .prepare = qeth_core_prepare,
  5143. .complete = qeth_core_complete,
  5144. .freeze = qeth_core_freeze,
  5145. .thaw = qeth_core_thaw,
  5146. .restore = qeth_core_restore,
  5147. };
  5148. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  5149. const char *buf, size_t count)
  5150. {
  5151. int err;
  5152. err = ccwgroup_create_dev(qeth_core_root_dev,
  5153. &qeth_core_ccwgroup_driver, 3, buf);
  5154. return err ? err : count;
  5155. }
  5156. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  5157. static struct attribute *qeth_drv_attrs[] = {
  5158. &driver_attr_group.attr,
  5159. NULL,
  5160. };
  5161. static struct attribute_group qeth_drv_attr_group = {
  5162. .attrs = qeth_drv_attrs,
  5163. };
  5164. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5165. &qeth_drv_attr_group,
  5166. NULL,
  5167. };
  5168. static struct {
  5169. const char str[ETH_GSTRING_LEN];
  5170. } qeth_ethtool_stats_keys[] = {
  5171. /* 0 */{"rx skbs"},
  5172. {"rx buffers"},
  5173. {"tx skbs"},
  5174. {"tx buffers"},
  5175. {"tx skbs no packing"},
  5176. {"tx buffers no packing"},
  5177. {"tx skbs packing"},
  5178. {"tx buffers packing"},
  5179. {"tx sg skbs"},
  5180. {"tx sg frags"},
  5181. /* 10 */{"rx sg skbs"},
  5182. {"rx sg frags"},
  5183. {"rx sg page allocs"},
  5184. {"tx large kbytes"},
  5185. {"tx large count"},
  5186. {"tx pk state ch n->p"},
  5187. {"tx pk state ch p->n"},
  5188. {"tx pk watermark low"},
  5189. {"tx pk watermark high"},
  5190. {"queue 0 buffer usage"},
  5191. /* 20 */{"queue 1 buffer usage"},
  5192. {"queue 2 buffer usage"},
  5193. {"queue 3 buffer usage"},
  5194. {"rx poll time"},
  5195. {"rx poll count"},
  5196. {"rx do_QDIO time"},
  5197. {"rx do_QDIO count"},
  5198. {"tx handler time"},
  5199. {"tx handler count"},
  5200. {"tx time"},
  5201. /* 30 */{"tx count"},
  5202. {"tx do_QDIO time"},
  5203. {"tx do_QDIO count"},
  5204. {"tx csum"},
  5205. {"tx lin"},
  5206. {"tx linfail"},
  5207. {"cq handler count"},
  5208. {"cq handler time"}
  5209. };
  5210. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5211. {
  5212. switch (stringset) {
  5213. case ETH_SS_STATS:
  5214. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5215. default:
  5216. return -EINVAL;
  5217. }
  5218. }
  5219. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5220. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5221. struct ethtool_stats *stats, u64 *data)
  5222. {
  5223. struct qeth_card *card = dev->ml_priv;
  5224. data[0] = card->stats.rx_packets -
  5225. card->perf_stats.initial_rx_packets;
  5226. data[1] = card->perf_stats.bufs_rec;
  5227. data[2] = card->stats.tx_packets -
  5228. card->perf_stats.initial_tx_packets;
  5229. data[3] = card->perf_stats.bufs_sent;
  5230. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5231. - card->perf_stats.skbs_sent_pack;
  5232. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5233. data[6] = card->perf_stats.skbs_sent_pack;
  5234. data[7] = card->perf_stats.bufs_sent_pack;
  5235. data[8] = card->perf_stats.sg_skbs_sent;
  5236. data[9] = card->perf_stats.sg_frags_sent;
  5237. data[10] = card->perf_stats.sg_skbs_rx;
  5238. data[11] = card->perf_stats.sg_frags_rx;
  5239. data[12] = card->perf_stats.sg_alloc_page_rx;
  5240. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5241. data[14] = card->perf_stats.large_send_cnt;
  5242. data[15] = card->perf_stats.sc_dp_p;
  5243. data[16] = card->perf_stats.sc_p_dp;
  5244. data[17] = QETH_LOW_WATERMARK_PACK;
  5245. data[18] = QETH_HIGH_WATERMARK_PACK;
  5246. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5247. data[20] = (card->qdio.no_out_queues > 1) ?
  5248. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5249. data[21] = (card->qdio.no_out_queues > 2) ?
  5250. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5251. data[22] = (card->qdio.no_out_queues > 3) ?
  5252. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5253. data[23] = card->perf_stats.inbound_time;
  5254. data[24] = card->perf_stats.inbound_cnt;
  5255. data[25] = card->perf_stats.inbound_do_qdio_time;
  5256. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5257. data[27] = card->perf_stats.outbound_handler_time;
  5258. data[28] = card->perf_stats.outbound_handler_cnt;
  5259. data[29] = card->perf_stats.outbound_time;
  5260. data[30] = card->perf_stats.outbound_cnt;
  5261. data[31] = card->perf_stats.outbound_do_qdio_time;
  5262. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5263. data[33] = card->perf_stats.tx_csum;
  5264. data[34] = card->perf_stats.tx_lin;
  5265. data[35] = card->perf_stats.tx_linfail;
  5266. data[36] = card->perf_stats.cq_cnt;
  5267. data[37] = card->perf_stats.cq_time;
  5268. }
  5269. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5270. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5271. {
  5272. switch (stringset) {
  5273. case ETH_SS_STATS:
  5274. memcpy(data, &qeth_ethtool_stats_keys,
  5275. sizeof(qeth_ethtool_stats_keys));
  5276. break;
  5277. default:
  5278. WARN_ON(1);
  5279. break;
  5280. }
  5281. }
  5282. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5283. void qeth_core_get_drvinfo(struct net_device *dev,
  5284. struct ethtool_drvinfo *info)
  5285. {
  5286. struct qeth_card *card = dev->ml_priv;
  5287. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5288. sizeof(info->driver));
  5289. strlcpy(info->version, "1.0", sizeof(info->version));
  5290. strlcpy(info->fw_version, card->info.mcl_level,
  5291. sizeof(info->fw_version));
  5292. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5293. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5294. }
  5295. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5296. /* Helper function to fill 'advertizing' and 'supported' which are the same. */
  5297. /* Autoneg and full-duplex are supported and advertized uncondionally. */
  5298. /* Always advertize and support all speeds up to specified, and only one */
  5299. /* specified port type. */
  5300. static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
  5301. int maxspeed, int porttype)
  5302. {
  5303. int port_sup, port_adv, spd_sup, spd_adv;
  5304. switch (porttype) {
  5305. case PORT_TP:
  5306. port_sup = SUPPORTED_TP;
  5307. port_adv = ADVERTISED_TP;
  5308. break;
  5309. case PORT_FIBRE:
  5310. port_sup = SUPPORTED_FIBRE;
  5311. port_adv = ADVERTISED_FIBRE;
  5312. break;
  5313. default:
  5314. port_sup = SUPPORTED_TP;
  5315. port_adv = ADVERTISED_TP;
  5316. WARN_ON_ONCE(1);
  5317. }
  5318. /* "Fallthrough" case'es ordered from high to low result in setting */
  5319. /* flags cumulatively, starting from the specified speed and down to */
  5320. /* the lowest possible. */
  5321. spd_sup = 0;
  5322. spd_adv = 0;
  5323. switch (maxspeed) {
  5324. case SPEED_10000:
  5325. spd_sup |= SUPPORTED_10000baseT_Full;
  5326. spd_adv |= ADVERTISED_10000baseT_Full;
  5327. case SPEED_1000:
  5328. spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
  5329. spd_adv |= ADVERTISED_1000baseT_Half |
  5330. ADVERTISED_1000baseT_Full;
  5331. case SPEED_100:
  5332. spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
  5333. spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
  5334. case SPEED_10:
  5335. spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5336. spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5337. break;
  5338. default:
  5339. spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5340. spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5341. WARN_ON_ONCE(1);
  5342. }
  5343. ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
  5344. ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
  5345. }
  5346. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5347. struct ethtool_cmd *ecmd)
  5348. {
  5349. struct qeth_card *card = netdev->ml_priv;
  5350. enum qeth_link_types link_type;
  5351. struct carrier_info carrier_info;
  5352. int rc;
  5353. u32 speed;
  5354. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5355. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5356. else
  5357. link_type = card->info.link_type;
  5358. ecmd->transceiver = XCVR_INTERNAL;
  5359. ecmd->duplex = DUPLEX_FULL;
  5360. ecmd->autoneg = AUTONEG_ENABLE;
  5361. switch (link_type) {
  5362. case QETH_LINK_TYPE_FAST_ETH:
  5363. case QETH_LINK_TYPE_LANE_ETH100:
  5364. qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
  5365. speed = SPEED_100;
  5366. ecmd->port = PORT_TP;
  5367. break;
  5368. case QETH_LINK_TYPE_GBIT_ETH:
  5369. case QETH_LINK_TYPE_LANE_ETH1000:
  5370. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5371. speed = SPEED_1000;
  5372. ecmd->port = PORT_FIBRE;
  5373. break;
  5374. case QETH_LINK_TYPE_10GBIT_ETH:
  5375. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5376. speed = SPEED_10000;
  5377. ecmd->port = PORT_FIBRE;
  5378. break;
  5379. default:
  5380. qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
  5381. speed = SPEED_10;
  5382. ecmd->port = PORT_TP;
  5383. }
  5384. ethtool_cmd_speed_set(ecmd, speed);
  5385. /* Check if we can obtain more accurate information. */
  5386. /* If QUERY_CARD_INFO command is not supported or fails, */
  5387. /* just return the heuristics that was filled above. */
  5388. if (!qeth_card_hw_is_reachable(card))
  5389. return -ENODEV;
  5390. rc = qeth_query_card_info(card, &carrier_info);
  5391. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5392. return 0;
  5393. if (rc) /* report error from the hardware operation */
  5394. return rc;
  5395. /* on success, fill in the information got from the hardware */
  5396. netdev_dbg(netdev,
  5397. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5398. carrier_info.card_type,
  5399. carrier_info.port_mode,
  5400. carrier_info.port_speed);
  5401. /* Update attributes for which we've obtained more authoritative */
  5402. /* information, leave the rest the way they where filled above. */
  5403. switch (carrier_info.card_type) {
  5404. case CARD_INFO_TYPE_1G_COPPER_A:
  5405. case CARD_INFO_TYPE_1G_COPPER_B:
  5406. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
  5407. ecmd->port = PORT_TP;
  5408. break;
  5409. case CARD_INFO_TYPE_1G_FIBRE_A:
  5410. case CARD_INFO_TYPE_1G_FIBRE_B:
  5411. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5412. ecmd->port = PORT_FIBRE;
  5413. break;
  5414. case CARD_INFO_TYPE_10G_FIBRE_A:
  5415. case CARD_INFO_TYPE_10G_FIBRE_B:
  5416. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5417. ecmd->port = PORT_FIBRE;
  5418. break;
  5419. }
  5420. switch (carrier_info.port_mode) {
  5421. case CARD_INFO_PORTM_FULLDUPLEX:
  5422. ecmd->duplex = DUPLEX_FULL;
  5423. break;
  5424. case CARD_INFO_PORTM_HALFDUPLEX:
  5425. ecmd->duplex = DUPLEX_HALF;
  5426. break;
  5427. }
  5428. switch (carrier_info.port_speed) {
  5429. case CARD_INFO_PORTS_10M:
  5430. speed = SPEED_10;
  5431. break;
  5432. case CARD_INFO_PORTS_100M:
  5433. speed = SPEED_100;
  5434. break;
  5435. case CARD_INFO_PORTS_1G:
  5436. speed = SPEED_1000;
  5437. break;
  5438. case CARD_INFO_PORTS_10G:
  5439. speed = SPEED_10000;
  5440. break;
  5441. }
  5442. ethtool_cmd_speed_set(ecmd, speed);
  5443. return 0;
  5444. }
  5445. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5446. static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
  5447. {
  5448. long rxtx_arg;
  5449. int rc;
  5450. rc = qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_START, 0);
  5451. if (rc) {
  5452. dev_warn(&card->gdev->dev,
  5453. "Starting HW checksumming for %s failed, using SW checksumming\n",
  5454. QETH_CARD_IFNAME(card));
  5455. return rc;
  5456. }
  5457. rxtx_arg = (cstype == IPA_OUTBOUND_CHECKSUM) ? card->info.tx_csum_mask
  5458. : card->info.csum_mask;
  5459. rc = qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_ENABLE,
  5460. rxtx_arg);
  5461. if (rc) {
  5462. dev_warn(&card->gdev->dev,
  5463. "Enabling HW checksumming for %s failed, using SW checksumming\n",
  5464. QETH_CARD_IFNAME(card));
  5465. return rc;
  5466. }
  5467. dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
  5468. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
  5469. return 0;
  5470. }
  5471. static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
  5472. {
  5473. int rc;
  5474. if (on) {
  5475. rc = qeth_send_checksum_on(card, cstype);
  5476. if (rc)
  5477. return -EIO;
  5478. } else {
  5479. rc = qeth_send_simple_setassparms(card, cstype,
  5480. IPA_CMD_ASS_STOP, 0);
  5481. if (rc)
  5482. return -EIO;
  5483. }
  5484. return 0;
  5485. }
  5486. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5487. {
  5488. int rc;
  5489. QETH_CARD_TEXT(card, 3, "sttso");
  5490. if (on) {
  5491. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5492. IPA_CMD_ASS_START, 0);
  5493. if (rc) {
  5494. dev_warn(&card->gdev->dev,
  5495. "Starting outbound TCP segmentation offload for %s failed\n",
  5496. QETH_CARD_IFNAME(card));
  5497. return -EIO;
  5498. }
  5499. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5500. } else {
  5501. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5502. IPA_CMD_ASS_STOP, 0);
  5503. }
  5504. return rc;
  5505. }
  5506. /* try to restore device features on a device after recovery */
  5507. int qeth_recover_features(struct net_device *dev)
  5508. {
  5509. struct qeth_card *card = dev->ml_priv;
  5510. netdev_features_t recover = dev->features;
  5511. if (recover & NETIF_F_IP_CSUM) {
  5512. if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM))
  5513. recover ^= NETIF_F_IP_CSUM;
  5514. }
  5515. if (recover & NETIF_F_RXCSUM) {
  5516. if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM))
  5517. recover ^= NETIF_F_RXCSUM;
  5518. }
  5519. if (recover & NETIF_F_TSO) {
  5520. if (qeth_set_ipa_tso(card, 1))
  5521. recover ^= NETIF_F_TSO;
  5522. }
  5523. if (recover == dev->features)
  5524. return 0;
  5525. dev_warn(&card->gdev->dev,
  5526. "Device recovery failed to restore all offload features\n");
  5527. dev->features = recover;
  5528. return -EIO;
  5529. }
  5530. EXPORT_SYMBOL_GPL(qeth_recover_features);
  5531. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5532. {
  5533. struct qeth_card *card = dev->ml_priv;
  5534. netdev_features_t changed = dev->features ^ features;
  5535. int rc = 0;
  5536. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5537. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5538. if ((changed & NETIF_F_IP_CSUM)) {
  5539. rc = qeth_set_ipa_csum(card,
  5540. features & NETIF_F_IP_CSUM ? 1 : 0,
  5541. IPA_OUTBOUND_CHECKSUM);
  5542. if (rc)
  5543. changed ^= NETIF_F_IP_CSUM;
  5544. }
  5545. if ((changed & NETIF_F_RXCSUM)) {
  5546. rc = qeth_set_ipa_csum(card,
  5547. features & NETIF_F_RXCSUM ? 1 : 0,
  5548. IPA_INBOUND_CHECKSUM);
  5549. if (rc)
  5550. changed ^= NETIF_F_RXCSUM;
  5551. }
  5552. if ((changed & NETIF_F_TSO)) {
  5553. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5554. if (rc)
  5555. changed ^= NETIF_F_TSO;
  5556. }
  5557. /* everything changed successfully? */
  5558. if ((dev->features ^ features) == changed)
  5559. return 0;
  5560. /* something went wrong. save changed features and return error */
  5561. dev->features ^= changed;
  5562. return -EIO;
  5563. }
  5564. EXPORT_SYMBOL_GPL(qeth_set_features);
  5565. netdev_features_t qeth_fix_features(struct net_device *dev,
  5566. netdev_features_t features)
  5567. {
  5568. struct qeth_card *card = dev->ml_priv;
  5569. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5570. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5571. features &= ~NETIF_F_IP_CSUM;
  5572. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5573. features &= ~NETIF_F_RXCSUM;
  5574. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
  5575. features &= ~NETIF_F_TSO;
  5576. dev_info(&card->gdev->dev, "Outbound TSO not supported on %s\n",
  5577. QETH_CARD_IFNAME(card));
  5578. }
  5579. /* if the card isn't up, remove features that require hw changes */
  5580. if (card->state == CARD_STATE_DOWN ||
  5581. card->state == CARD_STATE_RECOVER)
  5582. features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  5583. NETIF_F_TSO);
  5584. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5585. return features;
  5586. }
  5587. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5588. netdev_features_t qeth_features_check(struct sk_buff *skb,
  5589. struct net_device *dev,
  5590. netdev_features_t features)
  5591. {
  5592. /* GSO segmentation builds skbs with
  5593. * a (small) linear part for the headers, and
  5594. * page frags for the data.
  5595. * Compared to a linear skb, the header-only part consumes an
  5596. * additional buffer element. This reduces buffer utilization, and
  5597. * hurts throughput. So compress small segments into one element.
  5598. */
  5599. if (netif_needs_gso(skb, features)) {
  5600. /* match skb_segment(): */
  5601. unsigned int doffset = skb->data - skb_mac_header(skb);
  5602. unsigned int hsize = skb_shinfo(skb)->gso_size;
  5603. unsigned int hroom = skb_headroom(skb);
  5604. /* linearize only if resulting skb allocations are order-0: */
  5605. if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
  5606. features &= ~NETIF_F_SG;
  5607. }
  5608. return vlan_features_check(skb, features);
  5609. }
  5610. EXPORT_SYMBOL_GPL(qeth_features_check);
  5611. static int __init qeth_core_init(void)
  5612. {
  5613. int rc;
  5614. pr_info("loading core functions\n");
  5615. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5616. INIT_LIST_HEAD(&qeth_dbf_list);
  5617. rwlock_init(&qeth_core_card_list.rwlock);
  5618. mutex_init(&qeth_mod_mutex);
  5619. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5620. rc = qeth_register_dbf_views();
  5621. if (rc)
  5622. goto out_err;
  5623. qeth_core_root_dev = root_device_register("qeth");
  5624. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5625. if (rc)
  5626. goto register_err;
  5627. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5628. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5629. if (!qeth_core_header_cache) {
  5630. rc = -ENOMEM;
  5631. goto slab_err;
  5632. }
  5633. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5634. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5635. if (!qeth_qdio_outbuf_cache) {
  5636. rc = -ENOMEM;
  5637. goto cqslab_err;
  5638. }
  5639. rc = ccw_driver_register(&qeth_ccw_driver);
  5640. if (rc)
  5641. goto ccw_err;
  5642. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5643. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5644. if (rc)
  5645. goto ccwgroup_err;
  5646. return 0;
  5647. ccwgroup_err:
  5648. ccw_driver_unregister(&qeth_ccw_driver);
  5649. ccw_err:
  5650. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5651. cqslab_err:
  5652. kmem_cache_destroy(qeth_core_header_cache);
  5653. slab_err:
  5654. root_device_unregister(qeth_core_root_dev);
  5655. register_err:
  5656. qeth_unregister_dbf_views();
  5657. out_err:
  5658. pr_err("Initializing the qeth device driver failed\n");
  5659. return rc;
  5660. }
  5661. static void __exit qeth_core_exit(void)
  5662. {
  5663. qeth_clear_dbf_list();
  5664. destroy_workqueue(qeth_wq);
  5665. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5666. ccw_driver_unregister(&qeth_ccw_driver);
  5667. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5668. kmem_cache_destroy(qeth_core_header_cache);
  5669. root_device_unregister(qeth_core_root_dev);
  5670. qeth_unregister_dbf_views();
  5671. pr_info("core functions removed\n");
  5672. }
  5673. module_init(qeth_core_init);
  5674. module_exit(qeth_core_exit);
  5675. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5676. MODULE_DESCRIPTION("qeth core functions");
  5677. MODULE_LICENSE("GPL");