rtc-wm831x.c 13 KB

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  1. /*
  2. * Real Time Clock driver for Wolfson Microelectronics WM831x
  3. *
  4. * Copyright (C) 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/time.h>
  17. #include <linux/rtc.h>
  18. #include <linux/slab.h>
  19. #include <linux/bcd.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/ioctl.h>
  22. #include <linux/completion.h>
  23. #include <linux/mfd/wm831x/core.h>
  24. #include <linux/delay.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/random.h>
  27. /*
  28. * R16416 (0x4020) - RTC Write Counter
  29. */
  30. #define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */
  31. #define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */
  32. #define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */
  33. /*
  34. * R16417 (0x4021) - RTC Time 1
  35. */
  36. #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
  37. #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
  38. #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
  39. /*
  40. * R16418 (0x4022) - RTC Time 2
  41. */
  42. #define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
  43. #define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
  44. #define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
  45. /*
  46. * R16419 (0x4023) - RTC Alarm 1
  47. */
  48. #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
  49. #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
  50. #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
  51. /*
  52. * R16420 (0x4024) - RTC Alarm 2
  53. */
  54. #define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
  55. #define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
  56. #define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
  57. /*
  58. * R16421 (0x4025) - RTC Control
  59. */
  60. #define WM831X_RTC_VALID 0x8000 /* RTC_VALID */
  61. #define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */
  62. #define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */
  63. #define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */
  64. #define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */
  65. #define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */
  66. #define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */
  67. #define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */
  68. #define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */
  69. #define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */
  70. #define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */
  71. #define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */
  72. #define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */
  73. #define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */
  74. #define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */
  75. /*
  76. * R16422 (0x4026) - RTC Trim
  77. */
  78. #define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */
  79. #define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */
  80. #define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */
  81. #define WM831X_SET_TIME_RETRIES 5
  82. #define WM831X_GET_TIME_RETRIES 5
  83. struct wm831x_rtc {
  84. struct wm831x *wm831x;
  85. struct rtc_device *rtc;
  86. unsigned int alarm_enabled:1;
  87. };
  88. static void wm831x_rtc_add_randomness(struct wm831x *wm831x)
  89. {
  90. int ret;
  91. u16 reg;
  92. /*
  93. * The write counter contains a pseudo-random number which is
  94. * regenerated every time we set the RTC so it should be a
  95. * useful per-system source of entropy.
  96. */
  97. ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);
  98. if (ret >= 0) {
  99. reg = ret;
  100. add_device_randomness(&reg, sizeof(reg));
  101. } else {
  102. dev_warn(wm831x->dev, "Failed to read RTC write counter: %d\n",
  103. ret);
  104. }
  105. }
  106. /*
  107. * Read current time and date in RTC
  108. */
  109. static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
  110. {
  111. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  112. struct wm831x *wm831x = wm831x_rtc->wm831x;
  113. u16 time1[2], time2[2];
  114. int ret;
  115. int count = 0;
  116. /* Has the RTC been programmed? */
  117. ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
  118. if (ret < 0) {
  119. dev_err(dev, "Failed to read RTC control: %d\n", ret);
  120. return ret;
  121. }
  122. if (!(ret & WM831X_RTC_VALID)) {
  123. dev_dbg(dev, "RTC not yet configured\n");
  124. return -EINVAL;
  125. }
  126. /* Read twice to make sure we don't read a corrupt, partially
  127. * incremented, value.
  128. */
  129. do {
  130. ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
  131. 2, time1);
  132. if (ret != 0)
  133. continue;
  134. ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
  135. 2, time2);
  136. if (ret != 0)
  137. continue;
  138. if (memcmp(time1, time2, sizeof(time1)) == 0) {
  139. u32 time = (time1[0] << 16) | time1[1];
  140. rtc_time_to_tm(time, tm);
  141. return rtc_valid_tm(tm);
  142. }
  143. } while (++count < WM831X_GET_TIME_RETRIES);
  144. dev_err(dev, "Timed out reading current time\n");
  145. return -EIO;
  146. }
  147. /*
  148. * Set current time and date in RTC
  149. */
  150. static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time)
  151. {
  152. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  153. struct wm831x *wm831x = wm831x_rtc->wm831x;
  154. struct rtc_time new_tm;
  155. unsigned long new_time;
  156. int ret;
  157. int count = 0;
  158. ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
  159. (time >> 16) & 0xffff);
  160. if (ret < 0) {
  161. dev_err(dev, "Failed to write TIME_1: %d\n", ret);
  162. return ret;
  163. }
  164. ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);
  165. if (ret < 0) {
  166. dev_err(dev, "Failed to write TIME_2: %d\n", ret);
  167. return ret;
  168. }
  169. /* Wait for the update to complete - should happen first time
  170. * round but be conservative.
  171. */
  172. do {
  173. msleep(1);
  174. ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
  175. if (ret < 0)
  176. ret = WM831X_RTC_SYNC_BUSY;
  177. } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
  178. ++count < WM831X_SET_TIME_RETRIES);
  179. if (ret & WM831X_RTC_SYNC_BUSY) {
  180. dev_err(dev, "Timed out writing RTC update\n");
  181. return -EIO;
  182. }
  183. /* Check that the update was accepted; security features may
  184. * have caused the update to be ignored.
  185. */
  186. ret = wm831x_rtc_readtime(dev, &new_tm);
  187. if (ret < 0)
  188. return ret;
  189. ret = rtc_tm_to_time(&new_tm, &new_time);
  190. if (ret < 0) {
  191. dev_err(dev, "Failed to convert time: %d\n", ret);
  192. return ret;
  193. }
  194. /* Allow a second of change in case of tick */
  195. if (new_time - time > 1) {
  196. dev_err(dev, "RTC update not permitted by hardware\n");
  197. return -EPERM;
  198. }
  199. return 0;
  200. }
  201. /*
  202. * Read alarm time and date in RTC
  203. */
  204. static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  205. {
  206. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  207. int ret;
  208. u16 data[2];
  209. u32 time;
  210. ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
  211. 2, data);
  212. if (ret != 0) {
  213. dev_err(dev, "Failed to read alarm time: %d\n", ret);
  214. return ret;
  215. }
  216. time = (data[0] << 16) | data[1];
  217. rtc_time_to_tm(time, &alrm->time);
  218. ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
  219. if (ret < 0) {
  220. dev_err(dev, "Failed to read RTC control: %d\n", ret);
  221. return ret;
  222. }
  223. if (ret & WM831X_RTC_ALM_ENA)
  224. alrm->enabled = 1;
  225. else
  226. alrm->enabled = 0;
  227. return 0;
  228. }
  229. static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
  230. {
  231. wm831x_rtc->alarm_enabled = 0;
  232. return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  233. WM831X_RTC_ALM_ENA, 0);
  234. }
  235. static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
  236. {
  237. wm831x_rtc->alarm_enabled = 1;
  238. return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  239. WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
  240. }
  241. static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  242. {
  243. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  244. struct wm831x *wm831x = wm831x_rtc->wm831x;
  245. int ret;
  246. unsigned long time;
  247. ret = rtc_tm_to_time(&alrm->time, &time);
  248. if (ret < 0) {
  249. dev_err(dev, "Failed to convert time: %d\n", ret);
  250. return ret;
  251. }
  252. ret = wm831x_rtc_stop_alarm(wm831x_rtc);
  253. if (ret < 0) {
  254. dev_err(dev, "Failed to stop alarm: %d\n", ret);
  255. return ret;
  256. }
  257. ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
  258. (time >> 16) & 0xffff);
  259. if (ret < 0) {
  260. dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
  261. return ret;
  262. }
  263. ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff);
  264. if (ret < 0) {
  265. dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
  266. return ret;
  267. }
  268. if (alrm->enabled) {
  269. ret = wm831x_rtc_start_alarm(wm831x_rtc);
  270. if (ret < 0) {
  271. dev_err(dev, "Failed to start alarm: %d\n", ret);
  272. return ret;
  273. }
  274. }
  275. return 0;
  276. }
  277. static int wm831x_rtc_alarm_irq_enable(struct device *dev,
  278. unsigned int enabled)
  279. {
  280. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
  281. if (enabled)
  282. return wm831x_rtc_start_alarm(wm831x_rtc);
  283. else
  284. return wm831x_rtc_stop_alarm(wm831x_rtc);
  285. }
  286. static irqreturn_t wm831x_alm_irq(int irq, void *data)
  287. {
  288. struct wm831x_rtc *wm831x_rtc = data;
  289. rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF);
  290. return IRQ_HANDLED;
  291. }
  292. static const struct rtc_class_ops wm831x_rtc_ops = {
  293. .read_time = wm831x_rtc_readtime,
  294. .set_mmss = wm831x_rtc_set_mmss,
  295. .read_alarm = wm831x_rtc_readalarm,
  296. .set_alarm = wm831x_rtc_setalarm,
  297. .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
  298. };
  299. #ifdef CONFIG_PM
  300. /* Turn off the alarm if it should not be a wake source. */
  301. static int wm831x_rtc_suspend(struct device *dev)
  302. {
  303. struct platform_device *pdev = to_platform_device(dev);
  304. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
  305. int ret, enable;
  306. if (wm831x_rtc->alarm_enabled && device_may_wakeup(&pdev->dev))
  307. enable = WM831X_RTC_ALM_ENA;
  308. else
  309. enable = 0;
  310. ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  311. WM831X_RTC_ALM_ENA, enable);
  312. if (ret != 0)
  313. dev_err(&pdev->dev, "Failed to update RTC alarm: %d\n", ret);
  314. return 0;
  315. }
  316. /* Enable the alarm if it should be enabled (in case it was disabled to
  317. * prevent use as a wake source).
  318. */
  319. static int wm831x_rtc_resume(struct device *dev)
  320. {
  321. struct platform_device *pdev = to_platform_device(dev);
  322. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
  323. int ret;
  324. if (wm831x_rtc->alarm_enabled) {
  325. ret = wm831x_rtc_start_alarm(wm831x_rtc);
  326. if (ret != 0)
  327. dev_err(&pdev->dev,
  328. "Failed to restart RTC alarm: %d\n", ret);
  329. }
  330. return 0;
  331. }
  332. /* Unconditionally disable the alarm */
  333. static int wm831x_rtc_freeze(struct device *dev)
  334. {
  335. struct platform_device *pdev = to_platform_device(dev);
  336. struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
  337. int ret;
  338. ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
  339. WM831X_RTC_ALM_ENA, 0);
  340. if (ret != 0)
  341. dev_err(&pdev->dev, "Failed to stop RTC alarm: %d\n", ret);
  342. return 0;
  343. }
  344. #else
  345. #define wm831x_rtc_suspend NULL
  346. #define wm831x_rtc_resume NULL
  347. #define wm831x_rtc_freeze NULL
  348. #endif
  349. static int wm831x_rtc_probe(struct platform_device *pdev)
  350. {
  351. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  352. struct wm831x_rtc *wm831x_rtc;
  353. int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));
  354. int ret = 0;
  355. wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);
  356. if (wm831x_rtc == NULL)
  357. return -ENOMEM;
  358. platform_set_drvdata(pdev, wm831x_rtc);
  359. wm831x_rtc->wm831x = wm831x;
  360. ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
  361. if (ret < 0) {
  362. dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
  363. goto err;
  364. }
  365. if (ret & WM831X_RTC_ALM_ENA)
  366. wm831x_rtc->alarm_enabled = 1;
  367. device_init_wakeup(&pdev->dev, 1);
  368. wm831x_rtc->rtc = devm_rtc_device_register(&pdev->dev, "wm831x",
  369. &wm831x_rtc_ops, THIS_MODULE);
  370. if (IS_ERR(wm831x_rtc->rtc)) {
  371. ret = PTR_ERR(wm831x_rtc->rtc);
  372. goto err;
  373. }
  374. ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,
  375. wm831x_alm_irq,
  376. IRQF_TRIGGER_RISING, "RTC alarm",
  377. wm831x_rtc);
  378. if (ret != 0) {
  379. dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
  380. alm_irq, ret);
  381. }
  382. wm831x_rtc_add_randomness(wm831x);
  383. return 0;
  384. err:
  385. return ret;
  386. }
  387. static const struct dev_pm_ops wm831x_rtc_pm_ops = {
  388. .suspend = wm831x_rtc_suspend,
  389. .resume = wm831x_rtc_resume,
  390. .freeze = wm831x_rtc_freeze,
  391. .thaw = wm831x_rtc_resume,
  392. .restore = wm831x_rtc_resume,
  393. .poweroff = wm831x_rtc_suspend,
  394. };
  395. static struct platform_driver wm831x_rtc_driver = {
  396. .probe = wm831x_rtc_probe,
  397. .driver = {
  398. .name = "wm831x-rtc",
  399. .pm = &wm831x_rtc_pm_ops,
  400. },
  401. };
  402. module_platform_driver(wm831x_rtc_driver);
  403. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  404. MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
  405. MODULE_LICENSE("GPL");
  406. MODULE_ALIAS("platform:wm831x-rtc");