rtc-tps6586x.c 8.8 KB

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  1. /*
  2. * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
  3. *
  4. * Copyright (c) 2012, NVIDIA Corporation.
  5. *
  6. * Author: Laxman Dewangan <ldewangan@nvidia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2.
  11. *
  12. * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
  13. * whether express or implied; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  20. * 02111-1307, USA
  21. */
  22. #include <linux/device.h>
  23. #include <linux/err.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/mfd/tps6586x.h>
  27. #include <linux/module.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/rtc.h>
  31. #include <linux/slab.h>
  32. #define RTC_CTRL 0xc0
  33. #define POR_RESET_N BIT(7)
  34. #define OSC_SRC_SEL BIT(6)
  35. #define RTC_ENABLE BIT(5) /* enables alarm */
  36. #define RTC_BUF_ENABLE BIT(4) /* 32 KHz buffer enable */
  37. #define PRE_BYPASS BIT(3) /* 0=1KHz or 1=32KHz updates */
  38. #define CL_SEL_MASK (BIT(2)|BIT(1))
  39. #define CL_SEL_POS 1
  40. #define RTC_ALARM1_HI 0xc1
  41. #define RTC_COUNT4 0xc6
  42. /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
  43. #define RTC_COUNT4_DUMMYREAD 0xc5
  44. /*only 14-bits width in second*/
  45. #define ALM1_VALID_RANGE_IN_SEC 0x3FFF
  46. #define TPS6586X_RTC_CL_SEL_1_5PF 0x0
  47. #define TPS6586X_RTC_CL_SEL_6_5PF 0x1
  48. #define TPS6586X_RTC_CL_SEL_7_5PF 0x2
  49. #define TPS6586X_RTC_CL_SEL_12_5PF 0x3
  50. struct tps6586x_rtc {
  51. struct device *dev;
  52. struct rtc_device *rtc;
  53. int irq;
  54. bool irq_en;
  55. unsigned long long epoch_start;
  56. };
  57. static inline struct device *to_tps6586x_dev(struct device *dev)
  58. {
  59. return dev->parent;
  60. }
  61. static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
  62. {
  63. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  64. struct device *tps_dev = to_tps6586x_dev(dev);
  65. unsigned long long ticks = 0;
  66. unsigned long seconds;
  67. u8 buff[6];
  68. int ret;
  69. int i;
  70. ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
  71. if (ret < 0) {
  72. dev_err(dev, "read counter failed with err %d\n", ret);
  73. return ret;
  74. }
  75. for (i = 1; i < sizeof(buff); i++) {
  76. ticks <<= 8;
  77. ticks |= buff[i];
  78. }
  79. seconds = ticks >> 10;
  80. seconds += rtc->epoch_start;
  81. rtc_time_to_tm(seconds, tm);
  82. return rtc_valid_tm(tm);
  83. }
  84. static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
  85. {
  86. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  87. struct device *tps_dev = to_tps6586x_dev(dev);
  88. unsigned long long ticks;
  89. unsigned long seconds;
  90. u8 buff[5];
  91. int ret;
  92. rtc_tm_to_time(tm, &seconds);
  93. if (seconds < rtc->epoch_start) {
  94. dev_err(dev, "requested time unsupported\n");
  95. return -EINVAL;
  96. }
  97. seconds -= rtc->epoch_start;
  98. ticks = (unsigned long long)seconds << 10;
  99. buff[0] = (ticks >> 32) & 0xff;
  100. buff[1] = (ticks >> 24) & 0xff;
  101. buff[2] = (ticks >> 16) & 0xff;
  102. buff[3] = (ticks >> 8) & 0xff;
  103. buff[4] = ticks & 0xff;
  104. /* Disable RTC before changing time */
  105. ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
  106. if (ret < 0) {
  107. dev_err(dev, "failed to clear RTC_ENABLE\n");
  108. return ret;
  109. }
  110. ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
  111. if (ret < 0) {
  112. dev_err(dev, "failed to program new time\n");
  113. return ret;
  114. }
  115. /* Enable RTC */
  116. ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
  117. if (ret < 0) {
  118. dev_err(dev, "failed to set RTC_ENABLE\n");
  119. return ret;
  120. }
  121. return 0;
  122. }
  123. static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
  124. unsigned int enabled)
  125. {
  126. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  127. if (enabled && !rtc->irq_en) {
  128. enable_irq(rtc->irq);
  129. rtc->irq_en = true;
  130. } else if (!enabled && rtc->irq_en) {
  131. disable_irq(rtc->irq);
  132. rtc->irq_en = false;
  133. }
  134. return 0;
  135. }
  136. static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  137. {
  138. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  139. struct device *tps_dev = to_tps6586x_dev(dev);
  140. unsigned long seconds;
  141. unsigned long ticks;
  142. unsigned long rtc_current_time;
  143. unsigned long long rticks = 0;
  144. u8 buff[3];
  145. u8 rbuff[6];
  146. int ret;
  147. int i;
  148. rtc_tm_to_time(&alrm->time, &seconds);
  149. if (alrm->enabled && (seconds < rtc->epoch_start)) {
  150. dev_err(dev, "can't set alarm to requested time\n");
  151. return -EINVAL;
  152. }
  153. ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
  154. if (ret < 0) {
  155. dev_err(dev, "can't set alarm irq, err %d\n", ret);
  156. return ret;
  157. }
  158. seconds -= rtc->epoch_start;
  159. ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
  160. sizeof(rbuff), rbuff);
  161. if (ret < 0) {
  162. dev_err(dev, "read counter failed with err %d\n", ret);
  163. return ret;
  164. }
  165. for (i = 1; i < sizeof(rbuff); i++) {
  166. rticks <<= 8;
  167. rticks |= rbuff[i];
  168. }
  169. rtc_current_time = rticks >> 10;
  170. if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
  171. seconds = rtc_current_time - 1;
  172. ticks = (unsigned long long)seconds << 10;
  173. buff[0] = (ticks >> 16) & 0xff;
  174. buff[1] = (ticks >> 8) & 0xff;
  175. buff[2] = ticks & 0xff;
  176. ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
  177. if (ret)
  178. dev_err(dev, "programming alarm failed with err %d\n", ret);
  179. return ret;
  180. }
  181. static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  182. {
  183. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  184. struct device *tps_dev = to_tps6586x_dev(dev);
  185. unsigned long ticks;
  186. unsigned long seconds;
  187. u8 buff[3];
  188. int ret;
  189. ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
  190. if (ret) {
  191. dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
  192. return ret;
  193. }
  194. ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
  195. seconds = ticks >> 10;
  196. seconds += rtc->epoch_start;
  197. rtc_time_to_tm(seconds, &alrm->time);
  198. return 0;
  199. }
  200. static const struct rtc_class_ops tps6586x_rtc_ops = {
  201. .read_time = tps6586x_rtc_read_time,
  202. .set_time = tps6586x_rtc_set_time,
  203. .set_alarm = tps6586x_rtc_set_alarm,
  204. .read_alarm = tps6586x_rtc_read_alarm,
  205. .alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
  206. };
  207. static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
  208. {
  209. struct tps6586x_rtc *rtc = data;
  210. rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
  211. return IRQ_HANDLED;
  212. }
  213. static int tps6586x_rtc_probe(struct platform_device *pdev)
  214. {
  215. struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
  216. struct tps6586x_rtc *rtc;
  217. int ret;
  218. rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
  219. if (!rtc)
  220. return -ENOMEM;
  221. rtc->dev = &pdev->dev;
  222. rtc->irq = platform_get_irq(pdev, 0);
  223. /* Set epoch start as 00:00:00:01:01:2009 */
  224. rtc->epoch_start = mktime(2009, 1, 1, 0, 0, 0);
  225. /* 1 kHz tick mode, enable tick counting */
  226. ret = tps6586x_update(tps_dev, RTC_CTRL,
  227. RTC_ENABLE | OSC_SRC_SEL |
  228. ((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
  229. RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
  230. if (ret < 0) {
  231. dev_err(&pdev->dev, "unable to start counter\n");
  232. return ret;
  233. }
  234. device_init_wakeup(&pdev->dev, 1);
  235. platform_set_drvdata(pdev, rtc);
  236. rtc->rtc = devm_rtc_device_register(&pdev->dev, dev_name(&pdev->dev),
  237. &tps6586x_rtc_ops, THIS_MODULE);
  238. if (IS_ERR(rtc->rtc)) {
  239. ret = PTR_ERR(rtc->rtc);
  240. dev_err(&pdev->dev, "RTC device register: ret %d\n", ret);
  241. goto fail_rtc_register;
  242. }
  243. ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
  244. tps6586x_rtc_irq,
  245. IRQF_ONESHOT,
  246. dev_name(&pdev->dev), rtc);
  247. if (ret < 0) {
  248. dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
  249. rtc->irq, ret);
  250. goto fail_rtc_register;
  251. }
  252. disable_irq(rtc->irq);
  253. return 0;
  254. fail_rtc_register:
  255. tps6586x_update(tps_dev, RTC_CTRL, 0,
  256. RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
  257. return ret;
  258. };
  259. static int tps6586x_rtc_remove(struct platform_device *pdev)
  260. {
  261. struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
  262. tps6586x_update(tps_dev, RTC_CTRL, 0,
  263. RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
  264. return 0;
  265. }
  266. #ifdef CONFIG_PM_SLEEP
  267. static int tps6586x_rtc_suspend(struct device *dev)
  268. {
  269. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  270. if (device_may_wakeup(dev))
  271. enable_irq_wake(rtc->irq);
  272. return 0;
  273. }
  274. static int tps6586x_rtc_resume(struct device *dev)
  275. {
  276. struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
  277. if (device_may_wakeup(dev))
  278. disable_irq_wake(rtc->irq);
  279. return 0;
  280. }
  281. #endif
  282. static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
  283. tps6586x_rtc_resume);
  284. static struct platform_driver tps6586x_rtc_driver = {
  285. .driver = {
  286. .name = "tps6586x-rtc",
  287. .pm = &tps6586x_pm_ops,
  288. },
  289. .probe = tps6586x_rtc_probe,
  290. .remove = tps6586x_rtc_remove,
  291. };
  292. module_platform_driver(tps6586x_rtc_driver);
  293. MODULE_ALIAS("platform:tps6586x-rtc");
  294. MODULE_DESCRIPTION("TI TPS6586x RTC driver");
  295. MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
  296. MODULE_LICENSE("GPL v2");