rtc-ds1511.c 13 KB

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  1. /*
  2. * An rtc driver for the Dallas DS1511
  3. *
  4. * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  5. * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Real time clock driver for the Dallas 1511 chip, which also
  12. * contains a watchdog timer. There is a tiny amount of code that
  13. * platform code could use to mess with the watchdog device a little
  14. * bit, but not a full watchdog driver.
  15. */
  16. #include <linux/bcd.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/gfp.h>
  20. #include <linux/delay.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <linux/module.h>
  26. enum ds1511reg {
  27. DS1511_SEC = 0x0,
  28. DS1511_MIN = 0x1,
  29. DS1511_HOUR = 0x2,
  30. DS1511_DOW = 0x3,
  31. DS1511_DOM = 0x4,
  32. DS1511_MONTH = 0x5,
  33. DS1511_YEAR = 0x6,
  34. DS1511_CENTURY = 0x7,
  35. DS1511_AM1_SEC = 0x8,
  36. DS1511_AM2_MIN = 0x9,
  37. DS1511_AM3_HOUR = 0xa,
  38. DS1511_AM4_DATE = 0xb,
  39. DS1511_WD_MSEC = 0xc,
  40. DS1511_WD_SEC = 0xd,
  41. DS1511_CONTROL_A = 0xe,
  42. DS1511_CONTROL_B = 0xf,
  43. DS1511_RAMADDR_LSB = 0x10,
  44. DS1511_RAMDATA = 0x13
  45. };
  46. #define DS1511_BLF1 0x80
  47. #define DS1511_BLF2 0x40
  48. #define DS1511_PRS 0x20
  49. #define DS1511_PAB 0x10
  50. #define DS1511_TDF 0x08
  51. #define DS1511_KSF 0x04
  52. #define DS1511_WDF 0x02
  53. #define DS1511_IRQF 0x01
  54. #define DS1511_TE 0x80
  55. #define DS1511_CS 0x40
  56. #define DS1511_BME 0x20
  57. #define DS1511_TPE 0x10
  58. #define DS1511_TIE 0x08
  59. #define DS1511_KIE 0x04
  60. #define DS1511_WDE 0x02
  61. #define DS1511_WDS 0x01
  62. #define DS1511_RAM_MAX 0x100
  63. #define RTC_CMD DS1511_CONTROL_B
  64. #define RTC_CMD1 DS1511_CONTROL_A
  65. #define RTC_ALARM_SEC DS1511_AM1_SEC
  66. #define RTC_ALARM_MIN DS1511_AM2_MIN
  67. #define RTC_ALARM_HOUR DS1511_AM3_HOUR
  68. #define RTC_ALARM_DATE DS1511_AM4_DATE
  69. #define RTC_SEC DS1511_SEC
  70. #define RTC_MIN DS1511_MIN
  71. #define RTC_HOUR DS1511_HOUR
  72. #define RTC_DOW DS1511_DOW
  73. #define RTC_DOM DS1511_DOM
  74. #define RTC_MON DS1511_MONTH
  75. #define RTC_YEAR DS1511_YEAR
  76. #define RTC_CENTURY DS1511_CENTURY
  77. #define RTC_TIE DS1511_TIE
  78. #define RTC_TE DS1511_TE
  79. struct rtc_plat_data {
  80. struct rtc_device *rtc;
  81. void __iomem *ioaddr; /* virtual base address */
  82. int irq;
  83. unsigned int irqen;
  84. int alrm_sec;
  85. int alrm_min;
  86. int alrm_hour;
  87. int alrm_mday;
  88. spinlock_t lock;
  89. };
  90. static DEFINE_SPINLOCK(ds1511_lock);
  91. static __iomem char *ds1511_base;
  92. static u32 reg_spacing = 1;
  93. static noinline void
  94. rtc_write(uint8_t val, uint32_t reg)
  95. {
  96. writeb(val, ds1511_base + (reg * reg_spacing));
  97. }
  98. static inline void
  99. rtc_write_alarm(uint8_t val, enum ds1511reg reg)
  100. {
  101. rtc_write((val | 0x80), reg);
  102. }
  103. static noinline uint8_t
  104. rtc_read(enum ds1511reg reg)
  105. {
  106. return readb(ds1511_base + (reg * reg_spacing));
  107. }
  108. static inline void
  109. rtc_disable_update(void)
  110. {
  111. rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
  112. }
  113. static void
  114. rtc_enable_update(void)
  115. {
  116. rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
  117. }
  118. /*
  119. * #define DS1511_WDOG_RESET_SUPPORT
  120. *
  121. * Uncomment this if you want to use these routines in
  122. * some platform code.
  123. */
  124. #ifdef DS1511_WDOG_RESET_SUPPORT
  125. /*
  126. * just enough code to set the watchdog timer so that it
  127. * will reboot the system
  128. */
  129. void
  130. ds1511_wdog_set(unsigned long deciseconds)
  131. {
  132. /*
  133. * the wdog timer can take 99.99 seconds
  134. */
  135. deciseconds %= 10000;
  136. /*
  137. * set the wdog values in the wdog registers
  138. */
  139. rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
  140. rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
  141. /*
  142. * set wdog enable and wdog 'steering' bit to issue a reset
  143. */
  144. rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
  145. }
  146. void
  147. ds1511_wdog_disable(void)
  148. {
  149. /*
  150. * clear wdog enable and wdog 'steering' bits
  151. */
  152. rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
  153. /*
  154. * clear the wdog counter
  155. */
  156. rtc_write(0, DS1511_WD_MSEC);
  157. rtc_write(0, DS1511_WD_SEC);
  158. }
  159. #endif
  160. /*
  161. * set the rtc chip's idea of the time.
  162. * stupidly, some callers call with year unmolested;
  163. * and some call with year = year - 1900. thanks.
  164. */
  165. static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
  166. {
  167. u8 mon, day, dow, hrs, min, sec, yrs, cen;
  168. unsigned long flags;
  169. /*
  170. * won't have to change this for a while
  171. */
  172. if (rtc_tm->tm_year < 1900)
  173. rtc_tm->tm_year += 1900;
  174. if (rtc_tm->tm_year < 1970)
  175. return -EINVAL;
  176. yrs = rtc_tm->tm_year % 100;
  177. cen = rtc_tm->tm_year / 100;
  178. mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
  179. day = rtc_tm->tm_mday;
  180. dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
  181. hrs = rtc_tm->tm_hour;
  182. min = rtc_tm->tm_min;
  183. sec = rtc_tm->tm_sec;
  184. if ((mon > 12) || (day == 0))
  185. return -EINVAL;
  186. if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
  187. return -EINVAL;
  188. if ((hrs >= 24) || (min >= 60) || (sec >= 60))
  189. return -EINVAL;
  190. /*
  191. * each register is a different number of valid bits
  192. */
  193. sec = bin2bcd(sec) & 0x7f;
  194. min = bin2bcd(min) & 0x7f;
  195. hrs = bin2bcd(hrs) & 0x3f;
  196. day = bin2bcd(day) & 0x3f;
  197. mon = bin2bcd(mon) & 0x1f;
  198. yrs = bin2bcd(yrs) & 0xff;
  199. cen = bin2bcd(cen) & 0xff;
  200. spin_lock_irqsave(&ds1511_lock, flags);
  201. rtc_disable_update();
  202. rtc_write(cen, RTC_CENTURY);
  203. rtc_write(yrs, RTC_YEAR);
  204. rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
  205. rtc_write(day, RTC_DOM);
  206. rtc_write(hrs, RTC_HOUR);
  207. rtc_write(min, RTC_MIN);
  208. rtc_write(sec, RTC_SEC);
  209. rtc_write(dow, RTC_DOW);
  210. rtc_enable_update();
  211. spin_unlock_irqrestore(&ds1511_lock, flags);
  212. return 0;
  213. }
  214. static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
  215. {
  216. unsigned int century;
  217. unsigned long flags;
  218. spin_lock_irqsave(&ds1511_lock, flags);
  219. rtc_disable_update();
  220. rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
  221. rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
  222. rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
  223. rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
  224. rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
  225. rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
  226. rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
  227. century = rtc_read(RTC_CENTURY);
  228. rtc_enable_update();
  229. spin_unlock_irqrestore(&ds1511_lock, flags);
  230. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  231. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  232. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  233. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  234. rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
  235. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  236. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  237. century = bcd2bin(century) * 100;
  238. /*
  239. * Account for differences between how the RTC uses the values
  240. * and how they are defined in a struct rtc_time;
  241. */
  242. century += rtc_tm->tm_year;
  243. rtc_tm->tm_year = century - 1900;
  244. rtc_tm->tm_mon--;
  245. if (rtc_valid_tm(rtc_tm) < 0) {
  246. dev_err(dev, "retrieved date/time is not valid.\n");
  247. rtc_time_to_tm(0, rtc_tm);
  248. }
  249. return 0;
  250. }
  251. /*
  252. * write the alarm register settings
  253. *
  254. * we only have the use to interrupt every second, otherwise
  255. * known as the update interrupt, or the interrupt if the whole
  256. * date/hours/mins/secs matches. the ds1511 has many more
  257. * permutations, but the kernel doesn't.
  258. */
  259. static void
  260. ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
  261. {
  262. unsigned long flags;
  263. spin_lock_irqsave(&pdata->lock, flags);
  264. rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
  265. 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
  266. RTC_ALARM_DATE);
  267. rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
  268. 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
  269. RTC_ALARM_HOUR);
  270. rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
  271. 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
  272. RTC_ALARM_MIN);
  273. rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
  274. 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
  275. RTC_ALARM_SEC);
  276. rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
  277. rtc_read(RTC_CMD1); /* clear interrupts */
  278. spin_unlock_irqrestore(&pdata->lock, flags);
  279. }
  280. static int
  281. ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  282. {
  283. struct platform_device *pdev = to_platform_device(dev);
  284. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  285. if (pdata->irq <= 0)
  286. return -EINVAL;
  287. pdata->alrm_mday = alrm->time.tm_mday;
  288. pdata->alrm_hour = alrm->time.tm_hour;
  289. pdata->alrm_min = alrm->time.tm_min;
  290. pdata->alrm_sec = alrm->time.tm_sec;
  291. if (alrm->enabled)
  292. pdata->irqen |= RTC_AF;
  293. ds1511_rtc_update_alarm(pdata);
  294. return 0;
  295. }
  296. static int
  297. ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  298. {
  299. struct platform_device *pdev = to_platform_device(dev);
  300. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  301. if (pdata->irq <= 0)
  302. return -EINVAL;
  303. alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
  304. alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
  305. alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
  306. alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
  307. alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
  308. return 0;
  309. }
  310. static irqreturn_t
  311. ds1511_interrupt(int irq, void *dev_id)
  312. {
  313. struct platform_device *pdev = dev_id;
  314. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  315. unsigned long events = 0;
  316. spin_lock(&pdata->lock);
  317. /*
  318. * read and clear interrupt
  319. */
  320. if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
  321. events = RTC_IRQF;
  322. if (rtc_read(RTC_ALARM_SEC) & 0x80)
  323. events |= RTC_UF;
  324. else
  325. events |= RTC_AF;
  326. rtc_update_irq(pdata->rtc, 1, events);
  327. }
  328. spin_unlock(&pdata->lock);
  329. return events ? IRQ_HANDLED : IRQ_NONE;
  330. }
  331. static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  332. {
  333. struct platform_device *pdev = to_platform_device(dev);
  334. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  335. if (pdata->irq <= 0)
  336. return -EINVAL;
  337. if (enabled)
  338. pdata->irqen |= RTC_AF;
  339. else
  340. pdata->irqen &= ~RTC_AF;
  341. ds1511_rtc_update_alarm(pdata);
  342. return 0;
  343. }
  344. static const struct rtc_class_ops ds1511_rtc_ops = {
  345. .read_time = ds1511_rtc_read_time,
  346. .set_time = ds1511_rtc_set_time,
  347. .read_alarm = ds1511_rtc_read_alarm,
  348. .set_alarm = ds1511_rtc_set_alarm,
  349. .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
  350. };
  351. static ssize_t
  352. ds1511_nvram_read(struct file *filp, struct kobject *kobj,
  353. struct bin_attribute *ba,
  354. char *buf, loff_t pos, size_t size)
  355. {
  356. ssize_t count;
  357. rtc_write(pos, DS1511_RAMADDR_LSB);
  358. for (count = 0; count < size; count++)
  359. *buf++ = rtc_read(DS1511_RAMDATA);
  360. return count;
  361. }
  362. static ssize_t
  363. ds1511_nvram_write(struct file *filp, struct kobject *kobj,
  364. struct bin_attribute *bin_attr,
  365. char *buf, loff_t pos, size_t size)
  366. {
  367. ssize_t count;
  368. rtc_write(pos, DS1511_RAMADDR_LSB);
  369. for (count = 0; count < size; count++)
  370. rtc_write(*buf++, DS1511_RAMDATA);
  371. return count;
  372. }
  373. static struct bin_attribute ds1511_nvram_attr = {
  374. .attr = {
  375. .name = "nvram",
  376. .mode = S_IRUGO | S_IWUSR,
  377. },
  378. .size = DS1511_RAM_MAX,
  379. .read = ds1511_nvram_read,
  380. .write = ds1511_nvram_write,
  381. };
  382. static int ds1511_rtc_probe(struct platform_device *pdev)
  383. {
  384. struct resource *res;
  385. struct rtc_plat_data *pdata;
  386. int ret = 0;
  387. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  388. if (!pdata)
  389. return -ENOMEM;
  390. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  391. ds1511_base = devm_ioremap_resource(&pdev->dev, res);
  392. if (IS_ERR(ds1511_base))
  393. return PTR_ERR(ds1511_base);
  394. pdata->ioaddr = ds1511_base;
  395. pdata->irq = platform_get_irq(pdev, 0);
  396. /*
  397. * turn on the clock and the crystal, etc.
  398. */
  399. rtc_write(DS1511_BME, RTC_CMD);
  400. rtc_write(0, RTC_CMD1);
  401. /*
  402. * clear the wdog counter
  403. */
  404. rtc_write(0, DS1511_WD_MSEC);
  405. rtc_write(0, DS1511_WD_SEC);
  406. /*
  407. * start the clock
  408. */
  409. rtc_enable_update();
  410. /*
  411. * check for a dying bat-tree
  412. */
  413. if (rtc_read(RTC_CMD1) & DS1511_BLF1)
  414. dev_warn(&pdev->dev, "voltage-low detected.\n");
  415. spin_lock_init(&pdata->lock);
  416. platform_set_drvdata(pdev, pdata);
  417. pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  418. &ds1511_rtc_ops, THIS_MODULE);
  419. if (IS_ERR(pdata->rtc))
  420. return PTR_ERR(pdata->rtc);
  421. /*
  422. * if the platform has an interrupt in mind for this device,
  423. * then by all means, set it
  424. */
  425. if (pdata->irq > 0) {
  426. rtc_read(RTC_CMD1);
  427. if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
  428. IRQF_SHARED, pdev->name, pdev) < 0) {
  429. dev_warn(&pdev->dev, "interrupt not available.\n");
  430. pdata->irq = 0;
  431. }
  432. }
  433. ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  434. if (ret)
  435. dev_err(&pdev->dev, "Unable to create sysfs entry: %s\n",
  436. ds1511_nvram_attr.attr.name);
  437. return 0;
  438. }
  439. static int ds1511_rtc_remove(struct platform_device *pdev)
  440. {
  441. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  442. sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  443. if (pdata->irq > 0) {
  444. /*
  445. * disable the alarm interrupt
  446. */
  447. rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
  448. rtc_read(RTC_CMD1);
  449. }
  450. return 0;
  451. }
  452. /* work with hotplug and coldplug */
  453. MODULE_ALIAS("platform:ds1511");
  454. static struct platform_driver ds1511_rtc_driver = {
  455. .probe = ds1511_rtc_probe,
  456. .remove = ds1511_rtc_remove,
  457. .driver = {
  458. .name = "ds1511",
  459. },
  460. };
  461. module_platform_driver(ds1511_rtc_driver);
  462. MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
  463. MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
  464. MODULE_LICENSE("GPL");