rtc-ds1343.c 16 KB

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  1. /* rtc-ds1343.c
  2. *
  3. * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
  4. * Real Time Clock
  5. *
  6. * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
  7. * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/regmap.h>
  20. #include <linux/rtc.h>
  21. #include <linux/bcd.h>
  22. #include <linux/pm.h>
  23. #include <linux/pm_wakeirq.h>
  24. #include <linux/slab.h>
  25. #define DALLAS_MAXIM_DS1343 0
  26. #define DALLAS_MAXIM_DS1344 1
  27. /* RTC DS1343 Registers */
  28. #define DS1343_SECONDS_REG 0x00
  29. #define DS1343_MINUTES_REG 0x01
  30. #define DS1343_HOURS_REG 0x02
  31. #define DS1343_DAY_REG 0x03
  32. #define DS1343_DATE_REG 0x04
  33. #define DS1343_MONTH_REG 0x05
  34. #define DS1343_YEAR_REG 0x06
  35. #define DS1343_ALM0_SEC_REG 0x07
  36. #define DS1343_ALM0_MIN_REG 0x08
  37. #define DS1343_ALM0_HOUR_REG 0x09
  38. #define DS1343_ALM0_DAY_REG 0x0A
  39. #define DS1343_ALM1_SEC_REG 0x0B
  40. #define DS1343_ALM1_MIN_REG 0x0C
  41. #define DS1343_ALM1_HOUR_REG 0x0D
  42. #define DS1343_ALM1_DAY_REG 0x0E
  43. #define DS1343_CONTROL_REG 0x0F
  44. #define DS1343_STATUS_REG 0x10
  45. #define DS1343_TRICKLE_REG 0x11
  46. #define DS1343_NVRAM 0x20
  47. #define DS1343_NVRAM_LEN 96
  48. /* DS1343 Control Registers bits */
  49. #define DS1343_EOSC 0x80
  50. #define DS1343_DOSF 0x20
  51. #define DS1343_EGFIL 0x10
  52. #define DS1343_SQW 0x08
  53. #define DS1343_INTCN 0x04
  54. #define DS1343_A1IE 0x02
  55. #define DS1343_A0IE 0x01
  56. /* DS1343 Status Registers bits */
  57. #define DS1343_OSF 0x80
  58. #define DS1343_IRQF1 0x02
  59. #define DS1343_IRQF0 0x01
  60. /* DS1343 Trickle Charger Registers bits */
  61. #define DS1343_TRICKLE_MAGIC 0xa0
  62. #define DS1343_TRICKLE_DS1 0x08
  63. #define DS1343_TRICKLE_1K 0x01
  64. #define DS1343_TRICKLE_2K 0x02
  65. #define DS1343_TRICKLE_4K 0x03
  66. static const struct spi_device_id ds1343_id[] = {
  67. { "ds1343", DALLAS_MAXIM_DS1343 },
  68. { "ds1344", DALLAS_MAXIM_DS1344 },
  69. { }
  70. };
  71. MODULE_DEVICE_TABLE(spi, ds1343_id);
  72. struct ds1343_priv {
  73. struct spi_device *spi;
  74. struct rtc_device *rtc;
  75. struct regmap *map;
  76. struct mutex mutex;
  77. unsigned int irqen;
  78. int irq;
  79. int alarm_sec;
  80. int alarm_min;
  81. int alarm_hour;
  82. int alarm_mday;
  83. };
  84. static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  85. {
  86. switch (cmd) {
  87. #ifdef RTC_SET_CHARGE
  88. case RTC_SET_CHARGE:
  89. {
  90. int val;
  91. if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
  92. return -EFAULT;
  93. return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
  94. }
  95. break;
  96. #endif
  97. }
  98. return -ENOIOCTLCMD;
  99. }
  100. static ssize_t ds1343_show_glitchfilter(struct device *dev,
  101. struct device_attribute *attr, char *buf)
  102. {
  103. struct ds1343_priv *priv = dev_get_drvdata(dev);
  104. int glitch_filt_status, data;
  105. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  106. glitch_filt_status = !!(data & DS1343_EGFIL);
  107. if (glitch_filt_status)
  108. return sprintf(buf, "enabled\n");
  109. else
  110. return sprintf(buf, "disabled\n");
  111. }
  112. static ssize_t ds1343_store_glitchfilter(struct device *dev,
  113. struct device_attribute *attr,
  114. const char *buf, size_t count)
  115. {
  116. struct ds1343_priv *priv = dev_get_drvdata(dev);
  117. int data;
  118. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  119. if (strncmp(buf, "enabled", 7) == 0)
  120. data |= DS1343_EGFIL;
  121. else if (strncmp(buf, "disabled", 8) == 0)
  122. data &= ~(DS1343_EGFIL);
  123. else
  124. return -EINVAL;
  125. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  126. return count;
  127. }
  128. static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
  129. ds1343_store_glitchfilter);
  130. static ssize_t ds1343_nvram_write(struct file *filp, struct kobject *kobj,
  131. struct bin_attribute *attr,
  132. char *buf, loff_t off, size_t count)
  133. {
  134. int ret;
  135. unsigned char address;
  136. struct device *dev = kobj_to_dev(kobj);
  137. struct ds1343_priv *priv = dev_get_drvdata(dev);
  138. address = DS1343_NVRAM + off;
  139. ret = regmap_bulk_write(priv->map, address, buf, count);
  140. if (ret < 0)
  141. dev_err(&priv->spi->dev, "Error in nvram write %d", ret);
  142. return (ret < 0) ? ret : count;
  143. }
  144. static ssize_t ds1343_nvram_read(struct file *filp, struct kobject *kobj,
  145. struct bin_attribute *attr,
  146. char *buf, loff_t off, size_t count)
  147. {
  148. int ret;
  149. unsigned char address;
  150. struct device *dev = kobj_to_dev(kobj);
  151. struct ds1343_priv *priv = dev_get_drvdata(dev);
  152. address = DS1343_NVRAM + off;
  153. ret = regmap_bulk_read(priv->map, address, buf, count);
  154. if (ret < 0)
  155. dev_err(&priv->spi->dev, "Error in nvram read %d\n", ret);
  156. return (ret < 0) ? ret : count;
  157. }
  158. static struct bin_attribute nvram_attr = {
  159. .attr.name = "nvram",
  160. .attr.mode = S_IRUGO | S_IWUSR,
  161. .read = ds1343_nvram_read,
  162. .write = ds1343_nvram_write,
  163. .size = DS1343_NVRAM_LEN,
  164. };
  165. static ssize_t ds1343_show_alarmstatus(struct device *dev,
  166. struct device_attribute *attr, char *buf)
  167. {
  168. struct ds1343_priv *priv = dev_get_drvdata(dev);
  169. int alarmstatus, data;
  170. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  171. alarmstatus = !!(data & DS1343_A0IE);
  172. if (alarmstatus)
  173. return sprintf(buf, "enabled\n");
  174. else
  175. return sprintf(buf, "disabled\n");
  176. }
  177. static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL);
  178. static ssize_t ds1343_show_alarmmode(struct device *dev,
  179. struct device_attribute *attr, char *buf)
  180. {
  181. struct ds1343_priv *priv = dev_get_drvdata(dev);
  182. int alarm_mode, data;
  183. char *alarm_str;
  184. regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data);
  185. alarm_mode = (data & 0x80) >> 4;
  186. regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data);
  187. alarm_mode |= (data & 0x80) >> 5;
  188. regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data);
  189. alarm_mode |= (data & 0x80) >> 6;
  190. regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data);
  191. alarm_mode |= (data & 0x80) >> 7;
  192. switch (alarm_mode) {
  193. case 15:
  194. alarm_str = "each second";
  195. break;
  196. case 7:
  197. alarm_str = "seconds match";
  198. break;
  199. case 3:
  200. alarm_str = "minutes and seconds match";
  201. break;
  202. case 1:
  203. alarm_str = "hours, minutes and seconds match";
  204. break;
  205. case 0:
  206. alarm_str = "day, hours, minutes and seconds match";
  207. break;
  208. default:
  209. alarm_str = "invalid";
  210. break;
  211. }
  212. return sprintf(buf, "%s\n", alarm_str);
  213. }
  214. static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL);
  215. static ssize_t ds1343_show_tricklecharger(struct device *dev,
  216. struct device_attribute *attr, char *buf)
  217. {
  218. struct ds1343_priv *priv = dev_get_drvdata(dev);
  219. int data;
  220. char *diodes = "disabled", *resistors = " ";
  221. regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
  222. if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
  223. switch (data & 0x0c) {
  224. case DS1343_TRICKLE_DS1:
  225. diodes = "one diode,";
  226. break;
  227. default:
  228. diodes = "no diode,";
  229. break;
  230. }
  231. switch (data & 0x03) {
  232. case DS1343_TRICKLE_1K:
  233. resistors = "1k Ohm";
  234. break;
  235. case DS1343_TRICKLE_2K:
  236. resistors = "2k Ohm";
  237. break;
  238. case DS1343_TRICKLE_4K:
  239. resistors = "4k Ohm";
  240. break;
  241. default:
  242. diodes = "disabled";
  243. break;
  244. }
  245. }
  246. return sprintf(buf, "%s %s\n", diodes, resistors);
  247. }
  248. static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
  249. static int ds1343_sysfs_register(struct device *dev)
  250. {
  251. struct ds1343_priv *priv = dev_get_drvdata(dev);
  252. int err;
  253. err = device_create_file(dev, &dev_attr_glitch_filter);
  254. if (err)
  255. return err;
  256. err = device_create_file(dev, &dev_attr_trickle_charger);
  257. if (err)
  258. goto error1;
  259. err = device_create_bin_file(dev, &nvram_attr);
  260. if (err)
  261. goto error2;
  262. if (priv->irq <= 0)
  263. return err;
  264. err = device_create_file(dev, &dev_attr_alarm_mode);
  265. if (err)
  266. goto error3;
  267. err = device_create_file(dev, &dev_attr_alarm_status);
  268. if (!err)
  269. return err;
  270. device_remove_file(dev, &dev_attr_alarm_mode);
  271. error3:
  272. device_remove_bin_file(dev, &nvram_attr);
  273. error2:
  274. device_remove_file(dev, &dev_attr_trickle_charger);
  275. error1:
  276. device_remove_file(dev, &dev_attr_glitch_filter);
  277. return err;
  278. }
  279. static void ds1343_sysfs_unregister(struct device *dev)
  280. {
  281. struct ds1343_priv *priv = dev_get_drvdata(dev);
  282. device_remove_file(dev, &dev_attr_glitch_filter);
  283. device_remove_file(dev, &dev_attr_trickle_charger);
  284. device_remove_bin_file(dev, &nvram_attr);
  285. if (priv->irq <= 0)
  286. return;
  287. device_remove_file(dev, &dev_attr_alarm_status);
  288. device_remove_file(dev, &dev_attr_alarm_mode);
  289. }
  290. static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
  291. {
  292. struct ds1343_priv *priv = dev_get_drvdata(dev);
  293. unsigned char buf[7];
  294. int res;
  295. res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
  296. if (res)
  297. return res;
  298. dt->tm_sec = bcd2bin(buf[0]);
  299. dt->tm_min = bcd2bin(buf[1]);
  300. dt->tm_hour = bcd2bin(buf[2] & 0x3F);
  301. dt->tm_wday = bcd2bin(buf[3]) - 1;
  302. dt->tm_mday = bcd2bin(buf[4]);
  303. dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
  304. dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
  305. return rtc_valid_tm(dt);
  306. }
  307. static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
  308. {
  309. struct ds1343_priv *priv = dev_get_drvdata(dev);
  310. int res;
  311. res = regmap_write(priv->map, DS1343_SECONDS_REG,
  312. bin2bcd(dt->tm_sec));
  313. if (res)
  314. return res;
  315. res = regmap_write(priv->map, DS1343_MINUTES_REG,
  316. bin2bcd(dt->tm_min));
  317. if (res)
  318. return res;
  319. res = regmap_write(priv->map, DS1343_HOURS_REG,
  320. bin2bcd(dt->tm_hour) & 0x3F);
  321. if (res)
  322. return res;
  323. res = regmap_write(priv->map, DS1343_DAY_REG,
  324. bin2bcd(dt->tm_wday + 1));
  325. if (res)
  326. return res;
  327. res = regmap_write(priv->map, DS1343_DATE_REG,
  328. bin2bcd(dt->tm_mday));
  329. if (res)
  330. return res;
  331. res = regmap_write(priv->map, DS1343_MONTH_REG,
  332. bin2bcd(dt->tm_mon + 1));
  333. if (res)
  334. return res;
  335. dt->tm_year %= 100;
  336. res = regmap_write(priv->map, DS1343_YEAR_REG,
  337. bin2bcd(dt->tm_year));
  338. if (res)
  339. return res;
  340. return 0;
  341. }
  342. static int ds1343_update_alarm(struct device *dev)
  343. {
  344. struct ds1343_priv *priv = dev_get_drvdata(dev);
  345. unsigned int control, stat;
  346. unsigned char buf[4];
  347. int res = 0;
  348. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  349. if (res)
  350. return res;
  351. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  352. if (res)
  353. return res;
  354. control &= ~(DS1343_A0IE);
  355. stat &= ~(DS1343_IRQF0);
  356. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  357. if (res)
  358. return res;
  359. res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
  360. if (res)
  361. return res;
  362. buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
  363. 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
  364. buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
  365. 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
  366. buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
  367. 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
  368. buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
  369. 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
  370. res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
  371. if (res)
  372. return res;
  373. if (priv->irqen) {
  374. control |= DS1343_A0IE;
  375. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  376. }
  377. return res;
  378. }
  379. static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  380. {
  381. struct ds1343_priv *priv = dev_get_drvdata(dev);
  382. int res = 0;
  383. unsigned int stat;
  384. if (priv->irq <= 0)
  385. return -EINVAL;
  386. mutex_lock(&priv->mutex);
  387. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  388. if (res)
  389. goto out;
  390. alarm->enabled = !!(priv->irqen & RTC_AF);
  391. alarm->pending = !!(stat & DS1343_IRQF0);
  392. alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
  393. alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
  394. alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
  395. alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
  396. out:
  397. mutex_unlock(&priv->mutex);
  398. return res;
  399. }
  400. static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  401. {
  402. struct ds1343_priv *priv = dev_get_drvdata(dev);
  403. int res = 0;
  404. if (priv->irq <= 0)
  405. return -EINVAL;
  406. mutex_lock(&priv->mutex);
  407. priv->alarm_sec = alarm->time.tm_sec;
  408. priv->alarm_min = alarm->time.tm_min;
  409. priv->alarm_hour = alarm->time.tm_hour;
  410. priv->alarm_mday = alarm->time.tm_mday;
  411. if (alarm->enabled)
  412. priv->irqen |= RTC_AF;
  413. res = ds1343_update_alarm(dev);
  414. mutex_unlock(&priv->mutex);
  415. return res;
  416. }
  417. static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
  418. {
  419. struct ds1343_priv *priv = dev_get_drvdata(dev);
  420. int res = 0;
  421. if (priv->irq <= 0)
  422. return -EINVAL;
  423. mutex_lock(&priv->mutex);
  424. if (enabled)
  425. priv->irqen |= RTC_AF;
  426. else
  427. priv->irqen &= ~RTC_AF;
  428. res = ds1343_update_alarm(dev);
  429. mutex_unlock(&priv->mutex);
  430. return res;
  431. }
  432. static irqreturn_t ds1343_thread(int irq, void *dev_id)
  433. {
  434. struct ds1343_priv *priv = dev_id;
  435. unsigned int stat, control;
  436. int res = 0;
  437. mutex_lock(&priv->mutex);
  438. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  439. if (res)
  440. goto out;
  441. if (stat & DS1343_IRQF0) {
  442. stat &= ~DS1343_IRQF0;
  443. regmap_write(priv->map, DS1343_STATUS_REG, stat);
  444. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  445. if (res)
  446. goto out;
  447. control &= ~DS1343_A0IE;
  448. regmap_write(priv->map, DS1343_CONTROL_REG, control);
  449. rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
  450. }
  451. out:
  452. mutex_unlock(&priv->mutex);
  453. return IRQ_HANDLED;
  454. }
  455. static const struct rtc_class_ops ds1343_rtc_ops = {
  456. .ioctl = ds1343_ioctl,
  457. .read_time = ds1343_read_time,
  458. .set_time = ds1343_set_time,
  459. .read_alarm = ds1343_read_alarm,
  460. .set_alarm = ds1343_set_alarm,
  461. .alarm_irq_enable = ds1343_alarm_irq_enable,
  462. };
  463. static int ds1343_probe(struct spi_device *spi)
  464. {
  465. struct ds1343_priv *priv;
  466. struct regmap_config config;
  467. unsigned int data;
  468. int res;
  469. memset(&config, 0, sizeof(config));
  470. config.reg_bits = 8;
  471. config.val_bits = 8;
  472. config.write_flag_mask = 0x80;
  473. priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
  474. if (!priv)
  475. return -ENOMEM;
  476. priv->spi = spi;
  477. mutex_init(&priv->mutex);
  478. /* RTC DS1347 works in spi mode 3 and
  479. * its chip select is active high
  480. */
  481. spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
  482. spi->bits_per_word = 8;
  483. res = spi_setup(spi);
  484. if (res)
  485. return res;
  486. spi_set_drvdata(spi, priv);
  487. priv->map = devm_regmap_init_spi(spi, &config);
  488. if (IS_ERR(priv->map)) {
  489. dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
  490. return PTR_ERR(priv->map);
  491. }
  492. res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
  493. if (res)
  494. return res;
  495. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  496. data |= DS1343_INTCN;
  497. data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
  498. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  499. regmap_read(priv->map, DS1343_STATUS_REG, &data);
  500. data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
  501. regmap_write(priv->map, DS1343_STATUS_REG, data);
  502. priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343",
  503. &ds1343_rtc_ops, THIS_MODULE);
  504. if (IS_ERR(priv->rtc)) {
  505. dev_err(&spi->dev, "unable to register rtc ds1343\n");
  506. return PTR_ERR(priv->rtc);
  507. }
  508. priv->irq = spi->irq;
  509. if (priv->irq >= 0) {
  510. res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
  511. ds1343_thread, IRQF_ONESHOT,
  512. "ds1343", priv);
  513. if (res) {
  514. priv->irq = -1;
  515. dev_err(&spi->dev,
  516. "unable to request irq for rtc ds1343\n");
  517. } else {
  518. device_init_wakeup(&spi->dev, true);
  519. dev_pm_set_wake_irq(&spi->dev, spi->irq);
  520. }
  521. }
  522. res = ds1343_sysfs_register(&spi->dev);
  523. if (res)
  524. dev_err(&spi->dev,
  525. "unable to create sysfs entries for rtc ds1343\n");
  526. return 0;
  527. }
  528. static int ds1343_remove(struct spi_device *spi)
  529. {
  530. struct ds1343_priv *priv = spi_get_drvdata(spi);
  531. if (spi->irq) {
  532. mutex_lock(&priv->mutex);
  533. priv->irqen &= ~RTC_AF;
  534. mutex_unlock(&priv->mutex);
  535. dev_pm_clear_wake_irq(&spi->dev);
  536. device_init_wakeup(&spi->dev, false);
  537. devm_free_irq(&spi->dev, spi->irq, priv);
  538. }
  539. spi_set_drvdata(spi, NULL);
  540. ds1343_sysfs_unregister(&spi->dev);
  541. return 0;
  542. }
  543. #ifdef CONFIG_PM_SLEEP
  544. static int ds1343_suspend(struct device *dev)
  545. {
  546. struct spi_device *spi = to_spi_device(dev);
  547. if (spi->irq >= 0 && device_may_wakeup(dev))
  548. enable_irq_wake(spi->irq);
  549. return 0;
  550. }
  551. static int ds1343_resume(struct device *dev)
  552. {
  553. struct spi_device *spi = to_spi_device(dev);
  554. if (spi->irq >= 0 && device_may_wakeup(dev))
  555. disable_irq_wake(spi->irq);
  556. return 0;
  557. }
  558. #endif
  559. static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
  560. static struct spi_driver ds1343_driver = {
  561. .driver = {
  562. .name = "ds1343",
  563. .pm = &ds1343_pm,
  564. },
  565. .probe = ds1343_probe,
  566. .remove = ds1343_remove,
  567. .id_table = ds1343_id,
  568. };
  569. module_spi_driver(ds1343_driver);
  570. MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
  571. MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
  572. "Ankur Srivastava <sankurece@gmail.com>");
  573. MODULE_LICENSE("GPL v2");