rtc-ds1302.c 5.9 KB

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  1. /*
  2. * Dallas DS1302 RTC Support
  3. *
  4. * Copyright (C) 2002 David McCullough
  5. * Copyright (C) 2003 - 2007 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License version 2. See the file "COPYING" in the main directory of
  9. * this archive for more details.
  10. */
  11. #include <linux/bcd.h>
  12. #include <linux/init.h>
  13. #include <linux/io.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/rtc.h>
  18. #include <linux/spi/spi.h>
  19. #define DRV_NAME "rtc-ds1302"
  20. #define RTC_CMD_READ 0x81 /* Read command */
  21. #define RTC_CMD_WRITE 0x80 /* Write command */
  22. #define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
  23. #define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
  24. #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
  25. #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
  26. #define RTC_CLCK_BURST 0x1F /* Address of clock burst */
  27. #define RTC_CLCK_LEN 0x08 /* Size of clock burst */
  28. #define RTC_ADDR_CTRL 0x07 /* Address of control register */
  29. #define RTC_ADDR_YEAR 0x06 /* Address of year register */
  30. #define RTC_ADDR_DAY 0x05 /* Address of day of week register */
  31. #define RTC_ADDR_MON 0x04 /* Address of month register */
  32. #define RTC_ADDR_DATE 0x03 /* Address of day of month register */
  33. #define RTC_ADDR_HOUR 0x02 /* Address of hour register */
  34. #define RTC_ADDR_MIN 0x01 /* Address of minute register */
  35. #define RTC_ADDR_SEC 0x00 /* Address of second register */
  36. static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
  37. {
  38. struct spi_device *spi = dev_get_drvdata(dev);
  39. u8 buf[1 + RTC_CLCK_LEN];
  40. u8 *bp = buf;
  41. int status;
  42. /* Enable writing */
  43. bp = buf;
  44. *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
  45. *bp++ = RTC_CMD_WRITE_ENABLE;
  46. status = spi_write_then_read(spi, buf, 2,
  47. NULL, 0);
  48. if (status)
  49. return status;
  50. /* Write registers starting at the first time/date address. */
  51. bp = buf;
  52. *bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;
  53. *bp++ = bin2bcd(time->tm_sec);
  54. *bp++ = bin2bcd(time->tm_min);
  55. *bp++ = bin2bcd(time->tm_hour);
  56. *bp++ = bin2bcd(time->tm_mday);
  57. *bp++ = bin2bcd(time->tm_mon + 1);
  58. *bp++ = time->tm_wday + 1;
  59. *bp++ = bin2bcd(time->tm_year % 100);
  60. *bp++ = RTC_CMD_WRITE_DISABLE;
  61. /* use write-then-read since dma from stack is nonportable */
  62. return spi_write_then_read(spi, buf, sizeof(buf),
  63. NULL, 0);
  64. }
  65. static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
  66. {
  67. struct spi_device *spi = dev_get_drvdata(dev);
  68. u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
  69. u8 buf[RTC_CLCK_LEN - 1];
  70. int status;
  71. /* Use write-then-read to get all the date/time registers
  72. * since dma from stack is nonportable
  73. */
  74. status = spi_write_then_read(spi, &addr, sizeof(addr),
  75. buf, sizeof(buf));
  76. if (status < 0)
  77. return status;
  78. /* Decode the registers */
  79. time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
  80. time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
  81. time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
  82. time->tm_wday = buf[RTC_ADDR_DAY] - 1;
  83. time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
  84. time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
  85. time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
  86. /* Time may not be set */
  87. return rtc_valid_tm(time);
  88. }
  89. static const struct rtc_class_ops ds1302_rtc_ops = {
  90. .read_time = ds1302_rtc_get_time,
  91. .set_time = ds1302_rtc_set_time,
  92. };
  93. static int ds1302_probe(struct spi_device *spi)
  94. {
  95. struct rtc_device *rtc;
  96. u8 addr;
  97. u8 buf[4];
  98. u8 *bp = buf;
  99. int status;
  100. /* Sanity check board setup data. This may be hooked up
  101. * in 3wire mode, but we don't care. Note that unless
  102. * there's an inverter in place, this needs SPI_CS_HIGH!
  103. */
  104. if (spi->bits_per_word && (spi->bits_per_word != 8)) {
  105. dev_err(&spi->dev, "bad word length\n");
  106. return -EINVAL;
  107. } else if (spi->max_speed_hz > 2000000) {
  108. dev_err(&spi->dev, "speed is too high\n");
  109. return -EINVAL;
  110. } else if (spi->mode & SPI_CPHA) {
  111. dev_err(&spi->dev, "bad mode\n");
  112. return -EINVAL;
  113. }
  114. addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
  115. status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
  116. if (status < 0) {
  117. dev_err(&spi->dev, "control register read error %d\n",
  118. status);
  119. return status;
  120. }
  121. if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
  122. status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
  123. if (status < 0) {
  124. dev_err(&spi->dev, "control register read error %d\n",
  125. status);
  126. return status;
  127. }
  128. if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
  129. dev_err(&spi->dev, "junk in control register\n");
  130. return -ENODEV;
  131. }
  132. }
  133. if (buf[0] == 0) {
  134. bp = buf;
  135. *bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
  136. *bp++ = RTC_CMD_WRITE_DISABLE;
  137. status = spi_write_then_read(spi, buf, 2, NULL, 0);
  138. if (status < 0) {
  139. dev_err(&spi->dev, "control register write error %d\n",
  140. status);
  141. return status;
  142. }
  143. addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
  144. status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
  145. if (status < 0) {
  146. dev_err(&spi->dev,
  147. "error %d reading control register\n",
  148. status);
  149. return status;
  150. }
  151. if (buf[0] != RTC_CMD_WRITE_DISABLE) {
  152. dev_err(&spi->dev, "failed to detect chip\n");
  153. return -ENODEV;
  154. }
  155. }
  156. spi_set_drvdata(spi, spi);
  157. rtc = devm_rtc_device_register(&spi->dev, "ds1302",
  158. &ds1302_rtc_ops, THIS_MODULE);
  159. if (IS_ERR(rtc)) {
  160. status = PTR_ERR(rtc);
  161. dev_err(&spi->dev, "error %d registering rtc\n", status);
  162. return status;
  163. }
  164. return 0;
  165. }
  166. static int ds1302_remove(struct spi_device *spi)
  167. {
  168. spi_set_drvdata(spi, NULL);
  169. return 0;
  170. }
  171. #ifdef CONFIG_OF
  172. static const struct of_device_id ds1302_dt_ids[] = {
  173. { .compatible = "maxim,ds1302", },
  174. { /* sentinel */ }
  175. };
  176. MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
  177. #endif
  178. static struct spi_driver ds1302_driver = {
  179. .driver.name = "rtc-ds1302",
  180. .driver.of_match_table = of_match_ptr(ds1302_dt_ids),
  181. .probe = ds1302_probe,
  182. .remove = ds1302_remove,
  183. };
  184. module_spi_driver(ds1302_driver);
  185. MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
  186. MODULE_AUTHOR("Paul Mundt, David McCullough");
  187. MODULE_LICENSE("GPL v2");