rtc-at32ap700x.c 6.8 KB

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  1. /*
  2. * An RTC driver for the AVR32 AT32AP700x processor series.
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/slab.h>
  14. #include <linux/rtc.h>
  15. #include <linux/io.h>
  16. /*
  17. * This is a bare-bones RTC. It runs during most system sleep states, but has
  18. * no battery backup and gets reset during system restart. It must be
  19. * initialized from an external clock (network, I2C, etc) before it can be of
  20. * much use.
  21. *
  22. * The alarm functionality is limited by the hardware, not supporting
  23. * periodic interrupts.
  24. */
  25. #define RTC_CTRL 0x00
  26. #define RTC_CTRL_EN 0
  27. #define RTC_CTRL_PCLR 1
  28. #define RTC_CTRL_TOPEN 2
  29. #define RTC_CTRL_PSEL 8
  30. #define RTC_VAL 0x04
  31. #define RTC_TOP 0x08
  32. #define RTC_IER 0x10
  33. #define RTC_IER_TOPI 0
  34. #define RTC_IDR 0x14
  35. #define RTC_IDR_TOPI 0
  36. #define RTC_IMR 0x18
  37. #define RTC_IMR_TOPI 0
  38. #define RTC_ISR 0x1c
  39. #define RTC_ISR_TOPI 0
  40. #define RTC_ICR 0x20
  41. #define RTC_ICR_TOPI 0
  42. #define RTC_BIT(name) (1 << RTC_##name)
  43. #define RTC_BF(name, value) ((value) << RTC_##name)
  44. #define rtc_readl(dev, reg) \
  45. __raw_readl((dev)->regs + RTC_##reg)
  46. #define rtc_writel(dev, reg, value) \
  47. __raw_writel((value), (dev)->regs + RTC_##reg)
  48. struct rtc_at32ap700x {
  49. struct rtc_device *rtc;
  50. void __iomem *regs;
  51. unsigned long alarm_time;
  52. unsigned long irq;
  53. /* Protect against concurrent register access. */
  54. spinlock_t lock;
  55. };
  56. static int at32_rtc_readtime(struct device *dev, struct rtc_time *tm)
  57. {
  58. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  59. unsigned long now;
  60. now = rtc_readl(rtc, VAL);
  61. rtc_time_to_tm(now, tm);
  62. return 0;
  63. }
  64. static int at32_rtc_settime(struct device *dev, struct rtc_time *tm)
  65. {
  66. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  67. unsigned long now;
  68. int ret;
  69. ret = rtc_tm_to_time(tm, &now);
  70. if (ret == 0)
  71. rtc_writel(rtc, VAL, now);
  72. return ret;
  73. }
  74. static int at32_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  75. {
  76. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  77. spin_lock_irq(&rtc->lock);
  78. rtc_time_to_tm(rtc->alarm_time, &alrm->time);
  79. alrm->enabled = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0;
  80. alrm->pending = rtc_readl(rtc, ISR) & RTC_BIT(ISR_TOPI) ? 1 : 0;
  81. spin_unlock_irq(&rtc->lock);
  82. return 0;
  83. }
  84. static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  85. {
  86. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  87. unsigned long rtc_unix_time;
  88. unsigned long alarm_unix_time;
  89. int ret;
  90. rtc_unix_time = rtc_readl(rtc, VAL);
  91. ret = rtc_tm_to_time(&alrm->time, &alarm_unix_time);
  92. if (ret)
  93. return ret;
  94. if (alarm_unix_time < rtc_unix_time)
  95. return -EINVAL;
  96. spin_lock_irq(&rtc->lock);
  97. rtc->alarm_time = alarm_unix_time;
  98. rtc_writel(rtc, TOP, rtc->alarm_time);
  99. if (alrm->enabled)
  100. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  101. | RTC_BIT(CTRL_TOPEN));
  102. else
  103. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  104. & ~RTC_BIT(CTRL_TOPEN));
  105. spin_unlock_irq(&rtc->lock);
  106. return ret;
  107. }
  108. static int at32_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  109. {
  110. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  111. int ret = 0;
  112. spin_lock_irq(&rtc->lock);
  113. if (enabled) {
  114. if (rtc_readl(rtc, VAL) > rtc->alarm_time) {
  115. ret = -EINVAL;
  116. goto out;
  117. }
  118. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  119. | RTC_BIT(CTRL_TOPEN));
  120. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  121. rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
  122. } else {
  123. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  124. & ~RTC_BIT(CTRL_TOPEN));
  125. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  126. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  127. }
  128. out:
  129. spin_unlock_irq(&rtc->lock);
  130. return ret;
  131. }
  132. static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id)
  133. {
  134. struct rtc_at32ap700x *rtc = (struct rtc_at32ap700x *)dev_id;
  135. unsigned long isr = rtc_readl(rtc, ISR);
  136. unsigned long events = 0;
  137. int ret = IRQ_NONE;
  138. spin_lock(&rtc->lock);
  139. if (isr & RTC_BIT(ISR_TOPI)) {
  140. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  141. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  142. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  143. & ~RTC_BIT(CTRL_TOPEN));
  144. rtc_writel(rtc, VAL, rtc->alarm_time);
  145. events = RTC_AF | RTC_IRQF;
  146. rtc_update_irq(rtc->rtc, 1, events);
  147. ret = IRQ_HANDLED;
  148. }
  149. spin_unlock(&rtc->lock);
  150. return ret;
  151. }
  152. static const struct rtc_class_ops at32_rtc_ops = {
  153. .read_time = at32_rtc_readtime,
  154. .set_time = at32_rtc_settime,
  155. .read_alarm = at32_rtc_readalarm,
  156. .set_alarm = at32_rtc_setalarm,
  157. .alarm_irq_enable = at32_rtc_alarm_irq_enable,
  158. };
  159. static int __init at32_rtc_probe(struct platform_device *pdev)
  160. {
  161. struct resource *regs;
  162. struct rtc_at32ap700x *rtc;
  163. int irq;
  164. int ret;
  165. rtc = devm_kzalloc(&pdev->dev, sizeof(struct rtc_at32ap700x),
  166. GFP_KERNEL);
  167. if (!rtc)
  168. return -ENOMEM;
  169. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  170. if (!regs) {
  171. dev_dbg(&pdev->dev, "no mmio resource defined\n");
  172. return -ENXIO;
  173. }
  174. irq = platform_get_irq(pdev, 0);
  175. if (irq <= 0) {
  176. dev_dbg(&pdev->dev, "could not get irq\n");
  177. return -ENXIO;
  178. }
  179. rtc->irq = irq;
  180. rtc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
  181. if (!rtc->regs) {
  182. dev_dbg(&pdev->dev, "could not map I/O memory\n");
  183. return -ENOMEM;
  184. }
  185. spin_lock_init(&rtc->lock);
  186. /*
  187. * Maybe init RTC: count from zero at 1 Hz, disable wrap irq.
  188. *
  189. * Do not reset VAL register, as it can hold an old time
  190. * from last JTAG reset.
  191. */
  192. if (!(rtc_readl(rtc, CTRL) & RTC_BIT(CTRL_EN))) {
  193. rtc_writel(rtc, CTRL, RTC_BIT(CTRL_PCLR));
  194. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  195. rtc_writel(rtc, CTRL, RTC_BF(CTRL_PSEL, 0xe)
  196. | RTC_BIT(CTRL_EN));
  197. }
  198. ret = devm_request_irq(&pdev->dev, irq, at32_rtc_interrupt, IRQF_SHARED,
  199. "rtc", rtc);
  200. if (ret) {
  201. dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
  202. return ret;
  203. }
  204. platform_set_drvdata(pdev, rtc);
  205. rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  206. &at32_rtc_ops, THIS_MODULE);
  207. if (IS_ERR(rtc->rtc)) {
  208. dev_dbg(&pdev->dev, "could not register rtc device\n");
  209. return PTR_ERR(rtc->rtc);
  210. }
  211. device_init_wakeup(&pdev->dev, 1);
  212. dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n",
  213. (unsigned long)rtc->regs, rtc->irq);
  214. return 0;
  215. }
  216. static int __exit at32_rtc_remove(struct platform_device *pdev)
  217. {
  218. device_init_wakeup(&pdev->dev, 0);
  219. return 0;
  220. }
  221. MODULE_ALIAS("platform:at32ap700x_rtc");
  222. static struct platform_driver at32_rtc_driver = {
  223. .remove = __exit_p(at32_rtc_remove),
  224. .driver = {
  225. .name = "at32ap700x_rtc",
  226. },
  227. };
  228. module_platform_driver_probe(at32_rtc_driver, at32_rtc_probe);
  229. MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
  230. MODULE_DESCRIPTION("Real time clock for AVR32 AT32AP700x");
  231. MODULE_LICENSE("GPL");