rtc-ab3100.c 6.4 KB

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  1. /*
  2. * Copyright (C) 2007-2009 ST-Ericsson AB
  3. * License terms: GNU General Public License (GPL) version 2
  4. * RTC clock driver for the AB3100 Analog Baseband Chip
  5. * Author: Linus Walleij <linus.walleij@stericsson.com>
  6. */
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/rtc.h>
  12. #include <linux/mfd/abx500.h>
  13. /* Clock rate in Hz */
  14. #define AB3100_RTC_CLOCK_RATE 32768
  15. /*
  16. * The AB3100 RTC registers. These are the same for
  17. * AB3000 and AB3100.
  18. * Control register:
  19. * Bit 0: RTC Monitor cleared=0, active=1, if you set it
  20. * to 1 it remains active until RTC power is lost.
  21. * Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass
  22. * Bit 2: Alarm on, 0 = off, 1 = on
  23. * Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled
  24. */
  25. #define AB3100_RTC 0x53
  26. /* default setting, buffer disabled, alarm on */
  27. #define RTC_SETTING 0x30
  28. /* Alarm when AL0-AL3 == TI0-TI3 */
  29. #define AB3100_AL0 0x56
  30. #define AB3100_AL1 0x57
  31. #define AB3100_AL2 0x58
  32. #define AB3100_AL3 0x59
  33. /* This 48-bit register that counts up at 32768 Hz */
  34. #define AB3100_TI0 0x5a
  35. #define AB3100_TI1 0x5b
  36. #define AB3100_TI2 0x5c
  37. #define AB3100_TI3 0x5d
  38. #define AB3100_TI4 0x5e
  39. #define AB3100_TI5 0x5f
  40. /*
  41. * RTC clock functions and device struct declaration
  42. */
  43. static int ab3100_rtc_set_mmss(struct device *dev, time64_t secs)
  44. {
  45. u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2,
  46. AB3100_TI3, AB3100_TI4, AB3100_TI5};
  47. unsigned char buf[6];
  48. u64 hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
  49. int err = 0;
  50. int i;
  51. buf[0] = (hw_counter) & 0xFF;
  52. buf[1] = (hw_counter >> 8) & 0xFF;
  53. buf[2] = (hw_counter >> 16) & 0xFF;
  54. buf[3] = (hw_counter >> 24) & 0xFF;
  55. buf[4] = (hw_counter >> 32) & 0xFF;
  56. buf[5] = (hw_counter >> 40) & 0xFF;
  57. for (i = 0; i < 6; i++) {
  58. err = abx500_set_register_interruptible(dev, 0,
  59. regs[i], buf[i]);
  60. if (err)
  61. return err;
  62. }
  63. /* Set the flag to mark that the clock is now set */
  64. return abx500_mask_and_set_register_interruptible(dev, 0,
  65. AB3100_RTC,
  66. 0x01, 0x01);
  67. }
  68. static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  69. {
  70. time64_t time;
  71. u8 rtcval;
  72. int err;
  73. err = abx500_get_register_interruptible(dev, 0,
  74. AB3100_RTC, &rtcval);
  75. if (err)
  76. return err;
  77. if (!(rtcval & 0x01)) {
  78. dev_info(dev, "clock not set (lost power)");
  79. return -EINVAL;
  80. } else {
  81. u64 hw_counter;
  82. u8 buf[6];
  83. /* Read out time registers */
  84. err = abx500_get_register_page_interruptible(dev, 0,
  85. AB3100_TI0,
  86. buf, 6);
  87. if (err != 0)
  88. return err;
  89. hw_counter = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
  90. ((u64) buf[3] << 24) | ((u64) buf[2] << 16) |
  91. ((u64) buf[1] << 8) | (u64) buf[0];
  92. time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
  93. }
  94. rtc_time64_to_tm(time, tm);
  95. return rtc_valid_tm(tm);
  96. }
  97. static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  98. {
  99. time64_t time;
  100. u64 hw_counter;
  101. u8 buf[6];
  102. u8 rtcval;
  103. int err;
  104. /* Figure out if alarm is enabled or not */
  105. err = abx500_get_register_interruptible(dev, 0,
  106. AB3100_RTC, &rtcval);
  107. if (err)
  108. return err;
  109. if (rtcval & 0x04)
  110. alarm->enabled = 1;
  111. else
  112. alarm->enabled = 0;
  113. /* No idea how this could be represented */
  114. alarm->pending = 0;
  115. /* Read out alarm registers, only 4 bytes */
  116. err = abx500_get_register_page_interruptible(dev, 0,
  117. AB3100_AL0, buf, 4);
  118. if (err)
  119. return err;
  120. hw_counter = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
  121. ((u64) buf[1] << 24) | ((u64) buf[0] << 16);
  122. time = hw_counter / (u64) (AB3100_RTC_CLOCK_RATE * 2);
  123. rtc_time64_to_tm(time, &alarm->time);
  124. return rtc_valid_tm(&alarm->time);
  125. }
  126. static int ab3100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  127. {
  128. u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3};
  129. unsigned char buf[4];
  130. time64_t secs;
  131. u64 hw_counter;
  132. int err;
  133. int i;
  134. secs = rtc_tm_to_time64(&alarm->time);
  135. hw_counter = secs * AB3100_RTC_CLOCK_RATE * 2;
  136. buf[0] = (hw_counter >> 16) & 0xFF;
  137. buf[1] = (hw_counter >> 24) & 0xFF;
  138. buf[2] = (hw_counter >> 32) & 0xFF;
  139. buf[3] = (hw_counter >> 40) & 0xFF;
  140. /* Set the alarm */
  141. for (i = 0; i < 4; i++) {
  142. err = abx500_set_register_interruptible(dev, 0,
  143. regs[i], buf[i]);
  144. if (err)
  145. return err;
  146. }
  147. /* Then enable the alarm */
  148. return abx500_mask_and_set_register_interruptible(dev, 0,
  149. AB3100_RTC, (1 << 2),
  150. alarm->enabled << 2);
  151. }
  152. static int ab3100_rtc_irq_enable(struct device *dev, unsigned int enabled)
  153. {
  154. /*
  155. * It's not possible to enable/disable the alarm IRQ for this RTC.
  156. * It does not actually trigger any IRQ: instead its only function is
  157. * to power up the system, if it wasn't on. This will manifest as
  158. * a "power up cause" in the AB3100 power driver (battery charging etc)
  159. * and need to be handled there instead.
  160. */
  161. if (enabled)
  162. return abx500_mask_and_set_register_interruptible(dev, 0,
  163. AB3100_RTC, (1 << 2),
  164. 1 << 2);
  165. else
  166. return abx500_mask_and_set_register_interruptible(dev, 0,
  167. AB3100_RTC, (1 << 2),
  168. 0);
  169. }
  170. static const struct rtc_class_ops ab3100_rtc_ops = {
  171. .read_time = ab3100_rtc_read_time,
  172. .set_mmss64 = ab3100_rtc_set_mmss,
  173. .read_alarm = ab3100_rtc_read_alarm,
  174. .set_alarm = ab3100_rtc_set_alarm,
  175. .alarm_irq_enable = ab3100_rtc_irq_enable,
  176. };
  177. static int __init ab3100_rtc_probe(struct platform_device *pdev)
  178. {
  179. int err;
  180. u8 regval;
  181. struct rtc_device *rtc;
  182. /* The first RTC register needs special treatment */
  183. err = abx500_get_register_interruptible(&pdev->dev, 0,
  184. AB3100_RTC, &regval);
  185. if (err) {
  186. dev_err(&pdev->dev, "unable to read RTC register\n");
  187. return -ENODEV;
  188. }
  189. if ((regval & 0xFE) != RTC_SETTING) {
  190. dev_warn(&pdev->dev, "not default value in RTC reg 0x%x\n",
  191. regval);
  192. }
  193. if ((regval & 1) == 0) {
  194. /*
  195. * Set bit to detect power loss.
  196. * This bit remains until RTC power is lost.
  197. */
  198. regval = 1 | RTC_SETTING;
  199. err = abx500_set_register_interruptible(&pdev->dev, 0,
  200. AB3100_RTC, regval);
  201. /* Ignore any error on this write */
  202. }
  203. rtc = devm_rtc_device_register(&pdev->dev, "ab3100-rtc",
  204. &ab3100_rtc_ops, THIS_MODULE);
  205. if (IS_ERR(rtc)) {
  206. err = PTR_ERR(rtc);
  207. return err;
  208. }
  209. platform_set_drvdata(pdev, rtc);
  210. return 0;
  211. }
  212. static struct platform_driver ab3100_rtc_driver = {
  213. .driver = {
  214. .name = "ab3100-rtc",
  215. },
  216. };
  217. module_platform_driver_probe(ab3100_rtc_driver, ab3100_rtc_probe);
  218. MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
  219. MODULE_DESCRIPTION("AB3100 RTC Driver");
  220. MODULE_LICENSE("GPL");