pwm-bcm2835.c 5.0 KB

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  1. /*
  2. * Copyright 2014 Bart Tanghe <bart.tanghe@thomasmore.be>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; version 2.
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/err.h>
  10. #include <linux/io.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pwm.h>
  15. #define PWM_CONTROL 0x000
  16. #define PWM_CONTROL_SHIFT(x) ((x) * 8)
  17. #define PWM_CONTROL_MASK 0xff
  18. #define PWM_MODE 0x80 /* set timer in PWM mode */
  19. #define PWM_ENABLE (1 << 0)
  20. #define PWM_POLARITY (1 << 4)
  21. #define PERIOD(x) (((x) * 0x10) + 0x10)
  22. #define DUTY(x) (((x) * 0x10) + 0x14)
  23. #define MIN_PERIOD 108 /* 9.2 MHz max. PWM clock */
  24. struct bcm2835_pwm {
  25. struct pwm_chip chip;
  26. struct device *dev;
  27. void __iomem *base;
  28. struct clk *clk;
  29. };
  30. static inline struct bcm2835_pwm *to_bcm2835_pwm(struct pwm_chip *chip)
  31. {
  32. return container_of(chip, struct bcm2835_pwm, chip);
  33. }
  34. static int bcm2835_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
  35. {
  36. struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
  37. u32 value;
  38. value = readl(pc->base + PWM_CONTROL);
  39. value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
  40. value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm));
  41. writel(value, pc->base + PWM_CONTROL);
  42. return 0;
  43. }
  44. static void bcm2835_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
  45. {
  46. struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
  47. u32 value;
  48. value = readl(pc->base + PWM_CONTROL);
  49. value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
  50. writel(value, pc->base + PWM_CONTROL);
  51. }
  52. static int bcm2835_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  53. int duty_ns, int period_ns)
  54. {
  55. struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
  56. unsigned long rate = clk_get_rate(pc->clk);
  57. unsigned long scaler;
  58. if (!rate) {
  59. dev_err(pc->dev, "failed to get clock rate\n");
  60. return -EINVAL;
  61. }
  62. scaler = NSEC_PER_SEC / rate;
  63. if (period_ns <= MIN_PERIOD) {
  64. dev_err(pc->dev, "period %d not supported, minimum %d\n",
  65. period_ns, MIN_PERIOD);
  66. return -EINVAL;
  67. }
  68. writel(duty_ns / scaler, pc->base + DUTY(pwm->hwpwm));
  69. writel(period_ns / scaler, pc->base + PERIOD(pwm->hwpwm));
  70. return 0;
  71. }
  72. static int bcm2835_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  73. {
  74. struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
  75. u32 value;
  76. value = readl(pc->base + PWM_CONTROL);
  77. value |= PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm);
  78. writel(value, pc->base + PWM_CONTROL);
  79. return 0;
  80. }
  81. static void bcm2835_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  82. {
  83. struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
  84. u32 value;
  85. value = readl(pc->base + PWM_CONTROL);
  86. value &= ~(PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm));
  87. writel(value, pc->base + PWM_CONTROL);
  88. }
  89. static int bcm2835_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
  90. enum pwm_polarity polarity)
  91. {
  92. struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
  93. u32 value;
  94. value = readl(pc->base + PWM_CONTROL);
  95. if (polarity == PWM_POLARITY_NORMAL)
  96. value &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm));
  97. else
  98. value |= PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm);
  99. writel(value, pc->base + PWM_CONTROL);
  100. return 0;
  101. }
  102. static const struct pwm_ops bcm2835_pwm_ops = {
  103. .request = bcm2835_pwm_request,
  104. .free = bcm2835_pwm_free,
  105. .config = bcm2835_pwm_config,
  106. .enable = bcm2835_pwm_enable,
  107. .disable = bcm2835_pwm_disable,
  108. .set_polarity = bcm2835_set_polarity,
  109. .owner = THIS_MODULE,
  110. };
  111. static int bcm2835_pwm_probe(struct platform_device *pdev)
  112. {
  113. struct bcm2835_pwm *pc;
  114. struct resource *res;
  115. int ret;
  116. pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
  117. if (!pc)
  118. return -ENOMEM;
  119. pc->dev = &pdev->dev;
  120. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  121. pc->base = devm_ioremap_resource(&pdev->dev, res);
  122. if (IS_ERR(pc->base))
  123. return PTR_ERR(pc->base);
  124. pc->clk = devm_clk_get(&pdev->dev, NULL);
  125. if (IS_ERR(pc->clk)) {
  126. dev_err(&pdev->dev, "clock not found: %ld\n", PTR_ERR(pc->clk));
  127. return PTR_ERR(pc->clk);
  128. }
  129. ret = clk_prepare_enable(pc->clk);
  130. if (ret)
  131. return ret;
  132. pc->chip.dev = &pdev->dev;
  133. pc->chip.ops = &bcm2835_pwm_ops;
  134. pc->chip.npwm = 2;
  135. platform_set_drvdata(pdev, pc);
  136. ret = pwmchip_add(&pc->chip);
  137. if (ret < 0)
  138. goto add_fail;
  139. return 0;
  140. add_fail:
  141. clk_disable_unprepare(pc->clk);
  142. return ret;
  143. }
  144. static int bcm2835_pwm_remove(struct platform_device *pdev)
  145. {
  146. struct bcm2835_pwm *pc = platform_get_drvdata(pdev);
  147. clk_disable_unprepare(pc->clk);
  148. return pwmchip_remove(&pc->chip);
  149. }
  150. static const struct of_device_id bcm2835_pwm_of_match[] = {
  151. { .compatible = "brcm,bcm2835-pwm", },
  152. { /* sentinel */ }
  153. };
  154. MODULE_DEVICE_TABLE(of, bcm2835_pwm_of_match);
  155. static struct platform_driver bcm2835_pwm_driver = {
  156. .driver = {
  157. .name = "bcm2835-pwm",
  158. .of_match_table = bcm2835_pwm_of_match,
  159. },
  160. .probe = bcm2835_pwm_probe,
  161. .remove = bcm2835_pwm_remove,
  162. };
  163. module_platform_driver(bcm2835_pwm_driver);
  164. MODULE_AUTHOR("Bart Tanghe <bart.tanghe@thomasmore.be>");
  165. MODULE_DESCRIPTION("Broadcom BCM2835 PWM driver");
  166. MODULE_LICENSE("GPL v2");