pinctrl-ssbi-mpp.c 21 KB

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  1. /*
  2. * Copyright (c) 2015, Sony Mobile Communications AB.
  3. * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 and
  7. * only version 2 as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pinctrl/pinctrl.h>
  17. #include <linux/pinctrl/pinmux.h>
  18. #include <linux/pinctrl/pinconf.h>
  19. #include <linux/pinctrl/pinconf-generic.h>
  20. #include <linux/slab.h>
  21. #include <linux/regmap.h>
  22. #include <linux/gpio.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/of_device.h>
  25. #include <linux/of_irq.h>
  26. #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
  27. #include "../core.h"
  28. #include "../pinctrl-utils.h"
  29. /* MPP registers */
  30. #define SSBI_REG_ADDR_MPP_BASE 0x50
  31. #define SSBI_REG_ADDR_MPP(n) (SSBI_REG_ADDR_MPP_BASE + n)
  32. /* MPP Type: type */
  33. #define PM8XXX_MPP_TYPE_D_INPUT 0
  34. #define PM8XXX_MPP_TYPE_D_OUTPUT 1
  35. #define PM8XXX_MPP_TYPE_D_BI_DIR 2
  36. #define PM8XXX_MPP_TYPE_A_INPUT 3
  37. #define PM8XXX_MPP_TYPE_A_OUTPUT 4
  38. #define PM8XXX_MPP_TYPE_SINK 5
  39. #define PM8XXX_MPP_TYPE_DTEST_SINK 6
  40. #define PM8XXX_MPP_TYPE_DTEST_OUTPUT 7
  41. /* Digital Input: control */
  42. #define PM8XXX_MPP_DIN_TO_INT 0
  43. #define PM8XXX_MPP_DIN_TO_DBUS1 1
  44. #define PM8XXX_MPP_DIN_TO_DBUS2 2
  45. #define PM8XXX_MPP_DIN_TO_DBUS3 3
  46. /* Digital Output: control */
  47. #define PM8XXX_MPP_DOUT_CTRL_LOW 0
  48. #define PM8XXX_MPP_DOUT_CTRL_HIGH 1
  49. #define PM8XXX_MPP_DOUT_CTRL_MPP 2
  50. #define PM8XXX_MPP_DOUT_CTRL_INV_MPP 3
  51. /* Bidirectional: control */
  52. #define PM8XXX_MPP_BI_PULLUP_1KOHM 0
  53. #define PM8XXX_MPP_BI_PULLUP_OPEN 1
  54. #define PM8XXX_MPP_BI_PULLUP_10KOHM 2
  55. #define PM8XXX_MPP_BI_PULLUP_30KOHM 3
  56. /* Analog Output: control */
  57. #define PM8XXX_MPP_AOUT_CTRL_DISABLE 0
  58. #define PM8XXX_MPP_AOUT_CTRL_ENABLE 1
  59. #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN 2
  60. #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN 3
  61. /* Current Sink: control */
  62. #define PM8XXX_MPP_CS_CTRL_DISABLE 0
  63. #define PM8XXX_MPP_CS_CTRL_ENABLE 1
  64. #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN 2
  65. #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN 3
  66. /* DTEST Current Sink: control */
  67. #define PM8XXX_MPP_DTEST_CS_CTRL_EN1 0
  68. #define PM8XXX_MPP_DTEST_CS_CTRL_EN2 1
  69. #define PM8XXX_MPP_DTEST_CS_CTRL_EN3 2
  70. #define PM8XXX_MPP_DTEST_CS_CTRL_EN4 3
  71. /* DTEST Digital Output: control */
  72. #define PM8XXX_MPP_DTEST_DBUS1 0
  73. #define PM8XXX_MPP_DTEST_DBUS2 1
  74. #define PM8XXX_MPP_DTEST_DBUS3 2
  75. #define PM8XXX_MPP_DTEST_DBUS4 3
  76. /* custom pinconf parameters */
  77. #define PM8XXX_CONFIG_AMUX (PIN_CONFIG_END + 1)
  78. #define PM8XXX_CONFIG_DTEST_SELECTOR (PIN_CONFIG_END + 2)
  79. #define PM8XXX_CONFIG_ALEVEL (PIN_CONFIG_END + 3)
  80. #define PM8XXX_CONFIG_PAIRED (PIN_CONFIG_END + 4)
  81. /**
  82. * struct pm8xxx_pin_data - dynamic configuration for a pin
  83. * @reg: address of the control register
  84. * @irq: IRQ from the PMIC interrupt controller
  85. * @mode: operating mode for the pin (digital, analog or current sink)
  86. * @input: pin is input
  87. * @output: pin is output
  88. * @high_z: pin is floating
  89. * @paired: mpp operates in paired mode
  90. * @output_value: logical output value of the mpp
  91. * @power_source: selected power source
  92. * @dtest: DTEST route selector
  93. * @amux: input muxing in analog mode
  94. * @aout_level: selector of the output in analog mode
  95. * @drive_strength: drive strength of the current sink
  96. * @pullup: pull up value, when in digital bidirectional mode
  97. */
  98. struct pm8xxx_pin_data {
  99. unsigned reg;
  100. int irq;
  101. u8 mode;
  102. bool input;
  103. bool output;
  104. bool high_z;
  105. bool paired;
  106. bool output_value;
  107. u8 power_source;
  108. u8 dtest;
  109. u8 amux;
  110. u8 aout_level;
  111. u8 drive_strength;
  112. unsigned pullup;
  113. };
  114. struct pm8xxx_mpp {
  115. struct device *dev;
  116. struct regmap *regmap;
  117. struct pinctrl_dev *pctrl;
  118. struct gpio_chip chip;
  119. struct pinctrl_desc desc;
  120. unsigned npins;
  121. };
  122. static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
  123. {"qcom,amux-route", PM8XXX_CONFIG_AMUX, 0},
  124. {"qcom,analog-level", PM8XXX_CONFIG_ALEVEL, 0},
  125. {"qcom,dtest", PM8XXX_CONFIG_DTEST_SELECTOR, 0},
  126. {"qcom,paired", PM8XXX_CONFIG_PAIRED, 0},
  127. };
  128. #ifdef CONFIG_DEBUG_FS
  129. static const struct pin_config_item pm8xxx_conf_items[] = {
  130. PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
  131. PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
  132. PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
  133. PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
  134. };
  135. #endif
  136. #define PM8XXX_MAX_MPPS 12
  137. static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
  138. "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
  139. "mpp9", "mpp10", "mpp11", "mpp12",
  140. };
  141. #define PM8XXX_MPP_DIGITAL 0
  142. #define PM8XXX_MPP_ANALOG 1
  143. #define PM8XXX_MPP_SINK 2
  144. static const char * const pm8xxx_mpp_functions[] = {
  145. "digital", "analog", "sink",
  146. };
  147. static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
  148. struct pm8xxx_pin_data *pin)
  149. {
  150. unsigned level;
  151. unsigned ctrl;
  152. unsigned type;
  153. int ret;
  154. u8 val;
  155. switch (pin->mode) {
  156. case PM8XXX_MPP_DIGITAL:
  157. if (pin->dtest) {
  158. type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
  159. ctrl = pin->dtest - 1;
  160. } else if (pin->input && pin->output) {
  161. type = PM8XXX_MPP_TYPE_D_BI_DIR;
  162. if (pin->high_z)
  163. ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
  164. else if (pin->pullup == 600)
  165. ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
  166. else if (pin->pullup == 10000)
  167. ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
  168. else
  169. ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
  170. } else if (pin->input) {
  171. type = PM8XXX_MPP_TYPE_D_INPUT;
  172. if (pin->dtest)
  173. ctrl = pin->dtest;
  174. else
  175. ctrl = PM8XXX_MPP_DIN_TO_INT;
  176. } else {
  177. type = PM8XXX_MPP_TYPE_D_OUTPUT;
  178. ctrl = !!pin->output_value;
  179. if (pin->paired)
  180. ctrl |= BIT(1);
  181. }
  182. level = pin->power_source;
  183. break;
  184. case PM8XXX_MPP_ANALOG:
  185. if (pin->output) {
  186. type = PM8XXX_MPP_TYPE_A_OUTPUT;
  187. level = pin->aout_level;
  188. ctrl = pin->output_value;
  189. if (pin->paired)
  190. ctrl |= BIT(1);
  191. } else {
  192. type = PM8XXX_MPP_TYPE_A_INPUT;
  193. level = pin->amux;
  194. ctrl = 0;
  195. }
  196. break;
  197. case PM8XXX_MPP_SINK:
  198. level = (pin->drive_strength / 5) - 1;
  199. if (pin->dtest) {
  200. type = PM8XXX_MPP_TYPE_DTEST_SINK;
  201. ctrl = pin->dtest - 1;
  202. } else {
  203. type = PM8XXX_MPP_TYPE_SINK;
  204. ctrl = pin->output_value;
  205. if (pin->paired)
  206. ctrl |= BIT(1);
  207. }
  208. break;
  209. default:
  210. return -EINVAL;
  211. }
  212. val = type << 5 | level << 2 | ctrl;
  213. ret = regmap_write(pctrl->regmap, pin->reg, val);
  214. if (ret)
  215. dev_err(pctrl->dev, "failed to write register\n");
  216. return ret;
  217. }
  218. static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
  219. {
  220. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  221. return pctrl->npins;
  222. }
  223. static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
  224. unsigned group)
  225. {
  226. return pm8xxx_groups[group];
  227. }
  228. static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
  229. unsigned group,
  230. const unsigned **pins,
  231. unsigned *num_pins)
  232. {
  233. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  234. *pins = &pctrl->desc.pins[group].number;
  235. *num_pins = 1;
  236. return 0;
  237. }
  238. static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
  239. .get_groups_count = pm8xxx_get_groups_count,
  240. .get_group_name = pm8xxx_get_group_name,
  241. .get_group_pins = pm8xxx_get_group_pins,
  242. .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
  243. .dt_free_map = pinctrl_utils_free_map,
  244. };
  245. static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
  246. {
  247. return ARRAY_SIZE(pm8xxx_mpp_functions);
  248. }
  249. static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
  250. unsigned function)
  251. {
  252. return pm8xxx_mpp_functions[function];
  253. }
  254. static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
  255. unsigned function,
  256. const char * const **groups,
  257. unsigned * const num_groups)
  258. {
  259. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  260. *groups = pm8xxx_groups;
  261. *num_groups = pctrl->npins;
  262. return 0;
  263. }
  264. static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
  265. unsigned function,
  266. unsigned group)
  267. {
  268. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  269. struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
  270. pin->mode = function;
  271. pm8xxx_mpp_update(pctrl, pin);
  272. return 0;
  273. }
  274. static const struct pinmux_ops pm8xxx_pinmux_ops = {
  275. .get_functions_count = pm8xxx_get_functions_count,
  276. .get_function_name = pm8xxx_get_function_name,
  277. .get_function_groups = pm8xxx_get_function_groups,
  278. .set_mux = pm8xxx_pinmux_set_mux,
  279. };
  280. static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
  281. unsigned int offset,
  282. unsigned long *config)
  283. {
  284. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  285. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  286. unsigned param = pinconf_to_config_param(*config);
  287. unsigned arg;
  288. switch (param) {
  289. case PIN_CONFIG_BIAS_PULL_UP:
  290. arg = pin->pullup;
  291. break;
  292. case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
  293. arg = pin->high_z;
  294. break;
  295. case PIN_CONFIG_INPUT_ENABLE:
  296. arg = pin->input;
  297. break;
  298. case PIN_CONFIG_OUTPUT:
  299. arg = pin->output_value;
  300. break;
  301. case PIN_CONFIG_POWER_SOURCE:
  302. arg = pin->power_source;
  303. break;
  304. case PIN_CONFIG_DRIVE_STRENGTH:
  305. arg = pin->drive_strength;
  306. break;
  307. case PM8XXX_CONFIG_DTEST_SELECTOR:
  308. arg = pin->dtest;
  309. break;
  310. case PM8XXX_CONFIG_AMUX:
  311. arg = pin->amux;
  312. break;
  313. case PM8XXX_CONFIG_ALEVEL:
  314. arg = pin->aout_level;
  315. break;
  316. case PM8XXX_CONFIG_PAIRED:
  317. arg = pin->paired;
  318. break;
  319. default:
  320. return -EINVAL;
  321. }
  322. *config = pinconf_to_config_packed(param, arg);
  323. return 0;
  324. }
  325. static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
  326. unsigned int offset,
  327. unsigned long *configs,
  328. unsigned num_configs)
  329. {
  330. struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
  331. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  332. unsigned param;
  333. unsigned arg;
  334. unsigned i;
  335. for (i = 0; i < num_configs; i++) {
  336. param = pinconf_to_config_param(configs[i]);
  337. arg = pinconf_to_config_argument(configs[i]);
  338. switch (param) {
  339. case PIN_CONFIG_BIAS_PULL_UP:
  340. pin->pullup = arg;
  341. break;
  342. case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
  343. pin->high_z = true;
  344. break;
  345. case PIN_CONFIG_INPUT_ENABLE:
  346. pin->input = true;
  347. break;
  348. case PIN_CONFIG_OUTPUT:
  349. pin->output = true;
  350. pin->output_value = !!arg;
  351. break;
  352. case PIN_CONFIG_POWER_SOURCE:
  353. pin->power_source = arg;
  354. break;
  355. case PIN_CONFIG_DRIVE_STRENGTH:
  356. pin->drive_strength = arg;
  357. break;
  358. case PM8XXX_CONFIG_DTEST_SELECTOR:
  359. pin->dtest = arg;
  360. break;
  361. case PM8XXX_CONFIG_AMUX:
  362. pin->amux = arg;
  363. break;
  364. case PM8XXX_CONFIG_ALEVEL:
  365. pin->aout_level = arg;
  366. break;
  367. case PM8XXX_CONFIG_PAIRED:
  368. pin->paired = !!arg;
  369. break;
  370. default:
  371. dev_err(pctrl->dev,
  372. "unsupported config parameter: %x\n",
  373. param);
  374. return -EINVAL;
  375. }
  376. }
  377. pm8xxx_mpp_update(pctrl, pin);
  378. return 0;
  379. }
  380. static const struct pinconf_ops pm8xxx_pinconf_ops = {
  381. .is_generic = true,
  382. .pin_config_group_get = pm8xxx_pin_config_get,
  383. .pin_config_group_set = pm8xxx_pin_config_set,
  384. };
  385. static struct pinctrl_desc pm8xxx_pinctrl_desc = {
  386. .name = "pm8xxx_mpp",
  387. .pctlops = &pm8xxx_pinctrl_ops,
  388. .pmxops = &pm8xxx_pinmux_ops,
  389. .confops = &pm8xxx_pinconf_ops,
  390. .owner = THIS_MODULE,
  391. };
  392. static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
  393. unsigned offset)
  394. {
  395. struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
  396. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  397. switch (pin->mode) {
  398. case PM8XXX_MPP_DIGITAL:
  399. pin->input = true;
  400. break;
  401. case PM8XXX_MPP_ANALOG:
  402. pin->input = true;
  403. pin->output = true;
  404. break;
  405. case PM8XXX_MPP_SINK:
  406. return -EINVAL;
  407. }
  408. pm8xxx_mpp_update(pctrl, pin);
  409. return 0;
  410. }
  411. static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
  412. unsigned offset,
  413. int value)
  414. {
  415. struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
  416. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  417. switch (pin->mode) {
  418. case PM8XXX_MPP_DIGITAL:
  419. pin->output = true;
  420. break;
  421. case PM8XXX_MPP_ANALOG:
  422. pin->input = false;
  423. pin->output = true;
  424. break;
  425. case PM8XXX_MPP_SINK:
  426. pin->input = false;
  427. pin->output = true;
  428. break;
  429. }
  430. pm8xxx_mpp_update(pctrl, pin);
  431. return 0;
  432. }
  433. static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
  434. {
  435. struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
  436. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  437. bool state;
  438. int ret;
  439. if (!pin->input)
  440. return !!pin->output_value;
  441. ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state);
  442. if (!ret)
  443. ret = !!state;
  444. return ret;
  445. }
  446. static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
  447. {
  448. struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
  449. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  450. pin->output_value = !!value;
  451. pm8xxx_mpp_update(pctrl, pin);
  452. }
  453. static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
  454. const struct of_phandle_args *gpio_desc,
  455. u32 *flags)
  456. {
  457. if (chip->of_gpio_n_cells < 2)
  458. return -EINVAL;
  459. if (flags)
  460. *flags = gpio_desc->args[1];
  461. return gpio_desc->args[0] - 1;
  462. }
  463. static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset)
  464. {
  465. struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
  466. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  467. return pin->irq;
  468. }
  469. #ifdef CONFIG_DEBUG_FS
  470. #include <linux/seq_file.h>
  471. static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
  472. struct pinctrl_dev *pctldev,
  473. struct gpio_chip *chip,
  474. unsigned offset,
  475. unsigned gpio)
  476. {
  477. struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
  478. struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
  479. static const char * const aout_lvls[] = {
  480. "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
  481. "abus3"
  482. };
  483. static const char * const amuxs[] = {
  484. "amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
  485. "abus3",
  486. };
  487. seq_printf(s, " mpp%-2d:", offset + 1);
  488. switch (pin->mode) {
  489. case PM8XXX_MPP_DIGITAL:
  490. seq_puts(s, " digital ");
  491. if (pin->dtest) {
  492. seq_printf(s, "dtest%d\n", pin->dtest);
  493. } else if (pin->input && pin->output) {
  494. if (pin->high_z)
  495. seq_puts(s, "bi-dir high-z");
  496. else
  497. seq_printf(s, "bi-dir %dOhm", pin->pullup);
  498. } else if (pin->input) {
  499. if (pin->dtest)
  500. seq_printf(s, "in dtest%d", pin->dtest);
  501. else
  502. seq_puts(s, "in gpio");
  503. } else if (pin->output) {
  504. seq_puts(s, "out ");
  505. if (!pin->paired) {
  506. seq_puts(s, pin->output_value ?
  507. "high" : "low");
  508. } else {
  509. seq_puts(s, pin->output_value ?
  510. "inverted" : "follow");
  511. }
  512. }
  513. break;
  514. case PM8XXX_MPP_ANALOG:
  515. seq_puts(s, " analog ");
  516. if (pin->output) {
  517. seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
  518. if (!pin->paired) {
  519. seq_puts(s, pin->output_value ?
  520. "high" : "low");
  521. } else {
  522. seq_puts(s, pin->output_value ?
  523. "inverted" : "follow");
  524. }
  525. } else {
  526. seq_printf(s, "input mux %s", amuxs[pin->amux]);
  527. }
  528. break;
  529. case PM8XXX_MPP_SINK:
  530. seq_printf(s, " sink %dmA ", pin->drive_strength);
  531. if (pin->dtest) {
  532. seq_printf(s, "dtest%d", pin->dtest);
  533. } else {
  534. if (!pin->paired) {
  535. seq_puts(s, pin->output_value ?
  536. "high" : "low");
  537. } else {
  538. seq_puts(s, pin->output_value ?
  539. "inverted" : "follow");
  540. }
  541. }
  542. break;
  543. }
  544. }
  545. static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  546. {
  547. unsigned gpio = chip->base;
  548. unsigned i;
  549. for (i = 0; i < chip->ngpio; i++, gpio++) {
  550. pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
  551. seq_puts(s, "\n");
  552. }
  553. }
  554. #else
  555. #define pm8xxx_mpp_dbg_show NULL
  556. #endif
  557. static struct gpio_chip pm8xxx_mpp_template = {
  558. .direction_input = pm8xxx_mpp_direction_input,
  559. .direction_output = pm8xxx_mpp_direction_output,
  560. .get = pm8xxx_mpp_get,
  561. .set = pm8xxx_mpp_set,
  562. .of_xlate = pm8xxx_mpp_of_xlate,
  563. .to_irq = pm8xxx_mpp_to_irq,
  564. .dbg_show = pm8xxx_mpp_dbg_show,
  565. .owner = THIS_MODULE,
  566. };
  567. static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
  568. struct pm8xxx_pin_data *pin)
  569. {
  570. unsigned int val;
  571. unsigned level;
  572. unsigned ctrl;
  573. unsigned type;
  574. int ret;
  575. ret = regmap_read(pctrl->regmap, pin->reg, &val);
  576. if (ret) {
  577. dev_err(pctrl->dev, "failed to read register\n");
  578. return ret;
  579. }
  580. type = (val >> 5) & 7;
  581. level = (val >> 2) & 7;
  582. ctrl = (val) & 3;
  583. switch (type) {
  584. case PM8XXX_MPP_TYPE_D_INPUT:
  585. pin->mode = PM8XXX_MPP_DIGITAL;
  586. pin->input = true;
  587. pin->power_source = level;
  588. pin->dtest = ctrl;
  589. break;
  590. case PM8XXX_MPP_TYPE_D_OUTPUT:
  591. pin->mode = PM8XXX_MPP_DIGITAL;
  592. pin->output = true;
  593. pin->power_source = level;
  594. pin->output_value = !!(ctrl & BIT(0));
  595. pin->paired = !!(ctrl & BIT(1));
  596. break;
  597. case PM8XXX_MPP_TYPE_D_BI_DIR:
  598. pin->mode = PM8XXX_MPP_DIGITAL;
  599. pin->input = true;
  600. pin->output = true;
  601. pin->power_source = level;
  602. switch (ctrl) {
  603. case PM8XXX_MPP_BI_PULLUP_1KOHM:
  604. pin->pullup = 600;
  605. break;
  606. case PM8XXX_MPP_BI_PULLUP_OPEN:
  607. pin->high_z = true;
  608. break;
  609. case PM8XXX_MPP_BI_PULLUP_10KOHM:
  610. pin->pullup = 10000;
  611. break;
  612. case PM8XXX_MPP_BI_PULLUP_30KOHM:
  613. pin->pullup = 30000;
  614. break;
  615. }
  616. break;
  617. case PM8XXX_MPP_TYPE_A_INPUT:
  618. pin->mode = PM8XXX_MPP_ANALOG;
  619. pin->input = true;
  620. pin->amux = level;
  621. break;
  622. case PM8XXX_MPP_TYPE_A_OUTPUT:
  623. pin->mode = PM8XXX_MPP_ANALOG;
  624. pin->output = true;
  625. pin->aout_level = level;
  626. pin->output_value = !!(ctrl & BIT(0));
  627. pin->paired = !!(ctrl & BIT(1));
  628. break;
  629. case PM8XXX_MPP_TYPE_SINK:
  630. pin->mode = PM8XXX_MPP_SINK;
  631. pin->drive_strength = 5 * (level + 1);
  632. pin->output_value = !!(ctrl & BIT(0));
  633. pin->paired = !!(ctrl & BIT(1));
  634. break;
  635. case PM8XXX_MPP_TYPE_DTEST_SINK:
  636. pin->mode = PM8XXX_MPP_SINK;
  637. pin->dtest = ctrl + 1;
  638. pin->drive_strength = 5 * (level + 1);
  639. break;
  640. case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
  641. pin->mode = PM8XXX_MPP_DIGITAL;
  642. pin->power_source = level;
  643. if (ctrl >= 1)
  644. pin->dtest = ctrl;
  645. break;
  646. }
  647. return 0;
  648. }
  649. static const struct of_device_id pm8xxx_mpp_of_match[] = {
  650. { .compatible = "qcom,pm8018-mpp" },
  651. { .compatible = "qcom,pm8038-mpp" },
  652. { .compatible = "qcom,pm8058-mpp" },
  653. { .compatible = "qcom,pm8917-mpp" },
  654. { .compatible = "qcom,pm8821-mpp" },
  655. { .compatible = "qcom,pm8921-mpp" },
  656. { .compatible = "qcom,ssbi-mpp" },
  657. { },
  658. };
  659. MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
  660. static int pm8xxx_mpp_probe(struct platform_device *pdev)
  661. {
  662. struct pm8xxx_pin_data *pin_data;
  663. struct pinctrl_pin_desc *pins;
  664. struct pm8xxx_mpp *pctrl;
  665. int ret;
  666. int i, npins;
  667. pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
  668. if (!pctrl)
  669. return -ENOMEM;
  670. pctrl->dev = &pdev->dev;
  671. npins = platform_irq_count(pdev);
  672. if (!npins)
  673. return -EINVAL;
  674. if (npins < 0)
  675. return npins;
  676. pctrl->npins = npins;
  677. pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
  678. if (!pctrl->regmap) {
  679. dev_err(&pdev->dev, "parent regmap unavailable\n");
  680. return -ENXIO;
  681. }
  682. pctrl->desc = pm8xxx_pinctrl_desc;
  683. pctrl->desc.npins = pctrl->npins;
  684. pins = devm_kcalloc(&pdev->dev,
  685. pctrl->desc.npins,
  686. sizeof(struct pinctrl_pin_desc),
  687. GFP_KERNEL);
  688. if (!pins)
  689. return -ENOMEM;
  690. pin_data = devm_kcalloc(&pdev->dev,
  691. pctrl->desc.npins,
  692. sizeof(struct pm8xxx_pin_data),
  693. GFP_KERNEL);
  694. if (!pin_data)
  695. return -ENOMEM;
  696. for (i = 0; i < pctrl->desc.npins; i++) {
  697. pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
  698. pin_data[i].irq = platform_get_irq(pdev, i);
  699. if (pin_data[i].irq < 0) {
  700. dev_err(&pdev->dev,
  701. "missing interrupts for pin %d\n", i);
  702. return pin_data[i].irq;
  703. }
  704. ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
  705. if (ret)
  706. return ret;
  707. pins[i].number = i;
  708. pins[i].name = pm8xxx_groups[i];
  709. pins[i].drv_data = &pin_data[i];
  710. }
  711. pctrl->desc.pins = pins;
  712. pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
  713. pctrl->desc.custom_params = pm8xxx_mpp_bindings;
  714. #ifdef CONFIG_DEBUG_FS
  715. pctrl->desc.custom_conf_items = pm8xxx_conf_items;
  716. #endif
  717. pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
  718. if (IS_ERR(pctrl->pctrl)) {
  719. dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
  720. return PTR_ERR(pctrl->pctrl);
  721. }
  722. pctrl->chip = pm8xxx_mpp_template;
  723. pctrl->chip.base = -1;
  724. pctrl->chip.parent = &pdev->dev;
  725. pctrl->chip.of_node = pdev->dev.of_node;
  726. pctrl->chip.of_gpio_n_cells = 2;
  727. pctrl->chip.label = dev_name(pctrl->dev);
  728. pctrl->chip.ngpio = pctrl->npins;
  729. ret = gpiochip_add_data(&pctrl->chip, pctrl);
  730. if (ret) {
  731. dev_err(&pdev->dev, "failed register gpiochip\n");
  732. return ret;
  733. }
  734. ret = gpiochip_add_pin_range(&pctrl->chip,
  735. dev_name(pctrl->dev),
  736. 0, 0, pctrl->chip.ngpio);
  737. if (ret) {
  738. dev_err(pctrl->dev, "failed to add pin range\n");
  739. goto unregister_gpiochip;
  740. }
  741. platform_set_drvdata(pdev, pctrl);
  742. dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
  743. return 0;
  744. unregister_gpiochip:
  745. gpiochip_remove(&pctrl->chip);
  746. return ret;
  747. }
  748. static int pm8xxx_mpp_remove(struct platform_device *pdev)
  749. {
  750. struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
  751. gpiochip_remove(&pctrl->chip);
  752. return 0;
  753. }
  754. static struct platform_driver pm8xxx_mpp_driver = {
  755. .driver = {
  756. .name = "qcom-ssbi-mpp",
  757. .of_match_table = pm8xxx_mpp_of_match,
  758. },
  759. .probe = pm8xxx_mpp_probe,
  760. .remove = pm8xxx_mpp_remove,
  761. };
  762. module_platform_driver(pm8xxx_mpp_driver);
  763. MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
  764. MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
  765. MODULE_LICENSE("GPL v2");