pinctrl-meson8b.c 30 KB

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  1. /*
  2. * Pin controller and GPIO driver for Amlogic Meson8b.
  3. *
  4. * Copyright (C) 2015 Endless Mobile, Inc.
  5. * Author: Carlo Caione <carlo@endlessm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  13. */
  14. #include <dt-bindings/gpio/meson8b-gpio.h>
  15. #include "pinctrl-meson.h"
  16. #define AO_OFF 130
  17. static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
  18. MESON_PIN(GPIOX_0, 0),
  19. MESON_PIN(GPIOX_1, 0),
  20. MESON_PIN(GPIOX_2, 0),
  21. MESON_PIN(GPIOX_3, 0),
  22. MESON_PIN(GPIOX_4, 0),
  23. MESON_PIN(GPIOX_5, 0),
  24. MESON_PIN(GPIOX_6, 0),
  25. MESON_PIN(GPIOX_7, 0),
  26. MESON_PIN(GPIOX_8, 0),
  27. MESON_PIN(GPIOX_9, 0),
  28. MESON_PIN(GPIOX_10, 0),
  29. MESON_PIN(GPIOX_11, 0),
  30. MESON_PIN(GPIOX_16, 0),
  31. MESON_PIN(GPIOX_17, 0),
  32. MESON_PIN(GPIOX_18, 0),
  33. MESON_PIN(GPIOX_19, 0),
  34. MESON_PIN(GPIOX_20, 0),
  35. MESON_PIN(GPIOX_21, 0),
  36. MESON_PIN(GPIOY_0, 0),
  37. MESON_PIN(GPIOY_1, 0),
  38. MESON_PIN(GPIOY_3, 0),
  39. MESON_PIN(GPIOY_6, 0),
  40. MESON_PIN(GPIOY_7, 0),
  41. MESON_PIN(GPIOY_8, 0),
  42. MESON_PIN(GPIOY_9, 0),
  43. MESON_PIN(GPIOY_10, 0),
  44. MESON_PIN(GPIOY_11, 0),
  45. MESON_PIN(GPIOY_12, 0),
  46. MESON_PIN(GPIOY_13, 0),
  47. MESON_PIN(GPIOY_14, 0),
  48. MESON_PIN(GPIODV_9, 0),
  49. MESON_PIN(GPIODV_24, 0),
  50. MESON_PIN(GPIODV_25, 0),
  51. MESON_PIN(GPIODV_26, 0),
  52. MESON_PIN(GPIODV_27, 0),
  53. MESON_PIN(GPIODV_28, 0),
  54. MESON_PIN(GPIODV_29, 0),
  55. MESON_PIN(GPIOH_0, 0),
  56. MESON_PIN(GPIOH_1, 0),
  57. MESON_PIN(GPIOH_2, 0),
  58. MESON_PIN(GPIOH_3, 0),
  59. MESON_PIN(GPIOH_4, 0),
  60. MESON_PIN(GPIOH_5, 0),
  61. MESON_PIN(GPIOH_6, 0),
  62. MESON_PIN(GPIOH_7, 0),
  63. MESON_PIN(GPIOH_8, 0),
  64. MESON_PIN(GPIOH_9, 0),
  65. MESON_PIN(CARD_0, 0),
  66. MESON_PIN(CARD_1, 0),
  67. MESON_PIN(CARD_2, 0),
  68. MESON_PIN(CARD_3, 0),
  69. MESON_PIN(CARD_4, 0),
  70. MESON_PIN(CARD_5, 0),
  71. MESON_PIN(CARD_6, 0),
  72. MESON_PIN(BOOT_0, 0),
  73. MESON_PIN(BOOT_1, 0),
  74. MESON_PIN(BOOT_2, 0),
  75. MESON_PIN(BOOT_3, 0),
  76. MESON_PIN(BOOT_4, 0),
  77. MESON_PIN(BOOT_5, 0),
  78. MESON_PIN(BOOT_6, 0),
  79. MESON_PIN(BOOT_7, 0),
  80. MESON_PIN(BOOT_8, 0),
  81. MESON_PIN(BOOT_9, 0),
  82. MESON_PIN(BOOT_10, 0),
  83. MESON_PIN(BOOT_11, 0),
  84. MESON_PIN(BOOT_12, 0),
  85. MESON_PIN(BOOT_13, 0),
  86. MESON_PIN(BOOT_14, 0),
  87. MESON_PIN(BOOT_15, 0),
  88. MESON_PIN(BOOT_16, 0),
  89. MESON_PIN(BOOT_17, 0),
  90. MESON_PIN(BOOT_18, 0),
  91. MESON_PIN(DIF_0_P, 0),
  92. MESON_PIN(DIF_0_N, 0),
  93. MESON_PIN(DIF_1_P, 0),
  94. MESON_PIN(DIF_1_N, 0),
  95. MESON_PIN(DIF_2_P, 0),
  96. MESON_PIN(DIF_2_N, 0),
  97. MESON_PIN(DIF_3_P, 0),
  98. MESON_PIN(DIF_3_N, 0),
  99. MESON_PIN(DIF_4_P, 0),
  100. MESON_PIN(DIF_4_N, 0),
  101. };
  102. static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
  103. MESON_PIN(GPIOAO_0, AO_OFF),
  104. MESON_PIN(GPIOAO_1, AO_OFF),
  105. MESON_PIN(GPIOAO_2, AO_OFF),
  106. MESON_PIN(GPIOAO_3, AO_OFF),
  107. MESON_PIN(GPIOAO_4, AO_OFF),
  108. MESON_PIN(GPIOAO_5, AO_OFF),
  109. MESON_PIN(GPIOAO_6, AO_OFF),
  110. MESON_PIN(GPIOAO_7, AO_OFF),
  111. MESON_PIN(GPIOAO_8, AO_OFF),
  112. MESON_PIN(GPIOAO_9, AO_OFF),
  113. MESON_PIN(GPIOAO_10, AO_OFF),
  114. MESON_PIN(GPIOAO_11, AO_OFF),
  115. MESON_PIN(GPIOAO_12, AO_OFF),
  116. MESON_PIN(GPIOAO_13, AO_OFF),
  117. MESON_PIN(GPIO_BSD_EN, AO_OFF),
  118. MESON_PIN(GPIO_TEST_N, AO_OFF),
  119. };
  120. /* bank X */
  121. static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) };
  122. static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) };
  123. static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) };
  124. static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) };
  125. static const unsigned int sdxc_d0_0_a_pins[] = { PIN(GPIOX_4, 0) };
  126. static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),
  127. PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };
  128. static const unsigned int sdxc_d13_0_a_pins[] = { PIN(GPIOX_5, 0), PIN(GPIOX_6, 0),
  129. PIN(GPIOX_7, 0) };
  130. static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) };
  131. static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
  132. static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) };
  133. static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) };
  134. static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) };
  135. static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) };
  136. static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) };
  137. static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) };
  138. static const unsigned int sdxc_d0_1_a_pins[] = { PIN(GPIOX_0, 0) };
  139. static const unsigned int sdxc_d13_1_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),
  140. PIN(GPIOX_3, 0) };
  141. static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) };
  142. static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) };
  143. static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) };
  144. static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) };
  145. static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) };
  146. static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
  147. static const unsigned int pwm_vs_0_pins[] = { PIN(GPIOX_10, 0) };
  148. static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) };
  149. static const unsigned int pwm_vs_1_pins[] = { PIN(GPIOX_11, 0) };
  150. static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_4, 0) };
  151. static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_5, 0) };
  152. static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_6, 0) };
  153. static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_7, 0) };
  154. static const unsigned int uart_tx_b1_pins[] = { PIN(GPIOX_8, 0) };
  155. static const unsigned int uart_rx_b1_pins[] = { PIN(GPIOX_9, 0) };
  156. static const unsigned int uart_cts_b1_pins[] = { PIN(GPIOX_10, 0) };
  157. static const unsigned int uart_rts_b1_pins[] = { PIN(GPIOX_20, 0) };
  158. static const unsigned int iso7816_0_clk_pins[] = { PIN(GPIOX_6, 0) };
  159. static const unsigned int iso7816_0_data_pins[] = { PIN(GPIOX_7, 0) };
  160. static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOX_8, 0) };
  161. static const unsigned int spi_miso_0_pins[] = { PIN(GPIOX_9, 0) };
  162. static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOX_10, 0) };
  163. static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) };
  164. static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) };
  165. static const unsigned int iso7816_1_clk_pins[] = { PIN(GPIOX_18, 0) };
  166. static const unsigned int iso7816_1_data_pins[] = { PIN(GPIOX_19, 0) };
  167. static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOX_20, 0) };
  168. static const unsigned int tsin_clk_b_pins[] = { PIN(GPIOX_8, 0) };
  169. static const unsigned int tsin_sop_b_pins[] = { PIN(GPIOX_9, 0) };
  170. static const unsigned int tsin_d0_b_pins[] = { PIN(GPIOX_10, 0) };
  171. static const unsigned int pwm_b_pins[] = { PIN(GPIOX_11, 0) };
  172. static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) };
  173. static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) };
  174. static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, 0) };
  175. /* bank Y */
  176. static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, 0) };
  177. static const unsigned int tsin_sop_a_pins[] = { PIN(GPIOY_1, 0) };
  178. static const unsigned int tsin_d17_a_pins[] = { PIN(GPIOY_6, 0), PIN(GPIOY_7, 0),
  179. PIN(GPIOY_10, 0), PIN(GPIOY_11, 0),
  180. PIN(GPIOY_12, 0), PIN(GPIOY_13, 0),
  181. PIN(GPIOY_14, 0) };
  182. static const unsigned int tsin_clk_a_pins[] = { PIN(GPIOY_8, 0) };
  183. static const unsigned int tsin_d0_a_pins[] = { PIN(GPIOY_9, 0) };
  184. static const unsigned int spdif_out_0_pins[] = { PIN(GPIOY_3, 0) };
  185. static const unsigned int xtal_24m_pins[] = { PIN(GPIOY_3, 0) };
  186. static const unsigned int iso7816_2_clk_pins[] = { PIN(GPIOY_13, 0) };
  187. static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, 0) };
  188. /* bank DV */
  189. static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) };
  190. static const unsigned int pwm_c0_pins[] = { PIN(GPIODV_29, 0) };
  191. static const unsigned int pwm_vs_2_pins[] = { PIN(GPIODV_9, 0) };
  192. static const unsigned int pwm_vs_3_pins[] = { PIN(GPIODV_28, 0) };
  193. static const unsigned int pwm_vs_4_pins[] = { PIN(GPIODV_29, 0) };
  194. static const unsigned int xtal24_out_pins[] = { PIN(GPIODV_29, 0) };
  195. static const unsigned int uart_tx_c_pins[] = { PIN(GPIODV_24, 0) };
  196. static const unsigned int uart_rx_c_pins[] = { PIN(GPIODV_25, 0) };
  197. static const unsigned int uart_cts_c_pins[] = { PIN(GPIODV_26, 0) };
  198. static const unsigned int uart_rts_c_pins[] = { PIN(GPIODV_27, 0) };
  199. static const unsigned int pwm_c1_pins[] = { PIN(GPIODV_9, 0) };
  200. static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, 0) };
  201. static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, 0) };
  202. static const unsigned int i2c_sda_b0_pins[] = { PIN(GPIODV_26, 0) };
  203. static const unsigned int i2c_sck_b0_pins[] = { PIN(GPIODV_27, 0) };
  204. static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIODV_28, 0) };
  205. static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIODV_29, 0) };
  206. /* bank H */
  207. static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) };
  208. static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) };
  209. static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) };
  210. static const unsigned int hdmi_cec_0_pins[] = { PIN(GPIOH_3, 0) };
  211. static const unsigned int eth_txd1_0_pins[] = { PIN(GPIOH_5, 0) };
  212. static const unsigned int eth_txd0_0_pins[] = { PIN(GPIOH_6, 0) };
  213. static const unsigned int clk_24m_out_pins[] = { PIN(GPIOH_9, 0) };
  214. static const unsigned int spi_ss1_pins[] = { PIN(GPIOH_0, 0) };
  215. static const unsigned int spi_ss2_pins[] = { PIN(GPIOH_1, 0) };
  216. static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOH_3, 0) };
  217. static const unsigned int spi_miso_1_pins[] = { PIN(GPIOH_4, 0) };
  218. static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOH_5, 0) };
  219. static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOH_6, 0) };
  220. static const unsigned int eth_txd3_pins[] = { PIN(GPIOH_7, 0) };
  221. static const unsigned int eth_txd2_pins[] = { PIN(GPIOH_8, 0) };
  222. static const unsigned int eth_tx_clk_pins[] = { PIN(GPIOH_9, 0) };
  223. static const unsigned int i2c_sda_b1_pins[] = { PIN(GPIOH_3, 0) };
  224. static const unsigned int i2c_sck_b1_pins[] = { PIN(GPIOH_4, 0) };
  225. static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOH_5, 0) };
  226. static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOH_6, 0) };
  227. static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) };
  228. static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) };
  229. /* bank BOOT */
  230. static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0),
  231. PIN(BOOT_2, 0), PIN(BOOT_3, 0),
  232. PIN(BOOT_4, 0), PIN(BOOT_5, 0),
  233. PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
  234. static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) };
  235. static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) };
  236. static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) };
  237. static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) };
  238. static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) };
  239. static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) };
  240. static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) };
  241. static const unsigned int nand_dqs_0_pins[] = { PIN(BOOT_15, 0) };
  242. static const unsigned int nand_dqs_1_pins[] = { PIN(BOOT_18, 0) };
  243. static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)};
  244. static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0),
  245. PIN(BOOT_3, 0) };
  246. static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0),
  247. PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
  248. static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_8, 0) };
  249. static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_10, 0) };
  250. static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) };
  251. static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) };
  252. static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) };
  253. static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) };
  254. static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) };
  255. static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) };
  256. static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) };
  257. static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) };
  258. static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_8, 0) };
  259. static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_10, 0) };
  260. /* bank CARD */
  261. static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) };
  262. static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) };
  263. static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) };
  264. static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) };
  265. static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) };
  266. static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) };
  267. static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0),
  268. PIN(CARD_5, 0) };
  269. static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) };
  270. static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) };
  271. static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) };
  272. /* bank AO */
  273. static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) };
  274. static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) };
  275. static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) };
  276. static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  277. static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  278. static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  279. static const unsigned int clk_32k_in_out_pins[] = { PIN(GPIOAO_6, AO_OFF) };
  280. static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) };
  281. static const unsigned int hdmi_cec_1_pins[] = { PIN(GPIOAO_12, AO_OFF) };
  282. static const unsigned int ir_blaster_pins[] = { PIN(GPIOAO_13, AO_OFF) };
  283. static const unsigned int pwm_c2_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  284. static const unsigned int i2c_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  285. static const unsigned int i2c_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  286. static const unsigned int ir_remote_out_pins[] = { PIN(GPIOAO_7, AO_OFF) };
  287. static const unsigned int i2s_am_clk_out_pins[] = { PIN(GPIOAO_8, AO_OFF) };
  288. static const unsigned int i2s_ao_clk_out_pins[] = { PIN(GPIOAO_9, AO_OFF) };
  289. static const unsigned int i2s_lr_clk_out_pins[] = { PIN(GPIOAO_10, AO_OFF) };
  290. static const unsigned int i2s_out_01_pins[] = { PIN(GPIOAO_11, AO_OFF) };
  291. static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) };
  292. static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) };
  293. static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, AO_OFF) };
  294. static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  295. static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  296. static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  297. static const unsigned int spdif_out_1_pins[] = { PIN(GPIOAO_6, AO_OFF) };
  298. static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOAO_6, AO_OFF) };
  299. static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOAO_9, AO_OFF) };
  300. static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOAO_10, AO_OFF) };
  301. /* bank DIF */
  302. static const unsigned int eth_rxd1_pins[] = { PIN(DIF_0_P, 0) };
  303. static const unsigned int eth_rxd0_pins[] = { PIN(DIF_0_N, 0) };
  304. static const unsigned int eth_rx_dv_pins[] = { PIN(DIF_1_P, 0) };
  305. static const unsigned int eth_rx_clk_pins[] = { PIN(DIF_1_N, 0) };
  306. static const unsigned int eth_txd0_1_pins[] = { PIN(DIF_2_P, 0) };
  307. static const unsigned int eth_txd1_1_pins[] = { PIN(DIF_2_N, 0) };
  308. static const unsigned int eth_tx_en_pins[] = { PIN(DIF_3_P, 0) };
  309. static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, 0) };
  310. static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) };
  311. static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) };
  312. static struct meson_pmx_group meson8b_cbus_groups[] = {
  313. GPIO_GROUP(GPIOX_0, 0),
  314. GPIO_GROUP(GPIOX_1, 0),
  315. GPIO_GROUP(GPIOX_2, 0),
  316. GPIO_GROUP(GPIOX_3, 0),
  317. GPIO_GROUP(GPIOX_4, 0),
  318. GPIO_GROUP(GPIOX_5, 0),
  319. GPIO_GROUP(GPIOX_6, 0),
  320. GPIO_GROUP(GPIOX_7, 0),
  321. GPIO_GROUP(GPIOX_8, 0),
  322. GPIO_GROUP(GPIOX_9, 0),
  323. GPIO_GROUP(GPIOX_10, 0),
  324. GPIO_GROUP(GPIOX_11, 0),
  325. GPIO_GROUP(GPIOX_16, 0),
  326. GPIO_GROUP(GPIOX_17, 0),
  327. GPIO_GROUP(GPIOX_18, 0),
  328. GPIO_GROUP(GPIOX_19, 0),
  329. GPIO_GROUP(GPIOX_20, 0),
  330. GPIO_GROUP(GPIOX_21, 0),
  331. GPIO_GROUP(GPIOY_0, 0),
  332. GPIO_GROUP(GPIOY_1, 0),
  333. GPIO_GROUP(GPIOY_3, 0),
  334. GPIO_GROUP(GPIOY_6, 0),
  335. GPIO_GROUP(GPIOY_7, 0),
  336. GPIO_GROUP(GPIOY_8, 0),
  337. GPIO_GROUP(GPIOY_9, 0),
  338. GPIO_GROUP(GPIOY_10, 0),
  339. GPIO_GROUP(GPIOY_11, 0),
  340. GPIO_GROUP(GPIOY_12, 0),
  341. GPIO_GROUP(GPIOY_13, 0),
  342. GPIO_GROUP(GPIOY_14, 0),
  343. GPIO_GROUP(GPIODV_9, 0),
  344. GPIO_GROUP(GPIODV_24, 0),
  345. GPIO_GROUP(GPIODV_25, 0),
  346. GPIO_GROUP(GPIODV_26, 0),
  347. GPIO_GROUP(GPIODV_27, 0),
  348. GPIO_GROUP(GPIODV_28, 0),
  349. GPIO_GROUP(GPIODV_29, 0),
  350. GPIO_GROUP(GPIOH_0, 0),
  351. GPIO_GROUP(GPIOH_1, 0),
  352. GPIO_GROUP(GPIOH_2, 0),
  353. GPIO_GROUP(GPIOH_3, 0),
  354. GPIO_GROUP(GPIOH_4, 0),
  355. GPIO_GROUP(GPIOH_5, 0),
  356. GPIO_GROUP(GPIOH_6, 0),
  357. GPIO_GROUP(GPIOH_7, 0),
  358. GPIO_GROUP(GPIOH_8, 0),
  359. GPIO_GROUP(GPIOH_9, 0),
  360. GPIO_GROUP(DIF_0_P, 0),
  361. GPIO_GROUP(DIF_0_N, 0),
  362. GPIO_GROUP(DIF_1_P, 0),
  363. GPIO_GROUP(DIF_1_N, 0),
  364. GPIO_GROUP(DIF_2_P, 0),
  365. GPIO_GROUP(DIF_2_N, 0),
  366. GPIO_GROUP(DIF_3_P, 0),
  367. GPIO_GROUP(DIF_3_N, 0),
  368. GPIO_GROUP(DIF_4_P, 0),
  369. GPIO_GROUP(DIF_4_N, 0),
  370. /* bank X */
  371. GROUP(sd_d0_a, 8, 5),
  372. GROUP(sd_d1_a, 8, 4),
  373. GROUP(sd_d2_a, 8, 3),
  374. GROUP(sd_d3_a, 8, 2),
  375. GROUP(sdxc_d0_0_a, 5, 29),
  376. GROUP(sdxc_d47_a, 5, 12),
  377. GROUP(sdxc_d13_0_a, 5, 28),
  378. GROUP(sd_clk_a, 8, 1),
  379. GROUP(sd_cmd_a, 8, 0),
  380. GROUP(xtal_32k_out, 3, 22),
  381. GROUP(xtal_24m_out, 3, 20),
  382. GROUP(uart_tx_b0, 4, 9),
  383. GROUP(uart_rx_b0, 4, 8),
  384. GROUP(uart_cts_b0, 4, 7),
  385. GROUP(uart_rts_b0, 4, 6),
  386. GROUP(sdxc_d0_1_a, 5, 14),
  387. GROUP(sdxc_d13_1_a, 5, 13),
  388. GROUP(pcm_out_a, 3, 30),
  389. GROUP(pcm_in_a, 3, 29),
  390. GROUP(pcm_fs_a, 3, 28),
  391. GROUP(pcm_clk_a, 3, 27),
  392. GROUP(sdxc_clk_a, 5, 11),
  393. GROUP(sdxc_cmd_a, 5, 10),
  394. GROUP(pwm_vs_0, 7, 31),
  395. GROUP(pwm_e, 9, 19),
  396. GROUP(pwm_vs_1, 7, 30),
  397. GROUP(uart_tx_a, 4, 17),
  398. GROUP(uart_rx_a, 4, 16),
  399. GROUP(uart_cts_a, 4, 15),
  400. GROUP(uart_rts_a, 4, 14),
  401. GROUP(uart_tx_b1, 6, 19),
  402. GROUP(uart_rx_b1, 6, 18),
  403. GROUP(uart_cts_b1, 6, 17),
  404. GROUP(uart_rts_b1, 6, 16),
  405. GROUP(iso7816_0_clk, 5, 9),
  406. GROUP(iso7816_0_data, 5, 8),
  407. GROUP(spi_sclk_0, 4, 22),
  408. GROUP(spi_miso_0, 4, 24),
  409. GROUP(spi_mosi_0, 4, 23),
  410. GROUP(iso7816_det, 4, 21),
  411. GROUP(iso7816_reset, 4, 20),
  412. GROUP(iso7816_1_clk, 4, 19),
  413. GROUP(iso7816_1_data, 4, 18),
  414. GROUP(spi_ss0_0, 4, 25),
  415. GROUP(tsin_clk_b, 3, 6),
  416. GROUP(tsin_sop_b, 3, 7),
  417. GROUP(tsin_d0_b, 3, 8),
  418. GROUP(pwm_b, 2, 3),
  419. GROUP(i2c_sda_d0, 4, 5),
  420. GROUP(i2c_sck_d0, 4, 4),
  421. GROUP(tsin_d_valid_b, 3, 9),
  422. /* bank Y */
  423. GROUP(tsin_d_valid_a, 3, 2),
  424. GROUP(tsin_sop_a, 3, 1),
  425. GROUP(tsin_d17_a, 3, 5),
  426. GROUP(tsin_clk_a, 3, 0),
  427. GROUP(tsin_d0_a, 3, 4),
  428. GROUP(spdif_out_0, 1, 7),
  429. GROUP(xtal_24m, 3, 18),
  430. GROUP(iso7816_2_clk, 5, 7),
  431. GROUP(iso7816_2_data, 5, 6),
  432. /* bank DV */
  433. GROUP(pwm_d, 3, 26),
  434. GROUP(pwm_c0, 3, 25),
  435. GROUP(pwm_vs_2, 7, 28),
  436. GROUP(pwm_vs_3, 7, 27),
  437. GROUP(pwm_vs_4, 7, 26),
  438. GROUP(xtal24_out, 7, 25),
  439. GROUP(uart_tx_c, 6, 23),
  440. GROUP(uart_rx_c, 6, 22),
  441. GROUP(uart_cts_c, 6, 21),
  442. GROUP(uart_rts_c, 6, 20),
  443. GROUP(pwm_c1, 3, 24),
  444. GROUP(i2c_sda_a, 9, 31),
  445. GROUP(i2c_sck_a, 9, 30),
  446. GROUP(i2c_sda_b0, 9, 29),
  447. GROUP(i2c_sck_b0, 9, 28),
  448. GROUP(i2c_sda_c0, 9, 27),
  449. GROUP(i2c_sck_c0, 9, 26),
  450. /* bank H */
  451. GROUP(hdmi_hpd, 1, 26),
  452. GROUP(hdmi_sda, 1, 25),
  453. GROUP(hdmi_scl, 1, 24),
  454. GROUP(hdmi_cec_0, 1, 23),
  455. GROUP(eth_txd1_0, 7, 21),
  456. GROUP(eth_txd0_0, 7, 20),
  457. GROUP(clk_24m_out, 4, 1),
  458. GROUP(spi_ss1, 8, 11),
  459. GROUP(spi_ss2, 8, 12),
  460. GROUP(spi_ss0_1, 9, 13),
  461. GROUP(spi_miso_1, 9, 12),
  462. GROUP(spi_mosi_1, 9, 11),
  463. GROUP(spi_sclk_1, 9, 10),
  464. GROUP(eth_txd3, 6, 13),
  465. GROUP(eth_txd2, 6, 12),
  466. GROUP(eth_tx_clk, 6, 11),
  467. GROUP(i2c_sda_b1, 5, 27),
  468. GROUP(i2c_sck_b1, 5, 26),
  469. GROUP(i2c_sda_c1, 5, 25),
  470. GROUP(i2c_sck_c1, 5, 24),
  471. GROUP(i2c_sda_d1, 4, 3),
  472. GROUP(i2c_sck_d1, 4, 2),
  473. /* bank BOOT */
  474. GROUP(nand_io, 2, 26),
  475. GROUP(nand_io_ce0, 2, 25),
  476. GROUP(nand_io_ce1, 2, 24),
  477. GROUP(nand_io_rb0, 2, 17),
  478. GROUP(nand_ale, 2, 21),
  479. GROUP(nand_cle, 2, 20),
  480. GROUP(nand_wen_clk, 2, 19),
  481. GROUP(nand_ren_clk, 2, 18),
  482. GROUP(nand_dqs_0, 2, 27),
  483. GROUP(nand_dqs_1, 2, 28),
  484. GROUP(sdxc_d0_c, 4, 30),
  485. GROUP(sdxc_d13_c, 4, 29),
  486. GROUP(sdxc_d47_c, 4, 28),
  487. GROUP(sdxc_clk_c, 7, 19),
  488. GROUP(sdxc_cmd_c, 7, 18),
  489. GROUP(nor_d, 5, 1),
  490. GROUP(nor_q, 5, 3),
  491. GROUP(nor_c, 5, 2),
  492. GROUP(nor_cs, 5, 0),
  493. GROUP(sd_d0_c, 6, 29),
  494. GROUP(sd_d1_c, 6, 28),
  495. GROUP(sd_d2_c, 6, 27),
  496. GROUP(sd_d3_c, 6, 26),
  497. GROUP(sd_cmd_c, 6, 30),
  498. GROUP(sd_clk_c, 6, 31),
  499. /* bank CARD */
  500. GROUP(sd_d1_b, 2, 14),
  501. GROUP(sd_d0_b, 2, 15),
  502. GROUP(sd_clk_b, 2, 11),
  503. GROUP(sd_cmd_b, 2, 10),
  504. GROUP(sd_d3_b, 2, 12),
  505. GROUP(sd_d2_b, 2, 13),
  506. GROUP(sdxc_d13_b, 2, 6),
  507. GROUP(sdxc_d0_b, 2, 7),
  508. GROUP(sdxc_clk_b, 2, 5),
  509. GROUP(sdxc_cmd_b, 2, 4),
  510. /* bank DIF */
  511. GROUP(eth_rxd1, 6, 0),
  512. GROUP(eth_rxd0, 6, 1),
  513. GROUP(eth_rx_dv, 6, 2),
  514. GROUP(eth_rx_clk, 6, 3),
  515. GROUP(eth_txd0_1, 6, 4),
  516. GROUP(eth_txd1_1, 6, 5),
  517. GROUP(eth_tx_en, 6, 6),
  518. GROUP(eth_ref_clk, 6, 8),
  519. GROUP(eth_mdc, 6, 9),
  520. GROUP(eth_mdio_en, 6, 10),
  521. };
  522. static struct meson_pmx_group meson8b_aobus_groups[] = {
  523. GPIO_GROUP(GPIOAO_0, AO_OFF),
  524. GPIO_GROUP(GPIOAO_1, AO_OFF),
  525. GPIO_GROUP(GPIOAO_2, AO_OFF),
  526. GPIO_GROUP(GPIOAO_3, AO_OFF),
  527. GPIO_GROUP(GPIOAO_4, AO_OFF),
  528. GPIO_GROUP(GPIOAO_5, AO_OFF),
  529. GPIO_GROUP(GPIOAO_6, AO_OFF),
  530. GPIO_GROUP(GPIOAO_7, AO_OFF),
  531. GPIO_GROUP(GPIOAO_8, AO_OFF),
  532. GPIO_GROUP(GPIOAO_9, AO_OFF),
  533. GPIO_GROUP(GPIOAO_10, AO_OFF),
  534. GPIO_GROUP(GPIOAO_11, AO_OFF),
  535. GPIO_GROUP(GPIOAO_12, AO_OFF),
  536. GPIO_GROUP(GPIOAO_13, AO_OFF),
  537. GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
  538. GPIO_GROUP(GPIO_TEST_N, AO_OFF),
  539. /* bank AO */
  540. GROUP(uart_tx_ao_a, 0, 12),
  541. GROUP(uart_rx_ao_a, 0, 11),
  542. GROUP(uart_cts_ao_a, 0, 10),
  543. GROUP(uart_rts_ao_a, 0, 9),
  544. GROUP(i2c_mst_sck_ao, 0, 6),
  545. GROUP(i2c_mst_sda_ao, 0, 5),
  546. GROUP(clk_32k_in_out, 0, 18),
  547. GROUP(remote_input, 0, 0),
  548. GROUP(hdmi_cec_1, 0, 17),
  549. GROUP(ir_blaster, 0, 31),
  550. GROUP(pwm_c2, 0, 22),
  551. GROUP(i2c_sck_ao, 0, 2),
  552. GROUP(i2c_sda_ao, 0, 1),
  553. GROUP(ir_remote_out, 0, 21),
  554. GROUP(i2s_am_clk_out, 0, 30),
  555. GROUP(i2s_ao_clk_out, 0, 29),
  556. GROUP(i2s_lr_clk_out, 0, 28),
  557. GROUP(i2s_out_01, 0, 27),
  558. GROUP(uart_tx_ao_b0, 0, 26),
  559. GROUP(uart_rx_ao_b0, 0, 25),
  560. GROUP(uart_cts_ao_b, 0, 8),
  561. GROUP(uart_rts_ao_b, 0, 7),
  562. GROUP(uart_tx_ao_b1, 0, 24),
  563. GROUP(uart_rx_ao_b1, 0, 23),
  564. GROUP(spdif_out_1, 0, 16),
  565. GROUP(i2s_in_ch01, 0, 13),
  566. GROUP(i2s_ao_clk_in, 0, 15),
  567. GROUP(i2s_lr_clk_in, 0, 14),
  568. };
  569. static const char * const gpio_groups[] = {
  570. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  571. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  572. "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
  573. "GPIOX_19", "GPIOX_20", "GPIOX_21",
  574. "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
  575. "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
  576. "GPIOY_13", "GPIOY_14",
  577. "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
  578. "GPIODV_27", "GPIODV_28", "GPIODV_29",
  579. "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
  580. "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
  581. "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
  582. "CARD_5", "CARD_6",
  583. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  584. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  585. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  586. "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
  587. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
  588. "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
  589. "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
  590. "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N",
  591. "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
  592. "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
  593. "DIF_4_P", "DIF_4_N"
  594. };
  595. static const char * const sd_a_groups[] = {
  596. "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
  597. "sd_cmd_a"
  598. };
  599. static const char * const sdxc_a_groups[] = {
  600. "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
  601. "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d0_13_1_a"
  602. };
  603. static const char * const pcm_a_groups[] = {
  604. "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
  605. };
  606. static const char * const uart_a_groups[] = {
  607. "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
  608. };
  609. static const char * const uart_b_groups[] = {
  610. "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
  611. "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
  612. };
  613. static const char * const iso7816_groups[] = {
  614. "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
  615. "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
  616. };
  617. static const char * const i2c_d_groups[] = {
  618. "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
  619. };
  620. static const char * const xtal_groups[] = {
  621. "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
  622. };
  623. static const char * const uart_c_groups[] = {
  624. "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
  625. };
  626. static const char * const i2c_c_groups[] = {
  627. "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
  628. };
  629. static const char * const hdmi_groups[] = {
  630. "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
  631. };
  632. static const char * const hdmi_cec_groups[] = {
  633. "hdmi_cec_1"
  634. };
  635. static const char * const spi_groups[] = {
  636. "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
  637. "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
  638. "spi_miso_1", "spi_ss2"
  639. };
  640. static const char * const ethernet_groups[] = {
  641. "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
  642. "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
  643. "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
  644. "eth_txd2", "eth_txd3"
  645. };
  646. static const char * const i2c_a_groups[] = {
  647. "i2c_sda_a", "i2c_sck_a",
  648. };
  649. static const char * const i2c_b_groups[] = {
  650. "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
  651. };
  652. static const char * const sd_c_groups[] = {
  653. "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
  654. "sd_cmd_c", "sd_clk_c"
  655. };
  656. static const char * const sdxc_c_groups[] = {
  657. "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
  658. "sdxc_clk_c"
  659. };
  660. static const char * const nand_groups[] = {
  661. "nand_io", "nand_io_ce0", "nand_io_ce1",
  662. "nand_io_rb0", "nand_ale", "nand_cle",
  663. "nand_wen_clk", "nand_ren_clk", "nand_dqs_0",
  664. "nand_dqs_1"
  665. };
  666. static const char * const nor_groups[] = {
  667. "nor_d", "nor_q", "nor_c", "nor_cs"
  668. };
  669. static const char * const sd_b_groups[] = {
  670. "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
  671. "sd_d3_b", "sd_d2_b"
  672. };
  673. static const char * const sdxc_b_groups[] = {
  674. "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
  675. };
  676. static const char * const uart_ao_groups[] = {
  677. "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
  678. };
  679. static const char * const remote_groups[] = {
  680. "remote_input", "ir_blaster", "ir_remote_out"
  681. };
  682. static const char * const i2c_slave_ao_groups[] = {
  683. "i2c_sck_ao", "i2c_sda_ao"
  684. };
  685. static const char * const uart_ao_b_groups[] = {
  686. "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
  687. "uart_cts_ao_b", "uart_rts_ao_b"
  688. };
  689. static const char * const i2c_mst_ao_groups[] = {
  690. "i2c_mst_sck_ao", "i2c_mst_sda_ao"
  691. };
  692. static const char * const clk_24m_groups[] = {
  693. "clk_24m_out"
  694. };
  695. static const char * const clk_32k_groups[] = {
  696. "clk_32k_in_out"
  697. };
  698. static const char * const spdif_0_groups[] = {
  699. "spdif_out_0"
  700. };
  701. static const char * const spdif_1_groups[] = {
  702. "spdif_out_1"
  703. };
  704. static const char * const i2s_groups[] = {
  705. "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
  706. "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
  707. "i2s_lr_clk_in"
  708. };
  709. static const char * const pwm_b_groups[] = {
  710. "pwm_b"
  711. };
  712. static const char * const pwm_c_groups[] = {
  713. "pwm_c0", "pwm_c1"
  714. };
  715. static const char * const pwm_c_ao_groups[] = {
  716. "pwm_c2"
  717. };
  718. static const char * const pwm_d_groups[] = {
  719. "pwm_d"
  720. };
  721. static const char * const pwm_e_groups[] = {
  722. "pwm_e"
  723. };
  724. static const char * const pwm_vs_groups[] = {
  725. "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
  726. "pwm_vs_3", "pwm_vs_4"
  727. };
  728. static const char * const tsin_a_groups[] = {
  729. "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
  730. "tsin_d_valid_a"
  731. };
  732. static const char * const tsin_b_groups[] = {
  733. "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
  734. };
  735. static struct meson_pmx_func meson8b_cbus_functions[] = {
  736. FUNCTION(gpio),
  737. FUNCTION(sd_a),
  738. FUNCTION(sdxc_a),
  739. FUNCTION(pcm_a),
  740. FUNCTION(uart_a),
  741. FUNCTION(uart_b),
  742. FUNCTION(iso7816),
  743. FUNCTION(i2c_d),
  744. FUNCTION(xtal),
  745. FUNCTION(uart_c),
  746. FUNCTION(i2c_c),
  747. FUNCTION(hdmi),
  748. FUNCTION(spi),
  749. FUNCTION(ethernet),
  750. FUNCTION(i2c_a),
  751. FUNCTION(i2c_b),
  752. FUNCTION(sd_c),
  753. FUNCTION(sdxc_c),
  754. FUNCTION(nand),
  755. FUNCTION(nor),
  756. FUNCTION(sd_b),
  757. FUNCTION(sdxc_b),
  758. FUNCTION(spdif_0),
  759. FUNCTION(pwm_b),
  760. FUNCTION(pwm_c),
  761. FUNCTION(pwm_d),
  762. FUNCTION(pwm_e),
  763. FUNCTION(pwm_vs),
  764. FUNCTION(tsin_a),
  765. FUNCTION(tsin_b),
  766. FUNCTION(clk_24m),
  767. };
  768. static struct meson_pmx_func meson8b_aobus_functions[] = {
  769. FUNCTION(uart_ao),
  770. FUNCTION(uart_ao_b),
  771. FUNCTION(i2c_slave_ao),
  772. FUNCTION(i2c_mst_ao),
  773. FUNCTION(i2s),
  774. FUNCTION(remote),
  775. FUNCTION(clk_32k),
  776. FUNCTION(pwm_c_ao),
  777. FUNCTION(spdif_1),
  778. FUNCTION(hdmi_cec),
  779. };
  780. static struct meson_bank meson8b_cbus_banks[] = {
  781. /* name first last pullen pull dir out in */
  782. BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
  783. BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
  784. BANK("DV", PIN(GPIODV_9, 0), PIN(GPIODV_29, 0), 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
  785. BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
  786. BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
  787. BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
  788. BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
  789. };
  790. static struct meson_bank meson8b_aobus_banks[] = {
  791. /* name first last pullen pull dir out in */
  792. BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
  793. };
  794. struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
  795. .name = "cbus-banks",
  796. .pin_base = 0,
  797. .pins = meson8b_cbus_pins,
  798. .groups = meson8b_cbus_groups,
  799. .funcs = meson8b_cbus_functions,
  800. .banks = meson8b_cbus_banks,
  801. .num_pins = ARRAY_SIZE(meson8b_cbus_pins),
  802. .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
  803. .num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
  804. .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
  805. };
  806. struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
  807. .name = "aobus-banks",
  808. .pin_base = 130,
  809. .pins = meson8b_aobus_pins,
  810. .groups = meson8b_aobus_groups,
  811. .funcs = meson8b_aobus_functions,
  812. .banks = meson8b_aobus_banks,
  813. .num_pins = ARRAY_SIZE(meson8b_aobus_pins),
  814. .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
  815. .num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
  816. .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
  817. };