ntb_transport.c 55 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243
  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2012 Intel Corporation. All rights reserved.
  8. * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * BSD LICENSE
  15. *
  16. * Copyright(c) 2012 Intel Corporation. All rights reserved.
  17. * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions
  21. * are met:
  22. *
  23. * * Redistributions of source code must retain the above copyright
  24. * notice, this list of conditions and the following disclaimer.
  25. * * Redistributions in binary form must reproduce the above copy
  26. * notice, this list of conditions and the following disclaimer in
  27. * the documentation and/or other materials provided with the
  28. * distribution.
  29. * * Neither the name of Intel Corporation nor the names of its
  30. * contributors may be used to endorse or promote products derived
  31. * from this software without specific prior written permission.
  32. *
  33. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  34. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  35. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  36. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  37. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  38. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  39. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  40. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  41. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  42. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  43. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  44. *
  45. * PCIe NTB Transport Linux driver
  46. *
  47. * Contact Information:
  48. * Jon Mason <jon.mason@intel.com>
  49. */
  50. #include <linux/debugfs.h>
  51. #include <linux/delay.h>
  52. #include <linux/dmaengine.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/errno.h>
  55. #include <linux/export.h>
  56. #include <linux/interrupt.h>
  57. #include <linux/module.h>
  58. #include <linux/pci.h>
  59. #include <linux/slab.h>
  60. #include <linux/types.h>
  61. #include <linux/uaccess.h>
  62. #include "linux/ntb.h"
  63. #include "linux/ntb_transport.h"
  64. #define NTB_TRANSPORT_VERSION 4
  65. #define NTB_TRANSPORT_VER "4"
  66. #define NTB_TRANSPORT_NAME "ntb_transport"
  67. #define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB"
  68. MODULE_DESCRIPTION(NTB_TRANSPORT_DESC);
  69. MODULE_VERSION(NTB_TRANSPORT_VER);
  70. MODULE_LICENSE("Dual BSD/GPL");
  71. MODULE_AUTHOR("Intel Corporation");
  72. static unsigned long max_mw_size;
  73. module_param(max_mw_size, ulong, 0644);
  74. MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
  75. static unsigned int transport_mtu = 0x10000;
  76. module_param(transport_mtu, uint, 0644);
  77. MODULE_PARM_DESC(transport_mtu, "Maximum size of NTB transport packets");
  78. static unsigned char max_num_clients;
  79. module_param(max_num_clients, byte, 0644);
  80. MODULE_PARM_DESC(max_num_clients, "Maximum number of NTB transport clients");
  81. static unsigned int copy_bytes = 1024;
  82. module_param(copy_bytes, uint, 0644);
  83. MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA");
  84. static bool use_dma;
  85. module_param(use_dma, bool, 0644);
  86. MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy");
  87. static struct dentry *nt_debugfs_dir;
  88. struct ntb_queue_entry {
  89. /* ntb_queue list reference */
  90. struct list_head entry;
  91. /* pointers to data to be transferred */
  92. void *cb_data;
  93. void *buf;
  94. unsigned int len;
  95. unsigned int flags;
  96. int retries;
  97. int errors;
  98. unsigned int tx_index;
  99. unsigned int rx_index;
  100. struct ntb_transport_qp *qp;
  101. union {
  102. struct ntb_payload_header __iomem *tx_hdr;
  103. struct ntb_payload_header *rx_hdr;
  104. };
  105. };
  106. struct ntb_rx_info {
  107. unsigned int entry;
  108. };
  109. struct ntb_transport_qp {
  110. struct ntb_transport_ctx *transport;
  111. struct ntb_dev *ndev;
  112. void *cb_data;
  113. struct dma_chan *tx_dma_chan;
  114. struct dma_chan *rx_dma_chan;
  115. bool client_ready;
  116. bool link_is_up;
  117. bool active;
  118. u8 qp_num; /* Only 64 QP's are allowed. 0-63 */
  119. u64 qp_bit;
  120. struct ntb_rx_info __iomem *rx_info;
  121. struct ntb_rx_info *remote_rx_info;
  122. void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data,
  123. void *data, int len);
  124. struct list_head tx_free_q;
  125. spinlock_t ntb_tx_free_q_lock;
  126. void __iomem *tx_mw;
  127. dma_addr_t tx_mw_phys;
  128. unsigned int tx_index;
  129. unsigned int tx_max_entry;
  130. unsigned int tx_max_frame;
  131. void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data,
  132. void *data, int len);
  133. struct list_head rx_post_q;
  134. struct list_head rx_pend_q;
  135. struct list_head rx_free_q;
  136. /* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
  137. spinlock_t ntb_rx_q_lock;
  138. void *rx_buff;
  139. unsigned int rx_index;
  140. unsigned int rx_max_entry;
  141. unsigned int rx_max_frame;
  142. unsigned int rx_alloc_entry;
  143. dma_cookie_t last_cookie;
  144. struct tasklet_struct rxc_db_work;
  145. void (*event_handler)(void *data, int status);
  146. struct delayed_work link_work;
  147. struct work_struct link_cleanup;
  148. struct dentry *debugfs_dir;
  149. struct dentry *debugfs_stats;
  150. /* Stats */
  151. u64 rx_bytes;
  152. u64 rx_pkts;
  153. u64 rx_ring_empty;
  154. u64 rx_err_no_buf;
  155. u64 rx_err_oflow;
  156. u64 rx_err_ver;
  157. u64 rx_memcpy;
  158. u64 rx_async;
  159. u64 tx_bytes;
  160. u64 tx_pkts;
  161. u64 tx_ring_full;
  162. u64 tx_err_no_buf;
  163. u64 tx_memcpy;
  164. u64 tx_async;
  165. };
  166. struct ntb_transport_mw {
  167. phys_addr_t phys_addr;
  168. resource_size_t phys_size;
  169. resource_size_t xlat_align;
  170. resource_size_t xlat_align_size;
  171. void __iomem *vbase;
  172. size_t xlat_size;
  173. size_t buff_size;
  174. void *virt_addr;
  175. dma_addr_t dma_addr;
  176. };
  177. struct ntb_transport_client_dev {
  178. struct list_head entry;
  179. struct ntb_transport_ctx *nt;
  180. struct device dev;
  181. };
  182. struct ntb_transport_ctx {
  183. struct list_head entry;
  184. struct list_head client_devs;
  185. struct ntb_dev *ndev;
  186. struct ntb_transport_mw *mw_vec;
  187. struct ntb_transport_qp *qp_vec;
  188. unsigned int mw_count;
  189. unsigned int qp_count;
  190. u64 qp_bitmap;
  191. u64 qp_bitmap_free;
  192. bool link_is_up;
  193. struct delayed_work link_work;
  194. struct work_struct link_cleanup;
  195. struct dentry *debugfs_node_dir;
  196. };
  197. enum {
  198. DESC_DONE_FLAG = BIT(0),
  199. LINK_DOWN_FLAG = BIT(1),
  200. };
  201. struct ntb_payload_header {
  202. unsigned int ver;
  203. unsigned int len;
  204. unsigned int flags;
  205. };
  206. enum {
  207. VERSION = 0,
  208. QP_LINKS,
  209. NUM_QPS,
  210. NUM_MWS,
  211. MW0_SZ_HIGH,
  212. MW0_SZ_LOW,
  213. MW1_SZ_HIGH,
  214. MW1_SZ_LOW,
  215. MAX_SPAD,
  216. };
  217. #define dev_client_dev(__dev) \
  218. container_of((__dev), struct ntb_transport_client_dev, dev)
  219. #define drv_client(__drv) \
  220. container_of((__drv), struct ntb_transport_client, driver)
  221. #define QP_TO_MW(nt, qp) ((qp) % nt->mw_count)
  222. #define NTB_QP_DEF_NUM_ENTRIES 100
  223. #define NTB_LINK_DOWN_TIMEOUT 10
  224. static void ntb_transport_rxc_db(unsigned long data);
  225. static const struct ntb_ctx_ops ntb_transport_ops;
  226. static struct ntb_client ntb_transport_client;
  227. static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
  228. struct ntb_queue_entry *entry);
  229. static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset);
  230. static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset);
  231. static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset);
  232. static int ntb_transport_bus_match(struct device *dev,
  233. struct device_driver *drv)
  234. {
  235. return !strncmp(dev_name(dev), drv->name, strlen(drv->name));
  236. }
  237. static int ntb_transport_bus_probe(struct device *dev)
  238. {
  239. const struct ntb_transport_client *client;
  240. int rc = -EINVAL;
  241. get_device(dev);
  242. client = drv_client(dev->driver);
  243. rc = client->probe(dev);
  244. if (rc)
  245. put_device(dev);
  246. return rc;
  247. }
  248. static int ntb_transport_bus_remove(struct device *dev)
  249. {
  250. const struct ntb_transport_client *client;
  251. client = drv_client(dev->driver);
  252. client->remove(dev);
  253. put_device(dev);
  254. return 0;
  255. }
  256. static struct bus_type ntb_transport_bus = {
  257. .name = "ntb_transport",
  258. .match = ntb_transport_bus_match,
  259. .probe = ntb_transport_bus_probe,
  260. .remove = ntb_transport_bus_remove,
  261. };
  262. static LIST_HEAD(ntb_transport_list);
  263. static int ntb_bus_init(struct ntb_transport_ctx *nt)
  264. {
  265. list_add_tail(&nt->entry, &ntb_transport_list);
  266. return 0;
  267. }
  268. static void ntb_bus_remove(struct ntb_transport_ctx *nt)
  269. {
  270. struct ntb_transport_client_dev *client_dev, *cd;
  271. list_for_each_entry_safe(client_dev, cd, &nt->client_devs, entry) {
  272. dev_err(client_dev->dev.parent, "%s still attached to bus, removing\n",
  273. dev_name(&client_dev->dev));
  274. list_del(&client_dev->entry);
  275. device_unregister(&client_dev->dev);
  276. }
  277. list_del(&nt->entry);
  278. }
  279. static void ntb_transport_client_release(struct device *dev)
  280. {
  281. struct ntb_transport_client_dev *client_dev;
  282. client_dev = dev_client_dev(dev);
  283. kfree(client_dev);
  284. }
  285. /**
  286. * ntb_transport_unregister_client_dev - Unregister NTB client device
  287. * @device_name: Name of NTB client device
  288. *
  289. * Unregister an NTB client device with the NTB transport layer
  290. */
  291. void ntb_transport_unregister_client_dev(char *device_name)
  292. {
  293. struct ntb_transport_client_dev *client, *cd;
  294. struct ntb_transport_ctx *nt;
  295. list_for_each_entry(nt, &ntb_transport_list, entry)
  296. list_for_each_entry_safe(client, cd, &nt->client_devs, entry)
  297. if (!strncmp(dev_name(&client->dev), device_name,
  298. strlen(device_name))) {
  299. list_del(&client->entry);
  300. device_unregister(&client->dev);
  301. }
  302. }
  303. EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev);
  304. /**
  305. * ntb_transport_register_client_dev - Register NTB client device
  306. * @device_name: Name of NTB client device
  307. *
  308. * Register an NTB client device with the NTB transport layer
  309. */
  310. int ntb_transport_register_client_dev(char *device_name)
  311. {
  312. struct ntb_transport_client_dev *client_dev;
  313. struct ntb_transport_ctx *nt;
  314. int node;
  315. int rc, i = 0;
  316. if (list_empty(&ntb_transport_list))
  317. return -ENODEV;
  318. list_for_each_entry(nt, &ntb_transport_list, entry) {
  319. struct device *dev;
  320. node = dev_to_node(&nt->ndev->dev);
  321. client_dev = kzalloc_node(sizeof(*client_dev),
  322. GFP_KERNEL, node);
  323. if (!client_dev) {
  324. rc = -ENOMEM;
  325. goto err;
  326. }
  327. dev = &client_dev->dev;
  328. /* setup and register client devices */
  329. dev_set_name(dev, "%s%d", device_name, i);
  330. dev->bus = &ntb_transport_bus;
  331. dev->release = ntb_transport_client_release;
  332. dev->parent = &nt->ndev->dev;
  333. rc = device_register(dev);
  334. if (rc) {
  335. kfree(client_dev);
  336. goto err;
  337. }
  338. list_add_tail(&client_dev->entry, &nt->client_devs);
  339. i++;
  340. }
  341. return 0;
  342. err:
  343. ntb_transport_unregister_client_dev(device_name);
  344. return rc;
  345. }
  346. EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev);
  347. /**
  348. * ntb_transport_register_client - Register NTB client driver
  349. * @drv: NTB client driver to be registered
  350. *
  351. * Register an NTB client driver with the NTB transport layer
  352. *
  353. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  354. */
  355. int ntb_transport_register_client(struct ntb_transport_client *drv)
  356. {
  357. drv->driver.bus = &ntb_transport_bus;
  358. if (list_empty(&ntb_transport_list))
  359. return -ENODEV;
  360. return driver_register(&drv->driver);
  361. }
  362. EXPORT_SYMBOL_GPL(ntb_transport_register_client);
  363. /**
  364. * ntb_transport_unregister_client - Unregister NTB client driver
  365. * @drv: NTB client driver to be unregistered
  366. *
  367. * Unregister an NTB client driver with the NTB transport layer
  368. *
  369. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  370. */
  371. void ntb_transport_unregister_client(struct ntb_transport_client *drv)
  372. {
  373. driver_unregister(&drv->driver);
  374. }
  375. EXPORT_SYMBOL_GPL(ntb_transport_unregister_client);
  376. static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count,
  377. loff_t *offp)
  378. {
  379. struct ntb_transport_qp *qp;
  380. char *buf;
  381. ssize_t ret, out_offset, out_count;
  382. qp = filp->private_data;
  383. if (!qp || !qp->link_is_up)
  384. return 0;
  385. out_count = 1000;
  386. buf = kmalloc(out_count, GFP_KERNEL);
  387. if (!buf)
  388. return -ENOMEM;
  389. out_offset = 0;
  390. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  391. "\nNTB QP stats:\n\n");
  392. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  393. "rx_bytes - \t%llu\n", qp->rx_bytes);
  394. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  395. "rx_pkts - \t%llu\n", qp->rx_pkts);
  396. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  397. "rx_memcpy - \t%llu\n", qp->rx_memcpy);
  398. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  399. "rx_async - \t%llu\n", qp->rx_async);
  400. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  401. "rx_ring_empty - %llu\n", qp->rx_ring_empty);
  402. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  403. "rx_err_no_buf - %llu\n", qp->rx_err_no_buf);
  404. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  405. "rx_err_oflow - \t%llu\n", qp->rx_err_oflow);
  406. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  407. "rx_err_ver - \t%llu\n", qp->rx_err_ver);
  408. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  409. "rx_buff - \t0x%p\n", qp->rx_buff);
  410. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  411. "rx_index - \t%u\n", qp->rx_index);
  412. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  413. "rx_max_entry - \t%u\n", qp->rx_max_entry);
  414. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  415. "rx_alloc_entry - \t%u\n\n", qp->rx_alloc_entry);
  416. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  417. "tx_bytes - \t%llu\n", qp->tx_bytes);
  418. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  419. "tx_pkts - \t%llu\n", qp->tx_pkts);
  420. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  421. "tx_memcpy - \t%llu\n", qp->tx_memcpy);
  422. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  423. "tx_async - \t%llu\n", qp->tx_async);
  424. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  425. "tx_ring_full - \t%llu\n", qp->tx_ring_full);
  426. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  427. "tx_err_no_buf - %llu\n", qp->tx_err_no_buf);
  428. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  429. "tx_mw - \t0x%p\n", qp->tx_mw);
  430. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  431. "tx_index (H) - \t%u\n", qp->tx_index);
  432. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  433. "RRI (T) - \t%u\n",
  434. qp->remote_rx_info->entry);
  435. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  436. "tx_max_entry - \t%u\n", qp->tx_max_entry);
  437. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  438. "free tx - \t%u\n",
  439. ntb_transport_tx_free_entry(qp));
  440. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  441. "\n");
  442. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  443. "Using TX DMA - \t%s\n",
  444. qp->tx_dma_chan ? "Yes" : "No");
  445. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  446. "Using RX DMA - \t%s\n",
  447. qp->rx_dma_chan ? "Yes" : "No");
  448. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  449. "QP Link - \t%s\n",
  450. qp->link_is_up ? "Up" : "Down");
  451. out_offset += snprintf(buf + out_offset, out_count - out_offset,
  452. "\n");
  453. if (out_offset > out_count)
  454. out_offset = out_count;
  455. ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
  456. kfree(buf);
  457. return ret;
  458. }
  459. static const struct file_operations ntb_qp_debugfs_stats = {
  460. .owner = THIS_MODULE,
  461. .open = simple_open,
  462. .read = debugfs_read,
  463. };
  464. static void ntb_list_add(spinlock_t *lock, struct list_head *entry,
  465. struct list_head *list)
  466. {
  467. unsigned long flags;
  468. spin_lock_irqsave(lock, flags);
  469. list_add_tail(entry, list);
  470. spin_unlock_irqrestore(lock, flags);
  471. }
  472. static struct ntb_queue_entry *ntb_list_rm(spinlock_t *lock,
  473. struct list_head *list)
  474. {
  475. struct ntb_queue_entry *entry;
  476. unsigned long flags;
  477. spin_lock_irqsave(lock, flags);
  478. if (list_empty(list)) {
  479. entry = NULL;
  480. goto out;
  481. }
  482. entry = list_first_entry(list, struct ntb_queue_entry, entry);
  483. list_del(&entry->entry);
  484. out:
  485. spin_unlock_irqrestore(lock, flags);
  486. return entry;
  487. }
  488. static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock,
  489. struct list_head *list,
  490. struct list_head *to_list)
  491. {
  492. struct ntb_queue_entry *entry;
  493. unsigned long flags;
  494. spin_lock_irqsave(lock, flags);
  495. if (list_empty(list)) {
  496. entry = NULL;
  497. } else {
  498. entry = list_first_entry(list, struct ntb_queue_entry, entry);
  499. list_move_tail(&entry->entry, to_list);
  500. }
  501. spin_unlock_irqrestore(lock, flags);
  502. return entry;
  503. }
  504. static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
  505. unsigned int qp_num)
  506. {
  507. struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
  508. struct ntb_transport_mw *mw;
  509. struct ntb_dev *ndev = nt->ndev;
  510. struct ntb_queue_entry *entry;
  511. unsigned int rx_size, num_qps_mw;
  512. unsigned int mw_num, mw_count, qp_count;
  513. unsigned int i;
  514. int node;
  515. mw_count = nt->mw_count;
  516. qp_count = nt->qp_count;
  517. mw_num = QP_TO_MW(nt, qp_num);
  518. mw = &nt->mw_vec[mw_num];
  519. if (!mw->virt_addr)
  520. return -ENOMEM;
  521. if (mw_num < qp_count % mw_count)
  522. num_qps_mw = qp_count / mw_count + 1;
  523. else
  524. num_qps_mw = qp_count / mw_count;
  525. rx_size = (unsigned int)mw->xlat_size / num_qps_mw;
  526. qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);
  527. rx_size -= sizeof(struct ntb_rx_info);
  528. qp->remote_rx_info = qp->rx_buff + rx_size;
  529. /* Due to housekeeping, there must be atleast 2 buffs */
  530. qp->rx_max_frame = min(transport_mtu, rx_size / 2);
  531. qp->rx_max_entry = rx_size / qp->rx_max_frame;
  532. qp->rx_index = 0;
  533. /*
  534. * Checking to see if we have more entries than the default.
  535. * We should add additional entries if that is the case so we
  536. * can be in sync with the transport frames.
  537. */
  538. node = dev_to_node(&ndev->dev);
  539. for (i = qp->rx_alloc_entry; i < qp->rx_max_entry; i++) {
  540. entry = kzalloc_node(sizeof(*entry), GFP_ATOMIC, node);
  541. if (!entry)
  542. return -ENOMEM;
  543. entry->qp = qp;
  544. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
  545. &qp->rx_free_q);
  546. qp->rx_alloc_entry++;
  547. }
  548. qp->remote_rx_info->entry = qp->rx_max_entry - 1;
  549. /* setup the hdr offsets with 0's */
  550. for (i = 0; i < qp->rx_max_entry; i++) {
  551. void *offset = (qp->rx_buff + qp->rx_max_frame * (i + 1) -
  552. sizeof(struct ntb_payload_header));
  553. memset(offset, 0, sizeof(struct ntb_payload_header));
  554. }
  555. qp->rx_pkts = 0;
  556. qp->tx_pkts = 0;
  557. qp->tx_index = 0;
  558. return 0;
  559. }
  560. static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw)
  561. {
  562. struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
  563. struct pci_dev *pdev = nt->ndev->pdev;
  564. if (!mw->virt_addr)
  565. return;
  566. ntb_mw_clear_trans(nt->ndev, num_mw);
  567. dma_free_coherent(&pdev->dev, mw->buff_size,
  568. mw->virt_addr, mw->dma_addr);
  569. mw->xlat_size = 0;
  570. mw->buff_size = 0;
  571. mw->virt_addr = NULL;
  572. }
  573. static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
  574. resource_size_t size)
  575. {
  576. struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
  577. struct pci_dev *pdev = nt->ndev->pdev;
  578. size_t xlat_size, buff_size;
  579. int rc;
  580. if (!size)
  581. return -EINVAL;
  582. xlat_size = round_up(size, mw->xlat_align_size);
  583. buff_size = round_up(size, mw->xlat_align);
  584. /* No need to re-setup */
  585. if (mw->xlat_size == xlat_size)
  586. return 0;
  587. if (mw->buff_size)
  588. ntb_free_mw(nt, num_mw);
  589. /* Alloc memory for receiving data. Must be aligned */
  590. mw->xlat_size = xlat_size;
  591. mw->buff_size = buff_size;
  592. mw->virt_addr = dma_alloc_coherent(&pdev->dev, buff_size,
  593. &mw->dma_addr, GFP_KERNEL);
  594. if (!mw->virt_addr) {
  595. mw->xlat_size = 0;
  596. mw->buff_size = 0;
  597. dev_err(&pdev->dev, "Unable to alloc MW buff of size %zu\n",
  598. buff_size);
  599. return -ENOMEM;
  600. }
  601. /*
  602. * we must ensure that the memory address allocated is BAR size
  603. * aligned in order for the XLAT register to take the value. This
  604. * is a requirement of the hardware. It is recommended to setup CMA
  605. * for BAR sizes equal or greater than 4MB.
  606. */
  607. if (!IS_ALIGNED(mw->dma_addr, mw->xlat_align)) {
  608. dev_err(&pdev->dev, "DMA memory %pad is not aligned\n",
  609. &mw->dma_addr);
  610. ntb_free_mw(nt, num_mw);
  611. return -ENOMEM;
  612. }
  613. /* Notify HW the memory location of the receive buffer */
  614. rc = ntb_mw_set_trans(nt->ndev, num_mw, mw->dma_addr, mw->xlat_size);
  615. if (rc) {
  616. dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);
  617. ntb_free_mw(nt, num_mw);
  618. return -EIO;
  619. }
  620. return 0;
  621. }
  622. static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp)
  623. {
  624. qp->link_is_up = false;
  625. qp->active = false;
  626. qp->tx_index = 0;
  627. qp->rx_index = 0;
  628. qp->rx_bytes = 0;
  629. qp->rx_pkts = 0;
  630. qp->rx_ring_empty = 0;
  631. qp->rx_err_no_buf = 0;
  632. qp->rx_err_oflow = 0;
  633. qp->rx_err_ver = 0;
  634. qp->rx_memcpy = 0;
  635. qp->rx_async = 0;
  636. qp->tx_bytes = 0;
  637. qp->tx_pkts = 0;
  638. qp->tx_ring_full = 0;
  639. qp->tx_err_no_buf = 0;
  640. qp->tx_memcpy = 0;
  641. qp->tx_async = 0;
  642. }
  643. static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp)
  644. {
  645. struct ntb_transport_ctx *nt = qp->transport;
  646. struct pci_dev *pdev = nt->ndev->pdev;
  647. dev_info(&pdev->dev, "qp %d: Link Cleanup\n", qp->qp_num);
  648. cancel_delayed_work_sync(&qp->link_work);
  649. ntb_qp_link_down_reset(qp);
  650. if (qp->event_handler)
  651. qp->event_handler(qp->cb_data, qp->link_is_up);
  652. }
  653. static void ntb_qp_link_cleanup_work(struct work_struct *work)
  654. {
  655. struct ntb_transport_qp *qp = container_of(work,
  656. struct ntb_transport_qp,
  657. link_cleanup);
  658. struct ntb_transport_ctx *nt = qp->transport;
  659. ntb_qp_link_cleanup(qp);
  660. if (nt->link_is_up)
  661. schedule_delayed_work(&qp->link_work,
  662. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  663. }
  664. static void ntb_qp_link_down(struct ntb_transport_qp *qp)
  665. {
  666. schedule_work(&qp->link_cleanup);
  667. }
  668. static void ntb_transport_link_cleanup(struct ntb_transport_ctx *nt)
  669. {
  670. struct ntb_transport_qp *qp;
  671. u64 qp_bitmap_alloc;
  672. int i;
  673. qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
  674. /* Pass along the info to any clients */
  675. for (i = 0; i < nt->qp_count; i++)
  676. if (qp_bitmap_alloc & BIT_ULL(i)) {
  677. qp = &nt->qp_vec[i];
  678. ntb_qp_link_cleanup(qp);
  679. cancel_work_sync(&qp->link_cleanup);
  680. cancel_delayed_work_sync(&qp->link_work);
  681. }
  682. if (!nt->link_is_up)
  683. cancel_delayed_work_sync(&nt->link_work);
  684. /* The scratchpad registers keep the values if the remote side
  685. * goes down, blast them now to give them a sane value the next
  686. * time they are accessed
  687. */
  688. for (i = 0; i < MAX_SPAD; i++)
  689. ntb_spad_write(nt->ndev, i, 0);
  690. }
  691. static void ntb_transport_link_cleanup_work(struct work_struct *work)
  692. {
  693. struct ntb_transport_ctx *nt =
  694. container_of(work, struct ntb_transport_ctx, link_cleanup);
  695. ntb_transport_link_cleanup(nt);
  696. }
  697. static void ntb_transport_event_callback(void *data)
  698. {
  699. struct ntb_transport_ctx *nt = data;
  700. if (ntb_link_is_up(nt->ndev, NULL, NULL) == 1)
  701. schedule_delayed_work(&nt->link_work, 0);
  702. else
  703. schedule_work(&nt->link_cleanup);
  704. }
  705. static void ntb_transport_link_work(struct work_struct *work)
  706. {
  707. struct ntb_transport_ctx *nt =
  708. container_of(work, struct ntb_transport_ctx, link_work.work);
  709. struct ntb_dev *ndev = nt->ndev;
  710. struct pci_dev *pdev = ndev->pdev;
  711. resource_size_t size;
  712. u32 val;
  713. int rc = 0, i, spad;
  714. /* send the local info, in the opposite order of the way we read it */
  715. for (i = 0; i < nt->mw_count; i++) {
  716. size = nt->mw_vec[i].phys_size;
  717. if (max_mw_size && size > max_mw_size)
  718. size = max_mw_size;
  719. spad = MW0_SZ_HIGH + (i * 2);
  720. ntb_peer_spad_write(ndev, spad, upper_32_bits(size));
  721. spad = MW0_SZ_LOW + (i * 2);
  722. ntb_peer_spad_write(ndev, spad, lower_32_bits(size));
  723. }
  724. ntb_peer_spad_write(ndev, NUM_MWS, nt->mw_count);
  725. ntb_peer_spad_write(ndev, NUM_QPS, nt->qp_count);
  726. ntb_peer_spad_write(ndev, VERSION, NTB_TRANSPORT_VERSION);
  727. /* Query the remote side for its info */
  728. val = ntb_spad_read(ndev, VERSION);
  729. dev_dbg(&pdev->dev, "Remote version = %d\n", val);
  730. if (val != NTB_TRANSPORT_VERSION)
  731. goto out;
  732. val = ntb_spad_read(ndev, NUM_QPS);
  733. dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val);
  734. if (val != nt->qp_count)
  735. goto out;
  736. val = ntb_spad_read(ndev, NUM_MWS);
  737. dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val);
  738. if (val != nt->mw_count)
  739. goto out;
  740. for (i = 0; i < nt->mw_count; i++) {
  741. u64 val64;
  742. val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2));
  743. val64 = (u64)val << 32;
  744. val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2));
  745. val64 |= val;
  746. dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);
  747. rc = ntb_set_mw(nt, i, val64);
  748. if (rc)
  749. goto out1;
  750. }
  751. nt->link_is_up = true;
  752. for (i = 0; i < nt->qp_count; i++) {
  753. struct ntb_transport_qp *qp = &nt->qp_vec[i];
  754. ntb_transport_setup_qp_mw(nt, i);
  755. if (qp->client_ready)
  756. schedule_delayed_work(&qp->link_work, 0);
  757. }
  758. return;
  759. out1:
  760. for (i = 0; i < nt->mw_count; i++)
  761. ntb_free_mw(nt, i);
  762. /* if there's an actual failure, we should just bail */
  763. if (rc < 0)
  764. return;
  765. out:
  766. if (ntb_link_is_up(ndev, NULL, NULL) == 1)
  767. schedule_delayed_work(&nt->link_work,
  768. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  769. }
  770. static void ntb_qp_link_work(struct work_struct *work)
  771. {
  772. struct ntb_transport_qp *qp = container_of(work,
  773. struct ntb_transport_qp,
  774. link_work.work);
  775. struct pci_dev *pdev = qp->ndev->pdev;
  776. struct ntb_transport_ctx *nt = qp->transport;
  777. int val;
  778. WARN_ON(!nt->link_is_up);
  779. val = ntb_spad_read(nt->ndev, QP_LINKS);
  780. ntb_peer_spad_write(nt->ndev, QP_LINKS, val | BIT(qp->qp_num));
  781. /* query remote spad for qp ready bits */
  782. ntb_peer_spad_read(nt->ndev, QP_LINKS);
  783. dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val);
  784. /* See if the remote side is up */
  785. if (val & BIT(qp->qp_num)) {
  786. dev_info(&pdev->dev, "qp %d: Link Up\n", qp->qp_num);
  787. qp->link_is_up = true;
  788. qp->active = true;
  789. if (qp->event_handler)
  790. qp->event_handler(qp->cb_data, qp->link_is_up);
  791. if (qp->active)
  792. tasklet_schedule(&qp->rxc_db_work);
  793. } else if (nt->link_is_up)
  794. schedule_delayed_work(&qp->link_work,
  795. msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
  796. }
  797. static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
  798. unsigned int qp_num)
  799. {
  800. struct ntb_transport_qp *qp;
  801. phys_addr_t mw_base;
  802. resource_size_t mw_size;
  803. unsigned int num_qps_mw, tx_size;
  804. unsigned int mw_num, mw_count, qp_count;
  805. u64 qp_offset;
  806. mw_count = nt->mw_count;
  807. qp_count = nt->qp_count;
  808. mw_num = QP_TO_MW(nt, qp_num);
  809. qp = &nt->qp_vec[qp_num];
  810. qp->qp_num = qp_num;
  811. qp->transport = nt;
  812. qp->ndev = nt->ndev;
  813. qp->client_ready = false;
  814. qp->event_handler = NULL;
  815. ntb_qp_link_down_reset(qp);
  816. if (mw_num < qp_count % mw_count)
  817. num_qps_mw = qp_count / mw_count + 1;
  818. else
  819. num_qps_mw = qp_count / mw_count;
  820. mw_base = nt->mw_vec[mw_num].phys_addr;
  821. mw_size = nt->mw_vec[mw_num].phys_size;
  822. if (max_mw_size && mw_size > max_mw_size)
  823. mw_size = max_mw_size;
  824. tx_size = (unsigned int)mw_size / num_qps_mw;
  825. qp_offset = tx_size * (qp_num / mw_count);
  826. qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;
  827. if (!qp->tx_mw)
  828. return -EINVAL;
  829. qp->tx_mw_phys = mw_base + qp_offset;
  830. if (!qp->tx_mw_phys)
  831. return -EINVAL;
  832. tx_size -= sizeof(struct ntb_rx_info);
  833. qp->rx_info = qp->tx_mw + tx_size;
  834. /* Due to housekeeping, there must be atleast 2 buffs */
  835. qp->tx_max_frame = min(transport_mtu, tx_size / 2);
  836. qp->tx_max_entry = tx_size / qp->tx_max_frame;
  837. if (nt->debugfs_node_dir) {
  838. char debugfs_name[4];
  839. snprintf(debugfs_name, 4, "qp%d", qp_num);
  840. qp->debugfs_dir = debugfs_create_dir(debugfs_name,
  841. nt->debugfs_node_dir);
  842. qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
  843. qp->debugfs_dir, qp,
  844. &ntb_qp_debugfs_stats);
  845. } else {
  846. qp->debugfs_dir = NULL;
  847. qp->debugfs_stats = NULL;
  848. }
  849. INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
  850. INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
  851. spin_lock_init(&qp->ntb_rx_q_lock);
  852. spin_lock_init(&qp->ntb_tx_free_q_lock);
  853. INIT_LIST_HEAD(&qp->rx_post_q);
  854. INIT_LIST_HEAD(&qp->rx_pend_q);
  855. INIT_LIST_HEAD(&qp->rx_free_q);
  856. INIT_LIST_HEAD(&qp->tx_free_q);
  857. tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
  858. (unsigned long)qp);
  859. return 0;
  860. }
  861. static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
  862. {
  863. struct ntb_transport_ctx *nt;
  864. struct ntb_transport_mw *mw;
  865. unsigned int mw_count, qp_count;
  866. u64 qp_bitmap;
  867. int node;
  868. int rc, i;
  869. mw_count = ntb_mw_count(ndev);
  870. if (ntb_spad_count(ndev) < (NUM_MWS + 1 + mw_count * 2)) {
  871. dev_err(&ndev->dev, "Not enough scratch pad registers for %s",
  872. NTB_TRANSPORT_NAME);
  873. return -EIO;
  874. }
  875. if (ntb_db_is_unsafe(ndev))
  876. dev_dbg(&ndev->dev,
  877. "doorbell is unsafe, proceed anyway...\n");
  878. if (ntb_spad_is_unsafe(ndev))
  879. dev_dbg(&ndev->dev,
  880. "scratchpad is unsafe, proceed anyway...\n");
  881. node = dev_to_node(&ndev->dev);
  882. nt = kzalloc_node(sizeof(*nt), GFP_KERNEL, node);
  883. if (!nt)
  884. return -ENOMEM;
  885. nt->ndev = ndev;
  886. nt->mw_count = mw_count;
  887. nt->mw_vec = kzalloc_node(mw_count * sizeof(*nt->mw_vec),
  888. GFP_KERNEL, node);
  889. if (!nt->mw_vec) {
  890. rc = -ENOMEM;
  891. goto err;
  892. }
  893. for (i = 0; i < mw_count; i++) {
  894. mw = &nt->mw_vec[i];
  895. rc = ntb_mw_get_range(ndev, i, &mw->phys_addr, &mw->phys_size,
  896. &mw->xlat_align, &mw->xlat_align_size);
  897. if (rc)
  898. goto err1;
  899. mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
  900. if (!mw->vbase) {
  901. rc = -ENOMEM;
  902. goto err1;
  903. }
  904. mw->buff_size = 0;
  905. mw->xlat_size = 0;
  906. mw->virt_addr = NULL;
  907. mw->dma_addr = 0;
  908. }
  909. qp_bitmap = ntb_db_valid_mask(ndev);
  910. qp_count = ilog2(qp_bitmap);
  911. if (max_num_clients && max_num_clients < qp_count)
  912. qp_count = max_num_clients;
  913. else if (nt->mw_count < qp_count)
  914. qp_count = nt->mw_count;
  915. qp_bitmap &= BIT_ULL(qp_count) - 1;
  916. nt->qp_count = qp_count;
  917. nt->qp_bitmap = qp_bitmap;
  918. nt->qp_bitmap_free = qp_bitmap;
  919. nt->qp_vec = kzalloc_node(qp_count * sizeof(*nt->qp_vec),
  920. GFP_KERNEL, node);
  921. if (!nt->qp_vec) {
  922. rc = -ENOMEM;
  923. goto err1;
  924. }
  925. if (nt_debugfs_dir) {
  926. nt->debugfs_node_dir =
  927. debugfs_create_dir(pci_name(ndev->pdev),
  928. nt_debugfs_dir);
  929. }
  930. for (i = 0; i < qp_count; i++) {
  931. rc = ntb_transport_init_queue(nt, i);
  932. if (rc)
  933. goto err2;
  934. }
  935. INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work);
  936. INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work);
  937. rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops);
  938. if (rc)
  939. goto err2;
  940. INIT_LIST_HEAD(&nt->client_devs);
  941. rc = ntb_bus_init(nt);
  942. if (rc)
  943. goto err3;
  944. nt->link_is_up = false;
  945. ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
  946. ntb_link_event(ndev);
  947. return 0;
  948. err3:
  949. ntb_clear_ctx(ndev);
  950. err2:
  951. kfree(nt->qp_vec);
  952. err1:
  953. while (i--) {
  954. mw = &nt->mw_vec[i];
  955. iounmap(mw->vbase);
  956. }
  957. kfree(nt->mw_vec);
  958. err:
  959. kfree(nt);
  960. return rc;
  961. }
  962. static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev)
  963. {
  964. struct ntb_transport_ctx *nt = ndev->ctx;
  965. struct ntb_transport_qp *qp;
  966. u64 qp_bitmap_alloc;
  967. int i;
  968. ntb_transport_link_cleanup(nt);
  969. cancel_work_sync(&nt->link_cleanup);
  970. cancel_delayed_work_sync(&nt->link_work);
  971. qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
  972. /* verify that all the qp's are freed */
  973. for (i = 0; i < nt->qp_count; i++) {
  974. qp = &nt->qp_vec[i];
  975. if (qp_bitmap_alloc & BIT_ULL(i))
  976. ntb_transport_free_queue(qp);
  977. debugfs_remove_recursive(qp->debugfs_dir);
  978. }
  979. ntb_link_disable(ndev);
  980. ntb_clear_ctx(ndev);
  981. ntb_bus_remove(nt);
  982. for (i = nt->mw_count; i--; ) {
  983. ntb_free_mw(nt, i);
  984. iounmap(nt->mw_vec[i].vbase);
  985. }
  986. kfree(nt->qp_vec);
  987. kfree(nt->mw_vec);
  988. kfree(nt);
  989. }
  990. static void ntb_complete_rxc(struct ntb_transport_qp *qp)
  991. {
  992. struct ntb_queue_entry *entry;
  993. void *cb_data;
  994. unsigned int len;
  995. unsigned long irqflags;
  996. spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
  997. while (!list_empty(&qp->rx_post_q)) {
  998. entry = list_first_entry(&qp->rx_post_q,
  999. struct ntb_queue_entry, entry);
  1000. if (!(entry->flags & DESC_DONE_FLAG))
  1001. break;
  1002. entry->rx_hdr->flags = 0;
  1003. iowrite32(entry->rx_index, &qp->rx_info->entry);
  1004. cb_data = entry->cb_data;
  1005. len = entry->len;
  1006. list_move_tail(&entry->entry, &qp->rx_free_q);
  1007. spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
  1008. if (qp->rx_handler && qp->client_ready)
  1009. qp->rx_handler(qp, qp->cb_data, cb_data, len);
  1010. spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
  1011. }
  1012. spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
  1013. }
  1014. static void ntb_rx_copy_callback(void *data,
  1015. const struct dmaengine_result *res)
  1016. {
  1017. struct ntb_queue_entry *entry = data;
  1018. /* we need to check DMA results if we are using DMA */
  1019. if (res) {
  1020. enum dmaengine_tx_result dma_err = res->result;
  1021. switch (dma_err) {
  1022. case DMA_TRANS_READ_FAILED:
  1023. case DMA_TRANS_WRITE_FAILED:
  1024. entry->errors++;
  1025. case DMA_TRANS_ABORTED:
  1026. {
  1027. struct ntb_transport_qp *qp = entry->qp;
  1028. void *offset = qp->rx_buff + qp->rx_max_frame *
  1029. qp->rx_index;
  1030. ntb_memcpy_rx(entry, offset);
  1031. qp->rx_memcpy++;
  1032. return;
  1033. }
  1034. case DMA_TRANS_NOERROR:
  1035. default:
  1036. break;
  1037. }
  1038. }
  1039. entry->flags |= DESC_DONE_FLAG;
  1040. ntb_complete_rxc(entry->qp);
  1041. }
  1042. static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset)
  1043. {
  1044. void *buf = entry->buf;
  1045. size_t len = entry->len;
  1046. memcpy(buf, offset, len);
  1047. /* Ensure that the data is fully copied out before clearing the flag */
  1048. wmb();
  1049. ntb_rx_copy_callback(entry, NULL);
  1050. }
  1051. static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset)
  1052. {
  1053. struct dma_async_tx_descriptor *txd;
  1054. struct ntb_transport_qp *qp = entry->qp;
  1055. struct dma_chan *chan = qp->rx_dma_chan;
  1056. struct dma_device *device;
  1057. size_t pay_off, buff_off, len;
  1058. struct dmaengine_unmap_data *unmap;
  1059. dma_cookie_t cookie;
  1060. void *buf = entry->buf;
  1061. len = entry->len;
  1062. device = chan->device;
  1063. pay_off = (size_t)offset & ~PAGE_MASK;
  1064. buff_off = (size_t)buf & ~PAGE_MASK;
  1065. if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
  1066. goto err;
  1067. unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
  1068. if (!unmap)
  1069. goto err;
  1070. unmap->len = len;
  1071. unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
  1072. pay_off, len, DMA_TO_DEVICE);
  1073. if (dma_mapping_error(device->dev, unmap->addr[0]))
  1074. goto err_get_unmap;
  1075. unmap->to_cnt = 1;
  1076. unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
  1077. buff_off, len, DMA_FROM_DEVICE);
  1078. if (dma_mapping_error(device->dev, unmap->addr[1]))
  1079. goto err_get_unmap;
  1080. unmap->from_cnt = 1;
  1081. txd = device->device_prep_dma_memcpy(chan, unmap->addr[1],
  1082. unmap->addr[0], len,
  1083. DMA_PREP_INTERRUPT);
  1084. if (!txd)
  1085. goto err_get_unmap;
  1086. txd->callback_result = ntb_rx_copy_callback;
  1087. txd->callback_param = entry;
  1088. dma_set_unmap(txd, unmap);
  1089. cookie = dmaengine_submit(txd);
  1090. if (dma_submit_error(cookie))
  1091. goto err_set_unmap;
  1092. dmaengine_unmap_put(unmap);
  1093. qp->last_cookie = cookie;
  1094. qp->rx_async++;
  1095. return 0;
  1096. err_set_unmap:
  1097. dmaengine_unmap_put(unmap);
  1098. err_get_unmap:
  1099. dmaengine_unmap_put(unmap);
  1100. err:
  1101. return -ENXIO;
  1102. }
  1103. static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset)
  1104. {
  1105. struct ntb_transport_qp *qp = entry->qp;
  1106. struct dma_chan *chan = qp->rx_dma_chan;
  1107. int res;
  1108. if (!chan)
  1109. goto err;
  1110. if (entry->len < copy_bytes)
  1111. goto err;
  1112. res = ntb_async_rx_submit(entry, offset);
  1113. if (res < 0)
  1114. goto err;
  1115. if (!entry->retries)
  1116. qp->rx_async++;
  1117. return;
  1118. err:
  1119. ntb_memcpy_rx(entry, offset);
  1120. qp->rx_memcpy++;
  1121. }
  1122. static int ntb_process_rxc(struct ntb_transport_qp *qp)
  1123. {
  1124. struct ntb_payload_header *hdr;
  1125. struct ntb_queue_entry *entry;
  1126. void *offset;
  1127. offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
  1128. hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
  1129. dev_dbg(&qp->ndev->pdev->dev, "qp %d: RX ver %u len %d flags %x\n",
  1130. qp->qp_num, hdr->ver, hdr->len, hdr->flags);
  1131. if (!(hdr->flags & DESC_DONE_FLAG)) {
  1132. dev_dbg(&qp->ndev->pdev->dev, "done flag not set\n");
  1133. qp->rx_ring_empty++;
  1134. return -EAGAIN;
  1135. }
  1136. if (hdr->flags & LINK_DOWN_FLAG) {
  1137. dev_dbg(&qp->ndev->pdev->dev, "link down flag set\n");
  1138. ntb_qp_link_down(qp);
  1139. hdr->flags = 0;
  1140. return -EAGAIN;
  1141. }
  1142. if (hdr->ver != (u32)qp->rx_pkts) {
  1143. dev_dbg(&qp->ndev->pdev->dev,
  1144. "version mismatch, expected %llu - got %u\n",
  1145. qp->rx_pkts, hdr->ver);
  1146. qp->rx_err_ver++;
  1147. return -EIO;
  1148. }
  1149. entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
  1150. if (!entry) {
  1151. dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
  1152. qp->rx_err_no_buf++;
  1153. return -EAGAIN;
  1154. }
  1155. entry->rx_hdr = hdr;
  1156. entry->rx_index = qp->rx_index;
  1157. if (hdr->len > entry->len) {
  1158. dev_dbg(&qp->ndev->pdev->dev,
  1159. "receive buffer overflow! Wanted %d got %d\n",
  1160. hdr->len, entry->len);
  1161. qp->rx_err_oflow++;
  1162. entry->len = -EIO;
  1163. entry->flags |= DESC_DONE_FLAG;
  1164. ntb_complete_rxc(qp);
  1165. } else {
  1166. dev_dbg(&qp->ndev->pdev->dev,
  1167. "RX OK index %u ver %u size %d into buf size %d\n",
  1168. qp->rx_index, hdr->ver, hdr->len, entry->len);
  1169. qp->rx_bytes += hdr->len;
  1170. qp->rx_pkts++;
  1171. entry->len = hdr->len;
  1172. ntb_async_rx(entry, offset);
  1173. }
  1174. qp->rx_index++;
  1175. qp->rx_index %= qp->rx_max_entry;
  1176. return 0;
  1177. }
  1178. static void ntb_transport_rxc_db(unsigned long data)
  1179. {
  1180. struct ntb_transport_qp *qp = (void *)data;
  1181. int rc, i;
  1182. dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
  1183. __func__, qp->qp_num);
  1184. /* Limit the number of packets processed in a single interrupt to
  1185. * provide fairness to others
  1186. */
  1187. for (i = 0; i < qp->rx_max_entry; i++) {
  1188. rc = ntb_process_rxc(qp);
  1189. if (rc)
  1190. break;
  1191. }
  1192. if (i && qp->rx_dma_chan)
  1193. dma_async_issue_pending(qp->rx_dma_chan);
  1194. if (i == qp->rx_max_entry) {
  1195. /* there is more work to do */
  1196. if (qp->active)
  1197. tasklet_schedule(&qp->rxc_db_work);
  1198. } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) {
  1199. /* the doorbell bit is set: clear it */
  1200. ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num));
  1201. /* ntb_db_read ensures ntb_db_clear write is committed */
  1202. ntb_db_read(qp->ndev);
  1203. /* an interrupt may have arrived between finishing
  1204. * ntb_process_rxc and clearing the doorbell bit:
  1205. * there might be some more work to do.
  1206. */
  1207. if (qp->active)
  1208. tasklet_schedule(&qp->rxc_db_work);
  1209. }
  1210. }
  1211. static void ntb_tx_copy_callback(void *data,
  1212. const struct dmaengine_result *res)
  1213. {
  1214. struct ntb_queue_entry *entry = data;
  1215. struct ntb_transport_qp *qp = entry->qp;
  1216. struct ntb_payload_header __iomem *hdr = entry->tx_hdr;
  1217. /* we need to check DMA results if we are using DMA */
  1218. if (res) {
  1219. enum dmaengine_tx_result dma_err = res->result;
  1220. switch (dma_err) {
  1221. case DMA_TRANS_READ_FAILED:
  1222. case DMA_TRANS_WRITE_FAILED:
  1223. entry->errors++;
  1224. case DMA_TRANS_ABORTED:
  1225. {
  1226. void __iomem *offset =
  1227. qp->tx_mw + qp->tx_max_frame *
  1228. entry->tx_index;
  1229. /* resubmit via CPU */
  1230. ntb_memcpy_tx(entry, offset);
  1231. qp->tx_memcpy++;
  1232. return;
  1233. }
  1234. case DMA_TRANS_NOERROR:
  1235. default:
  1236. break;
  1237. }
  1238. }
  1239. iowrite32(entry->flags | DESC_DONE_FLAG, &hdr->flags);
  1240. ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num));
  1241. /* The entry length can only be zero if the packet is intended to be a
  1242. * "link down" or similar. Since no payload is being sent in these
  1243. * cases, there is nothing to add to the completion queue.
  1244. */
  1245. if (entry->len > 0) {
  1246. qp->tx_bytes += entry->len;
  1247. if (qp->tx_handler)
  1248. qp->tx_handler(qp, qp->cb_data, entry->cb_data,
  1249. entry->len);
  1250. }
  1251. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry, &qp->tx_free_q);
  1252. }
  1253. static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
  1254. {
  1255. #ifdef ARCH_HAS_NOCACHE_UACCESS
  1256. /*
  1257. * Using non-temporal mov to improve performance on non-cached
  1258. * writes, even though we aren't actually copying from user space.
  1259. */
  1260. __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
  1261. #else
  1262. memcpy_toio(offset, entry->buf, entry->len);
  1263. #endif
  1264. /* Ensure that the data is fully copied out before setting the flags */
  1265. wmb();
  1266. ntb_tx_copy_callback(entry, NULL);
  1267. }
  1268. static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
  1269. struct ntb_queue_entry *entry)
  1270. {
  1271. struct dma_async_tx_descriptor *txd;
  1272. struct dma_chan *chan = qp->tx_dma_chan;
  1273. struct dma_device *device;
  1274. size_t len = entry->len;
  1275. void *buf = entry->buf;
  1276. size_t dest_off, buff_off;
  1277. struct dmaengine_unmap_data *unmap;
  1278. dma_addr_t dest;
  1279. dma_cookie_t cookie;
  1280. device = chan->device;
  1281. dest = qp->tx_mw_phys + qp->tx_max_frame * entry->tx_index;
  1282. buff_off = (size_t)buf & ~PAGE_MASK;
  1283. dest_off = (size_t)dest & ~PAGE_MASK;
  1284. if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
  1285. goto err;
  1286. unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
  1287. if (!unmap)
  1288. goto err;
  1289. unmap->len = len;
  1290. unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
  1291. buff_off, len, DMA_TO_DEVICE);
  1292. if (dma_mapping_error(device->dev, unmap->addr[0]))
  1293. goto err_get_unmap;
  1294. unmap->to_cnt = 1;
  1295. txd = device->device_prep_dma_memcpy(chan, dest, unmap->addr[0], len,
  1296. DMA_PREP_INTERRUPT);
  1297. if (!txd)
  1298. goto err_get_unmap;
  1299. txd->callback_result = ntb_tx_copy_callback;
  1300. txd->callback_param = entry;
  1301. dma_set_unmap(txd, unmap);
  1302. cookie = dmaengine_submit(txd);
  1303. if (dma_submit_error(cookie))
  1304. goto err_set_unmap;
  1305. dmaengine_unmap_put(unmap);
  1306. dma_async_issue_pending(chan);
  1307. return 0;
  1308. err_set_unmap:
  1309. dmaengine_unmap_put(unmap);
  1310. err_get_unmap:
  1311. dmaengine_unmap_put(unmap);
  1312. err:
  1313. return -ENXIO;
  1314. }
  1315. static void ntb_async_tx(struct ntb_transport_qp *qp,
  1316. struct ntb_queue_entry *entry)
  1317. {
  1318. struct ntb_payload_header __iomem *hdr;
  1319. struct dma_chan *chan = qp->tx_dma_chan;
  1320. void __iomem *offset;
  1321. int res;
  1322. entry->tx_index = qp->tx_index;
  1323. offset = qp->tx_mw + qp->tx_max_frame * entry->tx_index;
  1324. hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
  1325. entry->tx_hdr = hdr;
  1326. iowrite32(entry->len, &hdr->len);
  1327. iowrite32((u32)qp->tx_pkts, &hdr->ver);
  1328. if (!chan)
  1329. goto err;
  1330. if (entry->len < copy_bytes)
  1331. goto err;
  1332. res = ntb_async_tx_submit(qp, entry);
  1333. if (res < 0)
  1334. goto err;
  1335. if (!entry->retries)
  1336. qp->tx_async++;
  1337. return;
  1338. err:
  1339. ntb_memcpy_tx(entry, offset);
  1340. qp->tx_memcpy++;
  1341. }
  1342. static int ntb_process_tx(struct ntb_transport_qp *qp,
  1343. struct ntb_queue_entry *entry)
  1344. {
  1345. if (qp->tx_index == qp->remote_rx_info->entry) {
  1346. qp->tx_ring_full++;
  1347. return -EAGAIN;
  1348. }
  1349. if (entry->len > qp->tx_max_frame - sizeof(struct ntb_payload_header)) {
  1350. if (qp->tx_handler)
  1351. qp->tx_handler(qp, qp->cb_data, NULL, -EIO);
  1352. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1353. &qp->tx_free_q);
  1354. return 0;
  1355. }
  1356. ntb_async_tx(qp, entry);
  1357. qp->tx_index++;
  1358. qp->tx_index %= qp->tx_max_entry;
  1359. qp->tx_pkts++;
  1360. return 0;
  1361. }
  1362. static void ntb_send_link_down(struct ntb_transport_qp *qp)
  1363. {
  1364. struct pci_dev *pdev = qp->ndev->pdev;
  1365. struct ntb_queue_entry *entry;
  1366. int i, rc;
  1367. if (!qp->link_is_up)
  1368. return;
  1369. dev_info(&pdev->dev, "qp %d: Send Link Down\n", qp->qp_num);
  1370. for (i = 0; i < NTB_LINK_DOWN_TIMEOUT; i++) {
  1371. entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
  1372. if (entry)
  1373. break;
  1374. msleep(100);
  1375. }
  1376. if (!entry)
  1377. return;
  1378. entry->cb_data = NULL;
  1379. entry->buf = NULL;
  1380. entry->len = 0;
  1381. entry->flags = LINK_DOWN_FLAG;
  1382. rc = ntb_process_tx(qp, entry);
  1383. if (rc)
  1384. dev_err(&pdev->dev, "ntb: QP%d unable to send linkdown msg\n",
  1385. qp->qp_num);
  1386. ntb_qp_link_down_reset(qp);
  1387. }
  1388. static bool ntb_dma_filter_fn(struct dma_chan *chan, void *node)
  1389. {
  1390. return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
  1391. }
  1392. /**
  1393. * ntb_transport_create_queue - Create a new NTB transport layer queue
  1394. * @rx_handler: receive callback function
  1395. * @tx_handler: transmit callback function
  1396. * @event_handler: event callback function
  1397. *
  1398. * Create a new NTB transport layer queue and provide the queue with a callback
  1399. * routine for both transmit and receive. The receive callback routine will be
  1400. * used to pass up data when the transport has received it on the queue. The
  1401. * transmit callback routine will be called when the transport has completed the
  1402. * transmission of the data on the queue and the data is ready to be freed.
  1403. *
  1404. * RETURNS: pointer to newly created ntb_queue, NULL on error.
  1405. */
  1406. struct ntb_transport_qp *
  1407. ntb_transport_create_queue(void *data, struct device *client_dev,
  1408. const struct ntb_queue_handlers *handlers)
  1409. {
  1410. struct ntb_dev *ndev;
  1411. struct pci_dev *pdev;
  1412. struct ntb_transport_ctx *nt;
  1413. struct ntb_queue_entry *entry;
  1414. struct ntb_transport_qp *qp;
  1415. u64 qp_bit;
  1416. unsigned int free_queue;
  1417. dma_cap_mask_t dma_mask;
  1418. int node;
  1419. int i;
  1420. ndev = dev_ntb(client_dev->parent);
  1421. pdev = ndev->pdev;
  1422. nt = ndev->ctx;
  1423. node = dev_to_node(&ndev->dev);
  1424. free_queue = ffs(nt->qp_bitmap_free);
  1425. if (!free_queue)
  1426. goto err;
  1427. /* decrement free_queue to make it zero based */
  1428. free_queue--;
  1429. qp = &nt->qp_vec[free_queue];
  1430. qp_bit = BIT_ULL(qp->qp_num);
  1431. nt->qp_bitmap_free &= ~qp_bit;
  1432. qp->cb_data = data;
  1433. qp->rx_handler = handlers->rx_handler;
  1434. qp->tx_handler = handlers->tx_handler;
  1435. qp->event_handler = handlers->event_handler;
  1436. dma_cap_zero(dma_mask);
  1437. dma_cap_set(DMA_MEMCPY, dma_mask);
  1438. if (use_dma) {
  1439. qp->tx_dma_chan =
  1440. dma_request_channel(dma_mask, ntb_dma_filter_fn,
  1441. (void *)(unsigned long)node);
  1442. if (!qp->tx_dma_chan)
  1443. dev_info(&pdev->dev, "Unable to allocate TX DMA channel\n");
  1444. qp->rx_dma_chan =
  1445. dma_request_channel(dma_mask, ntb_dma_filter_fn,
  1446. (void *)(unsigned long)node);
  1447. if (!qp->rx_dma_chan)
  1448. dev_info(&pdev->dev, "Unable to allocate RX DMA channel\n");
  1449. } else {
  1450. qp->tx_dma_chan = NULL;
  1451. qp->rx_dma_chan = NULL;
  1452. }
  1453. dev_dbg(&pdev->dev, "Using %s memcpy for TX\n",
  1454. qp->tx_dma_chan ? "DMA" : "CPU");
  1455. dev_dbg(&pdev->dev, "Using %s memcpy for RX\n",
  1456. qp->rx_dma_chan ? "DMA" : "CPU");
  1457. for (i = 0; i < NTB_QP_DEF_NUM_ENTRIES; i++) {
  1458. entry = kzalloc_node(sizeof(*entry), GFP_ATOMIC, node);
  1459. if (!entry)
  1460. goto err1;
  1461. entry->qp = qp;
  1462. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
  1463. &qp->rx_free_q);
  1464. }
  1465. qp->rx_alloc_entry = NTB_QP_DEF_NUM_ENTRIES;
  1466. for (i = 0; i < qp->tx_max_entry; i++) {
  1467. entry = kzalloc_node(sizeof(*entry), GFP_ATOMIC, node);
  1468. if (!entry)
  1469. goto err2;
  1470. entry->qp = qp;
  1471. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1472. &qp->tx_free_q);
  1473. }
  1474. ntb_db_clear(qp->ndev, qp_bit);
  1475. ntb_db_clear_mask(qp->ndev, qp_bit);
  1476. dev_info(&pdev->dev, "NTB Transport QP %d created\n", qp->qp_num);
  1477. return qp;
  1478. err2:
  1479. while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
  1480. kfree(entry);
  1481. err1:
  1482. qp->rx_alloc_entry = 0;
  1483. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
  1484. kfree(entry);
  1485. if (qp->tx_dma_chan)
  1486. dma_release_channel(qp->tx_dma_chan);
  1487. if (qp->rx_dma_chan)
  1488. dma_release_channel(qp->rx_dma_chan);
  1489. nt->qp_bitmap_free |= qp_bit;
  1490. err:
  1491. return NULL;
  1492. }
  1493. EXPORT_SYMBOL_GPL(ntb_transport_create_queue);
  1494. /**
  1495. * ntb_transport_free_queue - Frees NTB transport queue
  1496. * @qp: NTB queue to be freed
  1497. *
  1498. * Frees NTB transport queue
  1499. */
  1500. void ntb_transport_free_queue(struct ntb_transport_qp *qp)
  1501. {
  1502. struct pci_dev *pdev;
  1503. struct ntb_queue_entry *entry;
  1504. u64 qp_bit;
  1505. if (!qp)
  1506. return;
  1507. pdev = qp->ndev->pdev;
  1508. qp->active = false;
  1509. if (qp->tx_dma_chan) {
  1510. struct dma_chan *chan = qp->tx_dma_chan;
  1511. /* Putting the dma_chan to NULL will force any new traffic to be
  1512. * processed by the CPU instead of the DAM engine
  1513. */
  1514. qp->tx_dma_chan = NULL;
  1515. /* Try to be nice and wait for any queued DMA engine
  1516. * transactions to process before smashing it with a rock
  1517. */
  1518. dma_sync_wait(chan, qp->last_cookie);
  1519. dmaengine_terminate_all(chan);
  1520. dma_release_channel(chan);
  1521. }
  1522. if (qp->rx_dma_chan) {
  1523. struct dma_chan *chan = qp->rx_dma_chan;
  1524. /* Putting the dma_chan to NULL will force any new traffic to be
  1525. * processed by the CPU instead of the DAM engine
  1526. */
  1527. qp->rx_dma_chan = NULL;
  1528. /* Try to be nice and wait for any queued DMA engine
  1529. * transactions to process before smashing it with a rock
  1530. */
  1531. dma_sync_wait(chan, qp->last_cookie);
  1532. dmaengine_terminate_all(chan);
  1533. dma_release_channel(chan);
  1534. }
  1535. qp_bit = BIT_ULL(qp->qp_num);
  1536. ntb_db_set_mask(qp->ndev, qp_bit);
  1537. tasklet_kill(&qp->rxc_db_work);
  1538. cancel_delayed_work_sync(&qp->link_work);
  1539. qp->cb_data = NULL;
  1540. qp->rx_handler = NULL;
  1541. qp->tx_handler = NULL;
  1542. qp->event_handler = NULL;
  1543. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
  1544. kfree(entry);
  1545. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
  1546. dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
  1547. kfree(entry);
  1548. }
  1549. while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
  1550. dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
  1551. kfree(entry);
  1552. }
  1553. while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
  1554. kfree(entry);
  1555. qp->transport->qp_bitmap_free |= qp_bit;
  1556. dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
  1557. }
  1558. EXPORT_SYMBOL_GPL(ntb_transport_free_queue);
  1559. /**
  1560. * ntb_transport_rx_remove - Dequeues enqueued rx packet
  1561. * @qp: NTB queue to be freed
  1562. * @len: pointer to variable to write enqueued buffers length
  1563. *
  1564. * Dequeues unused buffers from receive queue. Should only be used during
  1565. * shutdown of qp.
  1566. *
  1567. * RETURNS: NULL error value on error, or void* for success.
  1568. */
  1569. void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len)
  1570. {
  1571. struct ntb_queue_entry *entry;
  1572. void *buf;
  1573. if (!qp || qp->client_ready)
  1574. return NULL;
  1575. entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
  1576. if (!entry)
  1577. return NULL;
  1578. buf = entry->cb_data;
  1579. *len = entry->len;
  1580. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
  1581. return buf;
  1582. }
  1583. EXPORT_SYMBOL_GPL(ntb_transport_rx_remove);
  1584. /**
  1585. * ntb_transport_rx_enqueue - Enqueue a new NTB queue entry
  1586. * @qp: NTB transport layer queue the entry is to be enqueued on
  1587. * @cb: per buffer pointer for callback function to use
  1588. * @data: pointer to data buffer that incoming packets will be copied into
  1589. * @len: length of the data buffer
  1590. *
  1591. * Enqueue a new receive buffer onto the transport queue into which a NTB
  1592. * payload can be received into.
  1593. *
  1594. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  1595. */
  1596. int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
  1597. unsigned int len)
  1598. {
  1599. struct ntb_queue_entry *entry;
  1600. if (!qp)
  1601. return -EINVAL;
  1602. entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
  1603. if (!entry)
  1604. return -ENOMEM;
  1605. entry->cb_data = cb;
  1606. entry->buf = data;
  1607. entry->len = len;
  1608. entry->flags = 0;
  1609. entry->retries = 0;
  1610. entry->errors = 0;
  1611. entry->rx_index = 0;
  1612. ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
  1613. if (qp->active)
  1614. tasklet_schedule(&qp->rxc_db_work);
  1615. return 0;
  1616. }
  1617. EXPORT_SYMBOL_GPL(ntb_transport_rx_enqueue);
  1618. /**
  1619. * ntb_transport_tx_enqueue - Enqueue a new NTB queue entry
  1620. * @qp: NTB transport layer queue the entry is to be enqueued on
  1621. * @cb: per buffer pointer for callback function to use
  1622. * @data: pointer to data buffer that will be sent
  1623. * @len: length of the data buffer
  1624. *
  1625. * Enqueue a new transmit buffer onto the transport queue from which a NTB
  1626. * payload will be transmitted. This assumes that a lock is being held to
  1627. * serialize access to the qp.
  1628. *
  1629. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  1630. */
  1631. int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
  1632. unsigned int len)
  1633. {
  1634. struct ntb_queue_entry *entry;
  1635. int rc;
  1636. if (!qp || !qp->link_is_up || !len)
  1637. return -EINVAL;
  1638. entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
  1639. if (!entry) {
  1640. qp->tx_err_no_buf++;
  1641. return -EBUSY;
  1642. }
  1643. entry->cb_data = cb;
  1644. entry->buf = data;
  1645. entry->len = len;
  1646. entry->flags = 0;
  1647. entry->errors = 0;
  1648. entry->retries = 0;
  1649. entry->tx_index = 0;
  1650. rc = ntb_process_tx(qp, entry);
  1651. if (rc)
  1652. ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
  1653. &qp->tx_free_q);
  1654. return rc;
  1655. }
  1656. EXPORT_SYMBOL_GPL(ntb_transport_tx_enqueue);
  1657. /**
  1658. * ntb_transport_link_up - Notify NTB transport of client readiness to use queue
  1659. * @qp: NTB transport layer queue to be enabled
  1660. *
  1661. * Notify NTB transport layer of client readiness to use queue
  1662. */
  1663. void ntb_transport_link_up(struct ntb_transport_qp *qp)
  1664. {
  1665. if (!qp)
  1666. return;
  1667. qp->client_ready = true;
  1668. if (qp->transport->link_is_up)
  1669. schedule_delayed_work(&qp->link_work, 0);
  1670. }
  1671. EXPORT_SYMBOL_GPL(ntb_transport_link_up);
  1672. /**
  1673. * ntb_transport_link_down - Notify NTB transport to no longer enqueue data
  1674. * @qp: NTB transport layer queue to be disabled
  1675. *
  1676. * Notify NTB transport layer of client's desire to no longer receive data on
  1677. * transport queue specified. It is the client's responsibility to ensure all
  1678. * entries on queue are purged or otherwise handled appropriately.
  1679. */
  1680. void ntb_transport_link_down(struct ntb_transport_qp *qp)
  1681. {
  1682. int val;
  1683. if (!qp)
  1684. return;
  1685. qp->client_ready = false;
  1686. val = ntb_spad_read(qp->ndev, QP_LINKS);
  1687. ntb_peer_spad_write(qp->ndev, QP_LINKS,
  1688. val & ~BIT(qp->qp_num));
  1689. if (qp->link_is_up)
  1690. ntb_send_link_down(qp);
  1691. else
  1692. cancel_delayed_work_sync(&qp->link_work);
  1693. }
  1694. EXPORT_SYMBOL_GPL(ntb_transport_link_down);
  1695. /**
  1696. * ntb_transport_link_query - Query transport link state
  1697. * @qp: NTB transport layer queue to be queried
  1698. *
  1699. * Query connectivity to the remote system of the NTB transport queue
  1700. *
  1701. * RETURNS: true for link up or false for link down
  1702. */
  1703. bool ntb_transport_link_query(struct ntb_transport_qp *qp)
  1704. {
  1705. if (!qp)
  1706. return false;
  1707. return qp->link_is_up;
  1708. }
  1709. EXPORT_SYMBOL_GPL(ntb_transport_link_query);
  1710. /**
  1711. * ntb_transport_qp_num - Query the qp number
  1712. * @qp: NTB transport layer queue to be queried
  1713. *
  1714. * Query qp number of the NTB transport queue
  1715. *
  1716. * RETURNS: a zero based number specifying the qp number
  1717. */
  1718. unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp)
  1719. {
  1720. if (!qp)
  1721. return 0;
  1722. return qp->qp_num;
  1723. }
  1724. EXPORT_SYMBOL_GPL(ntb_transport_qp_num);
  1725. /**
  1726. * ntb_transport_max_size - Query the max payload size of a qp
  1727. * @qp: NTB transport layer queue to be queried
  1728. *
  1729. * Query the maximum payload size permissible on the given qp
  1730. *
  1731. * RETURNS: the max payload size of a qp
  1732. */
  1733. unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp)
  1734. {
  1735. unsigned int max_size;
  1736. unsigned int copy_align;
  1737. struct dma_chan *rx_chan, *tx_chan;
  1738. if (!qp)
  1739. return 0;
  1740. rx_chan = qp->rx_dma_chan;
  1741. tx_chan = qp->tx_dma_chan;
  1742. copy_align = max(rx_chan ? rx_chan->device->copy_align : 0,
  1743. tx_chan ? tx_chan->device->copy_align : 0);
  1744. /* If DMA engine usage is possible, try to find the max size for that */
  1745. max_size = qp->tx_max_frame - sizeof(struct ntb_payload_header);
  1746. max_size = round_down(max_size, 1 << copy_align);
  1747. return max_size;
  1748. }
  1749. EXPORT_SYMBOL_GPL(ntb_transport_max_size);
  1750. unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp)
  1751. {
  1752. unsigned int head = qp->tx_index;
  1753. unsigned int tail = qp->remote_rx_info->entry;
  1754. return tail > head ? tail - head : qp->tx_max_entry + tail - head;
  1755. }
  1756. EXPORT_SYMBOL_GPL(ntb_transport_tx_free_entry);
  1757. static void ntb_transport_doorbell_callback(void *data, int vector)
  1758. {
  1759. struct ntb_transport_ctx *nt = data;
  1760. struct ntb_transport_qp *qp;
  1761. u64 db_bits;
  1762. unsigned int qp_num;
  1763. db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free &
  1764. ntb_db_vector_mask(nt->ndev, vector));
  1765. while (db_bits) {
  1766. qp_num = __ffs(db_bits);
  1767. qp = &nt->qp_vec[qp_num];
  1768. if (qp->active)
  1769. tasklet_schedule(&qp->rxc_db_work);
  1770. db_bits &= ~BIT_ULL(qp_num);
  1771. }
  1772. }
  1773. static const struct ntb_ctx_ops ntb_transport_ops = {
  1774. .link_event = ntb_transport_event_callback,
  1775. .db_event = ntb_transport_doorbell_callback,
  1776. };
  1777. static struct ntb_client ntb_transport_client = {
  1778. .ops = {
  1779. .probe = ntb_transport_probe,
  1780. .remove = ntb_transport_free,
  1781. },
  1782. };
  1783. static int __init ntb_transport_init(void)
  1784. {
  1785. int rc;
  1786. pr_info("%s, version %s\n", NTB_TRANSPORT_DESC, NTB_TRANSPORT_VER);
  1787. if (debugfs_initialized())
  1788. nt_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
  1789. rc = bus_register(&ntb_transport_bus);
  1790. if (rc)
  1791. goto err_bus;
  1792. rc = ntb_register_client(&ntb_transport_client);
  1793. if (rc)
  1794. goto err_client;
  1795. return 0;
  1796. err_client:
  1797. bus_unregister(&ntb_transport_bus);
  1798. err_bus:
  1799. debugfs_remove_recursive(nt_debugfs_dir);
  1800. return rc;
  1801. }
  1802. module_init(ntb_transport_init);
  1803. static void __exit ntb_transport_exit(void)
  1804. {
  1805. ntb_unregister_client(&ntb_transport_client);
  1806. bus_unregister(&ntb_transport_bus);
  1807. debugfs_remove_recursive(nt_debugfs_dir);
  1808. }
  1809. module_exit(ntb_transport_exit);