qca_spi.h 2.6 KB

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  1. /*
  2. * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
  3. * Copyright (c) 2014, I2SE GmbH
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software
  6. * for any purpose with or without fee is hereby granted, provided
  7. * that the above copyright notice and this permission notice appear
  8. * in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
  13. * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
  14. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
  15. * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
  16. * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  17. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /* Qualcomm Atheros SPI register definition.
  20. *
  21. * This module is designed to define the Qualcomm Atheros SPI register
  22. * placeholders;
  23. */
  24. #ifndef _QCA_SPI_H
  25. #define _QCA_SPI_H
  26. #include <linux/netdevice.h>
  27. #include <linux/sched.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/types.h>
  31. #include "qca_framing.h"
  32. #define QCASPI_DRV_VERSION "0.2.7-i"
  33. #define QCASPI_DRV_NAME "qcaspi"
  34. #define QCASPI_GOOD_SIGNATURE 0xAA55
  35. #define TX_RING_MAX_LEN 10
  36. #define TX_RING_MIN_LEN 2
  37. /* sync related constants */
  38. #define QCASPI_SYNC_UNKNOWN 0
  39. #define QCASPI_SYNC_RESET 1
  40. #define QCASPI_SYNC_READY 2
  41. #define QCASPI_RESET_TIMEOUT 10
  42. /* sync events */
  43. #define QCASPI_EVENT_UPDATE 0
  44. #define QCASPI_EVENT_CPUON 1
  45. struct tx_ring {
  46. struct sk_buff *skb[TX_RING_MAX_LEN];
  47. u16 head;
  48. u16 tail;
  49. u16 size;
  50. u16 count;
  51. };
  52. struct qcaspi_stats {
  53. u64 trig_reset;
  54. u64 device_reset;
  55. u64 reset_timeout;
  56. u64 read_err;
  57. u64 write_err;
  58. u64 read_buf_err;
  59. u64 write_buf_err;
  60. u64 out_of_mem;
  61. u64 write_buf_miss;
  62. u64 ring_full;
  63. u64 spi_err;
  64. };
  65. struct qcaspi {
  66. struct net_device *net_dev;
  67. struct spi_device *spi_dev;
  68. struct task_struct *spi_thread;
  69. struct tx_ring txr;
  70. struct qcaspi_stats stats;
  71. struct spi_message spi_msg1;
  72. struct spi_message spi_msg2;
  73. struct spi_transfer spi_xfer1;
  74. struct spi_transfer spi_xfer2[2];
  75. u8 *rx_buffer;
  76. u32 buffer_size;
  77. u8 sync;
  78. struct qcafrm_handle frm_handle;
  79. struct sk_buff *rx_skb;
  80. unsigned int intr_req;
  81. unsigned int intr_svc;
  82. #ifdef CONFIG_DEBUG_FS
  83. struct dentry *device_root;
  84. #endif
  85. /* user configurable options */
  86. u32 clkspeed;
  87. u8 legacy_mode;
  88. u16 burst_len;
  89. };
  90. int qcaspi_netdev_open(struct net_device *dev);
  91. int qcaspi_netdev_close(struct net_device *dev);
  92. #endif /* _QCA_SPI_H */