pci-me.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498
  1. /*
  2. *
  3. * Intel Management Engine Interface (Intel MEI) Linux driver
  4. * Copyright (c) 2003-2012, Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/kernel.h>
  19. #include <linux/device.h>
  20. #include <linux/fs.h>
  21. #include <linux/errno.h>
  22. #include <linux/types.h>
  23. #include <linux/fcntl.h>
  24. #include <linux/pci.h>
  25. #include <linux/poll.h>
  26. #include <linux/ioctl.h>
  27. #include <linux/cdev.h>
  28. #include <linux/sched.h>
  29. #include <linux/uuid.h>
  30. #include <linux/compat.h>
  31. #include <linux/jiffies.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/pm_domain.h>
  34. #include <linux/pm_runtime.h>
  35. #include <linux/mei.h>
  36. #include "mei_dev.h"
  37. #include "client.h"
  38. #include "hw-me-regs.h"
  39. #include "hw-me.h"
  40. /* mei_pci_tbl - PCI Device ID Table */
  41. static const struct pci_device_id mei_me_pci_tbl[] = {
  42. {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
  43. {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
  44. {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
  45. {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
  46. {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
  47. {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
  48. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
  49. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
  50. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
  51. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
  52. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
  53. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
  54. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
  55. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
  56. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
  57. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
  58. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
  59. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
  60. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
  61. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
  62. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
  63. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
  64. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
  65. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
  66. {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
  67. {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
  68. {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
  69. {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
  70. {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
  71. {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
  72. {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
  73. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
  74. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
  75. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
  76. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
  77. {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
  78. {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
  79. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
  80. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
  81. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
  82. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
  83. {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, mei_me_pch8_cfg)},
  84. {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
  85. {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
  86. {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
  87. {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
  88. /* required last entry */
  89. {0, }
  90. };
  91. MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
  92. #ifdef CONFIG_PM
  93. static inline void mei_me_set_pm_domain(struct mei_device *dev);
  94. static inline void mei_me_unset_pm_domain(struct mei_device *dev);
  95. #else
  96. static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
  97. static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
  98. #endif /* CONFIG_PM */
  99. /**
  100. * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
  101. *
  102. * @pdev: PCI device structure
  103. * @cfg: per generation config
  104. *
  105. * Return: true if ME Interface is valid, false otherwise
  106. */
  107. static bool mei_me_quirk_probe(struct pci_dev *pdev,
  108. const struct mei_cfg *cfg)
  109. {
  110. if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
  111. dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
  112. return false;
  113. }
  114. return true;
  115. }
  116. /**
  117. * mei_me_probe - Device Initialization Routine
  118. *
  119. * @pdev: PCI device structure
  120. * @ent: entry in kcs_pci_tbl
  121. *
  122. * Return: 0 on success, <0 on failure.
  123. */
  124. static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  125. {
  126. const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
  127. struct mei_device *dev;
  128. struct mei_me_hw *hw;
  129. unsigned int irqflags;
  130. int err;
  131. if (!mei_me_quirk_probe(pdev, cfg))
  132. return -ENODEV;
  133. /* enable pci dev */
  134. err = pci_enable_device(pdev);
  135. if (err) {
  136. dev_err(&pdev->dev, "failed to enable pci device.\n");
  137. goto end;
  138. }
  139. /* set PCI host mastering */
  140. pci_set_master(pdev);
  141. /* pci request regions for mei driver */
  142. err = pci_request_regions(pdev, KBUILD_MODNAME);
  143. if (err) {
  144. dev_err(&pdev->dev, "failed to get pci regions.\n");
  145. goto disable_device;
  146. }
  147. if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
  148. dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
  149. err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  150. if (err)
  151. err = dma_set_coherent_mask(&pdev->dev,
  152. DMA_BIT_MASK(32));
  153. }
  154. if (err) {
  155. dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
  156. goto release_regions;
  157. }
  158. /* allocates and initializes the mei dev structure */
  159. dev = mei_me_dev_init(pdev, cfg);
  160. if (!dev) {
  161. err = -ENOMEM;
  162. goto release_regions;
  163. }
  164. hw = to_me_hw(dev);
  165. /* mapping IO device memory */
  166. hw->mem_addr = pci_iomap(pdev, 0, 0);
  167. if (!hw->mem_addr) {
  168. dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
  169. err = -ENOMEM;
  170. goto free_device;
  171. }
  172. pci_enable_msi(pdev);
  173. /* request and enable interrupt */
  174. irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
  175. err = request_threaded_irq(pdev->irq,
  176. mei_me_irq_quick_handler,
  177. mei_me_irq_thread_handler,
  178. irqflags, KBUILD_MODNAME, dev);
  179. if (err) {
  180. dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
  181. pdev->irq);
  182. goto disable_msi;
  183. }
  184. if (mei_start(dev)) {
  185. dev_err(&pdev->dev, "init hw failure.\n");
  186. err = -ENODEV;
  187. goto release_irq;
  188. }
  189. pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
  190. pm_runtime_use_autosuspend(&pdev->dev);
  191. err = mei_register(dev, &pdev->dev);
  192. if (err)
  193. goto stop;
  194. pci_set_drvdata(pdev, dev);
  195. /*
  196. * For not wake-able HW runtime pm framework
  197. * can't be used on pci device level.
  198. * Use domain runtime pm callbacks instead.
  199. */
  200. if (!pci_dev_run_wake(pdev))
  201. mei_me_set_pm_domain(dev);
  202. if (mei_pg_is_enabled(dev))
  203. pm_runtime_put_noidle(&pdev->dev);
  204. dev_dbg(&pdev->dev, "initialization successful.\n");
  205. return 0;
  206. stop:
  207. mei_stop(dev);
  208. release_irq:
  209. mei_cancel_work(dev);
  210. mei_disable_interrupts(dev);
  211. free_irq(pdev->irq, dev);
  212. disable_msi:
  213. pci_disable_msi(pdev);
  214. pci_iounmap(pdev, hw->mem_addr);
  215. free_device:
  216. kfree(dev);
  217. release_regions:
  218. pci_release_regions(pdev);
  219. disable_device:
  220. pci_disable_device(pdev);
  221. end:
  222. dev_err(&pdev->dev, "initialization failed.\n");
  223. return err;
  224. }
  225. /**
  226. * mei_me_remove - Device Removal Routine
  227. *
  228. * @pdev: PCI device structure
  229. *
  230. * mei_remove is called by the PCI subsystem to alert the driver
  231. * that it should release a PCI device.
  232. */
  233. static void mei_me_remove(struct pci_dev *pdev)
  234. {
  235. struct mei_device *dev;
  236. struct mei_me_hw *hw;
  237. dev = pci_get_drvdata(pdev);
  238. if (!dev)
  239. return;
  240. if (mei_pg_is_enabled(dev))
  241. pm_runtime_get_noresume(&pdev->dev);
  242. hw = to_me_hw(dev);
  243. dev_dbg(&pdev->dev, "stop\n");
  244. mei_stop(dev);
  245. if (!pci_dev_run_wake(pdev))
  246. mei_me_unset_pm_domain(dev);
  247. /* disable interrupts */
  248. mei_disable_interrupts(dev);
  249. free_irq(pdev->irq, dev);
  250. pci_disable_msi(pdev);
  251. if (hw->mem_addr)
  252. pci_iounmap(pdev, hw->mem_addr);
  253. mei_deregister(dev);
  254. kfree(dev);
  255. pci_release_regions(pdev);
  256. pci_disable_device(pdev);
  257. }
  258. #ifdef CONFIG_PM_SLEEP
  259. static int mei_me_pci_suspend(struct device *device)
  260. {
  261. struct pci_dev *pdev = to_pci_dev(device);
  262. struct mei_device *dev = pci_get_drvdata(pdev);
  263. if (!dev)
  264. return -ENODEV;
  265. dev_dbg(&pdev->dev, "suspend\n");
  266. mei_stop(dev);
  267. mei_disable_interrupts(dev);
  268. free_irq(pdev->irq, dev);
  269. pci_disable_msi(pdev);
  270. return 0;
  271. }
  272. static int mei_me_pci_resume(struct device *device)
  273. {
  274. struct pci_dev *pdev = to_pci_dev(device);
  275. struct mei_device *dev;
  276. unsigned int irqflags;
  277. int err;
  278. dev = pci_get_drvdata(pdev);
  279. if (!dev)
  280. return -ENODEV;
  281. pci_enable_msi(pdev);
  282. irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
  283. /* request and enable interrupt */
  284. err = request_threaded_irq(pdev->irq,
  285. mei_me_irq_quick_handler,
  286. mei_me_irq_thread_handler,
  287. irqflags, KBUILD_MODNAME, dev);
  288. if (err) {
  289. dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
  290. pdev->irq);
  291. return err;
  292. }
  293. err = mei_restart(dev);
  294. if (err)
  295. return err;
  296. /* Start timer if stopped in suspend */
  297. schedule_delayed_work(&dev->timer_work, HZ);
  298. return 0;
  299. }
  300. #endif /* CONFIG_PM_SLEEP */
  301. #ifdef CONFIG_PM
  302. static int mei_me_pm_runtime_idle(struct device *device)
  303. {
  304. struct pci_dev *pdev = to_pci_dev(device);
  305. struct mei_device *dev;
  306. dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
  307. dev = pci_get_drvdata(pdev);
  308. if (!dev)
  309. return -ENODEV;
  310. if (mei_write_is_idle(dev))
  311. pm_runtime_autosuspend(device);
  312. return -EBUSY;
  313. }
  314. static int mei_me_pm_runtime_suspend(struct device *device)
  315. {
  316. struct pci_dev *pdev = to_pci_dev(device);
  317. struct mei_device *dev;
  318. int ret;
  319. dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
  320. dev = pci_get_drvdata(pdev);
  321. if (!dev)
  322. return -ENODEV;
  323. mutex_lock(&dev->device_lock);
  324. if (mei_write_is_idle(dev))
  325. ret = mei_me_pg_enter_sync(dev);
  326. else
  327. ret = -EAGAIN;
  328. mutex_unlock(&dev->device_lock);
  329. dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
  330. if (ret && ret != -EAGAIN)
  331. schedule_work(&dev->reset_work);
  332. return ret;
  333. }
  334. static int mei_me_pm_runtime_resume(struct device *device)
  335. {
  336. struct pci_dev *pdev = to_pci_dev(device);
  337. struct mei_device *dev;
  338. int ret;
  339. dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
  340. dev = pci_get_drvdata(pdev);
  341. if (!dev)
  342. return -ENODEV;
  343. mutex_lock(&dev->device_lock);
  344. ret = mei_me_pg_exit_sync(dev);
  345. mutex_unlock(&dev->device_lock);
  346. dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
  347. if (ret)
  348. schedule_work(&dev->reset_work);
  349. return ret;
  350. }
  351. /**
  352. * mei_me_set_pm_domain - fill and set pm domain structure for device
  353. *
  354. * @dev: mei_device
  355. */
  356. static inline void mei_me_set_pm_domain(struct mei_device *dev)
  357. {
  358. struct pci_dev *pdev = to_pci_dev(dev->dev);
  359. if (pdev->dev.bus && pdev->dev.bus->pm) {
  360. dev->pg_domain.ops = *pdev->dev.bus->pm;
  361. dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
  362. dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
  363. dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
  364. dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
  365. }
  366. }
  367. /**
  368. * mei_me_unset_pm_domain - clean pm domain structure for device
  369. *
  370. * @dev: mei_device
  371. */
  372. static inline void mei_me_unset_pm_domain(struct mei_device *dev)
  373. {
  374. /* stop using pm callbacks if any */
  375. dev_pm_domain_set(dev->dev, NULL);
  376. }
  377. static const struct dev_pm_ops mei_me_pm_ops = {
  378. SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
  379. mei_me_pci_resume)
  380. SET_RUNTIME_PM_OPS(
  381. mei_me_pm_runtime_suspend,
  382. mei_me_pm_runtime_resume,
  383. mei_me_pm_runtime_idle)
  384. };
  385. #define MEI_ME_PM_OPS (&mei_me_pm_ops)
  386. #else
  387. #define MEI_ME_PM_OPS NULL
  388. #endif /* CONFIG_PM */
  389. /*
  390. * PCI driver structure
  391. */
  392. static struct pci_driver mei_me_driver = {
  393. .name = KBUILD_MODNAME,
  394. .id_table = mei_me_pci_tbl,
  395. .probe = mei_me_probe,
  396. .remove = mei_me_remove,
  397. .shutdown = mei_me_remove,
  398. .driver.pm = MEI_ME_PM_OPS,
  399. };
  400. module_pci_driver(mei_me_driver);
  401. MODULE_AUTHOR("Intel Corporation");
  402. MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
  403. MODULE_LICENSE("GPL v2");