isp.c 62 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. */
  44. #include <asm/cacheflush.h>
  45. #include <linux/clk.h>
  46. #include <linux/clkdev.h>
  47. #include <linux/delay.h>
  48. #include <linux/device.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/i2c.h>
  51. #include <linux/interrupt.h>
  52. #include <linux/mfd/syscon.h>
  53. #include <linux/module.h>
  54. #include <linux/omap-iommu.h>
  55. #include <linux/platform_device.h>
  56. #include <linux/regulator/consumer.h>
  57. #include <linux/slab.h>
  58. #include <linux/sched.h>
  59. #include <linux/vmalloc.h>
  60. #include <asm/dma-iommu.h>
  61. #include <media/v4l2-common.h>
  62. #include <media/v4l2-device.h>
  63. #include <media/v4l2-mc.h>
  64. #include <media/v4l2-of.h>
  65. #include "isp.h"
  66. #include "ispreg.h"
  67. #include "ispccdc.h"
  68. #include "isppreview.h"
  69. #include "ispresizer.h"
  70. #include "ispcsi2.h"
  71. #include "ispccp2.h"
  72. #include "isph3a.h"
  73. #include "isphist.h"
  74. static unsigned int autoidle;
  75. module_param(autoidle, int, 0444);
  76. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  77. static void isp_save_ctx(struct isp_device *isp);
  78. static void isp_restore_ctx(struct isp_device *isp);
  79. static const struct isp_res_mapping isp_res_maps[] = {
  80. {
  81. .isp_rev = ISP_REVISION_2_0,
  82. .offset = {
  83. /* first MMIO area */
  84. 0x0000, /* base, len 0x0070 */
  85. 0x0400, /* ccp2, len 0x01f0 */
  86. 0x0600, /* ccdc, len 0x00a8 */
  87. 0x0a00, /* hist, len 0x0048 */
  88. 0x0c00, /* h3a, len 0x0060 */
  89. 0x0e00, /* preview, len 0x00a0 */
  90. 0x1000, /* resizer, len 0x00ac */
  91. 0x1200, /* sbl, len 0x00fc */
  92. /* second MMIO area */
  93. 0x0000, /* csi2a, len 0x0170 */
  94. 0x0170, /* csiphy2, len 0x000c */
  95. },
  96. .phy_type = ISP_PHY_TYPE_3430,
  97. },
  98. {
  99. .isp_rev = ISP_REVISION_15_0,
  100. .offset = {
  101. /* first MMIO area */
  102. 0x0000, /* base, len 0x0070 */
  103. 0x0400, /* ccp2, len 0x01f0 */
  104. 0x0600, /* ccdc, len 0x00a8 */
  105. 0x0a00, /* hist, len 0x0048 */
  106. 0x0c00, /* h3a, len 0x0060 */
  107. 0x0e00, /* preview, len 0x00a0 */
  108. 0x1000, /* resizer, len 0x00ac */
  109. 0x1200, /* sbl, len 0x00fc */
  110. /* second MMIO area */
  111. 0x0000, /* csi2a, len 0x0170 (1st area) */
  112. 0x0170, /* csiphy2, len 0x000c */
  113. 0x01c0, /* csi2a, len 0x0040 (2nd area) */
  114. 0x0400, /* csi2c, len 0x0170 (1st area) */
  115. 0x0570, /* csiphy1, len 0x000c */
  116. 0x05c0, /* csi2c, len 0x0040 (2nd area) */
  117. },
  118. .phy_type = ISP_PHY_TYPE_3630,
  119. },
  120. };
  121. /* Structure for saving/restoring ISP module registers */
  122. static struct isp_reg isp_reg_list[] = {
  123. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  124. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  125. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  126. {0, ISP_TOK_TERM, 0}
  127. };
  128. /*
  129. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  130. * @isp: OMAP3 ISP device
  131. *
  132. * In order to force posting of pending writes, we need to write and
  133. * readback the same register, in this case the revision register.
  134. *
  135. * See this link for reference:
  136. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  137. */
  138. void omap3isp_flush(struct isp_device *isp)
  139. {
  140. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  141. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  142. }
  143. /* -----------------------------------------------------------------------------
  144. * XCLK
  145. */
  146. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  147. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  148. {
  149. switch (xclk->id) {
  150. case ISP_XCLK_A:
  151. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  152. ISPTCTRL_CTRL_DIVA_MASK,
  153. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  154. break;
  155. case ISP_XCLK_B:
  156. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  157. ISPTCTRL_CTRL_DIVB_MASK,
  158. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  159. break;
  160. }
  161. }
  162. static int isp_xclk_prepare(struct clk_hw *hw)
  163. {
  164. struct isp_xclk *xclk = to_isp_xclk(hw);
  165. omap3isp_get(xclk->isp);
  166. return 0;
  167. }
  168. static void isp_xclk_unprepare(struct clk_hw *hw)
  169. {
  170. struct isp_xclk *xclk = to_isp_xclk(hw);
  171. omap3isp_put(xclk->isp);
  172. }
  173. static int isp_xclk_enable(struct clk_hw *hw)
  174. {
  175. struct isp_xclk *xclk = to_isp_xclk(hw);
  176. unsigned long flags;
  177. spin_lock_irqsave(&xclk->lock, flags);
  178. isp_xclk_update(xclk, xclk->divider);
  179. xclk->enabled = true;
  180. spin_unlock_irqrestore(&xclk->lock, flags);
  181. return 0;
  182. }
  183. static void isp_xclk_disable(struct clk_hw *hw)
  184. {
  185. struct isp_xclk *xclk = to_isp_xclk(hw);
  186. unsigned long flags;
  187. spin_lock_irqsave(&xclk->lock, flags);
  188. isp_xclk_update(xclk, 0);
  189. xclk->enabled = false;
  190. spin_unlock_irqrestore(&xclk->lock, flags);
  191. }
  192. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  193. unsigned long parent_rate)
  194. {
  195. struct isp_xclk *xclk = to_isp_xclk(hw);
  196. return parent_rate / xclk->divider;
  197. }
  198. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  199. {
  200. u32 divider;
  201. if (*rate >= parent_rate) {
  202. *rate = parent_rate;
  203. return ISPTCTRL_CTRL_DIV_BYPASS;
  204. }
  205. if (*rate == 0)
  206. *rate = 1;
  207. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  208. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  209. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  210. *rate = parent_rate / divider;
  211. return divider;
  212. }
  213. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  214. unsigned long *parent_rate)
  215. {
  216. isp_xclk_calc_divider(&rate, *parent_rate);
  217. return rate;
  218. }
  219. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  220. unsigned long parent_rate)
  221. {
  222. struct isp_xclk *xclk = to_isp_xclk(hw);
  223. unsigned long flags;
  224. u32 divider;
  225. divider = isp_xclk_calc_divider(&rate, parent_rate);
  226. spin_lock_irqsave(&xclk->lock, flags);
  227. xclk->divider = divider;
  228. if (xclk->enabled)
  229. isp_xclk_update(xclk, divider);
  230. spin_unlock_irqrestore(&xclk->lock, flags);
  231. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  232. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  233. return 0;
  234. }
  235. static const struct clk_ops isp_xclk_ops = {
  236. .prepare = isp_xclk_prepare,
  237. .unprepare = isp_xclk_unprepare,
  238. .enable = isp_xclk_enable,
  239. .disable = isp_xclk_disable,
  240. .recalc_rate = isp_xclk_recalc_rate,
  241. .round_rate = isp_xclk_round_rate,
  242. .set_rate = isp_xclk_set_rate,
  243. };
  244. static const char *isp_xclk_parent_name = "cam_mclk";
  245. static const struct clk_init_data isp_xclk_init_data = {
  246. .name = "cam_xclk",
  247. .ops = &isp_xclk_ops,
  248. .parent_names = &isp_xclk_parent_name,
  249. .num_parents = 1,
  250. };
  251. static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
  252. {
  253. unsigned int idx = clkspec->args[0];
  254. struct isp_device *isp = data;
  255. if (idx >= ARRAY_SIZE(isp->xclks))
  256. return ERR_PTR(-ENOENT);
  257. return isp->xclks[idx].clk;
  258. }
  259. static int isp_xclk_init(struct isp_device *isp)
  260. {
  261. struct device_node *np = isp->dev->of_node;
  262. struct clk_init_data init;
  263. unsigned int i;
  264. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
  265. isp->xclks[i].clk = ERR_PTR(-EINVAL);
  266. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  267. struct isp_xclk *xclk = &isp->xclks[i];
  268. xclk->isp = isp;
  269. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  270. xclk->divider = 1;
  271. spin_lock_init(&xclk->lock);
  272. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  273. init.ops = &isp_xclk_ops;
  274. init.parent_names = &isp_xclk_parent_name;
  275. init.num_parents = 1;
  276. xclk->hw.init = &init;
  277. /*
  278. * The first argument is NULL in order to avoid circular
  279. * reference, as this driver takes reference on the
  280. * sensor subdevice modules and the sensors would take
  281. * reference on this module through clk_get().
  282. */
  283. xclk->clk = clk_register(NULL, &xclk->hw);
  284. if (IS_ERR(xclk->clk))
  285. return PTR_ERR(xclk->clk);
  286. }
  287. if (np)
  288. of_clk_add_provider(np, isp_xclk_src_get, isp);
  289. return 0;
  290. }
  291. static void isp_xclk_cleanup(struct isp_device *isp)
  292. {
  293. struct device_node *np = isp->dev->of_node;
  294. unsigned int i;
  295. if (np)
  296. of_clk_del_provider(np);
  297. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  298. struct isp_xclk *xclk = &isp->xclks[i];
  299. if (!IS_ERR(xclk->clk))
  300. clk_unregister(xclk->clk);
  301. }
  302. }
  303. /* -----------------------------------------------------------------------------
  304. * Interrupts
  305. */
  306. /*
  307. * isp_enable_interrupts - Enable ISP interrupts.
  308. * @isp: OMAP3 ISP device
  309. */
  310. static void isp_enable_interrupts(struct isp_device *isp)
  311. {
  312. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  313. | IRQ0ENABLE_CSIB_IRQ
  314. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  315. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  316. | IRQ0ENABLE_CCDC_VD0_IRQ
  317. | IRQ0ENABLE_CCDC_VD1_IRQ
  318. | IRQ0ENABLE_HS_VS_IRQ
  319. | IRQ0ENABLE_HIST_DONE_IRQ
  320. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  321. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  322. | IRQ0ENABLE_PRV_DONE_IRQ
  323. | IRQ0ENABLE_RSZ_DONE_IRQ;
  324. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  325. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  326. }
  327. /*
  328. * isp_disable_interrupts - Disable ISP interrupts.
  329. * @isp: OMAP3 ISP device
  330. */
  331. static void isp_disable_interrupts(struct isp_device *isp)
  332. {
  333. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  334. }
  335. /*
  336. * isp_core_init - ISP core settings
  337. * @isp: OMAP3 ISP device
  338. * @idle: Consider idle state.
  339. *
  340. * Set the power settings for the ISP and SBL bus and configure the HS/VS
  341. * interrupt source.
  342. *
  343. * We need to configure the HS/VS interrupt source before interrupts get
  344. * enabled, as the sensor might be free-running and the ISP default setting
  345. * (HS edge) would put an unnecessary burden on the CPU.
  346. */
  347. static void isp_core_init(struct isp_device *isp, int idle)
  348. {
  349. isp_reg_writel(isp,
  350. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  351. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  352. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  353. ((isp->revision == ISP_REVISION_15_0) ?
  354. ISP_SYSCONFIG_AUTOIDLE : 0),
  355. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  356. isp_reg_writel(isp,
  357. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  358. ISPCTRL_SYNC_DETECT_VSRISE,
  359. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  360. }
  361. /*
  362. * Configure the bridge and lane shifter. Valid inputs are
  363. *
  364. * CCDC_INPUT_PARALLEL: Parallel interface
  365. * CCDC_INPUT_CSI2A: CSI2a receiver
  366. * CCDC_INPUT_CCP2B: CCP2b receiver
  367. * CCDC_INPUT_CSI2C: CSI2c receiver
  368. *
  369. * The bridge and lane shifter are configured according to the selected input
  370. * and the ISP platform data.
  371. */
  372. void omap3isp_configure_bridge(struct isp_device *isp,
  373. enum ccdc_input_entity input,
  374. const struct isp_parallel_cfg *parcfg,
  375. unsigned int shift, unsigned int bridge)
  376. {
  377. u32 ispctrl_val;
  378. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  379. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  380. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  381. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  382. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  383. ispctrl_val |= bridge;
  384. switch (input) {
  385. case CCDC_INPUT_PARALLEL:
  386. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  387. ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  388. shift += parcfg->data_lane_shift;
  389. break;
  390. case CCDC_INPUT_CSI2A:
  391. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  392. break;
  393. case CCDC_INPUT_CCP2B:
  394. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  395. break;
  396. case CCDC_INPUT_CSI2C:
  397. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  398. break;
  399. default:
  400. return;
  401. }
  402. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  403. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  404. }
  405. void omap3isp_hist_dma_done(struct isp_device *isp)
  406. {
  407. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  408. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  409. /* Histogram cannot be enabled in this frame anymore */
  410. atomic_set(&isp->isp_hist.buf_err, 1);
  411. dev_dbg(isp->dev, "hist: Out of synchronization with "
  412. "CCDC. Ignoring next buffer.\n");
  413. }
  414. }
  415. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  416. {
  417. static const char *name[] = {
  418. "CSIA_IRQ",
  419. "res1",
  420. "res2",
  421. "CSIB_LCM_IRQ",
  422. "CSIB_IRQ",
  423. "res5",
  424. "res6",
  425. "res7",
  426. "CCDC_VD0_IRQ",
  427. "CCDC_VD1_IRQ",
  428. "CCDC_VD2_IRQ",
  429. "CCDC_ERR_IRQ",
  430. "H3A_AF_DONE_IRQ",
  431. "H3A_AWB_DONE_IRQ",
  432. "res14",
  433. "res15",
  434. "HIST_DONE_IRQ",
  435. "CCDC_LSC_DONE",
  436. "CCDC_LSC_PREFETCH_COMPLETED",
  437. "CCDC_LSC_PREFETCH_ERROR",
  438. "PRV_DONE_IRQ",
  439. "CBUFF_IRQ",
  440. "res22",
  441. "res23",
  442. "RSZ_DONE_IRQ",
  443. "OVF_IRQ",
  444. "res26",
  445. "res27",
  446. "MMU_ERR_IRQ",
  447. "OCP_ERR_IRQ",
  448. "SEC_ERR_IRQ",
  449. "HS_VS_IRQ",
  450. };
  451. int i;
  452. dev_dbg(isp->dev, "ISP IRQ: ");
  453. for (i = 0; i < ARRAY_SIZE(name); i++) {
  454. if ((1 << i) & irqstatus)
  455. printk(KERN_CONT "%s ", name[i]);
  456. }
  457. printk(KERN_CONT "\n");
  458. }
  459. static void isp_isr_sbl(struct isp_device *isp)
  460. {
  461. struct device *dev = isp->dev;
  462. struct isp_pipeline *pipe;
  463. u32 sbl_pcr;
  464. /*
  465. * Handle shared buffer logic overflows for video buffers.
  466. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  467. */
  468. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  469. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  470. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  471. if (sbl_pcr)
  472. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  473. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  474. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  475. if (pipe != NULL)
  476. pipe->error = true;
  477. }
  478. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  479. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  480. if (pipe != NULL)
  481. pipe->error = true;
  482. }
  483. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  484. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  485. if (pipe != NULL)
  486. pipe->error = true;
  487. }
  488. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  489. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  490. if (pipe != NULL)
  491. pipe->error = true;
  492. }
  493. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  494. | ISPSBL_PCR_RSZ2_WBL_OVF
  495. | ISPSBL_PCR_RSZ3_WBL_OVF
  496. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  497. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  498. if (pipe != NULL)
  499. pipe->error = true;
  500. }
  501. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  502. omap3isp_stat_sbl_overflow(&isp->isp_af);
  503. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  504. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  505. }
  506. /*
  507. * isp_isr - Interrupt Service Routine for Camera ISP module.
  508. * @irq: Not used currently.
  509. * @_isp: Pointer to the OMAP3 ISP device
  510. *
  511. * Handles the corresponding callback if plugged in.
  512. */
  513. static irqreturn_t isp_isr(int irq, void *_isp)
  514. {
  515. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  516. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  517. IRQ0STATUS_CCDC_VD0_IRQ |
  518. IRQ0STATUS_CCDC_VD1_IRQ |
  519. IRQ0STATUS_HS_VS_IRQ;
  520. struct isp_device *isp = _isp;
  521. u32 irqstatus;
  522. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  523. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  524. isp_isr_sbl(isp);
  525. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  526. omap3isp_csi2_isr(&isp->isp_csi2a);
  527. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  528. omap3isp_ccp2_isr(&isp->isp_ccp2);
  529. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  530. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  531. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  532. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  533. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  534. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  535. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  536. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  537. }
  538. if (irqstatus & ccdc_events)
  539. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  540. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  541. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  542. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  543. omap3isp_preview_isr(&isp->isp_prev);
  544. }
  545. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  546. omap3isp_resizer_isr(&isp->isp_res);
  547. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  548. omap3isp_stat_isr(&isp->isp_aewb);
  549. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  550. omap3isp_stat_isr(&isp->isp_af);
  551. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  552. omap3isp_stat_isr(&isp->isp_hist);
  553. omap3isp_flush(isp);
  554. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  555. isp_isr_dbg(isp, irqstatus);
  556. #endif
  557. return IRQ_HANDLED;
  558. }
  559. static const struct media_device_ops isp_media_ops = {
  560. .link_notify = v4l2_pipeline_link_notify,
  561. };
  562. /* -----------------------------------------------------------------------------
  563. * Pipeline stream management
  564. */
  565. /*
  566. * isp_pipeline_enable - Enable streaming on a pipeline
  567. * @pipe: ISP pipeline
  568. * @mode: Stream mode (single shot or continuous)
  569. *
  570. * Walk the entities chain starting at the pipeline output video node and start
  571. * all modules in the chain in the given mode.
  572. *
  573. * Return 0 if successful, or the return value of the failed video::s_stream
  574. * operation otherwise.
  575. */
  576. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  577. enum isp_pipeline_stream_state mode)
  578. {
  579. struct isp_device *isp = pipe->output->isp;
  580. struct media_entity *entity;
  581. struct media_pad *pad;
  582. struct v4l2_subdev *subdev;
  583. unsigned long flags;
  584. int ret;
  585. /* Refuse to start streaming if an entity included in the pipeline has
  586. * crashed. This check must be performed before the loop below to avoid
  587. * starting entities if the pipeline won't start anyway (those entities
  588. * would then likely fail to stop, making the problem worse).
  589. */
  590. if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
  591. return -EIO;
  592. spin_lock_irqsave(&pipe->lock, flags);
  593. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  594. spin_unlock_irqrestore(&pipe->lock, flags);
  595. pipe->do_propagation = false;
  596. entity = &pipe->output->video.entity;
  597. while (1) {
  598. pad = &entity->pads[0];
  599. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  600. break;
  601. pad = media_entity_remote_pad(pad);
  602. if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
  603. break;
  604. entity = pad->entity;
  605. subdev = media_entity_to_v4l2_subdev(entity);
  606. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  607. if (ret < 0 && ret != -ENOIOCTLCMD)
  608. return ret;
  609. if (subdev == &isp->isp_ccdc.subdev) {
  610. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  611. s_stream, mode);
  612. v4l2_subdev_call(&isp->isp_af.subdev, video,
  613. s_stream, mode);
  614. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  615. s_stream, mode);
  616. pipe->do_propagation = true;
  617. }
  618. }
  619. return 0;
  620. }
  621. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  622. {
  623. return omap3isp_resizer_busy(&isp->isp_res);
  624. }
  625. static int isp_pipeline_wait_preview(struct isp_device *isp)
  626. {
  627. return omap3isp_preview_busy(&isp->isp_prev);
  628. }
  629. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  630. {
  631. return omap3isp_stat_busy(&isp->isp_af)
  632. || omap3isp_stat_busy(&isp->isp_aewb)
  633. || omap3isp_stat_busy(&isp->isp_hist)
  634. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  635. }
  636. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  637. static int isp_pipeline_wait(struct isp_device *isp,
  638. int(*busy)(struct isp_device *isp))
  639. {
  640. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  641. while (!time_after(jiffies, timeout)) {
  642. if (!busy(isp))
  643. return 0;
  644. }
  645. return 1;
  646. }
  647. /*
  648. * isp_pipeline_disable - Disable streaming on a pipeline
  649. * @pipe: ISP pipeline
  650. *
  651. * Walk the entities chain starting at the pipeline output video node and stop
  652. * all modules in the chain. Wait synchronously for the modules to be stopped if
  653. * necessary.
  654. *
  655. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  656. * can't be stopped (in which case a software reset of the ISP is probably
  657. * necessary).
  658. */
  659. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  660. {
  661. struct isp_device *isp = pipe->output->isp;
  662. struct media_entity *entity;
  663. struct media_pad *pad;
  664. struct v4l2_subdev *subdev;
  665. int failure = 0;
  666. int ret;
  667. /*
  668. * We need to stop all the modules after CCDC first or they'll
  669. * never stop since they may not get a full frame from CCDC.
  670. */
  671. entity = &pipe->output->video.entity;
  672. while (1) {
  673. pad = &entity->pads[0];
  674. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  675. break;
  676. pad = media_entity_remote_pad(pad);
  677. if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
  678. break;
  679. entity = pad->entity;
  680. subdev = media_entity_to_v4l2_subdev(entity);
  681. if (subdev == &isp->isp_ccdc.subdev) {
  682. v4l2_subdev_call(&isp->isp_aewb.subdev,
  683. video, s_stream, 0);
  684. v4l2_subdev_call(&isp->isp_af.subdev,
  685. video, s_stream, 0);
  686. v4l2_subdev_call(&isp->isp_hist.subdev,
  687. video, s_stream, 0);
  688. }
  689. ret = v4l2_subdev_call(subdev, video, s_stream, 0);
  690. if (subdev == &isp->isp_res.subdev)
  691. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  692. else if (subdev == &isp->isp_prev.subdev)
  693. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  694. else if (subdev == &isp->isp_ccdc.subdev)
  695. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  696. /* Handle stop failures. An entity that fails to stop can
  697. * usually just be restarted. Flag the stop failure nonetheless
  698. * to trigger an ISP reset the next time the device is released,
  699. * just in case.
  700. *
  701. * The preview engine is a special case. A failure to stop can
  702. * mean a hardware crash. When that happens the preview engine
  703. * won't respond to read/write operations on the L4 bus anymore,
  704. * resulting in a bus fault and a kernel oops next time it gets
  705. * accessed. Mark it as crashed to prevent pipelines including
  706. * it from being started.
  707. */
  708. if (ret) {
  709. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  710. isp->stop_failure = true;
  711. if (subdev == &isp->isp_prev.subdev)
  712. media_entity_enum_set(&isp->crashed,
  713. &subdev->entity);
  714. failure = -ETIMEDOUT;
  715. }
  716. }
  717. return failure;
  718. }
  719. /*
  720. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  721. * @pipe: ISP pipeline
  722. * @state: Stream state (stopped, single shot or continuous)
  723. *
  724. * Set the pipeline to the given stream state. Pipelines can be started in
  725. * single-shot or continuous mode.
  726. *
  727. * Return 0 if successful, or the return value of the failed video::s_stream
  728. * operation otherwise. The pipeline state is not updated when the operation
  729. * fails, except when stopping the pipeline.
  730. */
  731. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  732. enum isp_pipeline_stream_state state)
  733. {
  734. int ret;
  735. if (state == ISP_PIPELINE_STREAM_STOPPED)
  736. ret = isp_pipeline_disable(pipe);
  737. else
  738. ret = isp_pipeline_enable(pipe, state);
  739. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  740. pipe->stream_state = state;
  741. return ret;
  742. }
  743. /*
  744. * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
  745. * @pipe: ISP pipeline
  746. *
  747. * Cancelling a stream mark all buffers on all video nodes in the pipeline as
  748. * erroneous and makes sure no new buffer can be queued. This function is called
  749. * when a fatal error that prevents any further operation on the pipeline
  750. * occurs.
  751. */
  752. void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
  753. {
  754. if (pipe->input)
  755. omap3isp_video_cancel_stream(pipe->input);
  756. if (pipe->output)
  757. omap3isp_video_cancel_stream(pipe->output);
  758. }
  759. /*
  760. * isp_pipeline_resume - Resume streaming on a pipeline
  761. * @pipe: ISP pipeline
  762. *
  763. * Resume video output and input and re-enable pipeline.
  764. */
  765. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  766. {
  767. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  768. omap3isp_video_resume(pipe->output, !singleshot);
  769. if (singleshot)
  770. omap3isp_video_resume(pipe->input, 0);
  771. isp_pipeline_enable(pipe, pipe->stream_state);
  772. }
  773. /*
  774. * isp_pipeline_suspend - Suspend streaming on a pipeline
  775. * @pipe: ISP pipeline
  776. *
  777. * Suspend pipeline.
  778. */
  779. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  780. {
  781. isp_pipeline_disable(pipe);
  782. }
  783. /*
  784. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  785. * video node
  786. * @me: ISP module's media entity
  787. *
  788. * Returns 1 if the entity has an enabled link to the output video node or 0
  789. * otherwise. It's true only while pipeline can have no more than one output
  790. * node.
  791. */
  792. static int isp_pipeline_is_last(struct media_entity *me)
  793. {
  794. struct isp_pipeline *pipe;
  795. struct media_pad *pad;
  796. if (!me->pipe)
  797. return 0;
  798. pipe = to_isp_pipeline(me);
  799. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  800. return 0;
  801. pad = media_entity_remote_pad(&pipe->output->pad);
  802. return pad->entity == me;
  803. }
  804. /*
  805. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  806. * @me: ISP module's media entity
  807. *
  808. * Suspend the whole pipeline if module's entity has an enabled link to the
  809. * output video node. It works only while pipeline can have no more than one
  810. * output node.
  811. */
  812. static void isp_suspend_module_pipeline(struct media_entity *me)
  813. {
  814. if (isp_pipeline_is_last(me))
  815. isp_pipeline_suspend(to_isp_pipeline(me));
  816. }
  817. /*
  818. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  819. * @me: ISP module's media entity
  820. *
  821. * Resume the whole pipeline if module's entity has an enabled link to the
  822. * output video node. It works only while pipeline can have no more than one
  823. * output node.
  824. */
  825. static void isp_resume_module_pipeline(struct media_entity *me)
  826. {
  827. if (isp_pipeline_is_last(me))
  828. isp_pipeline_resume(to_isp_pipeline(me));
  829. }
  830. /*
  831. * isp_suspend_modules - Suspend ISP submodules.
  832. * @isp: OMAP3 ISP device
  833. *
  834. * Returns 0 if suspend left in idle state all the submodules properly,
  835. * or returns 1 if a general Reset is required to suspend the submodules.
  836. */
  837. static int isp_suspend_modules(struct isp_device *isp)
  838. {
  839. unsigned long timeout;
  840. omap3isp_stat_suspend(&isp->isp_aewb);
  841. omap3isp_stat_suspend(&isp->isp_af);
  842. omap3isp_stat_suspend(&isp->isp_hist);
  843. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  844. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  845. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  846. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  847. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  848. timeout = jiffies + ISP_STOP_TIMEOUT;
  849. while (omap3isp_stat_busy(&isp->isp_af)
  850. || omap3isp_stat_busy(&isp->isp_aewb)
  851. || omap3isp_stat_busy(&isp->isp_hist)
  852. || omap3isp_preview_busy(&isp->isp_prev)
  853. || omap3isp_resizer_busy(&isp->isp_res)
  854. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  855. if (time_after(jiffies, timeout)) {
  856. dev_info(isp->dev, "can't stop modules.\n");
  857. return 1;
  858. }
  859. msleep(1);
  860. }
  861. return 0;
  862. }
  863. /*
  864. * isp_resume_modules - Resume ISP submodules.
  865. * @isp: OMAP3 ISP device
  866. */
  867. static void isp_resume_modules(struct isp_device *isp)
  868. {
  869. omap3isp_stat_resume(&isp->isp_aewb);
  870. omap3isp_stat_resume(&isp->isp_af);
  871. omap3isp_stat_resume(&isp->isp_hist);
  872. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  873. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  874. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  875. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  876. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  877. }
  878. /*
  879. * isp_reset - Reset ISP with a timeout wait for idle.
  880. * @isp: OMAP3 ISP device
  881. */
  882. static int isp_reset(struct isp_device *isp)
  883. {
  884. unsigned long timeout = 0;
  885. isp_reg_writel(isp,
  886. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  887. | ISP_SYSCONFIG_SOFTRESET,
  888. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  889. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  890. ISP_SYSSTATUS) & 0x1)) {
  891. if (timeout++ > 10000) {
  892. dev_alert(isp->dev, "cannot reset ISP\n");
  893. return -ETIMEDOUT;
  894. }
  895. udelay(1);
  896. }
  897. isp->stop_failure = false;
  898. media_entity_enum_zero(&isp->crashed);
  899. return 0;
  900. }
  901. /*
  902. * isp_save_context - Saves the values of the ISP module registers.
  903. * @isp: OMAP3 ISP device
  904. * @reg_list: Structure containing pairs of register address and value to
  905. * modify on OMAP.
  906. */
  907. static void
  908. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  909. {
  910. struct isp_reg *next = reg_list;
  911. for (; next->reg != ISP_TOK_TERM; next++)
  912. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  913. }
  914. /*
  915. * isp_restore_context - Restores the values of the ISP module registers.
  916. * @isp: OMAP3 ISP device
  917. * @reg_list: Structure containing pairs of register address and value to
  918. * modify on OMAP.
  919. */
  920. static void
  921. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  922. {
  923. struct isp_reg *next = reg_list;
  924. for (; next->reg != ISP_TOK_TERM; next++)
  925. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  926. }
  927. /*
  928. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  929. * @isp: OMAP3 ISP device
  930. *
  931. * Routine for saving the context of each module in the ISP.
  932. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  933. */
  934. static void isp_save_ctx(struct isp_device *isp)
  935. {
  936. isp_save_context(isp, isp_reg_list);
  937. omap_iommu_save_ctx(isp->dev);
  938. }
  939. /*
  940. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  941. * @isp: OMAP3 ISP device
  942. *
  943. * Routine for restoring the context of each module in the ISP.
  944. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  945. */
  946. static void isp_restore_ctx(struct isp_device *isp)
  947. {
  948. isp_restore_context(isp, isp_reg_list);
  949. omap_iommu_restore_ctx(isp->dev);
  950. omap3isp_ccdc_restore_context(isp);
  951. omap3isp_preview_restore_context(isp);
  952. }
  953. /* -----------------------------------------------------------------------------
  954. * SBL resources management
  955. */
  956. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  957. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  958. OMAP3_ISP_SBL_PREVIEW_READ | \
  959. OMAP3_ISP_SBL_RESIZER_READ)
  960. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  961. OMAP3_ISP_SBL_CSI2A_WRITE | \
  962. OMAP3_ISP_SBL_CSI2C_WRITE | \
  963. OMAP3_ISP_SBL_CCDC_WRITE | \
  964. OMAP3_ISP_SBL_PREVIEW_WRITE)
  965. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  966. {
  967. u32 sbl = 0;
  968. isp->sbl_resources |= res;
  969. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  970. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  971. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  972. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  973. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  974. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  975. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  976. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  977. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  978. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  979. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  980. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  981. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  982. }
  983. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  984. {
  985. u32 sbl = 0;
  986. isp->sbl_resources &= ~res;
  987. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  988. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  989. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  990. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  991. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  992. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  993. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  994. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  995. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  996. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  997. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  998. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  999. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1000. }
  1001. /*
  1002. * isp_module_sync_idle - Helper to sync module with its idle state
  1003. * @me: ISP submodule's media entity
  1004. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1005. * @stopping: flag which tells module wants to stop
  1006. *
  1007. * This function checks if ISP submodule needs to wait for next interrupt. If
  1008. * yes, makes the caller to sleep while waiting for such event.
  1009. */
  1010. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1011. atomic_t *stopping)
  1012. {
  1013. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1014. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1015. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1016. !isp_pipeline_ready(pipe)))
  1017. return 0;
  1018. /*
  1019. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1020. * scenario. We'll call it here to avoid race conditions.
  1021. */
  1022. atomic_set(stopping, 1);
  1023. smp_mb();
  1024. /*
  1025. * If module is the last one, it's writing to memory. In this case,
  1026. * it's necessary to check if the module is already paused due to
  1027. * DMA queue underrun or if it has to wait for next interrupt to be
  1028. * idle.
  1029. * If it isn't the last one, the function won't sleep but *stopping
  1030. * will still be set to warn next submodule caller's interrupt the
  1031. * module wants to be idle.
  1032. */
  1033. if (isp_pipeline_is_last(me)) {
  1034. struct isp_video *video = pipe->output;
  1035. unsigned long flags;
  1036. spin_lock_irqsave(&video->irqlock, flags);
  1037. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1038. spin_unlock_irqrestore(&video->irqlock, flags);
  1039. atomic_set(stopping, 0);
  1040. smp_mb();
  1041. return 0;
  1042. }
  1043. spin_unlock_irqrestore(&video->irqlock, flags);
  1044. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1045. msecs_to_jiffies(1000))) {
  1046. atomic_set(stopping, 0);
  1047. smp_mb();
  1048. return -ETIMEDOUT;
  1049. }
  1050. }
  1051. return 0;
  1052. }
  1053. /*
  1054. * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
  1055. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1056. * @stopping: flag which tells module wants to stop
  1057. *
  1058. * This function checks if ISP submodule was stopping. In case of yes, it
  1059. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1060. * Returns 1 if it was stopping or 0 otherwise.
  1061. */
  1062. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1063. atomic_t *stopping)
  1064. {
  1065. if (atomic_cmpxchg(stopping, 1, 0)) {
  1066. wake_up(wait);
  1067. return 1;
  1068. }
  1069. return 0;
  1070. }
  1071. /* --------------------------------------------------------------------------
  1072. * Clock management
  1073. */
  1074. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1075. ISPCTRL_HIST_CLK_EN | \
  1076. ISPCTRL_RSZ_CLK_EN | \
  1077. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1078. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1079. static void __isp_subclk_update(struct isp_device *isp)
  1080. {
  1081. u32 clk = 0;
  1082. /* AEWB and AF share the same clock. */
  1083. if (isp->subclk_resources &
  1084. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1085. clk |= ISPCTRL_H3A_CLK_EN;
  1086. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1087. clk |= ISPCTRL_HIST_CLK_EN;
  1088. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1089. clk |= ISPCTRL_RSZ_CLK_EN;
  1090. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1091. * RAM as well.
  1092. */
  1093. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1094. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1095. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1096. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1097. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1098. ISPCTRL_CLKS_MASK, clk);
  1099. }
  1100. void omap3isp_subclk_enable(struct isp_device *isp,
  1101. enum isp_subclk_resource res)
  1102. {
  1103. isp->subclk_resources |= res;
  1104. __isp_subclk_update(isp);
  1105. }
  1106. void omap3isp_subclk_disable(struct isp_device *isp,
  1107. enum isp_subclk_resource res)
  1108. {
  1109. isp->subclk_resources &= ~res;
  1110. __isp_subclk_update(isp);
  1111. }
  1112. /*
  1113. * isp_enable_clocks - Enable ISP clocks
  1114. * @isp: OMAP3 ISP device
  1115. *
  1116. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1117. * fails.
  1118. */
  1119. static int isp_enable_clocks(struct isp_device *isp)
  1120. {
  1121. int r;
  1122. unsigned long rate;
  1123. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1124. if (r) {
  1125. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1126. goto out_clk_enable_ick;
  1127. }
  1128. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1129. if (r) {
  1130. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1131. goto out_clk_enable_mclk;
  1132. }
  1133. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1134. if (r) {
  1135. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1136. goto out_clk_enable_mclk;
  1137. }
  1138. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1139. if (rate != CM_CAM_MCLK_HZ)
  1140. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1141. " expected : %d\n"
  1142. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1143. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1144. if (r) {
  1145. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1146. goto out_clk_enable_csi2_fclk;
  1147. }
  1148. return 0;
  1149. out_clk_enable_csi2_fclk:
  1150. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1151. out_clk_enable_mclk:
  1152. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1153. out_clk_enable_ick:
  1154. return r;
  1155. }
  1156. /*
  1157. * isp_disable_clocks - Disable ISP clocks
  1158. * @isp: OMAP3 ISP device
  1159. */
  1160. static void isp_disable_clocks(struct isp_device *isp)
  1161. {
  1162. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1163. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1164. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1165. }
  1166. static const char *isp_clocks[] = {
  1167. "cam_ick",
  1168. "cam_mclk",
  1169. "csi2_96m_fck",
  1170. "l3_ick",
  1171. };
  1172. static int isp_get_clocks(struct isp_device *isp)
  1173. {
  1174. struct clk *clk;
  1175. unsigned int i;
  1176. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1177. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1178. if (IS_ERR(clk)) {
  1179. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1180. return PTR_ERR(clk);
  1181. }
  1182. isp->clock[i] = clk;
  1183. }
  1184. return 0;
  1185. }
  1186. /*
  1187. * omap3isp_get - Acquire the ISP resource.
  1188. *
  1189. * Initializes the clocks for the first acquire.
  1190. *
  1191. * Increment the reference count on the ISP. If the first reference is taken,
  1192. * enable clocks and power-up all submodules.
  1193. *
  1194. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1195. */
  1196. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1197. {
  1198. struct isp_device *__isp = isp;
  1199. if (isp == NULL)
  1200. return NULL;
  1201. mutex_lock(&isp->isp_mutex);
  1202. if (isp->ref_count > 0)
  1203. goto out;
  1204. if (isp_enable_clocks(isp) < 0) {
  1205. __isp = NULL;
  1206. goto out;
  1207. }
  1208. /* We don't want to restore context before saving it! */
  1209. if (isp->has_context)
  1210. isp_restore_ctx(isp);
  1211. if (irq)
  1212. isp_enable_interrupts(isp);
  1213. out:
  1214. if (__isp != NULL)
  1215. isp->ref_count++;
  1216. mutex_unlock(&isp->isp_mutex);
  1217. return __isp;
  1218. }
  1219. struct isp_device *omap3isp_get(struct isp_device *isp)
  1220. {
  1221. return __omap3isp_get(isp, true);
  1222. }
  1223. /*
  1224. * omap3isp_put - Release the ISP
  1225. *
  1226. * Decrement the reference count on the ISP. If the last reference is released,
  1227. * power-down all submodules, disable clocks and free temporary buffers.
  1228. */
  1229. static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
  1230. {
  1231. if (isp == NULL)
  1232. return;
  1233. mutex_lock(&isp->isp_mutex);
  1234. BUG_ON(isp->ref_count == 0);
  1235. if (--isp->ref_count == 0) {
  1236. isp_disable_interrupts(isp);
  1237. if (save_ctx) {
  1238. isp_save_ctx(isp);
  1239. isp->has_context = 1;
  1240. }
  1241. /* Reset the ISP if an entity has failed to stop. This is the
  1242. * only way to recover from such conditions.
  1243. */
  1244. if (!media_entity_enum_empty(&isp->crashed) ||
  1245. isp->stop_failure)
  1246. isp_reset(isp);
  1247. isp_disable_clocks(isp);
  1248. }
  1249. mutex_unlock(&isp->isp_mutex);
  1250. }
  1251. void omap3isp_put(struct isp_device *isp)
  1252. {
  1253. __omap3isp_put(isp, true);
  1254. }
  1255. /* --------------------------------------------------------------------------
  1256. * Platform device driver
  1257. */
  1258. /*
  1259. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1260. * @isp: OMAP3 ISP device
  1261. */
  1262. #define ISP_PRINT_REGISTER(isp, name)\
  1263. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1264. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1265. #define SBL_PRINT_REGISTER(isp, name)\
  1266. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1267. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1268. void omap3isp_print_status(struct isp_device *isp)
  1269. {
  1270. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1271. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1272. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1273. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1274. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1275. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1276. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1277. ISP_PRINT_REGISTER(isp, CTRL);
  1278. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1279. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1280. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1281. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1282. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1283. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1284. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1285. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1286. SBL_PRINT_REGISTER(isp, PCR);
  1287. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1288. dev_dbg(isp->dev, "--------------------------------------------\n");
  1289. }
  1290. #ifdef CONFIG_PM
  1291. /*
  1292. * Power management support.
  1293. *
  1294. * As the ISP can't properly handle an input video stream interruption on a non
  1295. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1296. * suspended. However, as suspending the sensors can require a running clock,
  1297. * which can be provided by the ISP, the ISP can't be completely suspended
  1298. * before the sensor.
  1299. *
  1300. * To solve this problem power management support is split into prepare/complete
  1301. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1302. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1303. * resume(), and the the pipelines are restarted in complete().
  1304. *
  1305. * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
  1306. * yet.
  1307. */
  1308. static int isp_pm_prepare(struct device *dev)
  1309. {
  1310. struct isp_device *isp = dev_get_drvdata(dev);
  1311. int reset;
  1312. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1313. if (isp->ref_count == 0)
  1314. return 0;
  1315. reset = isp_suspend_modules(isp);
  1316. isp_disable_interrupts(isp);
  1317. isp_save_ctx(isp);
  1318. if (reset)
  1319. isp_reset(isp);
  1320. return 0;
  1321. }
  1322. static int isp_pm_suspend(struct device *dev)
  1323. {
  1324. struct isp_device *isp = dev_get_drvdata(dev);
  1325. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1326. if (isp->ref_count)
  1327. isp_disable_clocks(isp);
  1328. return 0;
  1329. }
  1330. static int isp_pm_resume(struct device *dev)
  1331. {
  1332. struct isp_device *isp = dev_get_drvdata(dev);
  1333. if (isp->ref_count == 0)
  1334. return 0;
  1335. return isp_enable_clocks(isp);
  1336. }
  1337. static void isp_pm_complete(struct device *dev)
  1338. {
  1339. struct isp_device *isp = dev_get_drvdata(dev);
  1340. if (isp->ref_count == 0)
  1341. return;
  1342. isp_restore_ctx(isp);
  1343. isp_enable_interrupts(isp);
  1344. isp_resume_modules(isp);
  1345. }
  1346. #else
  1347. #define isp_pm_prepare NULL
  1348. #define isp_pm_suspend NULL
  1349. #define isp_pm_resume NULL
  1350. #define isp_pm_complete NULL
  1351. #endif /* CONFIG_PM */
  1352. static void isp_unregister_entities(struct isp_device *isp)
  1353. {
  1354. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1355. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1356. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1357. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1358. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1359. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1360. omap3isp_stat_unregister_entities(&isp->isp_af);
  1361. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1362. v4l2_device_unregister(&isp->v4l2_dev);
  1363. media_device_unregister(&isp->media_dev);
  1364. media_device_cleanup(&isp->media_dev);
  1365. }
  1366. static int isp_link_entity(
  1367. struct isp_device *isp, struct media_entity *entity,
  1368. enum isp_interface_type interface)
  1369. {
  1370. struct media_entity *input;
  1371. unsigned int flags;
  1372. unsigned int pad;
  1373. unsigned int i;
  1374. /* Connect the sensor to the correct interface module.
  1375. * Parallel sensors are connected directly to the CCDC, while
  1376. * serial sensors are connected to the CSI2a, CCP2b or CSI2c
  1377. * receiver through CSIPHY1 or CSIPHY2.
  1378. */
  1379. switch (interface) {
  1380. case ISP_INTERFACE_PARALLEL:
  1381. input = &isp->isp_ccdc.subdev.entity;
  1382. pad = CCDC_PAD_SINK;
  1383. flags = 0;
  1384. break;
  1385. case ISP_INTERFACE_CSI2A_PHY2:
  1386. input = &isp->isp_csi2a.subdev.entity;
  1387. pad = CSI2_PAD_SINK;
  1388. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1389. break;
  1390. case ISP_INTERFACE_CCP2B_PHY1:
  1391. case ISP_INTERFACE_CCP2B_PHY2:
  1392. input = &isp->isp_ccp2.subdev.entity;
  1393. pad = CCP2_PAD_SINK;
  1394. flags = 0;
  1395. break;
  1396. case ISP_INTERFACE_CSI2C_PHY1:
  1397. input = &isp->isp_csi2c.subdev.entity;
  1398. pad = CSI2_PAD_SINK;
  1399. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1400. break;
  1401. default:
  1402. dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
  1403. interface);
  1404. return -EINVAL;
  1405. }
  1406. /*
  1407. * Not all interfaces are available on all revisions of the
  1408. * ISP. The sub-devices of those interfaces aren't initialised
  1409. * in such a case. Check this by ensuring the num_pads is
  1410. * non-zero.
  1411. */
  1412. if (!input->num_pads) {
  1413. dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
  1414. interface);
  1415. return -EINVAL;
  1416. }
  1417. for (i = 0; i < entity->num_pads; i++) {
  1418. if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1419. break;
  1420. }
  1421. if (i == entity->num_pads) {
  1422. dev_err(isp->dev, "%s: no source pad in external entity\n",
  1423. __func__);
  1424. return -EINVAL;
  1425. }
  1426. return media_create_pad_link(entity, i, input, pad, flags);
  1427. }
  1428. static int isp_register_entities(struct isp_device *isp)
  1429. {
  1430. int ret;
  1431. isp->media_dev.dev = isp->dev;
  1432. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1433. sizeof(isp->media_dev.model));
  1434. isp->media_dev.hw_revision = isp->revision;
  1435. isp->media_dev.ops = &isp_media_ops;
  1436. media_device_init(&isp->media_dev);
  1437. isp->v4l2_dev.mdev = &isp->media_dev;
  1438. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1439. if (ret < 0) {
  1440. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1441. __func__, ret);
  1442. goto done;
  1443. }
  1444. /* Register internal entities */
  1445. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1446. if (ret < 0)
  1447. goto done;
  1448. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1449. if (ret < 0)
  1450. goto done;
  1451. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1452. if (ret < 0)
  1453. goto done;
  1454. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1455. &isp->v4l2_dev);
  1456. if (ret < 0)
  1457. goto done;
  1458. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1459. if (ret < 0)
  1460. goto done;
  1461. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1462. if (ret < 0)
  1463. goto done;
  1464. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1465. if (ret < 0)
  1466. goto done;
  1467. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1468. if (ret < 0)
  1469. goto done;
  1470. done:
  1471. if (ret < 0)
  1472. isp_unregister_entities(isp);
  1473. return ret;
  1474. }
  1475. /*
  1476. * isp_create_links() - Create links for internal and external ISP entities
  1477. * @isp : Pointer to ISP device
  1478. *
  1479. * This function creates all links between ISP internal and external entities.
  1480. *
  1481. * Return: A negative error code on failure or zero on success. Possible error
  1482. * codes are those returned by media_create_pad_link().
  1483. */
  1484. static int isp_create_links(struct isp_device *isp)
  1485. {
  1486. int ret;
  1487. /* Create links between entities and video nodes. */
  1488. ret = media_create_pad_link(
  1489. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1490. &isp->isp_csi2a.video_out.video.entity, 0, 0);
  1491. if (ret < 0)
  1492. return ret;
  1493. ret = media_create_pad_link(
  1494. &isp->isp_ccp2.video_in.video.entity, 0,
  1495. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
  1496. if (ret < 0)
  1497. return ret;
  1498. ret = media_create_pad_link(
  1499. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1500. &isp->isp_ccdc.video_out.video.entity, 0, 0);
  1501. if (ret < 0)
  1502. return ret;
  1503. ret = media_create_pad_link(
  1504. &isp->isp_prev.video_in.video.entity, 0,
  1505. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1506. if (ret < 0)
  1507. return ret;
  1508. ret = media_create_pad_link(
  1509. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1510. &isp->isp_prev.video_out.video.entity, 0, 0);
  1511. if (ret < 0)
  1512. return ret;
  1513. ret = media_create_pad_link(
  1514. &isp->isp_res.video_in.video.entity, 0,
  1515. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1516. if (ret < 0)
  1517. return ret;
  1518. ret = media_create_pad_link(
  1519. &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
  1520. &isp->isp_res.video_out.video.entity, 0, 0);
  1521. if (ret < 0)
  1522. return ret;
  1523. /* Create links between entities. */
  1524. ret = media_create_pad_link(
  1525. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1526. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1527. if (ret < 0)
  1528. return ret;
  1529. ret = media_create_pad_link(
  1530. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1531. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1532. if (ret < 0)
  1533. return ret;
  1534. ret = media_create_pad_link(
  1535. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1536. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1537. if (ret < 0)
  1538. return ret;
  1539. ret = media_create_pad_link(
  1540. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1541. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1542. if (ret < 0)
  1543. return ret;
  1544. ret = media_create_pad_link(
  1545. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1546. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1547. if (ret < 0)
  1548. return ret;
  1549. ret = media_create_pad_link(
  1550. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1551. &isp->isp_aewb.subdev.entity, 0,
  1552. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1553. if (ret < 0)
  1554. return ret;
  1555. ret = media_create_pad_link(
  1556. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1557. &isp->isp_af.subdev.entity, 0,
  1558. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1559. if (ret < 0)
  1560. return ret;
  1561. ret = media_create_pad_link(
  1562. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1563. &isp->isp_hist.subdev.entity, 0,
  1564. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1565. if (ret < 0)
  1566. return ret;
  1567. return 0;
  1568. }
  1569. static void isp_cleanup_modules(struct isp_device *isp)
  1570. {
  1571. omap3isp_h3a_aewb_cleanup(isp);
  1572. omap3isp_h3a_af_cleanup(isp);
  1573. omap3isp_hist_cleanup(isp);
  1574. omap3isp_resizer_cleanup(isp);
  1575. omap3isp_preview_cleanup(isp);
  1576. omap3isp_ccdc_cleanup(isp);
  1577. omap3isp_ccp2_cleanup(isp);
  1578. omap3isp_csi2_cleanup(isp);
  1579. }
  1580. static int isp_initialize_modules(struct isp_device *isp)
  1581. {
  1582. int ret;
  1583. ret = omap3isp_csiphy_init(isp);
  1584. if (ret < 0) {
  1585. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1586. goto error_csiphy;
  1587. }
  1588. ret = omap3isp_csi2_init(isp);
  1589. if (ret < 0) {
  1590. dev_err(isp->dev, "CSI2 initialization failed\n");
  1591. goto error_csi2;
  1592. }
  1593. ret = omap3isp_ccp2_init(isp);
  1594. if (ret < 0) {
  1595. dev_err(isp->dev, "CCP2 initialization failed\n");
  1596. goto error_ccp2;
  1597. }
  1598. ret = omap3isp_ccdc_init(isp);
  1599. if (ret < 0) {
  1600. dev_err(isp->dev, "CCDC initialization failed\n");
  1601. goto error_ccdc;
  1602. }
  1603. ret = omap3isp_preview_init(isp);
  1604. if (ret < 0) {
  1605. dev_err(isp->dev, "Preview initialization failed\n");
  1606. goto error_preview;
  1607. }
  1608. ret = omap3isp_resizer_init(isp);
  1609. if (ret < 0) {
  1610. dev_err(isp->dev, "Resizer initialization failed\n");
  1611. goto error_resizer;
  1612. }
  1613. ret = omap3isp_hist_init(isp);
  1614. if (ret < 0) {
  1615. dev_err(isp->dev, "Histogram initialization failed\n");
  1616. goto error_hist;
  1617. }
  1618. ret = omap3isp_h3a_aewb_init(isp);
  1619. if (ret < 0) {
  1620. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1621. goto error_h3a_aewb;
  1622. }
  1623. ret = omap3isp_h3a_af_init(isp);
  1624. if (ret < 0) {
  1625. dev_err(isp->dev, "H3A AF initialization failed\n");
  1626. goto error_h3a_af;
  1627. }
  1628. return 0;
  1629. error_h3a_af:
  1630. omap3isp_h3a_aewb_cleanup(isp);
  1631. error_h3a_aewb:
  1632. omap3isp_hist_cleanup(isp);
  1633. error_hist:
  1634. omap3isp_resizer_cleanup(isp);
  1635. error_resizer:
  1636. omap3isp_preview_cleanup(isp);
  1637. error_preview:
  1638. omap3isp_ccdc_cleanup(isp);
  1639. error_ccdc:
  1640. omap3isp_ccp2_cleanup(isp);
  1641. error_ccp2:
  1642. omap3isp_csi2_cleanup(isp);
  1643. error_csi2:
  1644. error_csiphy:
  1645. return ret;
  1646. }
  1647. static void isp_detach_iommu(struct isp_device *isp)
  1648. {
  1649. arm_iommu_detach_device(isp->dev);
  1650. arm_iommu_release_mapping(isp->mapping);
  1651. isp->mapping = NULL;
  1652. iommu_group_remove_device(isp->dev);
  1653. }
  1654. static int isp_attach_iommu(struct isp_device *isp)
  1655. {
  1656. struct dma_iommu_mapping *mapping;
  1657. struct iommu_group *group;
  1658. int ret;
  1659. /* Create a device group and add the device to it. */
  1660. group = iommu_group_alloc();
  1661. if (IS_ERR(group)) {
  1662. dev_err(isp->dev, "failed to allocate IOMMU group\n");
  1663. return PTR_ERR(group);
  1664. }
  1665. ret = iommu_group_add_device(group, isp->dev);
  1666. iommu_group_put(group);
  1667. if (ret < 0) {
  1668. dev_err(isp->dev, "failed to add device to IPMMU group\n");
  1669. return ret;
  1670. }
  1671. /*
  1672. * Create the ARM mapping, used by the ARM DMA mapping core to allocate
  1673. * VAs. This will allocate a corresponding IOMMU domain.
  1674. */
  1675. mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
  1676. if (IS_ERR(mapping)) {
  1677. dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
  1678. return PTR_ERR(mapping);
  1679. }
  1680. isp->mapping = mapping;
  1681. /* Attach the ARM VA mapping to the device. */
  1682. ret = arm_iommu_attach_device(isp->dev, mapping);
  1683. if (ret < 0) {
  1684. dev_err(isp->dev, "failed to attach device to VA mapping\n");
  1685. goto error;
  1686. }
  1687. return 0;
  1688. error:
  1689. arm_iommu_release_mapping(isp->mapping);
  1690. isp->mapping = NULL;
  1691. return ret;
  1692. }
  1693. /*
  1694. * isp_remove - Remove ISP platform device
  1695. * @pdev: Pointer to ISP platform device
  1696. *
  1697. * Always returns 0.
  1698. */
  1699. static int isp_remove(struct platform_device *pdev)
  1700. {
  1701. struct isp_device *isp = platform_get_drvdata(pdev);
  1702. v4l2_async_notifier_unregister(&isp->notifier);
  1703. isp_unregister_entities(isp);
  1704. isp_cleanup_modules(isp);
  1705. isp_xclk_cleanup(isp);
  1706. __omap3isp_get(isp, false);
  1707. isp_detach_iommu(isp);
  1708. __omap3isp_put(isp, false);
  1709. media_entity_enum_cleanup(&isp->crashed);
  1710. return 0;
  1711. }
  1712. enum isp_of_phy {
  1713. ISP_OF_PHY_PARALLEL = 0,
  1714. ISP_OF_PHY_CSIPHY1,
  1715. ISP_OF_PHY_CSIPHY2,
  1716. };
  1717. static int isp_of_parse_node(struct device *dev, struct device_node *node,
  1718. struct isp_async_subdev *isd)
  1719. {
  1720. struct isp_bus_cfg *buscfg = &isd->bus;
  1721. struct v4l2_of_endpoint vep;
  1722. unsigned int i;
  1723. int ret;
  1724. ret = v4l2_of_parse_endpoint(node, &vep);
  1725. if (ret)
  1726. return ret;
  1727. dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
  1728. vep.base.port);
  1729. switch (vep.base.port) {
  1730. case ISP_OF_PHY_PARALLEL:
  1731. buscfg->interface = ISP_INTERFACE_PARALLEL;
  1732. buscfg->bus.parallel.data_lane_shift =
  1733. vep.bus.parallel.data_shift;
  1734. buscfg->bus.parallel.clk_pol =
  1735. !!(vep.bus.parallel.flags
  1736. & V4L2_MBUS_PCLK_SAMPLE_FALLING);
  1737. buscfg->bus.parallel.hs_pol =
  1738. !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
  1739. buscfg->bus.parallel.vs_pol =
  1740. !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
  1741. buscfg->bus.parallel.fld_pol =
  1742. !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
  1743. buscfg->bus.parallel.data_pol =
  1744. !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
  1745. break;
  1746. case ISP_OF_PHY_CSIPHY1:
  1747. case ISP_OF_PHY_CSIPHY2:
  1748. /* FIXME: always assume CSI-2 for now. */
  1749. switch (vep.base.port) {
  1750. case ISP_OF_PHY_CSIPHY1:
  1751. buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
  1752. break;
  1753. case ISP_OF_PHY_CSIPHY2:
  1754. buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
  1755. break;
  1756. }
  1757. buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
  1758. buscfg->bus.csi2.lanecfg.clk.pol =
  1759. vep.bus.mipi_csi2.lane_polarities[0];
  1760. dev_dbg(dev, "clock lane polarity %u, pos %u\n",
  1761. buscfg->bus.csi2.lanecfg.clk.pol,
  1762. buscfg->bus.csi2.lanecfg.clk.pos);
  1763. for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
  1764. buscfg->bus.csi2.lanecfg.data[i].pos =
  1765. vep.bus.mipi_csi2.data_lanes[i];
  1766. buscfg->bus.csi2.lanecfg.data[i].pol =
  1767. vep.bus.mipi_csi2.lane_polarities[i + 1];
  1768. dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
  1769. buscfg->bus.csi2.lanecfg.data[i].pol,
  1770. buscfg->bus.csi2.lanecfg.data[i].pos);
  1771. }
  1772. /*
  1773. * FIXME: now we assume the CRC is always there.
  1774. * Implement a way to obtain this information from the
  1775. * sensor. Frame descriptors, perhaps?
  1776. */
  1777. buscfg->bus.csi2.crc = 1;
  1778. break;
  1779. default:
  1780. dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
  1781. vep.base.port);
  1782. break;
  1783. }
  1784. return 0;
  1785. }
  1786. static int isp_of_parse_nodes(struct device *dev,
  1787. struct v4l2_async_notifier *notifier)
  1788. {
  1789. struct device_node *node = NULL;
  1790. notifier->subdevs = devm_kcalloc(
  1791. dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
  1792. if (!notifier->subdevs)
  1793. return -ENOMEM;
  1794. while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
  1795. (node = of_graph_get_next_endpoint(dev->of_node, node))) {
  1796. struct isp_async_subdev *isd;
  1797. isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
  1798. if (!isd) {
  1799. of_node_put(node);
  1800. return -ENOMEM;
  1801. }
  1802. notifier->subdevs[notifier->num_subdevs] = &isd->asd;
  1803. if (isp_of_parse_node(dev, node, isd)) {
  1804. of_node_put(node);
  1805. return -EINVAL;
  1806. }
  1807. isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
  1808. of_node_put(node);
  1809. if (!isd->asd.match.of.node) {
  1810. dev_warn(dev, "bad remote port parent\n");
  1811. return -EINVAL;
  1812. }
  1813. isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
  1814. notifier->num_subdevs++;
  1815. }
  1816. return notifier->num_subdevs;
  1817. }
  1818. static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
  1819. struct v4l2_subdev *subdev,
  1820. struct v4l2_async_subdev *asd)
  1821. {
  1822. struct isp_async_subdev *isd =
  1823. container_of(asd, struct isp_async_subdev, asd);
  1824. isd->sd = subdev;
  1825. isd->sd->host_priv = &isd->bus;
  1826. return 0;
  1827. }
  1828. static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
  1829. {
  1830. struct isp_device *isp = container_of(async, struct isp_device,
  1831. notifier);
  1832. struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
  1833. struct v4l2_subdev *sd;
  1834. struct isp_bus_cfg *bus;
  1835. int ret;
  1836. ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
  1837. if (ret)
  1838. return ret;
  1839. list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
  1840. /* Only try to link entities whose interface was set on bound */
  1841. if (sd->host_priv) {
  1842. bus = (struct isp_bus_cfg *)sd->host_priv;
  1843. ret = isp_link_entity(isp, &sd->entity, bus->interface);
  1844. if (ret < 0)
  1845. return ret;
  1846. }
  1847. }
  1848. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1849. if (ret < 0)
  1850. return ret;
  1851. return media_device_register(&isp->media_dev);
  1852. }
  1853. /*
  1854. * isp_probe - Probe ISP platform device
  1855. * @pdev: Pointer to ISP platform device
  1856. *
  1857. * Returns 0 if successful,
  1858. * -ENOMEM if no memory available,
  1859. * -ENODEV if no platform device resources found
  1860. * or no space for remapping registers,
  1861. * -EINVAL if couldn't install ISR,
  1862. * or clk_get return error value.
  1863. */
  1864. static int isp_probe(struct platform_device *pdev)
  1865. {
  1866. struct isp_device *isp;
  1867. struct resource *mem;
  1868. int ret;
  1869. int i, m;
  1870. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  1871. if (!isp) {
  1872. dev_err(&pdev->dev, "could not allocate memory\n");
  1873. return -ENOMEM;
  1874. }
  1875. ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
  1876. &isp->phy_type);
  1877. if (ret)
  1878. return ret;
  1879. isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
  1880. "syscon");
  1881. if (IS_ERR(isp->syscon))
  1882. return PTR_ERR(isp->syscon);
  1883. ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
  1884. &isp->syscon_offset);
  1885. if (ret)
  1886. return ret;
  1887. ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
  1888. if (ret < 0)
  1889. return ret;
  1890. isp->autoidle = autoidle;
  1891. mutex_init(&isp->isp_mutex);
  1892. spin_lock_init(&isp->stat_lock);
  1893. isp->dev = &pdev->dev;
  1894. isp->ref_count = 0;
  1895. ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
  1896. if (ret)
  1897. goto error;
  1898. platform_set_drvdata(pdev, isp);
  1899. /* Regulators */
  1900. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
  1901. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
  1902. /* Clocks
  1903. *
  1904. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  1905. * manually to read the revision before calling __omap3isp_get().
  1906. *
  1907. * Start by mapping the ISP MMIO area, which is in two pieces.
  1908. * The ISP IOMMU is in between. Map both now, and fill in the
  1909. * ISP revision specific portions a little later in the
  1910. * function.
  1911. */
  1912. for (i = 0; i < 2; i++) {
  1913. unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
  1914. mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
  1915. isp->mmio_base[map_idx] =
  1916. devm_ioremap_resource(isp->dev, mem);
  1917. if (IS_ERR(isp->mmio_base[map_idx]))
  1918. return PTR_ERR(isp->mmio_base[map_idx]);
  1919. }
  1920. ret = isp_get_clocks(isp);
  1921. if (ret < 0)
  1922. goto error;
  1923. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1924. if (ret < 0)
  1925. goto error;
  1926. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  1927. dev_info(isp->dev, "Revision %d.%d found\n",
  1928. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  1929. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1930. if (__omap3isp_get(isp, false) == NULL) {
  1931. ret = -ENODEV;
  1932. goto error;
  1933. }
  1934. ret = isp_reset(isp);
  1935. if (ret < 0)
  1936. goto error_isp;
  1937. ret = isp_xclk_init(isp);
  1938. if (ret < 0)
  1939. goto error_isp;
  1940. /* Memory resources */
  1941. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  1942. if (isp->revision == isp_res_maps[m].isp_rev)
  1943. break;
  1944. if (m == ARRAY_SIZE(isp_res_maps)) {
  1945. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  1946. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  1947. ret = -ENODEV;
  1948. goto error_isp;
  1949. }
  1950. for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
  1951. isp->mmio_base[i] =
  1952. isp->mmio_base[0] + isp_res_maps[m].offset[i];
  1953. for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
  1954. isp->mmio_base[i] =
  1955. isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
  1956. + isp_res_maps[m].offset[i];
  1957. isp->mmio_hist_base_phys =
  1958. mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
  1959. /* IOMMU */
  1960. ret = isp_attach_iommu(isp);
  1961. if (ret < 0) {
  1962. dev_err(&pdev->dev, "unable to attach to IOMMU\n");
  1963. goto error_isp;
  1964. }
  1965. /* Interrupt */
  1966. ret = platform_get_irq(pdev, 0);
  1967. if (ret <= 0) {
  1968. dev_err(isp->dev, "No IRQ resource\n");
  1969. ret = -ENODEV;
  1970. goto error_iommu;
  1971. }
  1972. isp->irq_num = ret;
  1973. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  1974. "OMAP3 ISP", isp)) {
  1975. dev_err(isp->dev, "Unable to request IRQ\n");
  1976. ret = -EINVAL;
  1977. goto error_iommu;
  1978. }
  1979. /* Entities */
  1980. ret = isp_initialize_modules(isp);
  1981. if (ret < 0)
  1982. goto error_iommu;
  1983. ret = isp_register_entities(isp);
  1984. if (ret < 0)
  1985. goto error_modules;
  1986. ret = isp_create_links(isp);
  1987. if (ret < 0)
  1988. goto error_register_entities;
  1989. isp->notifier.bound = isp_subdev_notifier_bound;
  1990. isp->notifier.complete = isp_subdev_notifier_complete;
  1991. ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
  1992. if (ret)
  1993. goto error_register_entities;
  1994. isp_core_init(isp, 1);
  1995. omap3isp_put(isp);
  1996. return 0;
  1997. error_register_entities:
  1998. isp_unregister_entities(isp);
  1999. error_modules:
  2000. isp_cleanup_modules(isp);
  2001. error_iommu:
  2002. isp_detach_iommu(isp);
  2003. error_isp:
  2004. isp_xclk_cleanup(isp);
  2005. __omap3isp_put(isp, false);
  2006. error:
  2007. mutex_destroy(&isp->isp_mutex);
  2008. return ret;
  2009. }
  2010. static const struct dev_pm_ops omap3isp_pm_ops = {
  2011. .prepare = isp_pm_prepare,
  2012. .suspend = isp_pm_suspend,
  2013. .resume = isp_pm_resume,
  2014. .complete = isp_pm_complete,
  2015. };
  2016. static struct platform_device_id omap3isp_id_table[] = {
  2017. { "omap3isp", 0 },
  2018. { },
  2019. };
  2020. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  2021. static const struct of_device_id omap3isp_of_table[] = {
  2022. { .compatible = "ti,omap3-isp" },
  2023. { },
  2024. };
  2025. MODULE_DEVICE_TABLE(of, omap3isp_of_table);
  2026. static struct platform_driver omap3isp_driver = {
  2027. .probe = isp_probe,
  2028. .remove = isp_remove,
  2029. .id_table = omap3isp_id_table,
  2030. .driver = {
  2031. .name = "omap3isp",
  2032. .pm = &omap3isp_pm_ops,
  2033. .of_match_table = omap3isp_of_table,
  2034. },
  2035. };
  2036. module_platform_driver(omap3isp_driver);
  2037. MODULE_AUTHOR("Nokia Corporation");
  2038. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  2039. MODULE_LICENSE("GPL");
  2040. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);