av7110.c 80 KB

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  1. /*
  2. * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
  3. * av7110.c: initialization and demux stuff
  4. *
  5. * Copyright (C) 1999-2002 Ralph Metzler
  6. * & Marcus Metzler for convergence integrated media GmbH
  7. *
  8. * originally based on code by:
  9. * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at https://linuxtv.org
  30. */
  31. #include <linux/module.h>
  32. #include <linux/kmod.h>
  33. #include <linux/delay.h>
  34. #include <linux/fs.h>
  35. #include <linux/timer.h>
  36. #include <linux/poll.h>
  37. #include <linux/kernel.h>
  38. #include <linux/sched.h>
  39. #include <linux/types.h>
  40. #include <linux/fcntl.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/string.h>
  43. #include <linux/pci.h>
  44. #include <linux/vmalloc.h>
  45. #include <linux/firmware.h>
  46. #include <linux/crc32.h>
  47. #include <linux/i2c.h>
  48. #include <linux/kthread.h>
  49. #include <linux/slab.h>
  50. #include <asm/unaligned.h>
  51. #include <asm/byteorder.h>
  52. #include <linux/dvb/frontend.h>
  53. #include "dvb_frontend.h"
  54. #include "ttpci-eeprom.h"
  55. #include "av7110.h"
  56. #include "av7110_hw.h"
  57. #include "av7110_av.h"
  58. #include "av7110_ca.h"
  59. #include "av7110_ipack.h"
  60. #include "bsbe1.h"
  61. #include "lnbp21.h"
  62. #include "bsru6.h"
  63. #define TS_WIDTH 376
  64. #define TS_HEIGHT 512
  65. #define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
  66. #define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
  67. int av7110_debug;
  68. static int vidmode = CVBS_RGB_OUT;
  69. static int pids_off;
  70. static int adac = DVB_ADAC_TI;
  71. static int hw_sections;
  72. static int rgb_on;
  73. static int volume = 255;
  74. static int budgetpatch;
  75. static int wss_cfg_4_3 = 0x4008;
  76. static int wss_cfg_16_9 = 0x0007;
  77. static int tv_standard;
  78. static int full_ts;
  79. module_param_named(debug, av7110_debug, int, 0644);
  80. MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
  81. module_param(vidmode, int, 0444);
  82. MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
  83. module_param(pids_off, int, 0444);
  84. MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
  85. module_param(adac, int, 0444);
  86. MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
  87. module_param(hw_sections, int, 0444);
  88. MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
  89. module_param(rgb_on, int, 0444);
  90. MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control"
  91. " signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
  92. module_param(volume, int, 0444);
  93. MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
  94. module_param(budgetpatch, int, 0444);
  95. MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
  96. module_param(full_ts, int, 0444);
  97. MODULE_PARM_DESC(full_ts, "enable code for full-ts hardware modification: 0 disable (default), 1 enable");
  98. module_param(wss_cfg_4_3, int, 0444);
  99. MODULE_PARM_DESC(wss_cfg_4_3, "WSS 4:3 - default 0x4008 - bit 15: disable, 14: burst mode, 13..0: wss data");
  100. module_param(wss_cfg_16_9, int, 0444);
  101. MODULE_PARM_DESC(wss_cfg_16_9, "WSS 16:9 - default 0x0007 - bit 15: disable, 14: burst mode, 13..0: wss data");
  102. module_param(tv_standard, int, 0444);
  103. MODULE_PARM_DESC(tv_standard, "TV standard: 0 PAL (default), 1 NTSC");
  104. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  105. static void restart_feeds(struct av7110 *av7110);
  106. static int budget_start_feed(struct dvb_demux_feed *feed);
  107. static int budget_stop_feed(struct dvb_demux_feed *feed);
  108. static int av7110_num;
  109. #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
  110. {\
  111. if (fe_func != NULL) { \
  112. av7110_copy = fe_func; \
  113. fe_func = av7110_func; \
  114. } \
  115. }
  116. static void init_av7110_av(struct av7110 *av7110)
  117. {
  118. int ret;
  119. struct saa7146_dev *dev = av7110->dev;
  120. /* set internal volume control to maximum */
  121. av7110->adac_type = DVB_ADAC_TI;
  122. ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
  123. if (ret < 0)
  124. printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
  125. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetMonitorType,
  126. 1, (u16) av7110->display_ar);
  127. if (ret < 0)
  128. printk("dvb-ttpci: unable to set aspect ratio\n");
  129. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetPanScanType,
  130. 1, av7110->display_panscan);
  131. if (ret < 0)
  132. printk("dvb-ttpci: unable to set pan scan\n");
  133. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 2, wss_cfg_4_3);
  134. if (ret < 0)
  135. printk("dvb-ttpci: unable to configure 4:3 wss\n");
  136. ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 3, wss_cfg_16_9);
  137. if (ret < 0)
  138. printk("dvb-ttpci: unable to configure 16:9 wss\n");
  139. ret = av7710_set_video_mode(av7110, vidmode);
  140. if (ret < 0)
  141. printk("dvb-ttpci:cannot set video mode:%d\n",ret);
  142. /* handle different card types */
  143. /* remaining inits according to card and frontend type */
  144. av7110->analog_tuner_flags = 0;
  145. av7110->current_input = 0;
  146. if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a)
  147. av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on
  148. if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
  149. printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
  150. av7110->dvb_adapter.num);
  151. av7110->adac_type = DVB_ADAC_CRYSTAL;
  152. i2c_writereg(av7110, 0x20, 0x01, 0xd2);
  153. i2c_writereg(av7110, 0x20, 0x02, 0x49);
  154. i2c_writereg(av7110, 0x20, 0x03, 0x00);
  155. i2c_writereg(av7110, 0x20, 0x04, 0x00);
  156. /**
  157. * some special handling for the Siemens DVB-C cards...
  158. */
  159. } else if (0 == av7110_init_analog_module(av7110)) {
  160. /* done. */
  161. }
  162. else if (dev->pci->subsystem_vendor == 0x110a) {
  163. printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
  164. av7110->dvb_adapter.num);
  165. av7110->adac_type = DVB_ADAC_NONE;
  166. }
  167. else {
  168. av7110->adac_type = adac;
  169. printk("dvb-ttpci: adac type set to %d @ card %d\n",
  170. av7110->adac_type, av7110->dvb_adapter.num);
  171. }
  172. if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) {
  173. // switch DVB SCART on
  174. ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
  175. if (ret < 0)
  176. printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
  177. ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
  178. if (ret < 0)
  179. printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
  180. if (rgb_on &&
  181. ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
  182. (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
  183. (av7110->dev->pci->subsystem_device == 0x0000)) {
  184. saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
  185. //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
  186. }
  187. }
  188. if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
  189. av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
  190. ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
  191. if (ret < 0)
  192. printk("dvb-ttpci:cannot set volume :%d\n",ret);
  193. }
  194. static void recover_arm(struct av7110 *av7110)
  195. {
  196. dprintk(4, "%p\n",av7110);
  197. av7110_bootarm(av7110);
  198. msleep(100);
  199. init_av7110_av(av7110);
  200. /* card-specific recovery */
  201. if (av7110->recover)
  202. av7110->recover(av7110);
  203. restart_feeds(av7110);
  204. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  205. av7110_check_ir_config(av7110, true);
  206. #endif
  207. }
  208. static void av7110_arm_sync(struct av7110 *av7110)
  209. {
  210. if (av7110->arm_thread)
  211. kthread_stop(av7110->arm_thread);
  212. av7110->arm_thread = NULL;
  213. }
  214. static int arm_thread(void *data)
  215. {
  216. struct av7110 *av7110 = data;
  217. u16 newloops = 0;
  218. int timeout;
  219. dprintk(4, "%p\n",av7110);
  220. for (;;) {
  221. timeout = wait_event_interruptible_timeout(av7110->arm_wait,
  222. kthread_should_stop(), 5 * HZ);
  223. if (-ERESTARTSYS == timeout || kthread_should_stop()) {
  224. /* got signal or told to quit*/
  225. break;
  226. }
  227. if (!av7110->arm_ready)
  228. continue;
  229. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  230. av7110_check_ir_config(av7110, false);
  231. #endif
  232. if (mutex_lock_interruptible(&av7110->dcomlock))
  233. break;
  234. newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
  235. mutex_unlock(&av7110->dcomlock);
  236. if (newloops == av7110->arm_loops || av7110->arm_errors > 3) {
  237. printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
  238. av7110->dvb_adapter.num);
  239. recover_arm(av7110);
  240. if (mutex_lock_interruptible(&av7110->dcomlock))
  241. break;
  242. newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
  243. mutex_unlock(&av7110->dcomlock);
  244. }
  245. av7110->arm_loops = newloops;
  246. av7110->arm_errors = 0;
  247. }
  248. return 0;
  249. }
  250. /****************************************************************************
  251. * IRQ handling
  252. ****************************************************************************/
  253. static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
  254. u8 *buffer2, size_t buffer2_len,
  255. struct dvb_demux_filter *dvbdmxfilter,
  256. struct av7110 *av7110)
  257. {
  258. if (!dvbdmxfilter->feed->demux->dmx.frontend)
  259. return 0;
  260. if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
  261. return 0;
  262. switch (dvbdmxfilter->type) {
  263. case DMX_TYPE_SEC:
  264. if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
  265. return 0;
  266. if (dvbdmxfilter->doneq) {
  267. struct dmx_section_filter *filter = &dvbdmxfilter->filter;
  268. int i;
  269. u8 xor, neq = 0;
  270. for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
  271. xor = filter->filter_value[i] ^ buffer1[i];
  272. neq |= dvbdmxfilter->maskandnotmode[i] & xor;
  273. }
  274. if (!neq)
  275. return 0;
  276. }
  277. return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
  278. buffer2, buffer2_len,
  279. &dvbdmxfilter->filter);
  280. case DMX_TYPE_TS:
  281. if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
  282. return 0;
  283. if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
  284. return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
  285. buffer2, buffer2_len,
  286. &dvbdmxfilter->feed->feed.ts);
  287. else
  288. av7110_p2t_write(buffer1, buffer1_len,
  289. dvbdmxfilter->feed->pid,
  290. &av7110->p2t_filter[dvbdmxfilter->index]);
  291. default:
  292. return 0;
  293. }
  294. }
  295. //#define DEBUG_TIMING
  296. static inline void print_time(char *s)
  297. {
  298. #ifdef DEBUG_TIMING
  299. struct timeval tv;
  300. do_gettimeofday(&tv);
  301. printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
  302. #endif
  303. }
  304. #define DEBI_READ 0
  305. #define DEBI_WRITE 1
  306. static inline void start_debi_dma(struct av7110 *av7110, int dir,
  307. unsigned long addr, unsigned int len)
  308. {
  309. dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
  310. if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
  311. printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
  312. return;
  313. }
  314. SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
  315. SAA7146_IER_ENABLE(av7110->dev, MASK_19);
  316. if (len < 5)
  317. len = 5; /* we want a real DEBI DMA */
  318. if (dir == DEBI_WRITE)
  319. iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
  320. else
  321. irdebi(av7110, DEBISWAB, addr, 0, len);
  322. }
  323. static void debiirq(unsigned long cookie)
  324. {
  325. struct av7110 *av7110 = (struct av7110 *)cookie;
  326. int type = av7110->debitype;
  327. int handle = (type >> 8) & 0x1f;
  328. unsigned int xfer = 0;
  329. print_time("debi");
  330. dprintk(4, "type 0x%04x\n", type);
  331. if (type == -1) {
  332. printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
  333. jiffies, saa7146_read(av7110->dev, PSR),
  334. saa7146_read(av7110->dev, SSR));
  335. goto debi_done;
  336. }
  337. av7110->debitype = -1;
  338. switch (type & 0xff) {
  339. case DATA_TS_RECORD:
  340. dvb_dmx_swfilter_packets(&av7110->demux,
  341. (const u8 *) av7110->debi_virt,
  342. av7110->debilen / 188);
  343. xfer = RX_BUFF;
  344. break;
  345. case DATA_PES_RECORD:
  346. if (av7110->demux.recording)
  347. av7110_record_cb(&av7110->p2t[handle],
  348. (u8 *) av7110->debi_virt,
  349. av7110->debilen);
  350. xfer = RX_BUFF;
  351. break;
  352. case DATA_IPMPE:
  353. case DATA_FSECTION:
  354. case DATA_PIPING:
  355. if (av7110->handle2filter[handle])
  356. DvbDmxFilterCallback((u8 *)av7110->debi_virt,
  357. av7110->debilen, NULL, 0,
  358. av7110->handle2filter[handle],
  359. av7110);
  360. xfer = RX_BUFF;
  361. break;
  362. case DATA_CI_GET:
  363. {
  364. u8 *data = av7110->debi_virt;
  365. if ((data[0] < 2) && data[2] == 0xff) {
  366. int flags = 0;
  367. if (data[5] > 0)
  368. flags |= CA_CI_MODULE_PRESENT;
  369. if (data[5] > 5)
  370. flags |= CA_CI_MODULE_READY;
  371. av7110->ci_slot[data[0]].flags = flags;
  372. } else
  373. ci_get_data(&av7110->ci_rbuffer,
  374. av7110->debi_virt,
  375. av7110->debilen);
  376. xfer = RX_BUFF;
  377. break;
  378. }
  379. case DATA_COMMON_INTERFACE:
  380. CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
  381. #if 0
  382. {
  383. int i;
  384. printk("av7110%d: ", av7110->num);
  385. printk("%02x ", *(u8 *)av7110->debi_virt);
  386. printk("%02x ", *(1+(u8 *)av7110->debi_virt));
  387. for (i = 2; i < av7110->debilen; i++)
  388. printk("%02x ", (*(i+(unsigned char *)av7110->debi_virt)));
  389. for (i = 2; i < av7110->debilen; i++)
  390. printk("%c", chtrans(*(i+(unsigned char *)av7110->debi_virt)));
  391. printk("\n");
  392. }
  393. #endif
  394. xfer = RX_BUFF;
  395. break;
  396. case DATA_DEBUG_MESSAGE:
  397. ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
  398. printk("%s\n", (s8 *) av7110->debi_virt);
  399. xfer = RX_BUFF;
  400. break;
  401. case DATA_CI_PUT:
  402. dprintk(4, "debi DATA_CI_PUT\n");
  403. case DATA_MPEG_PLAY:
  404. dprintk(4, "debi DATA_MPEG_PLAY\n");
  405. case DATA_BMP_LOAD:
  406. dprintk(4, "debi DATA_BMP_LOAD\n");
  407. xfer = TX_BUFF;
  408. break;
  409. default:
  410. break;
  411. }
  412. debi_done:
  413. spin_lock(&av7110->debilock);
  414. if (xfer)
  415. iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
  416. ARM_ClearMailBox(av7110);
  417. spin_unlock(&av7110->debilock);
  418. }
  419. /* irq from av7110 firmware writing the mailbox register in the DPRAM */
  420. static void gpioirq(unsigned long cookie)
  421. {
  422. struct av7110 *av7110 = (struct av7110 *)cookie;
  423. u32 rxbuf, txbuf;
  424. int len;
  425. if (av7110->debitype != -1)
  426. /* we shouldn't get any irq while a debi xfer is running */
  427. printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
  428. jiffies, saa7146_read(av7110->dev, PSR),
  429. saa7146_read(av7110->dev, SSR));
  430. if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
  431. printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
  432. BUG(); /* maybe we should try resetting the debi? */
  433. }
  434. spin_lock(&av7110->debilock);
  435. ARM_ClearIrq(av7110);
  436. /* see what the av7110 wants */
  437. av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
  438. av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  439. rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  440. txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  441. len = (av7110->debilen + 3) & ~3;
  442. print_time("gpio");
  443. dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
  444. switch (av7110->debitype & 0xff) {
  445. case DATA_TS_PLAY:
  446. case DATA_PES_PLAY:
  447. break;
  448. case DATA_MPEG_VIDEO_EVENT:
  449. {
  450. u32 h_ar;
  451. struct video_event event;
  452. av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
  453. h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
  454. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  455. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  456. av7110->video_size.h = h_ar & 0xfff;
  457. event.type = VIDEO_EVENT_SIZE_CHANGED;
  458. event.u.size.w = av7110->video_size.w;
  459. event.u.size.h = av7110->video_size.h;
  460. switch ((h_ar >> 12) & 0xf)
  461. {
  462. case 3:
  463. av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
  464. event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
  465. av7110->videostate.video_format = VIDEO_FORMAT_16_9;
  466. break;
  467. case 4:
  468. av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
  469. event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
  470. av7110->videostate.video_format = VIDEO_FORMAT_221_1;
  471. break;
  472. default:
  473. av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
  474. event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
  475. av7110->videostate.video_format = VIDEO_FORMAT_4_3;
  476. }
  477. dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
  478. av7110->video_size.w, av7110->video_size.h,
  479. av7110->video_size.aspect_ratio);
  480. dvb_video_add_event(av7110, &event);
  481. break;
  482. }
  483. case DATA_CI_PUT:
  484. {
  485. int avail;
  486. struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
  487. avail = dvb_ringbuffer_avail(cibuf);
  488. if (avail <= 2) {
  489. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  490. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  491. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  492. break;
  493. }
  494. len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
  495. len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
  496. if (avail < len + 2) {
  497. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  498. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  499. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  500. break;
  501. }
  502. DVB_RINGBUFFER_SKIP(cibuf, 2);
  503. dvb_ringbuffer_read(cibuf, av7110->debi_virt, len);
  504. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  505. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  506. dprintk(8, "DMA: CI\n");
  507. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
  508. spin_unlock(&av7110->debilock);
  509. wake_up(&cibuf->queue);
  510. return;
  511. }
  512. case DATA_MPEG_PLAY:
  513. if (!av7110->playing) {
  514. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  515. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  516. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  517. break;
  518. }
  519. len = 0;
  520. if (av7110->debitype & 0x100) {
  521. spin_lock(&av7110->aout.lock);
  522. len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
  523. spin_unlock(&av7110->aout.lock);
  524. }
  525. if (len <= 0 && (av7110->debitype & 0x200)
  526. &&av7110->videostate.play_state != VIDEO_FREEZED) {
  527. spin_lock(&av7110->avout.lock);
  528. len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
  529. spin_unlock(&av7110->avout.lock);
  530. }
  531. if (len <= 0) {
  532. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  533. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  534. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  535. break;
  536. }
  537. dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
  538. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  539. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  540. dprintk(8, "DMA: MPEG_PLAY\n");
  541. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
  542. spin_unlock(&av7110->debilock);
  543. return;
  544. case DATA_BMP_LOAD:
  545. len = av7110->debilen;
  546. dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
  547. if (!len) {
  548. av7110->bmp_state = BMP_LOADED;
  549. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
  550. iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
  551. iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
  552. wake_up(&av7110->bmpq);
  553. dprintk(8, "gpio DATA_BMP_LOAD done\n");
  554. break;
  555. }
  556. if (len > av7110->bmplen)
  557. len = av7110->bmplen;
  558. if (len > 2 * 1024)
  559. len = 2 * 1024;
  560. iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
  561. iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
  562. memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
  563. av7110->bmpp += len;
  564. av7110->bmplen -= len;
  565. dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
  566. start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
  567. spin_unlock(&av7110->debilock);
  568. return;
  569. case DATA_CI_GET:
  570. case DATA_COMMON_INTERFACE:
  571. case DATA_FSECTION:
  572. case DATA_IPMPE:
  573. case DATA_PIPING:
  574. if (!len || len > 4 * 1024) {
  575. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  576. break;
  577. }
  578. /* fall through */
  579. case DATA_TS_RECORD:
  580. case DATA_PES_RECORD:
  581. dprintk(8, "DMA: TS_REC etc.\n");
  582. start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
  583. spin_unlock(&av7110->debilock);
  584. return;
  585. case DATA_DEBUG_MESSAGE:
  586. if (!len || len > 0xff) {
  587. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  588. break;
  589. }
  590. start_debi_dma(av7110, DEBI_READ, Reserved, len);
  591. spin_unlock(&av7110->debilock);
  592. return;
  593. case DATA_IRCOMMAND:
  594. if (av7110->ir.ir_handler)
  595. av7110->ir.ir_handler(av7110,
  596. swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
  597. iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
  598. break;
  599. default:
  600. printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
  601. av7110->debitype, av7110->debilen);
  602. break;
  603. }
  604. av7110->debitype = -1;
  605. ARM_ClearMailBox(av7110);
  606. spin_unlock(&av7110->debilock);
  607. }
  608. #ifdef CONFIG_DVB_AV7110_OSD
  609. static int dvb_osd_ioctl(struct file *file,
  610. unsigned int cmd, void *parg)
  611. {
  612. struct dvb_device *dvbdev = file->private_data;
  613. struct av7110 *av7110 = dvbdev->priv;
  614. dprintk(4, "%p\n", av7110);
  615. if (cmd == OSD_SEND_CMD)
  616. return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
  617. if (cmd == OSD_GET_CAPABILITY)
  618. return av7110_osd_capability(av7110, (osd_cap_t *) parg);
  619. return -EINVAL;
  620. }
  621. static const struct file_operations dvb_osd_fops = {
  622. .owner = THIS_MODULE,
  623. .unlocked_ioctl = dvb_generic_ioctl,
  624. .open = dvb_generic_open,
  625. .release = dvb_generic_release,
  626. .llseek = noop_llseek,
  627. };
  628. static struct dvb_device dvbdev_osd = {
  629. .priv = NULL,
  630. .users = 1,
  631. .writers = 1,
  632. .fops = &dvb_osd_fops,
  633. .kernel_ioctl = dvb_osd_ioctl,
  634. };
  635. #endif /* CONFIG_DVB_AV7110_OSD */
  636. static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
  637. u16 subpid, u16 pcrpid)
  638. {
  639. u16 aflags = 0;
  640. dprintk(4, "%p\n", av7110);
  641. if (vpid == 0x1fff || apid == 0x1fff ||
  642. ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
  643. vpid = apid = ttpid = subpid = pcrpid = 0;
  644. av7110->pids[DMX_PES_VIDEO] = 0;
  645. av7110->pids[DMX_PES_AUDIO] = 0;
  646. av7110->pids[DMX_PES_TELETEXT] = 0;
  647. av7110->pids[DMX_PES_PCR] = 0;
  648. }
  649. if (av7110->audiostate.bypass_mode)
  650. aflags |= 0x8000;
  651. return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 6,
  652. pcrpid, vpid, apid, ttpid, subpid, aflags);
  653. }
  654. int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
  655. u16 subpid, u16 pcrpid)
  656. {
  657. int ret = 0;
  658. dprintk(4, "%p\n", av7110);
  659. if (mutex_lock_interruptible(&av7110->pid_mutex))
  660. return -ERESTARTSYS;
  661. if (!(vpid & 0x8000))
  662. av7110->pids[DMX_PES_VIDEO] = vpid;
  663. if (!(apid & 0x8000))
  664. av7110->pids[DMX_PES_AUDIO] = apid;
  665. if (!(ttpid & 0x8000))
  666. av7110->pids[DMX_PES_TELETEXT] = ttpid;
  667. if (!(pcrpid & 0x8000))
  668. av7110->pids[DMX_PES_PCR] = pcrpid;
  669. av7110->pids[DMX_PES_SUBTITLE] = 0;
  670. if (av7110->fe_synced) {
  671. pcrpid = av7110->pids[DMX_PES_PCR];
  672. ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
  673. }
  674. mutex_unlock(&av7110->pid_mutex);
  675. return ret;
  676. }
  677. /******************************************************************************
  678. * hardware filter functions
  679. ******************************************************************************/
  680. static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
  681. {
  682. struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
  683. struct av7110 *av7110 = dvbdmxfeed->demux->priv;
  684. u16 buf[20];
  685. int ret, i;
  686. u16 handle;
  687. // u16 mode = 0x0320;
  688. u16 mode = 0xb96a;
  689. dprintk(4, "%p\n", av7110);
  690. if (av7110->full_ts)
  691. return 0;
  692. if (dvbdmxfilter->type == DMX_TYPE_SEC) {
  693. if (hw_sections) {
  694. buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
  695. dvbdmxfilter->maskandmode[0];
  696. for (i = 3; i < 18; i++)
  697. buf[i + 4 - 2] =
  698. (dvbdmxfilter->filter.filter_value[i] << 8) |
  699. dvbdmxfilter->maskandmode[i];
  700. mode = 4;
  701. }
  702. } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
  703. !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
  704. av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
  705. }
  706. buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
  707. buf[1] = 16;
  708. buf[2] = dvbdmxfeed->pid;
  709. buf[3] = mode;
  710. ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
  711. if (ret != 0 || handle >= 32) {
  712. printk("dvb-ttpci: %s error buf %04x %04x %04x %04x "
  713. "ret %d handle %04x\n",
  714. __func__, buf[0], buf[1], buf[2], buf[3],
  715. ret, handle);
  716. dvbdmxfilter->hw_handle = 0xffff;
  717. if (!ret)
  718. ret = -1;
  719. return ret;
  720. }
  721. av7110->handle2filter[handle] = dvbdmxfilter;
  722. dvbdmxfilter->hw_handle = handle;
  723. return ret;
  724. }
  725. static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
  726. {
  727. struct av7110 *av7110 = dvbdmxfilter->feed->demux->priv;
  728. u16 buf[3];
  729. u16 answ[2];
  730. int ret;
  731. u16 handle;
  732. dprintk(4, "%p\n", av7110);
  733. if (av7110->full_ts)
  734. return 0;
  735. handle = dvbdmxfilter->hw_handle;
  736. if (handle >= 32) {
  737. printk("%s tried to stop invalid filter %04x, filter type = %x\n",
  738. __func__, handle, dvbdmxfilter->type);
  739. return -EINVAL;
  740. }
  741. av7110->handle2filter[handle] = NULL;
  742. buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
  743. buf[1] = 1;
  744. buf[2] = handle;
  745. ret = av7110_fw_request(av7110, buf, 3, answ, 2);
  746. if (ret != 0 || answ[1] != handle) {
  747. printk("dvb-ttpci: %s error cmd %04x %04x %04x ret %x "
  748. "resp %04x %04x pid %d\n",
  749. __func__, buf[0], buf[1], buf[2], ret,
  750. answ[0], answ[1], dvbdmxfilter->feed->pid);
  751. if (!ret)
  752. ret = -1;
  753. }
  754. return ret;
  755. }
  756. static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
  757. {
  758. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  759. struct av7110 *av7110 = dvbdmx->priv;
  760. u16 *pid = dvbdmx->pids, npids[5];
  761. int i;
  762. int ret = 0;
  763. dprintk(4, "%p\n", av7110);
  764. npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
  765. i = dvbdmxfeed->pes_type;
  766. npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
  767. if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
  768. npids[i] = 0;
  769. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  770. if (!ret)
  771. ret = StartHWFilter(dvbdmxfeed->filter);
  772. return ret;
  773. }
  774. if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
  775. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  776. if (ret)
  777. return ret;
  778. }
  779. if (dvbdmxfeed->pes_type < 2 && npids[0])
  780. if (av7110->fe_synced)
  781. {
  782. ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
  783. if (ret)
  784. return ret;
  785. }
  786. if ((dvbdmxfeed->ts_type & TS_PACKET) && !av7110->full_ts) {
  787. if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
  788. ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
  789. if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
  790. ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
  791. }
  792. return ret;
  793. }
  794. static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
  795. {
  796. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  797. struct av7110 *av7110 = dvbdmx->priv;
  798. u16 *pid = dvbdmx->pids, npids[5];
  799. int i;
  800. int ret = 0;
  801. dprintk(4, "%p\n", av7110);
  802. if (dvbdmxfeed->pes_type <= 1) {
  803. ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
  804. if (ret)
  805. return ret;
  806. if (!av7110->rec_mode)
  807. dvbdmx->recording = 0;
  808. if (!av7110->playing)
  809. dvbdmx->playing = 0;
  810. }
  811. npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
  812. i = dvbdmxfeed->pes_type;
  813. switch (i) {
  814. case 2: //teletext
  815. if (dvbdmxfeed->ts_type & TS_PACKET)
  816. ret = StopHWFilter(dvbdmxfeed->filter);
  817. npids[2] = 0;
  818. break;
  819. case 0:
  820. case 1:
  821. case 4:
  822. if (!pids_off)
  823. return 0;
  824. npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
  825. break;
  826. }
  827. if (!ret)
  828. ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
  829. return ret;
  830. }
  831. static int av7110_start_feed(struct dvb_demux_feed *feed)
  832. {
  833. struct dvb_demux *demux = feed->demux;
  834. struct av7110 *av7110 = demux->priv;
  835. int ret = 0;
  836. dprintk(4, "%p\n", av7110);
  837. if (!demux->dmx.frontend)
  838. return -EINVAL;
  839. if (!av7110->full_ts && feed->pid > 0x1fff)
  840. return -EINVAL;
  841. if (feed->type == DMX_TYPE_TS) {
  842. if ((feed->ts_type & TS_DECODER) &&
  843. (feed->pes_type <= DMX_PES_PCR)) {
  844. switch (demux->dmx.frontend->source) {
  845. case DMX_MEMORY_FE:
  846. if (feed->ts_type & TS_DECODER)
  847. if (feed->pes_type < 2 &&
  848. !(demux->pids[0] & 0x8000) &&
  849. !(demux->pids[1] & 0x8000)) {
  850. dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
  851. dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
  852. ret = av7110_av_start_play(av7110,RP_AV);
  853. if (!ret)
  854. demux->playing = 1;
  855. }
  856. break;
  857. default:
  858. ret = dvb_feed_start_pid(feed);
  859. break;
  860. }
  861. } else if ((feed->ts_type & TS_PACKET) &&
  862. (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
  863. ret = StartHWFilter(feed->filter);
  864. }
  865. }
  866. if (av7110->full_ts) {
  867. budget_start_feed(feed);
  868. return ret;
  869. }
  870. if (feed->type == DMX_TYPE_SEC) {
  871. int i;
  872. for (i = 0; i < demux->filternum; i++) {
  873. if (demux->filter[i].state != DMX_STATE_READY)
  874. continue;
  875. if (demux->filter[i].type != DMX_TYPE_SEC)
  876. continue;
  877. if (demux->filter[i].filter.parent != &feed->feed.sec)
  878. continue;
  879. demux->filter[i].state = DMX_STATE_GO;
  880. if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
  881. ret = StartHWFilter(&demux->filter[i]);
  882. if (ret)
  883. break;
  884. }
  885. }
  886. }
  887. return ret;
  888. }
  889. static int av7110_stop_feed(struct dvb_demux_feed *feed)
  890. {
  891. struct dvb_demux *demux = feed->demux;
  892. struct av7110 *av7110 = demux->priv;
  893. int i, rc, ret = 0;
  894. dprintk(4, "%p\n", av7110);
  895. if (feed->type == DMX_TYPE_TS) {
  896. if (feed->ts_type & TS_DECODER) {
  897. if (feed->pes_type >= DMX_PES_OTHER ||
  898. !demux->pesfilter[feed->pes_type])
  899. return -EINVAL;
  900. demux->pids[feed->pes_type] |= 0x8000;
  901. demux->pesfilter[feed->pes_type] = NULL;
  902. }
  903. if (feed->ts_type & TS_DECODER &&
  904. feed->pes_type < DMX_PES_OTHER) {
  905. ret = dvb_feed_stop_pid(feed);
  906. } else
  907. if ((feed->ts_type & TS_PACKET) &&
  908. (demux->dmx.frontend->source != DMX_MEMORY_FE))
  909. ret = StopHWFilter(feed->filter);
  910. }
  911. if (av7110->full_ts) {
  912. budget_stop_feed(feed);
  913. return ret;
  914. }
  915. if (feed->type == DMX_TYPE_SEC) {
  916. for (i = 0; i<demux->filternum; i++) {
  917. if (demux->filter[i].state == DMX_STATE_GO &&
  918. demux->filter[i].filter.parent == &feed->feed.sec) {
  919. demux->filter[i].state = DMX_STATE_READY;
  920. if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
  921. rc = StopHWFilter(&demux->filter[i]);
  922. if (!ret)
  923. ret = rc;
  924. /* keep going, stop as many filters as possible */
  925. }
  926. }
  927. }
  928. }
  929. return ret;
  930. }
  931. static void restart_feeds(struct av7110 *av7110)
  932. {
  933. struct dvb_demux *dvbdmx = &av7110->demux;
  934. struct dvb_demux_feed *feed;
  935. int mode;
  936. int feeding;
  937. int i, j;
  938. dprintk(4, "%p\n", av7110);
  939. mode = av7110->playing;
  940. av7110->playing = 0;
  941. av7110->rec_mode = 0;
  942. feeding = av7110->feeding1; /* full_ts mod */
  943. for (i = 0; i < dvbdmx->feednum; i++) {
  944. feed = &dvbdmx->feed[i];
  945. if (feed->state == DMX_STATE_GO) {
  946. if (feed->type == DMX_TYPE_SEC) {
  947. for (j = 0; j < dvbdmx->filternum; j++) {
  948. if (dvbdmx->filter[j].type != DMX_TYPE_SEC)
  949. continue;
  950. if (dvbdmx->filter[j].filter.parent != &feed->feed.sec)
  951. continue;
  952. if (dvbdmx->filter[j].state == DMX_STATE_GO)
  953. dvbdmx->filter[j].state = DMX_STATE_READY;
  954. }
  955. }
  956. av7110_start_feed(feed);
  957. }
  958. }
  959. av7110->feeding1 = feeding; /* full_ts mod */
  960. if (mode)
  961. av7110_av_start_play(av7110, mode);
  962. }
  963. static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
  964. uint64_t *stc, unsigned int *base)
  965. {
  966. int ret;
  967. u16 fwstc[4];
  968. u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
  969. struct dvb_demux *dvbdemux;
  970. struct av7110 *av7110;
  971. /* pointer casting paranoia... */
  972. BUG_ON(!demux);
  973. dvbdemux = demux->priv;
  974. BUG_ON(!dvbdemux);
  975. av7110 = dvbdemux->priv;
  976. dprintk(4, "%p\n", av7110);
  977. if (num != 0)
  978. return -EINVAL;
  979. ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
  980. if (ret) {
  981. printk(KERN_ERR "%s: av7110_fw_request error\n", __func__);
  982. return ret;
  983. }
  984. dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
  985. fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
  986. *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
  987. (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
  988. *base = 1;
  989. dprintk(4, "stc = %lu\n", (unsigned long)*stc);
  990. return 0;
  991. }
  992. /******************************************************************************
  993. * SEC device file operations
  994. ******************************************************************************/
  995. static int av7110_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
  996. {
  997. struct av7110* av7110 = fe->dvb->priv;
  998. switch (tone) {
  999. case SEC_TONE_ON:
  1000. return Set22K(av7110, 1);
  1001. case SEC_TONE_OFF:
  1002. return Set22K(av7110, 0);
  1003. default:
  1004. return -EINVAL;
  1005. }
  1006. }
  1007. static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
  1008. struct dvb_diseqc_master_cmd* cmd)
  1009. {
  1010. struct av7110* av7110 = fe->dvb->priv;
  1011. return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
  1012. }
  1013. static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
  1014. enum fe_sec_mini_cmd minicmd)
  1015. {
  1016. struct av7110* av7110 = fe->dvb->priv;
  1017. return av7110_diseqc_send(av7110, 0, NULL, minicmd);
  1018. }
  1019. /* simplified code from budget-core.c */
  1020. static int stop_ts_capture(struct av7110 *budget)
  1021. {
  1022. dprintk(2, "budget: %p\n", budget);
  1023. if (--budget->feeding1)
  1024. return budget->feeding1;
  1025. saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
  1026. SAA7146_IER_DISABLE(budget->dev, MASK_10);
  1027. SAA7146_ISR_CLEAR(budget->dev, MASK_10);
  1028. return 0;
  1029. }
  1030. static int start_ts_capture(struct av7110 *budget)
  1031. {
  1032. unsigned y;
  1033. dprintk(2, "budget: %p\n", budget);
  1034. if (budget->feeding1)
  1035. return ++budget->feeding1;
  1036. for (y = 0; y < TS_HEIGHT; y++)
  1037. memset(budget->grabbing + y * TS_WIDTH, 0x00, TS_WIDTH);
  1038. budget->ttbp = 0;
  1039. SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */
  1040. SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
  1041. saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
  1042. return ++budget->feeding1;
  1043. }
  1044. static int budget_start_feed(struct dvb_demux_feed *feed)
  1045. {
  1046. struct dvb_demux *demux = feed->demux;
  1047. struct av7110 *budget = demux->priv;
  1048. int status;
  1049. dprintk(2, "av7110: %p\n", budget);
  1050. spin_lock(&budget->feedlock1);
  1051. feed->pusi_seen = 0; /* have a clean section start */
  1052. status = start_ts_capture(budget);
  1053. spin_unlock(&budget->feedlock1);
  1054. return status;
  1055. }
  1056. static int budget_stop_feed(struct dvb_demux_feed *feed)
  1057. {
  1058. struct dvb_demux *demux = feed->demux;
  1059. struct av7110 *budget = demux->priv;
  1060. int status;
  1061. dprintk(2, "budget: %p\n", budget);
  1062. spin_lock(&budget->feedlock1);
  1063. status = stop_ts_capture(budget);
  1064. spin_unlock(&budget->feedlock1);
  1065. return status;
  1066. }
  1067. static void vpeirq(unsigned long cookie)
  1068. {
  1069. struct av7110 *budget = (struct av7110 *)cookie;
  1070. u8 *mem = (u8 *) (budget->grabbing);
  1071. u32 olddma = budget->ttbp;
  1072. u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
  1073. struct dvb_demux *demux = budget->full_ts ? &budget->demux : &budget->demux1;
  1074. /* nearest lower position divisible by 188 */
  1075. newdma -= newdma % 188;
  1076. if (newdma >= TS_BUFLEN)
  1077. return;
  1078. budget->ttbp = newdma;
  1079. if (!budget->feeding1 || (newdma == olddma))
  1080. return;
  1081. /* Ensure streamed PCI data is synced to CPU */
  1082. pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE);
  1083. #if 0
  1084. /* track rps1 activity */
  1085. printk("vpeirq: %02x Event Counter 1 0x%04x\n",
  1086. mem[olddma],
  1087. saa7146_read(budget->dev, EC1R) & 0x3fff);
  1088. #endif
  1089. if (newdma > olddma)
  1090. /* no wraparound, dump olddma..newdma */
  1091. dvb_dmx_swfilter_packets(demux, mem + olddma, (newdma - olddma) / 188);
  1092. else {
  1093. /* wraparound, dump olddma..buflen and 0..newdma */
  1094. dvb_dmx_swfilter_packets(demux, mem + olddma, (TS_BUFLEN - olddma) / 188);
  1095. dvb_dmx_swfilter_packets(demux, mem, newdma / 188);
  1096. }
  1097. }
  1098. static int av7110_register(struct av7110 *av7110)
  1099. {
  1100. int ret, i;
  1101. struct dvb_demux *dvbdemux = &av7110->demux;
  1102. struct dvb_demux *dvbdemux1 = &av7110->demux1;
  1103. dprintk(4, "%p\n", av7110);
  1104. if (av7110->registered)
  1105. return -1;
  1106. av7110->registered = 1;
  1107. dvbdemux->priv = (void *) av7110;
  1108. for (i = 0; i < 32; i++)
  1109. av7110->handle2filter[i] = NULL;
  1110. dvbdemux->filternum = (av7110->full_ts) ? 256 : 32;
  1111. dvbdemux->feednum = (av7110->full_ts) ? 256 : 32;
  1112. dvbdemux->start_feed = av7110_start_feed;
  1113. dvbdemux->stop_feed = av7110_stop_feed;
  1114. dvbdemux->write_to_decoder = av7110_write_to_decoder;
  1115. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
  1116. DMX_MEMORY_BASED_FILTERING);
  1117. dvb_dmx_init(&av7110->demux);
  1118. av7110->demux.dmx.get_stc = dvb_get_stc;
  1119. av7110->dmxdev.filternum = (av7110->full_ts) ? 256 : 32;
  1120. av7110->dmxdev.demux = &dvbdemux->dmx;
  1121. av7110->dmxdev.capabilities = 0;
  1122. dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
  1123. av7110->hw_frontend.source = DMX_FRONTEND_0;
  1124. ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
  1125. if (ret < 0)
  1126. return ret;
  1127. av7110->mem_frontend.source = DMX_MEMORY_FE;
  1128. ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
  1129. if (ret < 0)
  1130. return ret;
  1131. ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
  1132. &av7110->hw_frontend);
  1133. if (ret < 0)
  1134. return ret;
  1135. av7110_av_register(av7110);
  1136. av7110_ca_register(av7110);
  1137. #ifdef CONFIG_DVB_AV7110_OSD
  1138. dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
  1139. &dvbdev_osd, av7110, DVB_DEVICE_OSD, 0);
  1140. #endif
  1141. dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
  1142. if (budgetpatch) {
  1143. /* initialize software demux1 without its own frontend
  1144. * demux1 hardware is connected to frontend0 of demux0
  1145. */
  1146. dvbdemux1->priv = (void *) av7110;
  1147. dvbdemux1->filternum = 256;
  1148. dvbdemux1->feednum = 256;
  1149. dvbdemux1->start_feed = budget_start_feed;
  1150. dvbdemux1->stop_feed = budget_stop_feed;
  1151. dvbdemux1->write_to_decoder = NULL;
  1152. dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
  1153. DMX_MEMORY_BASED_FILTERING);
  1154. dvb_dmx_init(&av7110->demux1);
  1155. av7110->dmxdev1.filternum = 256;
  1156. av7110->dmxdev1.demux = &dvbdemux1->dmx;
  1157. av7110->dmxdev1.capabilities = 0;
  1158. dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
  1159. dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
  1160. printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
  1161. }
  1162. return 0;
  1163. }
  1164. static void dvb_unregister(struct av7110 *av7110)
  1165. {
  1166. struct dvb_demux *dvbdemux = &av7110->demux;
  1167. struct dvb_demux *dvbdemux1 = &av7110->demux1;
  1168. dprintk(4, "%p\n", av7110);
  1169. if (!av7110->registered)
  1170. return;
  1171. if (budgetpatch) {
  1172. dvb_net_release(&av7110->dvb_net1);
  1173. dvbdemux->dmx.close(&dvbdemux1->dmx);
  1174. dvb_dmxdev_release(&av7110->dmxdev1);
  1175. dvb_dmx_release(&av7110->demux1);
  1176. }
  1177. dvb_net_release(&av7110->dvb_net);
  1178. dvbdemux->dmx.close(&dvbdemux->dmx);
  1179. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
  1180. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
  1181. dvb_dmxdev_release(&av7110->dmxdev);
  1182. dvb_dmx_release(&av7110->demux);
  1183. if (av7110->fe != NULL) {
  1184. dvb_unregister_frontend(av7110->fe);
  1185. dvb_frontend_detach(av7110->fe);
  1186. }
  1187. dvb_unregister_device(av7110->osd_dev);
  1188. av7110_av_unregister(av7110);
  1189. av7110_ca_unregister(av7110);
  1190. }
  1191. /****************************************************************************
  1192. * I2C client commands
  1193. ****************************************************************************/
  1194. int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
  1195. {
  1196. u8 msg[2] = { reg, val };
  1197. struct i2c_msg msgs;
  1198. msgs.flags = 0;
  1199. msgs.addr = id / 2;
  1200. msgs.len = 2;
  1201. msgs.buf = msg;
  1202. return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
  1203. }
  1204. u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
  1205. {
  1206. u8 mm1[] = {0x00};
  1207. u8 mm2[] = {0x00};
  1208. struct i2c_msg msgs[2];
  1209. msgs[0].flags = 0;
  1210. msgs[1].flags = I2C_M_RD;
  1211. msgs[0].addr = msgs[1].addr = id / 2;
  1212. mm1[0] = reg;
  1213. msgs[0].len = 1; msgs[1].len = 1;
  1214. msgs[0].buf = mm1; msgs[1].buf = mm2;
  1215. i2c_transfer(&av7110->i2c_adap, msgs, 2);
  1216. return mm2[0];
  1217. }
  1218. /****************************************************************************
  1219. * INITIALIZATION
  1220. ****************************************************************************/
  1221. static int check_firmware(struct av7110* av7110)
  1222. {
  1223. u32 crc = 0, len = 0;
  1224. unsigned char *ptr;
  1225. /* check for firmware magic */
  1226. ptr = av7110->bin_fw;
  1227. if (ptr[0] != 'A' || ptr[1] != 'V' ||
  1228. ptr[2] != 'F' || ptr[3] != 'W') {
  1229. printk("dvb-ttpci: this is not an av7110 firmware\n");
  1230. return -EINVAL;
  1231. }
  1232. ptr += 4;
  1233. /* check dpram file */
  1234. crc = get_unaligned_be32(ptr);
  1235. ptr += 4;
  1236. len = get_unaligned_be32(ptr);
  1237. ptr += 4;
  1238. if (len >= 512) {
  1239. printk("dvb-ttpci: dpram file is way too big.\n");
  1240. return -EINVAL;
  1241. }
  1242. if (crc != crc32_le(0, ptr, len)) {
  1243. printk("dvb-ttpci: crc32 of dpram file does not match.\n");
  1244. return -EINVAL;
  1245. }
  1246. av7110->bin_dpram = ptr;
  1247. av7110->size_dpram = len;
  1248. ptr += len;
  1249. /* check root file */
  1250. crc = get_unaligned_be32(ptr);
  1251. ptr += 4;
  1252. len = get_unaligned_be32(ptr);
  1253. ptr += 4;
  1254. if (len <= 200000 || len >= 300000 ||
  1255. len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
  1256. printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
  1257. return -EINVAL;
  1258. }
  1259. if( crc != crc32_le(0, ptr, len)) {
  1260. printk("dvb-ttpci: crc32 of root file does not match.\n");
  1261. return -EINVAL;
  1262. }
  1263. av7110->bin_root = ptr;
  1264. av7110->size_root = len;
  1265. return 0;
  1266. }
  1267. static void put_firmware(struct av7110* av7110)
  1268. {
  1269. vfree(av7110->bin_fw);
  1270. }
  1271. static int get_firmware(struct av7110* av7110)
  1272. {
  1273. int ret;
  1274. const struct firmware *fw;
  1275. /* request the av7110 firmware, this will block until someone uploads it */
  1276. ret = reject_firmware(&fw, "/*(DEBLOBBED)*/", &av7110->dev->pci->dev);
  1277. if (ret) {
  1278. if (ret == -ENOENT) {
  1279. printk(KERN_ERR "dvb-ttpci: could not load firmware,"
  1280. " file not found: /*(DEBLOBBED)*/\n");
  1281. printk(KERN_ERR "dvb-ttpci: usually this should be in "
  1282. "/usr/lib/hotplug/firmware or /lib/firmware\n");
  1283. printk(KERN_ERR "dvb-ttpci: and can be downloaded from"
  1284. " https://linuxtv.org/download/dvb/firmware/\n");
  1285. } else
  1286. printk(KERN_ERR "dvb-ttpci: cannot request firmware"
  1287. " (error %i)\n", ret);
  1288. return -EINVAL;
  1289. }
  1290. if (fw->size <= 200000) {
  1291. printk("dvb-ttpci: this firmware is way too small.\n");
  1292. release_firmware(fw);
  1293. return -EINVAL;
  1294. }
  1295. /* check if the firmware is available */
  1296. av7110->bin_fw = vmalloc(fw->size);
  1297. if (NULL == av7110->bin_fw) {
  1298. dprintk(1, "out of memory\n");
  1299. release_firmware(fw);
  1300. return -ENOMEM;
  1301. }
  1302. memcpy(av7110->bin_fw, fw->data, fw->size);
  1303. av7110->size_fw = fw->size;
  1304. if ((ret = check_firmware(av7110)))
  1305. vfree(av7110->bin_fw);
  1306. release_firmware(fw);
  1307. return ret;
  1308. }
  1309. static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
  1310. {
  1311. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1312. struct av7110* av7110 = fe->dvb->priv;
  1313. u8 pwr = 0;
  1314. u8 buf[4];
  1315. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
  1316. u32 div = (p->frequency + 479500) / 125;
  1317. if (p->frequency > 2000000)
  1318. pwr = 3;
  1319. else if (p->frequency > 1800000)
  1320. pwr = 2;
  1321. else if (p->frequency > 1600000)
  1322. pwr = 1;
  1323. else if (p->frequency > 1200000)
  1324. pwr = 0;
  1325. else if (p->frequency >= 1100000)
  1326. pwr = 1;
  1327. else
  1328. pwr = 2;
  1329. buf[0] = (div >> 8) & 0x7f;
  1330. buf[1] = div & 0xff;
  1331. buf[2] = ((div & 0x18000) >> 10) | 0x95;
  1332. buf[3] = (pwr << 6) | 0x30;
  1333. // NOTE: since we're using a prescaler of 2, we set the
  1334. // divisor frequency to 62.5kHz and divide by 125 above
  1335. if (fe->ops.i2c_gate_ctrl)
  1336. fe->ops.i2c_gate_ctrl(fe, 1);
  1337. if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
  1338. return -EIO;
  1339. return 0;
  1340. }
  1341. static struct ves1x93_config alps_bsrv2_config = {
  1342. .demod_address = 0x08,
  1343. .xin = 90100000UL,
  1344. .invert_pwm = 0,
  1345. };
  1346. static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
  1347. {
  1348. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1349. struct av7110* av7110 = fe->dvb->priv;
  1350. u32 div;
  1351. u8 data[4];
  1352. struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
  1353. div = (p->frequency + 35937500 + 31250) / 62500;
  1354. data[0] = (div >> 8) & 0x7f;
  1355. data[1] = div & 0xff;
  1356. data[2] = 0x85 | ((div >> 10) & 0x60);
  1357. data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
  1358. if (fe->ops.i2c_gate_ctrl)
  1359. fe->ops.i2c_gate_ctrl(fe, 1);
  1360. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1361. return -EIO;
  1362. return 0;
  1363. }
  1364. static struct ves1820_config alps_tdbe2_config = {
  1365. .demod_address = 0x09,
  1366. .xin = 57840000UL,
  1367. .invert = 1,
  1368. .selagc = VES1820_SELAGC_SIGNAMPERR,
  1369. };
  1370. static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
  1371. {
  1372. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1373. struct av7110* av7110 = fe->dvb->priv;
  1374. u32 div;
  1375. u8 data[4];
  1376. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1377. div = p->frequency / 125;
  1378. data[0] = (div >> 8) & 0x7f;
  1379. data[1] = div & 0xff;
  1380. data[2] = 0x8e;
  1381. data[3] = 0x00;
  1382. if (fe->ops.i2c_gate_ctrl)
  1383. fe->ops.i2c_gate_ctrl(fe, 1);
  1384. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1385. return -EIO;
  1386. return 0;
  1387. }
  1388. static struct tda8083_config grundig_29504_451_config = {
  1389. .demod_address = 0x68,
  1390. };
  1391. static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe)
  1392. {
  1393. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1394. struct av7110* av7110 = fe->dvb->priv;
  1395. u32 div;
  1396. u32 f = p->frequency;
  1397. u8 data[4];
  1398. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1399. div = (f + 36125000 + 31250) / 62500;
  1400. data[0] = (div >> 8) & 0x7f;
  1401. data[1] = div & 0xff;
  1402. data[2] = 0x8e;
  1403. data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
  1404. if (fe->ops.i2c_gate_ctrl)
  1405. fe->ops.i2c_gate_ctrl(fe, 1);
  1406. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1407. return -EIO;
  1408. return 0;
  1409. }
  1410. static struct ves1820_config philips_cd1516_config = {
  1411. .demod_address = 0x09,
  1412. .xin = 57840000UL,
  1413. .invert = 1,
  1414. .selagc = VES1820_SELAGC_SIGNAMPERR,
  1415. };
  1416. static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe)
  1417. {
  1418. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1419. struct av7110* av7110 = fe->dvb->priv;
  1420. u32 div, pwr;
  1421. u8 data[4];
  1422. struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
  1423. div = (p->frequency + 36200000) / 166666;
  1424. if (p->frequency <= 782000000)
  1425. pwr = 1;
  1426. else
  1427. pwr = 2;
  1428. data[0] = (div >> 8) & 0x7f;
  1429. data[1] = div & 0xff;
  1430. data[2] = 0x85;
  1431. data[3] = pwr << 6;
  1432. if (fe->ops.i2c_gate_ctrl)
  1433. fe->ops.i2c_gate_ctrl(fe, 1);
  1434. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
  1435. return -EIO;
  1436. return 0;
  1437. }
  1438. static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
  1439. {
  1440. #if IS_ENABLED(CONFIG_DVB_SP8870)
  1441. struct av7110* av7110 = fe->dvb->priv;
  1442. return reject_firmware(fw, name, &av7110->dev->pci->dev);
  1443. #else
  1444. return -EINVAL;
  1445. #endif
  1446. }
  1447. static const struct sp8870_config alps_tdlb7_config = {
  1448. .demod_address = 0x71,
  1449. .request_firmware = alps_tdlb7_request_firmware,
  1450. };
  1451. static u8 nexusca_stv0297_inittab[] = {
  1452. 0x80, 0x01,
  1453. 0x80, 0x00,
  1454. 0x81, 0x01,
  1455. 0x81, 0x00,
  1456. 0x00, 0x09,
  1457. 0x01, 0x69,
  1458. 0x03, 0x00,
  1459. 0x04, 0x00,
  1460. 0x07, 0x00,
  1461. 0x08, 0x00,
  1462. 0x20, 0x00,
  1463. 0x21, 0x40,
  1464. 0x22, 0x00,
  1465. 0x23, 0x00,
  1466. 0x24, 0x40,
  1467. 0x25, 0x88,
  1468. 0x30, 0xff,
  1469. 0x31, 0x00,
  1470. 0x32, 0xff,
  1471. 0x33, 0x00,
  1472. 0x34, 0x50,
  1473. 0x35, 0x7f,
  1474. 0x36, 0x00,
  1475. 0x37, 0x20,
  1476. 0x38, 0x00,
  1477. 0x40, 0x1c,
  1478. 0x41, 0xff,
  1479. 0x42, 0x29,
  1480. 0x43, 0x00,
  1481. 0x44, 0xff,
  1482. 0x45, 0x00,
  1483. 0x46, 0x00,
  1484. 0x49, 0x04,
  1485. 0x4a, 0x00,
  1486. 0x4b, 0x7b,
  1487. 0x52, 0x30,
  1488. 0x55, 0xae,
  1489. 0x56, 0x47,
  1490. 0x57, 0xe1,
  1491. 0x58, 0x3a,
  1492. 0x5a, 0x1e,
  1493. 0x5b, 0x34,
  1494. 0x60, 0x00,
  1495. 0x63, 0x00,
  1496. 0x64, 0x00,
  1497. 0x65, 0x00,
  1498. 0x66, 0x00,
  1499. 0x67, 0x00,
  1500. 0x68, 0x00,
  1501. 0x69, 0x00,
  1502. 0x6a, 0x02,
  1503. 0x6b, 0x00,
  1504. 0x70, 0xff,
  1505. 0x71, 0x00,
  1506. 0x72, 0x00,
  1507. 0x73, 0x00,
  1508. 0x74, 0x0c,
  1509. 0x80, 0x00,
  1510. 0x81, 0x00,
  1511. 0x82, 0x00,
  1512. 0x83, 0x00,
  1513. 0x84, 0x04,
  1514. 0x85, 0x80,
  1515. 0x86, 0x24,
  1516. 0x87, 0x78,
  1517. 0x88, 0x10,
  1518. 0x89, 0x00,
  1519. 0x90, 0x01,
  1520. 0x91, 0x01,
  1521. 0xa0, 0x04,
  1522. 0xa1, 0x00,
  1523. 0xa2, 0x00,
  1524. 0xb0, 0x91,
  1525. 0xb1, 0x0b,
  1526. 0xc0, 0x53,
  1527. 0xc1, 0x70,
  1528. 0xc2, 0x12,
  1529. 0xd0, 0x00,
  1530. 0xd1, 0x00,
  1531. 0xd2, 0x00,
  1532. 0xd3, 0x00,
  1533. 0xd4, 0x00,
  1534. 0xd5, 0x00,
  1535. 0xde, 0x00,
  1536. 0xdf, 0x00,
  1537. 0x61, 0x49,
  1538. 0x62, 0x0b,
  1539. 0x53, 0x08,
  1540. 0x59, 0x08,
  1541. 0xff, 0xff,
  1542. };
  1543. static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe)
  1544. {
  1545. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1546. struct av7110* av7110 = fe->dvb->priv;
  1547. u32 div;
  1548. u8 data[4];
  1549. struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
  1550. struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
  1551. int i;
  1552. div = (p->frequency + 36150000 + 31250) / 62500;
  1553. data[0] = (div >> 8) & 0x7f;
  1554. data[1] = div & 0xff;
  1555. data[2] = 0xce;
  1556. if (p->frequency < 45000000)
  1557. return -EINVAL;
  1558. else if (p->frequency < 137000000)
  1559. data[3] = 0x01;
  1560. else if (p->frequency < 403000000)
  1561. data[3] = 0x02;
  1562. else if (p->frequency < 860000000)
  1563. data[3] = 0x04;
  1564. else
  1565. return -EINVAL;
  1566. if (fe->ops.i2c_gate_ctrl)
  1567. fe->ops.i2c_gate_ctrl(fe, 1);
  1568. if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
  1569. printk("nexusca: pll transfer failed!\n");
  1570. return -EIO;
  1571. }
  1572. // wait for PLL lock
  1573. for(i = 0; i < 20; i++) {
  1574. if (fe->ops.i2c_gate_ctrl)
  1575. fe->ops.i2c_gate_ctrl(fe, 1);
  1576. if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
  1577. if (data[0] & 0x40) break;
  1578. msleep(10);
  1579. }
  1580. return 0;
  1581. }
  1582. static struct stv0297_config nexusca_stv0297_config = {
  1583. .demod_address = 0x1C,
  1584. .inittab = nexusca_stv0297_inittab,
  1585. .invert = 1,
  1586. .stop_during_read = 1,
  1587. };
  1588. static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
  1589. {
  1590. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1591. struct av7110* av7110 = fe->dvb->priv;
  1592. u32 div;
  1593. u8 cfg, cpump, band_select;
  1594. u8 data[4];
  1595. struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
  1596. div = (36125000 + p->frequency) / 166666;
  1597. cfg = 0x88;
  1598. if (p->frequency < 175000000)
  1599. cpump = 2;
  1600. else if (p->frequency < 390000000)
  1601. cpump = 1;
  1602. else if (p->frequency < 470000000)
  1603. cpump = 2;
  1604. else if (p->frequency < 750000000)
  1605. cpump = 1;
  1606. else
  1607. cpump = 3;
  1608. if (p->frequency < 175000000)
  1609. band_select = 0x0e;
  1610. else if (p->frequency < 470000000)
  1611. band_select = 0x05;
  1612. else
  1613. band_select = 0x03;
  1614. data[0] = (div >> 8) & 0x7f;
  1615. data[1] = div & 0xff;
  1616. data[2] = ((div >> 10) & 0x60) | cfg;
  1617. data[3] = (cpump << 6) | band_select;
  1618. if (fe->ops.i2c_gate_ctrl)
  1619. fe->ops.i2c_gate_ctrl(fe, 1);
  1620. if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
  1621. return 0;
  1622. }
  1623. static struct l64781_config grundig_29504_401_config = {
  1624. .demod_address = 0x55,
  1625. };
  1626. static int av7110_fe_lock_fix(struct av7110 *av7110, enum fe_status status)
  1627. {
  1628. int ret = 0;
  1629. int synced = (status & FE_HAS_LOCK) ? 1 : 0;
  1630. av7110->fe_status = status;
  1631. if (av7110->fe_synced == synced)
  1632. return 0;
  1633. if (av7110->playing) {
  1634. av7110->fe_synced = synced;
  1635. return 0;
  1636. }
  1637. if (mutex_lock_interruptible(&av7110->pid_mutex))
  1638. return -ERESTARTSYS;
  1639. if (synced) {
  1640. ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
  1641. av7110->pids[DMX_PES_AUDIO],
  1642. av7110->pids[DMX_PES_TELETEXT], 0,
  1643. av7110->pids[DMX_PES_PCR]);
  1644. if (!ret)
  1645. ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
  1646. } else {
  1647. ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
  1648. if (!ret) {
  1649. ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
  1650. if (!ret)
  1651. ret = av7110_wait_msgstate(av7110, GPMQBusy);
  1652. }
  1653. }
  1654. if (!ret)
  1655. av7110->fe_synced = synced;
  1656. mutex_unlock(&av7110->pid_mutex);
  1657. return ret;
  1658. }
  1659. static int av7110_fe_set_frontend(struct dvb_frontend *fe)
  1660. {
  1661. struct av7110* av7110 = fe->dvb->priv;
  1662. int ret = av7110_fe_lock_fix(av7110, 0);
  1663. if (!ret)
  1664. ret = av7110->fe_set_frontend(fe);
  1665. return ret;
  1666. }
  1667. static int av7110_fe_init(struct dvb_frontend* fe)
  1668. {
  1669. struct av7110* av7110 = fe->dvb->priv;
  1670. int ret = av7110_fe_lock_fix(av7110, 0);
  1671. if (!ret)
  1672. ret = av7110->fe_init(fe);
  1673. return ret;
  1674. }
  1675. static int av7110_fe_read_status(struct dvb_frontend *fe,
  1676. enum fe_status *status)
  1677. {
  1678. struct av7110* av7110 = fe->dvb->priv;
  1679. /* call the real implementation */
  1680. int ret = av7110->fe_read_status(fe, status);
  1681. if (!ret)
  1682. if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
  1683. ret = av7110_fe_lock_fix(av7110, *status);
  1684. return ret;
  1685. }
  1686. static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
  1687. {
  1688. struct av7110* av7110 = fe->dvb->priv;
  1689. int ret = av7110_fe_lock_fix(av7110, 0);
  1690. if (!ret)
  1691. ret = av7110->fe_diseqc_reset_overload(fe);
  1692. return ret;
  1693. }
  1694. static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
  1695. struct dvb_diseqc_master_cmd* cmd)
  1696. {
  1697. struct av7110* av7110 = fe->dvb->priv;
  1698. int ret = av7110_fe_lock_fix(av7110, 0);
  1699. if (!ret) {
  1700. av7110->saved_master_cmd = *cmd;
  1701. ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
  1702. }
  1703. return ret;
  1704. }
  1705. static int av7110_fe_diseqc_send_burst(struct dvb_frontend *fe,
  1706. enum fe_sec_mini_cmd minicmd)
  1707. {
  1708. struct av7110* av7110 = fe->dvb->priv;
  1709. int ret = av7110_fe_lock_fix(av7110, 0);
  1710. if (!ret) {
  1711. av7110->saved_minicmd = minicmd;
  1712. ret = av7110->fe_diseqc_send_burst(fe, minicmd);
  1713. }
  1714. return ret;
  1715. }
  1716. static int av7110_fe_set_tone(struct dvb_frontend *fe,
  1717. enum fe_sec_tone_mode tone)
  1718. {
  1719. struct av7110* av7110 = fe->dvb->priv;
  1720. int ret = av7110_fe_lock_fix(av7110, 0);
  1721. if (!ret) {
  1722. av7110->saved_tone = tone;
  1723. ret = av7110->fe_set_tone(fe, tone);
  1724. }
  1725. return ret;
  1726. }
  1727. static int av7110_fe_set_voltage(struct dvb_frontend *fe,
  1728. enum fe_sec_voltage voltage)
  1729. {
  1730. struct av7110* av7110 = fe->dvb->priv;
  1731. int ret = av7110_fe_lock_fix(av7110, 0);
  1732. if (!ret) {
  1733. av7110->saved_voltage = voltage;
  1734. ret = av7110->fe_set_voltage(fe, voltage);
  1735. }
  1736. return ret;
  1737. }
  1738. static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned long cmd)
  1739. {
  1740. struct av7110* av7110 = fe->dvb->priv;
  1741. int ret = av7110_fe_lock_fix(av7110, 0);
  1742. if (!ret)
  1743. ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
  1744. return ret;
  1745. }
  1746. static void dvb_s_recover(struct av7110* av7110)
  1747. {
  1748. av7110_fe_init(av7110->fe);
  1749. av7110_fe_set_voltage(av7110->fe, av7110->saved_voltage);
  1750. if (av7110->saved_master_cmd.msg_len) {
  1751. msleep(20);
  1752. av7110_fe_diseqc_send_master_cmd(av7110->fe, &av7110->saved_master_cmd);
  1753. }
  1754. msleep(20);
  1755. av7110_fe_diseqc_send_burst(av7110->fe, av7110->saved_minicmd);
  1756. msleep(20);
  1757. av7110_fe_set_tone(av7110->fe, av7110->saved_tone);
  1758. av7110_fe_set_frontend(av7110->fe);
  1759. }
  1760. static u8 read_pwm(struct av7110* av7110)
  1761. {
  1762. u8 b = 0xff;
  1763. u8 pwm;
  1764. struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
  1765. { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
  1766. if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
  1767. pwm = 0x48;
  1768. return pwm;
  1769. }
  1770. static int frontend_init(struct av7110 *av7110)
  1771. {
  1772. int ret;
  1773. if (av7110->dev->pci->subsystem_vendor == 0x110a) {
  1774. switch(av7110->dev->pci->subsystem_device) {
  1775. case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
  1776. av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config,
  1777. &av7110->i2c_adap, read_pwm(av7110));
  1778. if (av7110->fe) {
  1779. av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
  1780. }
  1781. break;
  1782. }
  1783. } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
  1784. switch(av7110->dev->pci->subsystem_device) {
  1785. case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
  1786. case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
  1787. case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
  1788. // try the ALPS BSRV2 first of all
  1789. av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
  1790. if (av7110->fe) {
  1791. av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
  1792. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1793. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1794. av7110->fe->ops.set_tone = av7110_set_tone;
  1795. av7110->recover = dvb_s_recover;
  1796. break;
  1797. }
  1798. // try the ALPS BSRU6 now
  1799. av7110->fe = dvb_attach(stv0299_attach, &alps_bsru6_config, &av7110->i2c_adap);
  1800. if (av7110->fe) {
  1801. av7110->fe->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  1802. av7110->fe->tuner_priv = &av7110->i2c_adap;
  1803. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1804. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1805. av7110->fe->ops.set_tone = av7110_set_tone;
  1806. av7110->recover = dvb_s_recover;
  1807. break;
  1808. }
  1809. // Try the grundig 29504-451
  1810. av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
  1811. if (av7110->fe) {
  1812. av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
  1813. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1814. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1815. av7110->fe->ops.set_tone = av7110_set_tone;
  1816. av7110->recover = dvb_s_recover;
  1817. break;
  1818. }
  1819. /* Try DVB-C cards */
  1820. switch(av7110->dev->pci->subsystem_device) {
  1821. case 0x0000:
  1822. /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
  1823. av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, &av7110->i2c_adap,
  1824. read_pwm(av7110));
  1825. if (av7110->fe) {
  1826. av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
  1827. }
  1828. break;
  1829. case 0x0003:
  1830. /* Hauppauge DVB-C 2.1 VES1820/ALPS TDBE2 */
  1831. av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap,
  1832. read_pwm(av7110));
  1833. if (av7110->fe) {
  1834. av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
  1835. }
  1836. break;
  1837. }
  1838. break;
  1839. case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
  1840. {
  1841. struct dvb_frontend *fe;
  1842. // try ALPS TDLB7 first, then Grundig 29504-401
  1843. fe = dvb_attach(sp8870_attach, &alps_tdlb7_config, &av7110->i2c_adap);
  1844. if (fe) {
  1845. fe->ops.tuner_ops.set_params = alps_tdlb7_tuner_set_params;
  1846. av7110->fe = fe;
  1847. break;
  1848. }
  1849. }
  1850. /* fall-thru */
  1851. case 0x0008: // Hauppauge/TT DVB-T
  1852. // Grundig 29504-401
  1853. av7110->fe = dvb_attach(l64781_attach, &grundig_29504_401_config, &av7110->i2c_adap);
  1854. if (av7110->fe)
  1855. av7110->fe->ops.tuner_ops.set_params = grundig_29504_401_tuner_set_params;
  1856. break;
  1857. case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
  1858. av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
  1859. if (av7110->fe) {
  1860. av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
  1861. }
  1862. break;
  1863. case 0x0004: // Galaxis DVB-S rev1.3
  1864. /* ALPS BSRV2 */
  1865. av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
  1866. if (av7110->fe) {
  1867. av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
  1868. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1869. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1870. av7110->fe->ops.set_tone = av7110_set_tone;
  1871. av7110->recover = dvb_s_recover;
  1872. }
  1873. break;
  1874. case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
  1875. /* Grundig 29504-451 */
  1876. av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
  1877. if (av7110->fe) {
  1878. av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
  1879. av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
  1880. av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
  1881. av7110->fe->ops.set_tone = av7110_set_tone;
  1882. av7110->recover = dvb_s_recover;
  1883. }
  1884. break;
  1885. case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
  1886. av7110->fe = dvb_attach(stv0297_attach, &nexusca_stv0297_config, &av7110->i2c_adap);
  1887. if (av7110->fe) {
  1888. av7110->fe->ops.tuner_ops.set_params = nexusca_stv0297_tuner_set_params;
  1889. /* set TDA9819 into DVB mode */
  1890. saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9819 pin9(STD)
  1891. saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9819 pin30(VIF)
  1892. /* tuner on this needs a slower i2c bus speed */
  1893. av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
  1894. break;
  1895. }
  1896. break;
  1897. case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
  1898. /* ALPS BSBE1 */
  1899. av7110->fe = dvb_attach(stv0299_attach, &alps_bsbe1_config, &av7110->i2c_adap);
  1900. if (av7110->fe) {
  1901. av7110->fe->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  1902. av7110->fe->tuner_priv = &av7110->i2c_adap;
  1903. if (dvb_attach(lnbp21_attach, av7110->fe, &av7110->i2c_adap, 0, 0) == NULL) {
  1904. printk("dvb-ttpci: LNBP21 not found!\n");
  1905. if (av7110->fe->ops.release)
  1906. av7110->fe->ops.release(av7110->fe);
  1907. av7110->fe = NULL;
  1908. } else {
  1909. av7110->fe->ops.dishnetwork_send_legacy_command = NULL;
  1910. av7110->recover = dvb_s_recover;
  1911. }
  1912. }
  1913. break;
  1914. }
  1915. }
  1916. if (!av7110->fe) {
  1917. /* FIXME: propagate the failure code from the lower layers */
  1918. ret = -ENOMEM;
  1919. printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
  1920. av7110->dev->pci->vendor,
  1921. av7110->dev->pci->device,
  1922. av7110->dev->pci->subsystem_vendor,
  1923. av7110->dev->pci->subsystem_device);
  1924. } else {
  1925. FE_FUNC_OVERRIDE(av7110->fe->ops.init, av7110->fe_init, av7110_fe_init);
  1926. FE_FUNC_OVERRIDE(av7110->fe->ops.read_status, av7110->fe_read_status, av7110_fe_read_status);
  1927. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
  1928. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
  1929. FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
  1930. FE_FUNC_OVERRIDE(av7110->fe->ops.set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
  1931. FE_FUNC_OVERRIDE(av7110->fe->ops.set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage);
  1932. FE_FUNC_OVERRIDE(av7110->fe->ops.dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
  1933. FE_FUNC_OVERRIDE(av7110->fe->ops.set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
  1934. ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
  1935. if (ret < 0) {
  1936. printk("av7110: Frontend registration failed!\n");
  1937. dvb_frontend_detach(av7110->fe);
  1938. av7110->fe = NULL;
  1939. }
  1940. }
  1941. return ret;
  1942. }
  1943. /* Budgetpatch note:
  1944. * Original hardware design by Roberto Deza:
  1945. * There is a DVB_Wiki at
  1946. * https://linuxtv.org
  1947. *
  1948. * New software triggering design by Emard that works on
  1949. * original Roberto Deza's hardware:
  1950. *
  1951. * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
  1952. * GPIO3 is in budget-patch hardware connectd to port B VSYNC
  1953. * HS is an internal event of 7146, accessible with RPS
  1954. * and temporarily raised high every n lines
  1955. * (n in defined in the RPS_THRESH1 counter threshold)
  1956. * I think HS is raised high on the beginning of the n-th line
  1957. * and remains high until this n-th line that triggered
  1958. * it is completely received. When the receiption of n-th line
  1959. * ends, HS is lowered.
  1960. *
  1961. * To transmit data over DMA, 7146 needs changing state at
  1962. * port B VSYNC pin. Any changing of port B VSYNC will
  1963. * cause some DMA data transfer, with more or less packets loss.
  1964. * It depends on the phase and frequency of VSYNC and
  1965. * the way of 7146 is instructed to trigger on port B (defined
  1966. * in DD1_INIT register, 3rd nibble from the right valid
  1967. * numbers are 0-7, see datasheet)
  1968. *
  1969. * The correct triggering can minimize packet loss,
  1970. * dvbtraffic should give this stable bandwidths:
  1971. * 22k transponder = 33814 kbit/s
  1972. * 27.5k transponder = 38045 kbit/s
  1973. * by experiment it is found that the best results
  1974. * (stable bandwidths and almost no packet loss)
  1975. * are obtained using DD1_INIT triggering number 2
  1976. * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
  1977. * and a VSYNC phase that occurs in the middle of DMA transfer
  1978. * (about byte 188*512=96256 in the DMA window).
  1979. *
  1980. * Phase of HS is still not clear to me how to control,
  1981. * It just happens to be so. It can be seen if one enables
  1982. * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
  1983. * time RPS_INTERRUPT is called, the Event Counter 1 will
  1984. * increment. That's how the 7146 is programmed to do event
  1985. * counting in this budget-patch.c
  1986. * I *think* HPS setting has something to do with the phase
  1987. * of HS but I can't be 100% sure in that.
  1988. *
  1989. * hardware debug note: a working budget card (including budget patch)
  1990. * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
  1991. * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
  1992. * and that means 3*25=75 Hz of interrupt freqency, as seen by
  1993. * watch cat /proc/interrupts
  1994. *
  1995. * If this frequency is 3x lower (and data received in the DMA
  1996. * buffer don't start with 0x47, but in the middle of packets,
  1997. * whose lengths appear to be like 188 292 188 104 etc.
  1998. * this means VSYNC line is not connected in the hardware.
  1999. * (check soldering pcb and pins)
  2000. * The same behaviour of missing VSYNC can be duplicated on budget
  2001. * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
  2002. */
  2003. static int av7110_attach(struct saa7146_dev* dev,
  2004. struct saa7146_pci_extension_data *pci_ext)
  2005. {
  2006. const int length = TS_WIDTH * TS_HEIGHT;
  2007. struct pci_dev *pdev = dev->pci;
  2008. struct av7110 *av7110;
  2009. struct task_struct *thread;
  2010. int ret, count = 0;
  2011. dprintk(4, "dev: %p\n", dev);
  2012. /* Set RPS_IRQ to 1 to track rps1 activity.
  2013. * Enabling this won't send any interrupt to PC CPU.
  2014. */
  2015. #define RPS_IRQ 0
  2016. if (budgetpatch == 1) {
  2017. budgetpatch = 0;
  2018. /* autodetect the presence of budget patch
  2019. * this only works if saa7146 has been recently
  2020. * reset with with MASK_31 to MC1
  2021. *
  2022. * will wait for VBI_B event (vertical blank at port B)
  2023. * and will reset GPIO3 after VBI_B is detected.
  2024. * (GPIO3 should be raised high by CPU to
  2025. * test if GPIO3 will generate vertical blank signal
  2026. * in budget patch GPIO3 is connected to VSYNC_B
  2027. */
  2028. /* RESET SAA7146 */
  2029. saa7146_write(dev, MC1, MASK_31);
  2030. /* autodetection success seems to be time-dependend after reset */
  2031. /* Fix VSYNC level */
  2032. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
  2033. /* set vsync_b triggering */
  2034. saa7146_write(dev, DD1_STREAM_B, 0);
  2035. /* port B VSYNC at rising edge */
  2036. saa7146_write(dev, DD1_INIT, 0x00000200);
  2037. saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
  2038. saa7146_write(dev, MC2,
  2039. 1 * (MASK_08 | MASK_24) | // BRS control
  2040. 0 * (MASK_09 | MASK_25) | // a
  2041. 1 * (MASK_10 | MASK_26) | // b
  2042. 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
  2043. 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
  2044. 0 * (MASK_01 | MASK_15) // DEBI
  2045. );
  2046. /* start writing RPS1 code from beginning */
  2047. count = 0;
  2048. /* Disable RPS1 */
  2049. saa7146_write(dev, MC1, MASK_29);
  2050. /* RPS1 timeout disable */
  2051. saa7146_write(dev, RPS_TOV1, 0);
  2052. WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
  2053. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2054. WRITE_RPS1(GPIO3_MSK);
  2055. WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
  2056. #if RPS_IRQ
  2057. /* issue RPS1 interrupt to increment counter */
  2058. WRITE_RPS1(CMD_INTERRUPT);
  2059. #endif
  2060. WRITE_RPS1(CMD_STOP);
  2061. /* Jump to begin of RPS program as safety measure (p37) */
  2062. WRITE_RPS1(CMD_JUMP);
  2063. WRITE_RPS1(dev->d_rps1.dma_handle);
  2064. #if RPS_IRQ
  2065. /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
  2066. * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
  2067. * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
  2068. */
  2069. saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
  2070. /* set event counter 1 threshold to maximum allowed value (rEC p55) */
  2071. saa7146_write(dev, ECT1R, 0x3fff );
  2072. #endif
  2073. /* Set RPS1 Address register to point to RPS code (r108 p42) */
  2074. saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
  2075. /* Enable RPS1, (rFC p33) */
  2076. saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
  2077. mdelay(10);
  2078. /* now send VSYNC_B to rps1 by rising GPIO3 */
  2079. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
  2080. mdelay(10);
  2081. /* if rps1 responded by lowering the GPIO3,
  2082. * then we have budgetpatch hardware
  2083. */
  2084. if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
  2085. budgetpatch = 1;
  2086. printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
  2087. }
  2088. /* Disable RPS1 */
  2089. saa7146_write(dev, MC1, ( MASK_29 ));
  2090. #if RPS_IRQ
  2091. printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
  2092. #endif
  2093. }
  2094. /* prepare the av7110 device struct */
  2095. av7110 = kzalloc(sizeof(struct av7110), GFP_KERNEL);
  2096. if (!av7110) {
  2097. dprintk(1, "out of memory\n");
  2098. return -ENOMEM;
  2099. }
  2100. av7110->card_name = (char*) pci_ext->ext_priv;
  2101. av7110->dev = dev;
  2102. dev->ext_priv = av7110;
  2103. ret = get_firmware(av7110);
  2104. if (ret < 0)
  2105. goto err_kfree_0;
  2106. ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
  2107. THIS_MODULE, &dev->pci->dev, adapter_nr);
  2108. if (ret < 0)
  2109. goto err_put_firmware_1;
  2110. /* the Siemens DVB needs this if you want to have the i2c chips
  2111. get recognized before the main driver is fully loaded */
  2112. saa7146_write(dev, GPIO_CTRL, 0x500000);
  2113. strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
  2114. saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
  2115. ret = i2c_add_adapter(&av7110->i2c_adap);
  2116. if (ret < 0)
  2117. goto err_dvb_unregister_adapter_2;
  2118. ttpci_eeprom_parse_mac(&av7110->i2c_adap,
  2119. av7110->dvb_adapter.proposed_mac);
  2120. ret = -ENOMEM;
  2121. /* full-ts mod? */
  2122. if (full_ts)
  2123. av7110->full_ts = true;
  2124. /* check for full-ts flag in eeprom */
  2125. if (i2c_readreg(av7110, 0xaa, 0) == 0x4f && i2c_readreg(av7110, 0xaa, 1) == 0x45) {
  2126. u8 flags = i2c_readreg(av7110, 0xaa, 2);
  2127. if (flags != 0xff && (flags & 0x01))
  2128. av7110->full_ts = true;
  2129. }
  2130. if (av7110->full_ts) {
  2131. printk(KERN_INFO "dvb-ttpci: full-ts mode enabled for saa7146 port B\n");
  2132. spin_lock_init(&av7110->feedlock1);
  2133. av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
  2134. &av7110->pt);
  2135. if (!av7110->grabbing)
  2136. goto err_i2c_del_3;
  2137. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2138. saa7146_write(dev, MC2, (MASK_10 | MASK_26));
  2139. saa7146_write(dev, DD1_INIT, 0x00000600);
  2140. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2141. saa7146_write(dev, BRS_CTRL, 0x60000000);
  2142. saa7146_write(dev, MC2, MASK_08 | MASK_24);
  2143. /* dma3 */
  2144. saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000));
  2145. saa7146_write(dev, BASE_ODD3, 0);
  2146. saa7146_write(dev, BASE_EVEN3, 0);
  2147. saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
  2148. saa7146_write(dev, PITCH3, TS_WIDTH);
  2149. saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
  2150. saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
  2151. saa7146_write(dev, MC2, MASK_04 | MASK_20);
  2152. tasklet_init(&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
  2153. } else if (budgetpatch) {
  2154. spin_lock_init(&av7110->feedlock1);
  2155. av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
  2156. &av7110->pt);
  2157. if (!av7110->grabbing)
  2158. goto err_i2c_del_3;
  2159. saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
  2160. saa7146_write(dev, BCS_CTRL, 0x80400040);
  2161. /* set dd1 stream a & b */
  2162. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2163. saa7146_write(dev, DD1_INIT, 0x03000200);
  2164. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2165. saa7146_write(dev, BRS_CTRL, 0x60000000);
  2166. saa7146_write(dev, BASE_ODD3, 0);
  2167. saa7146_write(dev, BASE_EVEN3, 0);
  2168. saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
  2169. saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
  2170. saa7146_write(dev, PITCH3, TS_WIDTH);
  2171. saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
  2172. /* upload all */
  2173. saa7146_write(dev, MC2, 0x077c077c);
  2174. saa7146_write(dev, GPIO_CTRL, 0x000000);
  2175. #if RPS_IRQ
  2176. /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
  2177. * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
  2178. * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
  2179. */
  2180. saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
  2181. /* set event counter 1 threshold to maximum allowed value (rEC p55) */
  2182. saa7146_write(dev, ECT1R, 0x3fff );
  2183. #endif
  2184. /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
  2185. count = 0;
  2186. /* Wait Source Line Counter Threshold (p36) */
  2187. WRITE_RPS1(CMD_PAUSE | EVT_HS);
  2188. /* Set GPIO3=1 (p42) */
  2189. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2190. WRITE_RPS1(GPIO3_MSK);
  2191. WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
  2192. #if RPS_IRQ
  2193. /* issue RPS1 interrupt */
  2194. WRITE_RPS1(CMD_INTERRUPT);
  2195. #endif
  2196. /* Wait reset Source Line Counter Threshold (p36) */
  2197. WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
  2198. /* Set GPIO3=0 (p42) */
  2199. WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
  2200. WRITE_RPS1(GPIO3_MSK);
  2201. WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
  2202. #if RPS_IRQ
  2203. /* issue RPS1 interrupt */
  2204. WRITE_RPS1(CMD_INTERRUPT);
  2205. #endif
  2206. /* Jump to begin of RPS program (p37) */
  2207. WRITE_RPS1(CMD_JUMP);
  2208. WRITE_RPS1(dev->d_rps1.dma_handle);
  2209. /* Fix VSYNC level */
  2210. saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
  2211. /* Set RPS1 Address register to point to RPS code (r108 p42) */
  2212. saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
  2213. /* Set Source Line Counter Threshold, using BRS (rCC p43)
  2214. * It generates HS event every TS_HEIGHT lines
  2215. * this is related to TS_WIDTH set in register
  2216. * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
  2217. * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
  2218. * then RPS_THRESH1 should be set to trigger
  2219. * every TS_HEIGHT (512) lines.
  2220. */
  2221. saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
  2222. /* Enable RPS1 (rFC p33) */
  2223. saa7146_write(dev, MC1, (MASK_13 | MASK_29));
  2224. /* end of budgetpatch register initialization */
  2225. tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
  2226. } else {
  2227. saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
  2228. saa7146_write(dev, BCS_CTRL, 0x80400040);
  2229. /* set dd1 stream a & b */
  2230. saa7146_write(dev, DD1_STREAM_B, 0x00000000);
  2231. saa7146_write(dev, DD1_INIT, 0x03000000);
  2232. saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
  2233. /* upload all */
  2234. saa7146_write(dev, MC2, 0x077c077c);
  2235. saa7146_write(dev, GPIO_CTRL, 0x000000);
  2236. }
  2237. tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
  2238. tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
  2239. mutex_init(&av7110->pid_mutex);
  2240. /* locks for data transfers from/to AV7110 */
  2241. spin_lock_init(&av7110->debilock);
  2242. mutex_init(&av7110->dcomlock);
  2243. av7110->debitype = -1;
  2244. /* default OSD window */
  2245. av7110->osdwin = 1;
  2246. mutex_init(&av7110->osd_mutex);
  2247. /* TV standard */
  2248. av7110->vidmode = tv_standard == 1 ? AV7110_VIDEO_MODE_NTSC
  2249. : AV7110_VIDEO_MODE_PAL;
  2250. /* ARM "watchdog" */
  2251. init_waitqueue_head(&av7110->arm_wait);
  2252. av7110->arm_thread = NULL;
  2253. /* allocate and init buffers */
  2254. av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
  2255. if (!av7110->debi_virt)
  2256. goto err_saa71466_vfree_4;
  2257. av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
  2258. if (!av7110->iobuf)
  2259. goto err_pci_free_5;
  2260. ret = av7110_av_init(av7110);
  2261. if (ret < 0)
  2262. goto err_iobuf_vfree_6;
  2263. /* init BMP buffer */
  2264. av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
  2265. init_waitqueue_head(&av7110->bmpq);
  2266. ret = av7110_ca_init(av7110);
  2267. if (ret < 0)
  2268. goto err_av7110_av_exit_7;
  2269. /* load firmware into AV7110 cards */
  2270. ret = av7110_bootarm(av7110);
  2271. if (ret < 0)
  2272. goto err_av7110_ca_exit_8;
  2273. ret = av7110_firmversion(av7110);
  2274. if (ret < 0)
  2275. goto err_stop_arm_9;
  2276. if (FW_VERSION(av7110->arm_app)<0x2501)
  2277. printk ("dvb-ttpci: Warning, firmware version 0x%04x is too old. "
  2278. "System might be unstable!\n", FW_VERSION(av7110->arm_app));
  2279. thread = kthread_run(arm_thread, (void *) av7110, "arm_mon");
  2280. if (IS_ERR(thread)) {
  2281. ret = PTR_ERR(thread);
  2282. goto err_stop_arm_9;
  2283. }
  2284. av7110->arm_thread = thread;
  2285. /* set initial volume in mixer struct */
  2286. av7110->mixer.volume_left = volume;
  2287. av7110->mixer.volume_right = volume;
  2288. ret = av7110_register(av7110);
  2289. if (ret < 0)
  2290. goto err_arm_thread_stop_10;
  2291. init_av7110_av(av7110);
  2292. /* special case DVB-C: these cards have an analog tuner
  2293. plus need some special handling, so we have separate
  2294. saa7146_ext_vv data for these... */
  2295. ret = av7110_init_v4l(av7110);
  2296. if (ret < 0)
  2297. goto err_av7110_unregister_11;
  2298. av7110->dvb_adapter.priv = av7110;
  2299. ret = frontend_init(av7110);
  2300. if (ret < 0)
  2301. goto err_av7110_exit_v4l_12;
  2302. mutex_init(&av7110->ioctl_mutex);
  2303. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  2304. av7110_ir_init(av7110);
  2305. #endif
  2306. printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
  2307. av7110_num++;
  2308. out:
  2309. return ret;
  2310. err_av7110_exit_v4l_12:
  2311. av7110_exit_v4l(av7110);
  2312. err_av7110_unregister_11:
  2313. dvb_unregister(av7110);
  2314. err_arm_thread_stop_10:
  2315. av7110_arm_sync(av7110);
  2316. err_stop_arm_9:
  2317. /* Nothing to do. Rejoice. */
  2318. err_av7110_ca_exit_8:
  2319. av7110_ca_exit(av7110);
  2320. err_av7110_av_exit_7:
  2321. av7110_av_exit(av7110);
  2322. err_iobuf_vfree_6:
  2323. vfree(av7110->iobuf);
  2324. err_pci_free_5:
  2325. pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
  2326. err_saa71466_vfree_4:
  2327. if (av7110->grabbing)
  2328. saa7146_vfree_destroy_pgtable(pdev, av7110->grabbing, &av7110->pt);
  2329. err_i2c_del_3:
  2330. i2c_del_adapter(&av7110->i2c_adap);
  2331. err_dvb_unregister_adapter_2:
  2332. dvb_unregister_adapter(&av7110->dvb_adapter);
  2333. err_put_firmware_1:
  2334. put_firmware(av7110);
  2335. err_kfree_0:
  2336. kfree(av7110);
  2337. goto out;
  2338. }
  2339. static int av7110_detach(struct saa7146_dev* saa)
  2340. {
  2341. struct av7110 *av7110 = saa->ext_priv;
  2342. dprintk(4, "%p\n", av7110);
  2343. #if IS_ENABLED(CONFIG_DVB_AV7110_IR)
  2344. av7110_ir_exit(av7110);
  2345. #endif
  2346. if (budgetpatch || av7110->full_ts) {
  2347. if (budgetpatch) {
  2348. /* Disable RPS1 */
  2349. saa7146_write(saa, MC1, MASK_29);
  2350. /* VSYNC LOW (inactive) */
  2351. saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
  2352. }
  2353. saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
  2354. SAA7146_IER_DISABLE(saa, MASK_10);
  2355. SAA7146_ISR_CLEAR(saa, MASK_10);
  2356. msleep(50);
  2357. tasklet_kill(&av7110->vpe_tasklet);
  2358. saa7146_vfree_destroy_pgtable(saa->pci, av7110->grabbing, &av7110->pt);
  2359. }
  2360. av7110_exit_v4l(av7110);
  2361. av7110_arm_sync(av7110);
  2362. tasklet_kill(&av7110->debi_tasklet);
  2363. tasklet_kill(&av7110->gpio_tasklet);
  2364. dvb_unregister(av7110);
  2365. SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
  2366. SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
  2367. av7110_ca_exit(av7110);
  2368. av7110_av_exit(av7110);
  2369. vfree(av7110->iobuf);
  2370. pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
  2371. av7110->debi_bus);
  2372. i2c_del_adapter(&av7110->i2c_adap);
  2373. dvb_unregister_adapter (&av7110->dvb_adapter);
  2374. av7110_num--;
  2375. put_firmware(av7110);
  2376. kfree(av7110);
  2377. saa->ext_priv = NULL;
  2378. return 0;
  2379. }
  2380. static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
  2381. {
  2382. struct av7110 *av7110 = dev->ext_priv;
  2383. //print_time("av7110_irq");
  2384. /* Note: Don't try to handle the DEBI error irq (MASK_18), in
  2385. * intel mode the timeout is asserted all the time...
  2386. */
  2387. if (*isr & MASK_19) {
  2388. //printk("av7110_irq: DEBI\n");
  2389. /* Note 1: The DEBI irq is level triggered: We must enable it
  2390. * only after we started a DMA xfer, and disable it here
  2391. * immediately, or it will be signalled all the time while
  2392. * DEBI is idle.
  2393. * Note 2: You would think that an irq which is masked is
  2394. * not signalled by the hardware. Not so for the SAA7146:
  2395. * An irq is signalled as long as the corresponding bit
  2396. * in the ISR is set, and disabling irqs just prevents the
  2397. * hardware from setting the ISR bit. This means a) that we
  2398. * must clear the ISR *after* disabling the irq (which is why
  2399. * we must do it here even though saa7146_core did it already),
  2400. * and b) that if we were to disable an edge triggered irq
  2401. * (like the gpio irqs sadly are) temporarily we would likely
  2402. * loose some. This sucks :-(
  2403. */
  2404. SAA7146_IER_DISABLE(av7110->dev, MASK_19);
  2405. SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
  2406. tasklet_schedule(&av7110->debi_tasklet);
  2407. }
  2408. if (*isr & MASK_03) {
  2409. //printk("av7110_irq: GPIO\n");
  2410. tasklet_schedule(&av7110->gpio_tasklet);
  2411. }
  2412. if (*isr & MASK_10)
  2413. tasklet_schedule(&av7110->vpe_tasklet);
  2414. }
  2415. static struct saa7146_extension av7110_extension_driver;
  2416. #define MAKE_AV7110_INFO(x_var,x_name) \
  2417. static struct saa7146_pci_extension_data x_var = { \
  2418. .ext_priv = x_name, \
  2419. .ext = &av7110_extension_driver }
  2420. MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
  2421. MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
  2422. MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
  2423. MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
  2424. MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
  2425. MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
  2426. MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
  2427. MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
  2428. MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
  2429. MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
  2430. MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3");
  2431. static struct pci_device_id pci_tbl[] = {
  2432. MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
  2433. MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
  2434. MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
  2435. MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
  2436. MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
  2437. MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004),
  2438. MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
  2439. MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
  2440. MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
  2441. MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
  2442. MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
  2443. /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
  2444. /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
  2445. {
  2446. .vendor = 0,
  2447. }
  2448. };
  2449. MODULE_DEVICE_TABLE(pci, pci_tbl);
  2450. static struct saa7146_extension av7110_extension_driver = {
  2451. .name = "av7110",
  2452. .flags = SAA7146_USE_I2C_IRQ,
  2453. .module = THIS_MODULE,
  2454. .pci_tbl = &pci_tbl[0],
  2455. .attach = av7110_attach,
  2456. .detach = av7110_detach,
  2457. .irq_mask = MASK_19 | MASK_03 | MASK_10,
  2458. .irq_func = av7110_irq,
  2459. };
  2460. static int __init av7110_init(void)
  2461. {
  2462. int retval;
  2463. retval = saa7146_register_extension(&av7110_extension_driver);
  2464. return retval;
  2465. }
  2466. static void __exit av7110_exit(void)
  2467. {
  2468. saa7146_unregister_extension(&av7110_extension_driver);
  2469. }
  2470. module_init(av7110_init);
  2471. module_exit(av7110_exit);
  2472. MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by "
  2473. "Siemens, Technotrend, Hauppauge");
  2474. MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
  2475. MODULE_LICENSE("GPL");