via-pmu.c 62 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. * Copyright (C) 2006-2007 Johannes Berg
  14. *
  15. * THIS DRIVER IS BECOMING A TOTAL MESS !
  16. * - Cleanup atomically disabling reply to PMU events after
  17. * a sleep or a freq. switch
  18. *
  19. */
  20. #include <stdarg.h>
  21. #include <linux/mutex.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/sched.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/poll.h>
  32. #include <linux/adb.h>
  33. #include <linux/pmu.h>
  34. #include <linux/cuda.h>
  35. #include <linux/module.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/pm.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/seq_file.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/device.h>
  43. #include <linux/syscore_ops.h>
  44. #include <linux/freezer.h>
  45. #include <linux/syscalls.h>
  46. #include <linux/suspend.h>
  47. #include <linux/cpu.h>
  48. #include <linux/compat.h>
  49. #include <linux/of_address.h>
  50. #include <linux/of_irq.h>
  51. #include <asm/prom.h>
  52. #include <asm/machdep.h>
  53. #include <asm/io.h>
  54. #include <asm/pgtable.h>
  55. #include <asm/sections.h>
  56. #include <asm/irq.h>
  57. #include <asm/pmac_feature.h>
  58. #include <asm/pmac_pfunc.h>
  59. #include <asm/pmac_low_i2c.h>
  60. #include <asm/uaccess.h>
  61. #include <asm/mmu_context.h>
  62. #include <asm/cputable.h>
  63. #include <asm/time.h>
  64. #include <asm/backlight.h>
  65. #include "via-pmu-event.h"
  66. /* Some compile options */
  67. #undef DEBUG_SLEEP
  68. /* Misc minor number allocated for /dev/pmu */
  69. #define PMU_MINOR 154
  70. /* How many iterations between battery polls */
  71. #define BATTERY_POLLING_COUNT 2
  72. static DEFINE_MUTEX(pmu_info_proc_mutex);
  73. static volatile unsigned char __iomem *via;
  74. /* VIA registers - spaced 0x200 bytes apart */
  75. #define RS 0x200 /* skip between registers */
  76. #define B 0 /* B-side data */
  77. #define A RS /* A-side data */
  78. #define DIRB (2*RS) /* B-side direction (1=output) */
  79. #define DIRA (3*RS) /* A-side direction (1=output) */
  80. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  81. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  82. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  83. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  84. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  85. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  86. #define SR (10*RS) /* Shift register */
  87. #define ACR (11*RS) /* Auxiliary control register */
  88. #define PCR (12*RS) /* Peripheral control register */
  89. #define IFR (13*RS) /* Interrupt flag register */
  90. #define IER (14*RS) /* Interrupt enable register */
  91. #define ANH (15*RS) /* A-side data, no handshake */
  92. /* Bits in B data register: both active low */
  93. #define TACK 0x08 /* Transfer acknowledge (input) */
  94. #define TREQ 0x10 /* Transfer request (output) */
  95. /* Bits in ACR */
  96. #define SR_CTRL 0x1c /* Shift register control bits */
  97. #define SR_EXT 0x0c /* Shift on external clock */
  98. #define SR_OUT 0x10 /* Shift out if 1 */
  99. /* Bits in IFR and IER */
  100. #define IER_SET 0x80 /* set bits in IER */
  101. #define IER_CLR 0 /* clear bits in IER */
  102. #define SR_INT 0x04 /* Shift register full/empty */
  103. #define CB2_INT 0x08
  104. #define CB1_INT 0x10 /* transition on CB1 input */
  105. static volatile enum pmu_state {
  106. idle,
  107. sending,
  108. intack,
  109. reading,
  110. reading_intr,
  111. locked,
  112. } pmu_state;
  113. static volatile enum int_data_state {
  114. int_data_empty,
  115. int_data_fill,
  116. int_data_ready,
  117. int_data_flush
  118. } int_data_state[2] = { int_data_empty, int_data_empty };
  119. static struct adb_request *current_req;
  120. static struct adb_request *last_req;
  121. static struct adb_request *req_awaiting_reply;
  122. static unsigned char interrupt_data[2][32];
  123. static int interrupt_data_len[2];
  124. static int int_data_last;
  125. static unsigned char *reply_ptr;
  126. static int data_index;
  127. static int data_len;
  128. static volatile int adb_int_pending;
  129. static volatile int disable_poll;
  130. static struct device_node *vias;
  131. static int pmu_kind = PMU_UNKNOWN;
  132. static int pmu_fully_inited;
  133. static int pmu_has_adb;
  134. static struct device_node *gpio_node;
  135. static unsigned char __iomem *gpio_reg;
  136. static int gpio_irq = 0;
  137. static int gpio_irq_enabled = -1;
  138. static volatile int pmu_suspended;
  139. static spinlock_t pmu_lock;
  140. static u8 pmu_intr_mask;
  141. static int pmu_version;
  142. static int drop_interrupts;
  143. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  144. static int option_lid_wakeup = 1;
  145. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  146. static unsigned long async_req_locks;
  147. static unsigned int pmu_irq_stats[11];
  148. static struct proc_dir_entry *proc_pmu_root;
  149. static struct proc_dir_entry *proc_pmu_info;
  150. static struct proc_dir_entry *proc_pmu_irqstats;
  151. static struct proc_dir_entry *proc_pmu_options;
  152. static int option_server_mode;
  153. int pmu_battery_count;
  154. int pmu_cur_battery;
  155. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  156. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  157. static int query_batt_timer = BATTERY_POLLING_COUNT;
  158. static struct adb_request batt_req;
  159. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  160. int __fake_sleep;
  161. int asleep;
  162. #ifdef CONFIG_ADB
  163. static int adb_dev_map;
  164. static int pmu_adb_flags;
  165. static int pmu_probe(void);
  166. static int pmu_init(void);
  167. static int pmu_send_request(struct adb_request *req, int sync);
  168. static int pmu_adb_autopoll(int devs);
  169. static int pmu_adb_reset_bus(void);
  170. #endif /* CONFIG_ADB */
  171. static int init_pmu(void);
  172. static void pmu_start(void);
  173. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  174. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  175. static const struct file_operations pmu_info_proc_fops;
  176. static const struct file_operations pmu_irqstats_proc_fops;
  177. static void pmu_pass_intr(unsigned char *data, int len);
  178. static const struct file_operations pmu_battery_proc_fops;
  179. static const struct file_operations pmu_options_proc_fops;
  180. #ifdef CONFIG_ADB
  181. struct adb_driver via_pmu_driver = {
  182. "PMU",
  183. pmu_probe,
  184. pmu_init,
  185. pmu_send_request,
  186. pmu_adb_autopoll,
  187. pmu_poll_adb,
  188. pmu_adb_reset_bus
  189. };
  190. #endif /* CONFIG_ADB */
  191. extern void low_sleep_handler(void);
  192. extern void enable_kernel_altivec(void);
  193. extern void enable_kernel_fp(void);
  194. #ifdef DEBUG_SLEEP
  195. int pmu_polled_request(struct adb_request *req);
  196. void pmu_blink(int n);
  197. #endif
  198. /*
  199. * This table indicates for each PMU opcode:
  200. * - the number of data bytes to be sent with the command, or -1
  201. * if a length byte should be sent,
  202. * - the number of response bytes which the PMU will return, or
  203. * -1 if it will send a length byte.
  204. */
  205. static const s8 pmu_data_len[256][2] = {
  206. /* 0 1 2 3 4 5 6 7 */
  207. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  208. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  209. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  210. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  211. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  212. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  213. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  214. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  215. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  216. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  217. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  218. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  219. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  220. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  221. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  222. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  223. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  224. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  225. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  226. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  227. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  228. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  229. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  230. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  231. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  232. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  233. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  234. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  235. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  236. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  237. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  238. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  239. };
  240. static char *pbook_type[] = {
  241. "Unknown PowerBook",
  242. "PowerBook 2400/3400/3500(G3)",
  243. "PowerBook G3 Series",
  244. "1999 PowerBook G3",
  245. "Core99"
  246. };
  247. int __init find_via_pmu(void)
  248. {
  249. u64 taddr;
  250. const u32 *reg;
  251. if (via != 0)
  252. return 1;
  253. vias = of_find_node_by_name(NULL, "via-pmu");
  254. if (vias == NULL)
  255. return 0;
  256. reg = of_get_property(vias, "reg", NULL);
  257. if (reg == NULL) {
  258. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  259. goto fail;
  260. }
  261. taddr = of_translate_address(vias, reg);
  262. if (taddr == OF_BAD_ADDR) {
  263. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  264. goto fail;
  265. }
  266. spin_lock_init(&pmu_lock);
  267. pmu_has_adb = 1;
  268. pmu_intr_mask = PMU_INT_PCEJECT |
  269. PMU_INT_SNDBRT |
  270. PMU_INT_ADB |
  271. PMU_INT_TICK;
  272. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  273. || of_device_is_compatible(vias->parent, "ohare")))
  274. pmu_kind = PMU_OHARE_BASED;
  275. else if (of_device_is_compatible(vias->parent, "paddington"))
  276. pmu_kind = PMU_PADDINGTON_BASED;
  277. else if (of_device_is_compatible(vias->parent, "heathrow"))
  278. pmu_kind = PMU_HEATHROW_BASED;
  279. else if (of_device_is_compatible(vias->parent, "Keylargo")
  280. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  281. struct device_node *gpiop;
  282. struct device_node *adbp;
  283. u64 gaddr = OF_BAD_ADDR;
  284. pmu_kind = PMU_KEYLARGO_BASED;
  285. adbp = of_find_node_by_type(NULL, "adb");
  286. pmu_has_adb = (adbp != NULL);
  287. of_node_put(adbp);
  288. pmu_intr_mask = PMU_INT_PCEJECT |
  289. PMU_INT_SNDBRT |
  290. PMU_INT_ADB |
  291. PMU_INT_TICK |
  292. PMU_INT_ENVIRONMENT;
  293. gpiop = of_find_node_by_name(NULL, "gpio");
  294. if (gpiop) {
  295. reg = of_get_property(gpiop, "reg", NULL);
  296. if (reg)
  297. gaddr = of_translate_address(gpiop, reg);
  298. if (gaddr != OF_BAD_ADDR)
  299. gpio_reg = ioremap(gaddr, 0x10);
  300. of_node_put(gpiop);
  301. }
  302. if (gpio_reg == NULL) {
  303. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  304. goto fail;
  305. }
  306. } else
  307. pmu_kind = PMU_UNKNOWN;
  308. via = ioremap(taddr, 0x2000);
  309. if (via == NULL) {
  310. printk(KERN_ERR "via-pmu: Can't map address !\n");
  311. goto fail_via_remap;
  312. }
  313. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  314. out_8(&via[IFR], 0x7f); /* clear IFR */
  315. pmu_state = idle;
  316. if (!init_pmu())
  317. goto fail_init;
  318. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  319. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  320. sys_ctrler = SYS_CTRLER_PMU;
  321. return 1;
  322. fail_init:
  323. iounmap(via);
  324. via = NULL;
  325. fail_via_remap:
  326. iounmap(gpio_reg);
  327. gpio_reg = NULL;
  328. fail:
  329. of_node_put(vias);
  330. vias = NULL;
  331. return 0;
  332. }
  333. #ifdef CONFIG_ADB
  334. static int pmu_probe(void)
  335. {
  336. return vias == NULL? -ENODEV: 0;
  337. }
  338. static int __init pmu_init(void)
  339. {
  340. if (vias == NULL)
  341. return -ENODEV;
  342. return 0;
  343. }
  344. #endif /* CONFIG_ADB */
  345. /*
  346. * We can't wait until pmu_init gets called, that happens too late.
  347. * It happens after IDE and SCSI initialization, which can take a few
  348. * seconds, and by that time the PMU could have given up on us and
  349. * turned us off.
  350. * Thus this is called with arch_initcall rather than device_initcall.
  351. */
  352. static int __init via_pmu_start(void)
  353. {
  354. unsigned int irq;
  355. if (vias == NULL)
  356. return -ENODEV;
  357. batt_req.complete = 1;
  358. irq = irq_of_parse_and_map(vias, 0);
  359. if (!irq) {
  360. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  361. return -ENODEV;
  362. }
  363. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  364. * to be disabled between the 2 passes of driver suspend, we
  365. * control our own disabling for that one
  366. */
  367. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  368. "VIA-PMU", (void *)0)) {
  369. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  370. return -ENODEV;
  371. }
  372. if (pmu_kind == PMU_KEYLARGO_BASED) {
  373. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  374. if (gpio_node == NULL)
  375. gpio_node = of_find_node_by_name(NULL,
  376. "pmu-interrupt");
  377. if (gpio_node)
  378. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  379. if (gpio_irq) {
  380. if (request_irq(gpio_irq, gpio1_interrupt,
  381. IRQF_NO_SUSPEND, "GPIO1 ADB",
  382. (void *)0))
  383. printk(KERN_ERR "pmu: can't get irq %d"
  384. " (GPIO1)\n", gpio_irq);
  385. else
  386. gpio_irq_enabled = 1;
  387. }
  388. }
  389. /* Enable interrupts */
  390. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  391. pmu_fully_inited = 1;
  392. /* Make sure PMU settle down before continuing. This is _very_ important
  393. * since the IDE probe may shut interrupts down for quite a bit of time. If
  394. * a PMU communication is pending while this happens, the PMU may timeout
  395. * Not that on Core99 machines, the PMU keeps sending us environement
  396. * messages, we should find a way to either fix IDE or make it call
  397. * pmu_suspend() before masking interrupts. This can also happens while
  398. * scolling with some fbdevs.
  399. */
  400. do {
  401. pmu_poll();
  402. } while (pmu_state != idle);
  403. return 0;
  404. }
  405. arch_initcall(via_pmu_start);
  406. /*
  407. * This has to be done after pci_init, which is a subsys_initcall.
  408. */
  409. static int __init via_pmu_dev_init(void)
  410. {
  411. if (vias == NULL)
  412. return -ENODEV;
  413. #ifdef CONFIG_PMAC_BACKLIGHT
  414. /* Initialize backlight */
  415. pmu_backlight_init();
  416. #endif
  417. #ifdef CONFIG_PPC32
  418. if (of_machine_is_compatible("AAPL,3400/2400") ||
  419. of_machine_is_compatible("AAPL,3500")) {
  420. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  421. NULL, PMAC_MB_INFO_MODEL, 0);
  422. pmu_battery_count = 1;
  423. if (mb == PMAC_TYPE_COMET)
  424. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  425. else
  426. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  427. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  428. of_machine_is_compatible("PowerBook1,1")) {
  429. pmu_battery_count = 2;
  430. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  431. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  432. } else {
  433. struct device_node* prim =
  434. of_find_node_by_name(NULL, "power-mgt");
  435. const u32 *prim_info = NULL;
  436. if (prim)
  437. prim_info = of_get_property(prim, "prim-info", NULL);
  438. if (prim_info) {
  439. /* Other stuffs here yet unknown */
  440. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  441. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  442. if (pmu_battery_count > 1)
  443. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  444. }
  445. of_node_put(prim);
  446. }
  447. #endif /* CONFIG_PPC32 */
  448. /* Create /proc/pmu */
  449. proc_pmu_root = proc_mkdir("pmu", NULL);
  450. if (proc_pmu_root) {
  451. long i;
  452. for (i=0; i<pmu_battery_count; i++) {
  453. char title[16];
  454. sprintf(title, "battery_%ld", i);
  455. proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
  456. &pmu_battery_proc_fops, (void *)i);
  457. }
  458. proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
  459. proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
  460. &pmu_irqstats_proc_fops);
  461. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  462. &pmu_options_proc_fops);
  463. }
  464. return 0;
  465. }
  466. device_initcall(via_pmu_dev_init);
  467. static int
  468. init_pmu(void)
  469. {
  470. int timeout;
  471. struct adb_request req;
  472. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  473. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  474. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  475. timeout = 100000;
  476. while (!req.complete) {
  477. if (--timeout < 0) {
  478. printk(KERN_ERR "init_pmu: no response from PMU\n");
  479. return 0;
  480. }
  481. udelay(10);
  482. pmu_poll();
  483. }
  484. /* ack all pending interrupts */
  485. timeout = 100000;
  486. interrupt_data[0][0] = 1;
  487. while (interrupt_data[0][0] || pmu_state != idle) {
  488. if (--timeout < 0) {
  489. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  490. return 0;
  491. }
  492. if (pmu_state == idle)
  493. adb_int_pending = 1;
  494. via_pmu_interrupt(0, NULL);
  495. udelay(10);
  496. }
  497. /* Tell PMU we are ready. */
  498. if (pmu_kind == PMU_KEYLARGO_BASED) {
  499. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  500. while (!req.complete)
  501. pmu_poll();
  502. }
  503. /* Read PMU version */
  504. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  505. pmu_wait_complete(&req);
  506. if (req.reply_len > 0)
  507. pmu_version = req.reply[0];
  508. /* Read server mode setting */
  509. if (pmu_kind == PMU_KEYLARGO_BASED) {
  510. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  511. PMU_PWR_GET_POWERUP_EVENTS);
  512. pmu_wait_complete(&req);
  513. if (req.reply_len == 2) {
  514. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  515. option_server_mode = 1;
  516. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  517. option_server_mode ? "enabled" : "disabled");
  518. }
  519. }
  520. return 1;
  521. }
  522. int
  523. pmu_get_model(void)
  524. {
  525. return pmu_kind;
  526. }
  527. static void pmu_set_server_mode(int server_mode)
  528. {
  529. struct adb_request req;
  530. if (pmu_kind != PMU_KEYLARGO_BASED)
  531. return;
  532. option_server_mode = server_mode;
  533. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  534. pmu_wait_complete(&req);
  535. if (req.reply_len < 2)
  536. return;
  537. if (server_mode)
  538. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  539. PMU_PWR_SET_POWERUP_EVENTS,
  540. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  541. else
  542. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  543. PMU_PWR_CLR_POWERUP_EVENTS,
  544. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  545. pmu_wait_complete(&req);
  546. }
  547. /* This new version of the code for 2400/3400/3500 powerbooks
  548. * is inspired from the implementation in gkrellm-pmu
  549. */
  550. static void
  551. done_battery_state_ohare(struct adb_request* req)
  552. {
  553. /* format:
  554. * [0] : flags
  555. * 0x01 : AC indicator
  556. * 0x02 : charging
  557. * 0x04 : battery exist
  558. * 0x08 :
  559. * 0x10 :
  560. * 0x20 : full charged
  561. * 0x40 : pcharge reset
  562. * 0x80 : battery exist
  563. *
  564. * [1][2] : battery voltage
  565. * [3] : CPU temperature
  566. * [4] : battery temperature
  567. * [5] : current
  568. * [6][7] : pcharge
  569. * --tkoba
  570. */
  571. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  572. long pcharge, charge, vb, vmax, lmax;
  573. long vmax_charging, vmax_charged;
  574. long amperage, voltage, time, max;
  575. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  576. NULL, PMAC_MB_INFO_MODEL, 0);
  577. if (req->reply[0] & 0x01)
  578. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  579. else
  580. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  581. if (mb == PMAC_TYPE_COMET) {
  582. vmax_charged = 189;
  583. vmax_charging = 213;
  584. lmax = 6500;
  585. } else {
  586. vmax_charged = 330;
  587. vmax_charging = 330;
  588. lmax = 6500;
  589. }
  590. vmax = vmax_charged;
  591. /* If battery installed */
  592. if (req->reply[0] & 0x04) {
  593. bat_flags |= PMU_BATT_PRESENT;
  594. if (req->reply[0] & 0x02)
  595. bat_flags |= PMU_BATT_CHARGING;
  596. vb = (req->reply[1] << 8) | req->reply[2];
  597. voltage = (vb * 265 + 72665) / 10;
  598. amperage = req->reply[5];
  599. if ((req->reply[0] & 0x01) == 0) {
  600. if (amperage > 200)
  601. vb += ((amperage - 200) * 15)/100;
  602. } else if (req->reply[0] & 0x02) {
  603. vb = (vb * 97) / 100;
  604. vmax = vmax_charging;
  605. }
  606. charge = (100 * vb) / vmax;
  607. if (req->reply[0] & 0x40) {
  608. pcharge = (req->reply[6] << 8) + req->reply[7];
  609. if (pcharge > lmax)
  610. pcharge = lmax;
  611. pcharge *= 100;
  612. pcharge = 100 - pcharge / lmax;
  613. if (pcharge < charge)
  614. charge = pcharge;
  615. }
  616. if (amperage > 0)
  617. time = (charge * 16440) / amperage;
  618. else
  619. time = 0;
  620. max = 100;
  621. amperage = -amperage;
  622. } else
  623. charge = max = amperage = voltage = time = 0;
  624. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  625. pmu_batteries[pmu_cur_battery].charge = charge;
  626. pmu_batteries[pmu_cur_battery].max_charge = max;
  627. pmu_batteries[pmu_cur_battery].amperage = amperage;
  628. pmu_batteries[pmu_cur_battery].voltage = voltage;
  629. pmu_batteries[pmu_cur_battery].time_remaining = time;
  630. clear_bit(0, &async_req_locks);
  631. }
  632. static void
  633. done_battery_state_smart(struct adb_request* req)
  634. {
  635. /* format:
  636. * [0] : format of this structure (known: 3,4,5)
  637. * [1] : flags
  638. *
  639. * format 3 & 4:
  640. *
  641. * [2] : charge
  642. * [3] : max charge
  643. * [4] : current
  644. * [5] : voltage
  645. *
  646. * format 5:
  647. *
  648. * [2][3] : charge
  649. * [4][5] : max charge
  650. * [6][7] : current
  651. * [8][9] : voltage
  652. */
  653. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  654. int amperage;
  655. unsigned int capa, max, voltage;
  656. if (req->reply[1] & 0x01)
  657. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  658. else
  659. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  660. capa = max = amperage = voltage = 0;
  661. if (req->reply[1] & 0x04) {
  662. bat_flags |= PMU_BATT_PRESENT;
  663. switch(req->reply[0]) {
  664. case 3:
  665. case 4: capa = req->reply[2];
  666. max = req->reply[3];
  667. amperage = *((signed char *)&req->reply[4]);
  668. voltage = req->reply[5];
  669. break;
  670. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  671. max = (req->reply[4] << 8) | req->reply[5];
  672. amperage = *((signed short *)&req->reply[6]);
  673. voltage = (req->reply[8] << 8) | req->reply[9];
  674. break;
  675. default:
  676. pr_warn("pmu.c: unrecognized battery info, "
  677. "len: %d, %4ph\n", req->reply_len,
  678. req->reply);
  679. break;
  680. }
  681. }
  682. if ((req->reply[1] & 0x01) && (amperage > 0))
  683. bat_flags |= PMU_BATT_CHARGING;
  684. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  685. pmu_batteries[pmu_cur_battery].charge = capa;
  686. pmu_batteries[pmu_cur_battery].max_charge = max;
  687. pmu_batteries[pmu_cur_battery].amperage = amperage;
  688. pmu_batteries[pmu_cur_battery].voltage = voltage;
  689. if (amperage) {
  690. if ((req->reply[1] & 0x01) && (amperage > 0))
  691. pmu_batteries[pmu_cur_battery].time_remaining
  692. = ((max-capa) * 3600) / amperage;
  693. else
  694. pmu_batteries[pmu_cur_battery].time_remaining
  695. = (capa * 3600) / (-amperage);
  696. } else
  697. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  698. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  699. clear_bit(0, &async_req_locks);
  700. }
  701. static void
  702. query_battery_state(void)
  703. {
  704. if (test_and_set_bit(0, &async_req_locks))
  705. return;
  706. if (pmu_kind == PMU_OHARE_BASED)
  707. pmu_request(&batt_req, done_battery_state_ohare,
  708. 1, PMU_BATTERY_STATE);
  709. else
  710. pmu_request(&batt_req, done_battery_state_smart,
  711. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  712. }
  713. static int pmu_info_proc_show(struct seq_file *m, void *v)
  714. {
  715. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  716. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  717. seq_printf(m, "AC Power : %d\n",
  718. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  719. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  720. return 0;
  721. }
  722. static int pmu_info_proc_open(struct inode *inode, struct file *file)
  723. {
  724. return single_open(file, pmu_info_proc_show, NULL);
  725. }
  726. static const struct file_operations pmu_info_proc_fops = {
  727. .owner = THIS_MODULE,
  728. .open = pmu_info_proc_open,
  729. .read = seq_read,
  730. .llseek = seq_lseek,
  731. .release = single_release,
  732. };
  733. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  734. {
  735. int i;
  736. static const char *irq_names[] = {
  737. "Total CB1 triggered events",
  738. "Total GPIO1 triggered events",
  739. "PC-Card eject button",
  740. "Sound/Brightness button",
  741. "ADB message",
  742. "Battery state change",
  743. "Environment interrupt",
  744. "Tick timer",
  745. "Ghost interrupt (zero len)",
  746. "Empty interrupt (empty mask)",
  747. "Max irqs in a row"
  748. };
  749. for (i=0; i<11; i++) {
  750. seq_printf(m, " %2u: %10u (%s)\n",
  751. i, pmu_irq_stats[i], irq_names[i]);
  752. }
  753. return 0;
  754. }
  755. static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
  756. {
  757. return single_open(file, pmu_irqstats_proc_show, NULL);
  758. }
  759. static const struct file_operations pmu_irqstats_proc_fops = {
  760. .owner = THIS_MODULE,
  761. .open = pmu_irqstats_proc_open,
  762. .read = seq_read,
  763. .llseek = seq_lseek,
  764. .release = single_release,
  765. };
  766. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  767. {
  768. long batnum = (long)m->private;
  769. seq_putc(m, '\n');
  770. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  771. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  772. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  773. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  774. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  775. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  776. return 0;
  777. }
  778. static int pmu_battery_proc_open(struct inode *inode, struct file *file)
  779. {
  780. return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
  781. }
  782. static const struct file_operations pmu_battery_proc_fops = {
  783. .owner = THIS_MODULE,
  784. .open = pmu_battery_proc_open,
  785. .read = seq_read,
  786. .llseek = seq_lseek,
  787. .release = single_release,
  788. };
  789. static int pmu_options_proc_show(struct seq_file *m, void *v)
  790. {
  791. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  792. if (pmu_kind == PMU_KEYLARGO_BASED &&
  793. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  794. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  795. #endif
  796. if (pmu_kind == PMU_KEYLARGO_BASED)
  797. seq_printf(m, "server_mode=%d\n", option_server_mode);
  798. return 0;
  799. }
  800. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  801. {
  802. return single_open(file, pmu_options_proc_show, NULL);
  803. }
  804. static ssize_t pmu_options_proc_write(struct file *file,
  805. const char __user *buffer, size_t count, loff_t *pos)
  806. {
  807. char tmp[33];
  808. char *label, *val;
  809. size_t fcount = count;
  810. if (!count)
  811. return -EINVAL;
  812. if (count > 32)
  813. count = 32;
  814. if (copy_from_user(tmp, buffer, count))
  815. return -EFAULT;
  816. tmp[count] = 0;
  817. label = tmp;
  818. while(*label == ' ')
  819. label++;
  820. val = label;
  821. while(*val && (*val != '=')) {
  822. if (*val == ' ')
  823. *val = 0;
  824. val++;
  825. }
  826. if ((*val) == 0)
  827. return -EINVAL;
  828. *(val++) = 0;
  829. while(*val == ' ')
  830. val++;
  831. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  832. if (pmu_kind == PMU_KEYLARGO_BASED &&
  833. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  834. if (!strcmp(label, "lid_wakeup"))
  835. option_lid_wakeup = ((*val) == '1');
  836. #endif
  837. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  838. int new_value;
  839. new_value = ((*val) == '1');
  840. if (new_value != option_server_mode)
  841. pmu_set_server_mode(new_value);
  842. }
  843. return fcount;
  844. }
  845. static const struct file_operations pmu_options_proc_fops = {
  846. .owner = THIS_MODULE,
  847. .open = pmu_options_proc_open,
  848. .read = seq_read,
  849. .llseek = seq_lseek,
  850. .release = single_release,
  851. .write = pmu_options_proc_write,
  852. };
  853. #ifdef CONFIG_ADB
  854. /* Send an ADB command */
  855. static int pmu_send_request(struct adb_request *req, int sync)
  856. {
  857. int i, ret;
  858. if ((vias == NULL) || (!pmu_fully_inited)) {
  859. req->complete = 1;
  860. return -ENXIO;
  861. }
  862. ret = -EINVAL;
  863. switch (req->data[0]) {
  864. case PMU_PACKET:
  865. for (i = 0; i < req->nbytes - 1; ++i)
  866. req->data[i] = req->data[i+1];
  867. --req->nbytes;
  868. if (pmu_data_len[req->data[0]][1] != 0) {
  869. req->reply[0] = ADB_RET_OK;
  870. req->reply_len = 1;
  871. } else
  872. req->reply_len = 0;
  873. ret = pmu_queue_request(req);
  874. break;
  875. case CUDA_PACKET:
  876. switch (req->data[1]) {
  877. case CUDA_GET_TIME:
  878. if (req->nbytes != 2)
  879. break;
  880. req->data[0] = PMU_READ_RTC;
  881. req->nbytes = 1;
  882. req->reply_len = 3;
  883. req->reply[0] = CUDA_PACKET;
  884. req->reply[1] = 0;
  885. req->reply[2] = CUDA_GET_TIME;
  886. ret = pmu_queue_request(req);
  887. break;
  888. case CUDA_SET_TIME:
  889. if (req->nbytes != 6)
  890. break;
  891. req->data[0] = PMU_SET_RTC;
  892. req->nbytes = 5;
  893. for (i = 1; i <= 4; ++i)
  894. req->data[i] = req->data[i+1];
  895. req->reply_len = 3;
  896. req->reply[0] = CUDA_PACKET;
  897. req->reply[1] = 0;
  898. req->reply[2] = CUDA_SET_TIME;
  899. ret = pmu_queue_request(req);
  900. break;
  901. }
  902. break;
  903. case ADB_PACKET:
  904. if (!pmu_has_adb)
  905. return -ENXIO;
  906. for (i = req->nbytes - 1; i > 1; --i)
  907. req->data[i+2] = req->data[i];
  908. req->data[3] = req->nbytes - 2;
  909. req->data[2] = pmu_adb_flags;
  910. /*req->data[1] = req->data[1];*/
  911. req->data[0] = PMU_ADB_CMD;
  912. req->nbytes += 2;
  913. req->reply_expected = 1;
  914. req->reply_len = 0;
  915. ret = pmu_queue_request(req);
  916. break;
  917. }
  918. if (ret) {
  919. req->complete = 1;
  920. return ret;
  921. }
  922. if (sync)
  923. while (!req->complete)
  924. pmu_poll();
  925. return 0;
  926. }
  927. /* Enable/disable autopolling */
  928. static int __pmu_adb_autopoll(int devs)
  929. {
  930. struct adb_request req;
  931. if (devs) {
  932. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  933. adb_dev_map >> 8, adb_dev_map);
  934. pmu_adb_flags = 2;
  935. } else {
  936. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  937. pmu_adb_flags = 0;
  938. }
  939. while (!req.complete)
  940. pmu_poll();
  941. return 0;
  942. }
  943. static int pmu_adb_autopoll(int devs)
  944. {
  945. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  946. return -ENXIO;
  947. adb_dev_map = devs;
  948. return __pmu_adb_autopoll(devs);
  949. }
  950. /* Reset the ADB bus */
  951. static int pmu_adb_reset_bus(void)
  952. {
  953. struct adb_request req;
  954. int save_autopoll = adb_dev_map;
  955. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  956. return -ENXIO;
  957. /* anyone got a better idea?? */
  958. __pmu_adb_autopoll(0);
  959. req.nbytes = 4;
  960. req.done = NULL;
  961. req.data[0] = PMU_ADB_CMD;
  962. req.data[1] = ADB_BUSRESET;
  963. req.data[2] = 0;
  964. req.data[3] = 0;
  965. req.data[4] = 0;
  966. req.reply_len = 0;
  967. req.reply_expected = 1;
  968. if (pmu_queue_request(&req) != 0) {
  969. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  970. return -EIO;
  971. }
  972. pmu_wait_complete(&req);
  973. if (save_autopoll != 0)
  974. __pmu_adb_autopoll(save_autopoll);
  975. return 0;
  976. }
  977. #endif /* CONFIG_ADB */
  978. /* Construct and send a pmu request */
  979. int
  980. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  981. int nbytes, ...)
  982. {
  983. va_list list;
  984. int i;
  985. if (vias == NULL)
  986. return -ENXIO;
  987. if (nbytes < 0 || nbytes > 32) {
  988. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  989. req->complete = 1;
  990. return -EINVAL;
  991. }
  992. req->nbytes = nbytes;
  993. req->done = done;
  994. va_start(list, nbytes);
  995. for (i = 0; i < nbytes; ++i)
  996. req->data[i] = va_arg(list, int);
  997. va_end(list);
  998. req->reply_len = 0;
  999. req->reply_expected = 0;
  1000. return pmu_queue_request(req);
  1001. }
  1002. int
  1003. pmu_queue_request(struct adb_request *req)
  1004. {
  1005. unsigned long flags;
  1006. int nsend;
  1007. if (via == NULL) {
  1008. req->complete = 1;
  1009. return -ENXIO;
  1010. }
  1011. if (req->nbytes <= 0) {
  1012. req->complete = 1;
  1013. return 0;
  1014. }
  1015. nsend = pmu_data_len[req->data[0]][0];
  1016. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1017. req->complete = 1;
  1018. return -EINVAL;
  1019. }
  1020. req->next = NULL;
  1021. req->sent = 0;
  1022. req->complete = 0;
  1023. spin_lock_irqsave(&pmu_lock, flags);
  1024. if (current_req != 0) {
  1025. last_req->next = req;
  1026. last_req = req;
  1027. } else {
  1028. current_req = req;
  1029. last_req = req;
  1030. if (pmu_state == idle)
  1031. pmu_start();
  1032. }
  1033. spin_unlock_irqrestore(&pmu_lock, flags);
  1034. return 0;
  1035. }
  1036. static inline void
  1037. wait_for_ack(void)
  1038. {
  1039. /* Sightly increased the delay, I had one occurrence of the message
  1040. * reported
  1041. */
  1042. int timeout = 4000;
  1043. while ((in_8(&via[B]) & TACK) == 0) {
  1044. if (--timeout < 0) {
  1045. printk(KERN_ERR "PMU not responding (!ack)\n");
  1046. return;
  1047. }
  1048. udelay(10);
  1049. }
  1050. }
  1051. /* New PMU seems to be very sensitive to those timings, so we make sure
  1052. * PCI is flushed immediately */
  1053. static inline void
  1054. send_byte(int x)
  1055. {
  1056. volatile unsigned char __iomem *v = via;
  1057. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1058. out_8(&v[SR], x);
  1059. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1060. (void)in_8(&v[B]);
  1061. }
  1062. static inline void
  1063. recv_byte(void)
  1064. {
  1065. volatile unsigned char __iomem *v = via;
  1066. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1067. in_8(&v[SR]); /* resets SR */
  1068. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1069. (void)in_8(&v[B]);
  1070. }
  1071. static inline void
  1072. pmu_done(struct adb_request *req)
  1073. {
  1074. void (*done)(struct adb_request *) = req->done;
  1075. mb();
  1076. req->complete = 1;
  1077. /* Here, we assume that if the request has a done member, the
  1078. * struct request will survive to setting req->complete to 1
  1079. */
  1080. if (done)
  1081. (*done)(req);
  1082. }
  1083. static void
  1084. pmu_start(void)
  1085. {
  1086. struct adb_request *req;
  1087. /* assert pmu_state == idle */
  1088. /* get the packet to send */
  1089. req = current_req;
  1090. if (req == 0 || pmu_state != idle
  1091. || (/*req->reply_expected && */req_awaiting_reply))
  1092. return;
  1093. pmu_state = sending;
  1094. data_index = 1;
  1095. data_len = pmu_data_len[req->data[0]][0];
  1096. /* Sounds safer to make sure ACK is high before writing. This helped
  1097. * kill a problem with ADB and some iBooks
  1098. */
  1099. wait_for_ack();
  1100. /* set the shift register to shift out and send a byte */
  1101. send_byte(req->data[0]);
  1102. }
  1103. void
  1104. pmu_poll(void)
  1105. {
  1106. if (!via)
  1107. return;
  1108. if (disable_poll)
  1109. return;
  1110. via_pmu_interrupt(0, NULL);
  1111. }
  1112. void
  1113. pmu_poll_adb(void)
  1114. {
  1115. if (!via)
  1116. return;
  1117. if (disable_poll)
  1118. return;
  1119. /* Kicks ADB read when PMU is suspended */
  1120. adb_int_pending = 1;
  1121. do {
  1122. via_pmu_interrupt(0, NULL);
  1123. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1124. || req_awaiting_reply));
  1125. }
  1126. void
  1127. pmu_wait_complete(struct adb_request *req)
  1128. {
  1129. if (!via)
  1130. return;
  1131. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1132. via_pmu_interrupt(0, NULL);
  1133. }
  1134. /* This function loops until the PMU is idle and prevents it from
  1135. * anwsering to ADB interrupts. pmu_request can still be called.
  1136. * This is done to avoid spurrious shutdowns when we know we'll have
  1137. * interrupts switched off for a long time
  1138. */
  1139. void
  1140. pmu_suspend(void)
  1141. {
  1142. unsigned long flags;
  1143. if (!via)
  1144. return;
  1145. spin_lock_irqsave(&pmu_lock, flags);
  1146. pmu_suspended++;
  1147. if (pmu_suspended > 1) {
  1148. spin_unlock_irqrestore(&pmu_lock, flags);
  1149. return;
  1150. }
  1151. do {
  1152. spin_unlock_irqrestore(&pmu_lock, flags);
  1153. if (req_awaiting_reply)
  1154. adb_int_pending = 1;
  1155. via_pmu_interrupt(0, NULL);
  1156. spin_lock_irqsave(&pmu_lock, flags);
  1157. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1158. if (gpio_irq >= 0)
  1159. disable_irq_nosync(gpio_irq);
  1160. out_8(&via[IER], CB1_INT | IER_CLR);
  1161. spin_unlock_irqrestore(&pmu_lock, flags);
  1162. break;
  1163. }
  1164. } while (1);
  1165. }
  1166. void
  1167. pmu_resume(void)
  1168. {
  1169. unsigned long flags;
  1170. if (!via || (pmu_suspended < 1))
  1171. return;
  1172. spin_lock_irqsave(&pmu_lock, flags);
  1173. pmu_suspended--;
  1174. if (pmu_suspended > 0) {
  1175. spin_unlock_irqrestore(&pmu_lock, flags);
  1176. return;
  1177. }
  1178. adb_int_pending = 1;
  1179. if (gpio_irq >= 0)
  1180. enable_irq(gpio_irq);
  1181. out_8(&via[IER], CB1_INT | IER_SET);
  1182. spin_unlock_irqrestore(&pmu_lock, flags);
  1183. pmu_poll();
  1184. }
  1185. /* Interrupt data could be the result data from an ADB cmd */
  1186. static void
  1187. pmu_handle_data(unsigned char *data, int len)
  1188. {
  1189. unsigned char ints, pirq;
  1190. int i = 0;
  1191. asleep = 0;
  1192. if (drop_interrupts || len < 1) {
  1193. adb_int_pending = 0;
  1194. pmu_irq_stats[8]++;
  1195. return;
  1196. }
  1197. /* Get PMU interrupt mask */
  1198. ints = data[0];
  1199. /* Record zero interrupts for stats */
  1200. if (ints == 0)
  1201. pmu_irq_stats[9]++;
  1202. /* Hack to deal with ADB autopoll flag */
  1203. if (ints & PMU_INT_ADB)
  1204. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1205. next:
  1206. if (ints == 0) {
  1207. if (i > pmu_irq_stats[10])
  1208. pmu_irq_stats[10] = i;
  1209. return;
  1210. }
  1211. for (pirq = 0; pirq < 8; pirq++)
  1212. if (ints & (1 << pirq))
  1213. break;
  1214. pmu_irq_stats[pirq]++;
  1215. i++;
  1216. ints &= ~(1 << pirq);
  1217. /* Note: for some reason, we get an interrupt with len=1,
  1218. * data[0]==0 after each normal ADB interrupt, at least
  1219. * on the Pismo. Still investigating... --BenH
  1220. */
  1221. if ((1 << pirq) & PMU_INT_ADB) {
  1222. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1223. struct adb_request *req = req_awaiting_reply;
  1224. if (req == 0) {
  1225. printk(KERN_ERR "PMU: extra ADB reply\n");
  1226. return;
  1227. }
  1228. req_awaiting_reply = NULL;
  1229. if (len <= 2)
  1230. req->reply_len = 0;
  1231. else {
  1232. memcpy(req->reply, data + 1, len - 1);
  1233. req->reply_len = len - 1;
  1234. }
  1235. pmu_done(req);
  1236. } else {
  1237. if (len == 4 && data[1] == 0x2c) {
  1238. extern int xmon_wants_key, xmon_adb_keycode;
  1239. if (xmon_wants_key) {
  1240. xmon_adb_keycode = data[2];
  1241. return;
  1242. }
  1243. }
  1244. #ifdef CONFIG_ADB
  1245. /*
  1246. * XXX On the [23]400 the PMU gives us an up
  1247. * event for keycodes 0x74 or 0x75 when the PC
  1248. * card eject buttons are released, so we
  1249. * ignore those events.
  1250. */
  1251. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1252. && data[1] == 0x2c && data[3] == 0xff
  1253. && (data[2] & ~1) == 0xf4))
  1254. adb_input(data+1, len-1, 1);
  1255. #endif /* CONFIG_ADB */
  1256. }
  1257. }
  1258. /* Sound/brightness button pressed */
  1259. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1260. #ifdef CONFIG_PMAC_BACKLIGHT
  1261. if (len == 3)
  1262. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1263. #endif
  1264. }
  1265. /* Tick interrupt */
  1266. else if ((1 << pirq) & PMU_INT_TICK) {
  1267. /* Environement or tick interrupt, query batteries */
  1268. if (pmu_battery_count) {
  1269. if ((--query_batt_timer) == 0) {
  1270. query_battery_state();
  1271. query_batt_timer = BATTERY_POLLING_COUNT;
  1272. }
  1273. }
  1274. }
  1275. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1276. if (pmu_battery_count)
  1277. query_battery_state();
  1278. pmu_pass_intr(data, len);
  1279. /* len == 6 is probably a bad check. But how do I
  1280. * know what PMU versions send what events here? */
  1281. if (len == 6) {
  1282. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1283. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1284. }
  1285. } else {
  1286. pmu_pass_intr(data, len);
  1287. }
  1288. goto next;
  1289. }
  1290. static struct adb_request*
  1291. pmu_sr_intr(void)
  1292. {
  1293. struct adb_request *req;
  1294. int bite = 0;
  1295. if (via[B] & TREQ) {
  1296. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1297. out_8(&via[IFR], SR_INT);
  1298. return NULL;
  1299. }
  1300. /* The ack may not yet be low when we get the interrupt */
  1301. while ((in_8(&via[B]) & TACK) != 0)
  1302. ;
  1303. /* if reading grab the byte, and reset the interrupt */
  1304. if (pmu_state == reading || pmu_state == reading_intr)
  1305. bite = in_8(&via[SR]);
  1306. /* reset TREQ and wait for TACK to go high */
  1307. out_8(&via[B], in_8(&via[B]) | TREQ);
  1308. wait_for_ack();
  1309. switch (pmu_state) {
  1310. case sending:
  1311. req = current_req;
  1312. if (data_len < 0) {
  1313. data_len = req->nbytes - 1;
  1314. send_byte(data_len);
  1315. break;
  1316. }
  1317. if (data_index <= data_len) {
  1318. send_byte(req->data[data_index++]);
  1319. break;
  1320. }
  1321. req->sent = 1;
  1322. data_len = pmu_data_len[req->data[0]][1];
  1323. if (data_len == 0) {
  1324. pmu_state = idle;
  1325. current_req = req->next;
  1326. if (req->reply_expected)
  1327. req_awaiting_reply = req;
  1328. else
  1329. return req;
  1330. } else {
  1331. pmu_state = reading;
  1332. data_index = 0;
  1333. reply_ptr = req->reply + req->reply_len;
  1334. recv_byte();
  1335. }
  1336. break;
  1337. case intack:
  1338. data_index = 0;
  1339. data_len = -1;
  1340. pmu_state = reading_intr;
  1341. reply_ptr = interrupt_data[int_data_last];
  1342. recv_byte();
  1343. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1344. enable_irq(gpio_irq);
  1345. gpio_irq_enabled = 1;
  1346. }
  1347. break;
  1348. case reading:
  1349. case reading_intr:
  1350. if (data_len == -1) {
  1351. data_len = bite;
  1352. if (bite > 32)
  1353. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1354. } else if (data_index < 32) {
  1355. reply_ptr[data_index++] = bite;
  1356. }
  1357. if (data_index < data_len) {
  1358. recv_byte();
  1359. break;
  1360. }
  1361. if (pmu_state == reading_intr) {
  1362. pmu_state = idle;
  1363. int_data_state[int_data_last] = int_data_ready;
  1364. interrupt_data_len[int_data_last] = data_len;
  1365. } else {
  1366. req = current_req;
  1367. /*
  1368. * For PMU sleep and freq change requests, we lock the
  1369. * PMU until it's explicitly unlocked. This avoids any
  1370. * spurrious event polling getting in
  1371. */
  1372. current_req = req->next;
  1373. req->reply_len += data_index;
  1374. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1375. pmu_state = locked;
  1376. else
  1377. pmu_state = idle;
  1378. return req;
  1379. }
  1380. break;
  1381. default:
  1382. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1383. pmu_state);
  1384. }
  1385. return NULL;
  1386. }
  1387. static irqreturn_t
  1388. via_pmu_interrupt(int irq, void *arg)
  1389. {
  1390. unsigned long flags;
  1391. int intr;
  1392. int nloop = 0;
  1393. int int_data = -1;
  1394. struct adb_request *req = NULL;
  1395. int handled = 0;
  1396. /* This is a bit brutal, we can probably do better */
  1397. spin_lock_irqsave(&pmu_lock, flags);
  1398. ++disable_poll;
  1399. for (;;) {
  1400. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1401. if (intr == 0)
  1402. break;
  1403. handled = 1;
  1404. if (++nloop > 1000) {
  1405. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1406. "intr=%x, ier=%x pmu_state=%d\n",
  1407. intr, in_8(&via[IER]), pmu_state);
  1408. break;
  1409. }
  1410. out_8(&via[IFR], intr);
  1411. if (intr & CB1_INT) {
  1412. adb_int_pending = 1;
  1413. pmu_irq_stats[0]++;
  1414. }
  1415. if (intr & SR_INT) {
  1416. req = pmu_sr_intr();
  1417. if (req)
  1418. break;
  1419. }
  1420. }
  1421. recheck:
  1422. if (pmu_state == idle) {
  1423. if (adb_int_pending) {
  1424. if (int_data_state[0] == int_data_empty)
  1425. int_data_last = 0;
  1426. else if (int_data_state[1] == int_data_empty)
  1427. int_data_last = 1;
  1428. else
  1429. goto no_free_slot;
  1430. pmu_state = intack;
  1431. int_data_state[int_data_last] = int_data_fill;
  1432. /* Sounds safer to make sure ACK is high before writing.
  1433. * This helped kill a problem with ADB and some iBooks
  1434. */
  1435. wait_for_ack();
  1436. send_byte(PMU_INT_ACK);
  1437. adb_int_pending = 0;
  1438. } else if (current_req)
  1439. pmu_start();
  1440. }
  1441. no_free_slot:
  1442. /* Mark the oldest buffer for flushing */
  1443. if (int_data_state[!int_data_last] == int_data_ready) {
  1444. int_data_state[!int_data_last] = int_data_flush;
  1445. int_data = !int_data_last;
  1446. } else if (int_data_state[int_data_last] == int_data_ready) {
  1447. int_data_state[int_data_last] = int_data_flush;
  1448. int_data = int_data_last;
  1449. }
  1450. --disable_poll;
  1451. spin_unlock_irqrestore(&pmu_lock, flags);
  1452. /* Deal with completed PMU requests outside of the lock */
  1453. if (req) {
  1454. pmu_done(req);
  1455. req = NULL;
  1456. }
  1457. /* Deal with interrupt datas outside of the lock */
  1458. if (int_data >= 0) {
  1459. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1460. spin_lock_irqsave(&pmu_lock, flags);
  1461. ++disable_poll;
  1462. int_data_state[int_data] = int_data_empty;
  1463. int_data = -1;
  1464. goto recheck;
  1465. }
  1466. return IRQ_RETVAL(handled);
  1467. }
  1468. void
  1469. pmu_unlock(void)
  1470. {
  1471. unsigned long flags;
  1472. spin_lock_irqsave(&pmu_lock, flags);
  1473. if (pmu_state == locked)
  1474. pmu_state = idle;
  1475. adb_int_pending = 1;
  1476. spin_unlock_irqrestore(&pmu_lock, flags);
  1477. }
  1478. static irqreturn_t
  1479. gpio1_interrupt(int irq, void *arg)
  1480. {
  1481. unsigned long flags;
  1482. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1483. spin_lock_irqsave(&pmu_lock, flags);
  1484. if (gpio_irq_enabled > 0) {
  1485. disable_irq_nosync(gpio_irq);
  1486. gpio_irq_enabled = 0;
  1487. }
  1488. pmu_irq_stats[1]++;
  1489. adb_int_pending = 1;
  1490. spin_unlock_irqrestore(&pmu_lock, flags);
  1491. via_pmu_interrupt(0, NULL);
  1492. return IRQ_HANDLED;
  1493. }
  1494. return IRQ_NONE;
  1495. }
  1496. void
  1497. pmu_enable_irled(int on)
  1498. {
  1499. struct adb_request req;
  1500. if (vias == NULL)
  1501. return ;
  1502. if (pmu_kind == PMU_KEYLARGO_BASED)
  1503. return ;
  1504. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1505. (on ? PMU_POW_ON : PMU_POW_OFF));
  1506. pmu_wait_complete(&req);
  1507. }
  1508. void
  1509. pmu_restart(void)
  1510. {
  1511. struct adb_request req;
  1512. if (via == NULL)
  1513. return;
  1514. local_irq_disable();
  1515. drop_interrupts = 1;
  1516. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1517. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1518. PMU_INT_TICK );
  1519. while(!req.complete)
  1520. pmu_poll();
  1521. }
  1522. pmu_request(&req, NULL, 1, PMU_RESET);
  1523. pmu_wait_complete(&req);
  1524. for (;;)
  1525. ;
  1526. }
  1527. void
  1528. pmu_shutdown(void)
  1529. {
  1530. struct adb_request req;
  1531. if (via == NULL)
  1532. return;
  1533. local_irq_disable();
  1534. drop_interrupts = 1;
  1535. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1536. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1537. PMU_INT_TICK );
  1538. pmu_wait_complete(&req);
  1539. } else {
  1540. /* Disable server mode on shutdown or we'll just
  1541. * wake up again
  1542. */
  1543. pmu_set_server_mode(0);
  1544. }
  1545. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1546. 'M', 'A', 'T', 'T');
  1547. pmu_wait_complete(&req);
  1548. for (;;)
  1549. ;
  1550. }
  1551. int
  1552. pmu_present(void)
  1553. {
  1554. return via != 0;
  1555. }
  1556. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1557. /*
  1558. * Put the powerbook to sleep.
  1559. */
  1560. static u32 save_via[8];
  1561. static void
  1562. save_via_state(void)
  1563. {
  1564. save_via[0] = in_8(&via[ANH]);
  1565. save_via[1] = in_8(&via[DIRA]);
  1566. save_via[2] = in_8(&via[B]);
  1567. save_via[3] = in_8(&via[DIRB]);
  1568. save_via[4] = in_8(&via[PCR]);
  1569. save_via[5] = in_8(&via[ACR]);
  1570. save_via[6] = in_8(&via[T1CL]);
  1571. save_via[7] = in_8(&via[T1CH]);
  1572. }
  1573. static void
  1574. restore_via_state(void)
  1575. {
  1576. out_8(&via[ANH], save_via[0]);
  1577. out_8(&via[DIRA], save_via[1]);
  1578. out_8(&via[B], save_via[2]);
  1579. out_8(&via[DIRB], save_via[3]);
  1580. out_8(&via[PCR], save_via[4]);
  1581. out_8(&via[ACR], save_via[5]);
  1582. out_8(&via[T1CL], save_via[6]);
  1583. out_8(&via[T1CH], save_via[7]);
  1584. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1585. out_8(&via[IFR], 0x7f); /* clear IFR */
  1586. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1587. }
  1588. #define GRACKLE_PM (1<<7)
  1589. #define GRACKLE_DOZE (1<<5)
  1590. #define GRACKLE_NAP (1<<4)
  1591. #define GRACKLE_SLEEP (1<<3)
  1592. static int powerbook_sleep_grackle(void)
  1593. {
  1594. unsigned long save_l2cr;
  1595. unsigned short pmcr1;
  1596. struct adb_request req;
  1597. struct pci_dev *grackle;
  1598. grackle = pci_get_bus_and_slot(0, 0);
  1599. if (!grackle)
  1600. return -ENODEV;
  1601. /* Turn off various things. Darwin does some retry tests here... */
  1602. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1603. pmu_wait_complete(&req);
  1604. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1605. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1606. pmu_wait_complete(&req);
  1607. /* For 750, save backside cache setting and disable it */
  1608. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1609. if (!__fake_sleep) {
  1610. /* Ask the PMU to put us to sleep */
  1611. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1612. pmu_wait_complete(&req);
  1613. }
  1614. /* The VIA is supposed not to be restored correctly*/
  1615. save_via_state();
  1616. /* We shut down some HW */
  1617. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1618. pci_read_config_word(grackle, 0x70, &pmcr1);
  1619. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1620. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1621. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1622. pci_write_config_word(grackle, 0x70, pmcr1);
  1623. /* Call low-level ASM sleep handler */
  1624. if (__fake_sleep)
  1625. mdelay(5000);
  1626. else
  1627. low_sleep_handler();
  1628. /* We're awake again, stop grackle PM */
  1629. pci_read_config_word(grackle, 0x70, &pmcr1);
  1630. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1631. pci_write_config_word(grackle, 0x70, pmcr1);
  1632. pci_dev_put(grackle);
  1633. /* Make sure the PMU is idle */
  1634. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1635. restore_via_state();
  1636. /* Restore L2 cache */
  1637. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1638. _set_L2CR(save_l2cr);
  1639. /* Restore userland MMU context */
  1640. switch_mmu_context(NULL, current->active_mm, NULL);
  1641. /* Power things up */
  1642. pmu_unlock();
  1643. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1644. pmu_wait_complete(&req);
  1645. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1646. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1647. pmu_wait_complete(&req);
  1648. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1649. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1650. pmu_wait_complete(&req);
  1651. return 0;
  1652. }
  1653. static int
  1654. powerbook_sleep_Core99(void)
  1655. {
  1656. unsigned long save_l2cr;
  1657. unsigned long save_l3cr;
  1658. struct adb_request req;
  1659. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1660. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1661. return -ENOSYS;
  1662. }
  1663. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1664. return -EAGAIN;
  1665. /* Stop environment and ADB interrupts */
  1666. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1667. pmu_wait_complete(&req);
  1668. /* Tell PMU what events will wake us up */
  1669. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1670. 0xff, 0xff);
  1671. pmu_wait_complete(&req);
  1672. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1673. 0, PMU_PWR_WAKEUP_KEY |
  1674. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1675. pmu_wait_complete(&req);
  1676. /* Save the state of the L2 and L3 caches */
  1677. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1678. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1679. if (!__fake_sleep) {
  1680. /* Ask the PMU to put us to sleep */
  1681. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1682. pmu_wait_complete(&req);
  1683. }
  1684. /* The VIA is supposed not to be restored correctly*/
  1685. save_via_state();
  1686. /* Shut down various ASICs. There's a chance that we can no longer
  1687. * talk to the PMU after this, so I moved it to _after_ sending the
  1688. * sleep command to it. Still need to be checked.
  1689. */
  1690. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1691. /* Call low-level ASM sleep handler */
  1692. if (__fake_sleep)
  1693. mdelay(5000);
  1694. else
  1695. low_sleep_handler();
  1696. /* Restore Apple core ASICs state */
  1697. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1698. /* Restore VIA */
  1699. restore_via_state();
  1700. /* tweak LPJ before cpufreq is there */
  1701. loops_per_jiffy *= 2;
  1702. /* Restore video */
  1703. pmac_call_early_video_resume();
  1704. /* Restore L2 cache */
  1705. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1706. _set_L2CR(save_l2cr);
  1707. /* Restore L3 cache */
  1708. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1709. _set_L3CR(save_l3cr);
  1710. /* Restore userland MMU context */
  1711. switch_mmu_context(NULL, current->active_mm, NULL);
  1712. /* Tell PMU we are ready */
  1713. pmu_unlock();
  1714. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1715. pmu_wait_complete(&req);
  1716. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1717. pmu_wait_complete(&req);
  1718. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1719. loops_per_jiffy /= 2;
  1720. return 0;
  1721. }
  1722. #define PB3400_MEM_CTRL 0xf8000000
  1723. #define PB3400_MEM_CTRL_SLEEP 0x70
  1724. static void __iomem *pb3400_mem_ctrl;
  1725. static void powerbook_sleep_init_3400(void)
  1726. {
  1727. /* map in the memory controller registers */
  1728. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1729. if (pb3400_mem_ctrl == NULL)
  1730. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1731. }
  1732. static int powerbook_sleep_3400(void)
  1733. {
  1734. int i, x;
  1735. unsigned int hid0;
  1736. unsigned long msr;
  1737. struct adb_request sleep_req;
  1738. unsigned int __iomem *mem_ctrl_sleep;
  1739. if (pb3400_mem_ctrl == NULL)
  1740. return -ENOMEM;
  1741. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1742. /* Set the memory controller to keep the memory refreshed
  1743. while we're asleep */
  1744. for (i = 0x403f; i >= 0x4000; --i) {
  1745. out_be32(mem_ctrl_sleep, i);
  1746. do {
  1747. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1748. } while (x == 0);
  1749. if (x >= 0x100)
  1750. break;
  1751. }
  1752. /* Ask the PMU to put us to sleep */
  1753. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1754. pmu_wait_complete(&sleep_req);
  1755. pmu_unlock();
  1756. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1757. asleep = 1;
  1758. /* Put the CPU into sleep mode */
  1759. hid0 = mfspr(SPRN_HID0);
  1760. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1761. mtspr(SPRN_HID0, hid0);
  1762. local_irq_enable();
  1763. msr = mfmsr() | MSR_POW;
  1764. while (asleep) {
  1765. mb();
  1766. mtmsr(msr);
  1767. isync();
  1768. }
  1769. local_irq_disable();
  1770. /* OK, we're awake again, start restoring things */
  1771. out_be32(mem_ctrl_sleep, 0x3f);
  1772. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1773. return 0;
  1774. }
  1775. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1776. /*
  1777. * Support for /dev/pmu device
  1778. */
  1779. #define RB_SIZE 0x10
  1780. struct pmu_private {
  1781. struct list_head list;
  1782. int rb_get;
  1783. int rb_put;
  1784. struct rb_entry {
  1785. unsigned short len;
  1786. unsigned char data[16];
  1787. } rb_buf[RB_SIZE];
  1788. wait_queue_head_t wait;
  1789. spinlock_t lock;
  1790. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1791. int backlight_locker;
  1792. #endif
  1793. };
  1794. static LIST_HEAD(all_pmu_pvt);
  1795. static DEFINE_SPINLOCK(all_pvt_lock);
  1796. static void
  1797. pmu_pass_intr(unsigned char *data, int len)
  1798. {
  1799. struct pmu_private *pp;
  1800. struct list_head *list;
  1801. int i;
  1802. unsigned long flags;
  1803. if (len > sizeof(pp->rb_buf[0].data))
  1804. len = sizeof(pp->rb_buf[0].data);
  1805. spin_lock_irqsave(&all_pvt_lock, flags);
  1806. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1807. pp = list_entry(list, struct pmu_private, list);
  1808. spin_lock(&pp->lock);
  1809. i = pp->rb_put + 1;
  1810. if (i >= RB_SIZE)
  1811. i = 0;
  1812. if (i != pp->rb_get) {
  1813. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1814. rp->len = len;
  1815. memcpy(rp->data, data, len);
  1816. pp->rb_put = i;
  1817. wake_up_interruptible(&pp->wait);
  1818. }
  1819. spin_unlock(&pp->lock);
  1820. }
  1821. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1822. }
  1823. static int
  1824. pmu_open(struct inode *inode, struct file *file)
  1825. {
  1826. struct pmu_private *pp;
  1827. unsigned long flags;
  1828. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1829. if (pp == 0)
  1830. return -ENOMEM;
  1831. pp->rb_get = pp->rb_put = 0;
  1832. spin_lock_init(&pp->lock);
  1833. init_waitqueue_head(&pp->wait);
  1834. mutex_lock(&pmu_info_proc_mutex);
  1835. spin_lock_irqsave(&all_pvt_lock, flags);
  1836. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1837. pp->backlight_locker = 0;
  1838. #endif
  1839. list_add(&pp->list, &all_pmu_pvt);
  1840. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1841. file->private_data = pp;
  1842. mutex_unlock(&pmu_info_proc_mutex);
  1843. return 0;
  1844. }
  1845. static ssize_t
  1846. pmu_read(struct file *file, char __user *buf,
  1847. size_t count, loff_t *ppos)
  1848. {
  1849. struct pmu_private *pp = file->private_data;
  1850. DECLARE_WAITQUEUE(wait, current);
  1851. unsigned long flags;
  1852. int ret = 0;
  1853. if (count < 1 || pp == 0)
  1854. return -EINVAL;
  1855. if (!access_ok(VERIFY_WRITE, buf, count))
  1856. return -EFAULT;
  1857. spin_lock_irqsave(&pp->lock, flags);
  1858. add_wait_queue(&pp->wait, &wait);
  1859. set_current_state(TASK_INTERRUPTIBLE);
  1860. for (;;) {
  1861. ret = -EAGAIN;
  1862. if (pp->rb_get != pp->rb_put) {
  1863. int i = pp->rb_get;
  1864. struct rb_entry *rp = &pp->rb_buf[i];
  1865. ret = rp->len;
  1866. spin_unlock_irqrestore(&pp->lock, flags);
  1867. if (ret > count)
  1868. ret = count;
  1869. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1870. ret = -EFAULT;
  1871. if (++i >= RB_SIZE)
  1872. i = 0;
  1873. spin_lock_irqsave(&pp->lock, flags);
  1874. pp->rb_get = i;
  1875. }
  1876. if (ret >= 0)
  1877. break;
  1878. if (file->f_flags & O_NONBLOCK)
  1879. break;
  1880. ret = -ERESTARTSYS;
  1881. if (signal_pending(current))
  1882. break;
  1883. spin_unlock_irqrestore(&pp->lock, flags);
  1884. schedule();
  1885. spin_lock_irqsave(&pp->lock, flags);
  1886. }
  1887. __set_current_state(TASK_RUNNING);
  1888. remove_wait_queue(&pp->wait, &wait);
  1889. spin_unlock_irqrestore(&pp->lock, flags);
  1890. return ret;
  1891. }
  1892. static ssize_t
  1893. pmu_write(struct file *file, const char __user *buf,
  1894. size_t count, loff_t *ppos)
  1895. {
  1896. return 0;
  1897. }
  1898. static unsigned int
  1899. pmu_fpoll(struct file *filp, poll_table *wait)
  1900. {
  1901. struct pmu_private *pp = filp->private_data;
  1902. unsigned int mask = 0;
  1903. unsigned long flags;
  1904. if (pp == 0)
  1905. return 0;
  1906. poll_wait(filp, &pp->wait, wait);
  1907. spin_lock_irqsave(&pp->lock, flags);
  1908. if (pp->rb_get != pp->rb_put)
  1909. mask |= POLLIN;
  1910. spin_unlock_irqrestore(&pp->lock, flags);
  1911. return mask;
  1912. }
  1913. static int
  1914. pmu_release(struct inode *inode, struct file *file)
  1915. {
  1916. struct pmu_private *pp = file->private_data;
  1917. unsigned long flags;
  1918. if (pp != 0) {
  1919. file->private_data = NULL;
  1920. spin_lock_irqsave(&all_pvt_lock, flags);
  1921. list_del(&pp->list);
  1922. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1923. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1924. if (pp->backlight_locker)
  1925. pmac_backlight_enable();
  1926. #endif
  1927. kfree(pp);
  1928. }
  1929. return 0;
  1930. }
  1931. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1932. static void pmac_suspend_disable_irqs(void)
  1933. {
  1934. /* Call platform functions marked "on sleep" */
  1935. pmac_pfunc_i2c_suspend();
  1936. pmac_pfunc_base_suspend();
  1937. }
  1938. static int powerbook_sleep(suspend_state_t state)
  1939. {
  1940. int error = 0;
  1941. /* Wait for completion of async requests */
  1942. while (!batt_req.complete)
  1943. pmu_poll();
  1944. /* Giveup the lazy FPU & vec so we don't have to back them
  1945. * up from the low level code
  1946. */
  1947. enable_kernel_fp();
  1948. #ifdef CONFIG_ALTIVEC
  1949. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1950. enable_kernel_altivec();
  1951. #endif /* CONFIG_ALTIVEC */
  1952. switch (pmu_kind) {
  1953. case PMU_OHARE_BASED:
  1954. error = powerbook_sleep_3400();
  1955. break;
  1956. case PMU_HEATHROW_BASED:
  1957. case PMU_PADDINGTON_BASED:
  1958. error = powerbook_sleep_grackle();
  1959. break;
  1960. case PMU_KEYLARGO_BASED:
  1961. error = powerbook_sleep_Core99();
  1962. break;
  1963. default:
  1964. return -ENOSYS;
  1965. }
  1966. if (error)
  1967. return error;
  1968. mdelay(100);
  1969. return 0;
  1970. }
  1971. static void pmac_suspend_enable_irqs(void)
  1972. {
  1973. /* Force a poll of ADB interrupts */
  1974. adb_int_pending = 1;
  1975. via_pmu_interrupt(0, NULL);
  1976. mdelay(10);
  1977. /* Call platform functions marked "on wake" */
  1978. pmac_pfunc_base_resume();
  1979. pmac_pfunc_i2c_resume();
  1980. }
  1981. static int pmu_sleep_valid(suspend_state_t state)
  1982. {
  1983. return state == PM_SUSPEND_MEM
  1984. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1985. }
  1986. static const struct platform_suspend_ops pmu_pm_ops = {
  1987. .enter = powerbook_sleep,
  1988. .valid = pmu_sleep_valid,
  1989. };
  1990. static int register_pmu_pm_ops(void)
  1991. {
  1992. if (pmu_kind == PMU_OHARE_BASED)
  1993. powerbook_sleep_init_3400();
  1994. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1995. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1996. suspend_set_ops(&pmu_pm_ops);
  1997. return 0;
  1998. }
  1999. device_initcall(register_pmu_pm_ops);
  2000. #endif
  2001. static int pmu_ioctl(struct file *filp,
  2002. u_int cmd, u_long arg)
  2003. {
  2004. __u32 __user *argp = (__u32 __user *)arg;
  2005. int error = -EINVAL;
  2006. switch (cmd) {
  2007. case PMU_IOC_SLEEP:
  2008. if (!capable(CAP_SYS_ADMIN))
  2009. return -EACCES;
  2010. return pm_suspend(PM_SUSPEND_MEM);
  2011. case PMU_IOC_CAN_SLEEP:
  2012. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2013. return put_user(0, argp);
  2014. else
  2015. return put_user(1, argp);
  2016. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2017. /* Compatibility ioctl's for backlight */
  2018. case PMU_IOC_GET_BACKLIGHT:
  2019. {
  2020. int brightness;
  2021. brightness = pmac_backlight_get_legacy_brightness();
  2022. if (brightness < 0)
  2023. return brightness;
  2024. else
  2025. return put_user(brightness, argp);
  2026. }
  2027. case PMU_IOC_SET_BACKLIGHT:
  2028. {
  2029. int brightness;
  2030. error = get_user(brightness, argp);
  2031. if (error)
  2032. return error;
  2033. return pmac_backlight_set_legacy_brightness(brightness);
  2034. }
  2035. #ifdef CONFIG_INPUT_ADBHID
  2036. case PMU_IOC_GRAB_BACKLIGHT: {
  2037. struct pmu_private *pp = filp->private_data;
  2038. if (pp->backlight_locker)
  2039. return 0;
  2040. pp->backlight_locker = 1;
  2041. pmac_backlight_disable();
  2042. return 0;
  2043. }
  2044. #endif /* CONFIG_INPUT_ADBHID */
  2045. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2046. case PMU_IOC_GET_MODEL:
  2047. return put_user(pmu_kind, argp);
  2048. case PMU_IOC_HAS_ADB:
  2049. return put_user(pmu_has_adb, argp);
  2050. }
  2051. return error;
  2052. }
  2053. static long pmu_unlocked_ioctl(struct file *filp,
  2054. u_int cmd, u_long arg)
  2055. {
  2056. int ret;
  2057. mutex_lock(&pmu_info_proc_mutex);
  2058. ret = pmu_ioctl(filp, cmd, arg);
  2059. mutex_unlock(&pmu_info_proc_mutex);
  2060. return ret;
  2061. }
  2062. #ifdef CONFIG_COMPAT
  2063. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2064. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2065. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2066. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2067. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2068. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2069. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2070. {
  2071. switch (cmd) {
  2072. case PMU_IOC_SLEEP:
  2073. break;
  2074. case PMU_IOC_GET_BACKLIGHT32:
  2075. cmd = PMU_IOC_GET_BACKLIGHT;
  2076. break;
  2077. case PMU_IOC_SET_BACKLIGHT32:
  2078. cmd = PMU_IOC_SET_BACKLIGHT;
  2079. break;
  2080. case PMU_IOC_GET_MODEL32:
  2081. cmd = PMU_IOC_GET_MODEL;
  2082. break;
  2083. case PMU_IOC_HAS_ADB32:
  2084. cmd = PMU_IOC_HAS_ADB;
  2085. break;
  2086. case PMU_IOC_CAN_SLEEP32:
  2087. cmd = PMU_IOC_CAN_SLEEP;
  2088. break;
  2089. case PMU_IOC_GRAB_BACKLIGHT32:
  2090. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2091. break;
  2092. default:
  2093. return -ENOIOCTLCMD;
  2094. }
  2095. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2096. }
  2097. #endif
  2098. static const struct file_operations pmu_device_fops = {
  2099. .read = pmu_read,
  2100. .write = pmu_write,
  2101. .poll = pmu_fpoll,
  2102. .unlocked_ioctl = pmu_unlocked_ioctl,
  2103. #ifdef CONFIG_COMPAT
  2104. .compat_ioctl = compat_pmu_ioctl,
  2105. #endif
  2106. .open = pmu_open,
  2107. .release = pmu_release,
  2108. .llseek = noop_llseek,
  2109. };
  2110. static struct miscdevice pmu_device = {
  2111. PMU_MINOR, "pmu", &pmu_device_fops
  2112. };
  2113. static int pmu_device_init(void)
  2114. {
  2115. if (!via)
  2116. return 0;
  2117. if (misc_register(&pmu_device) < 0)
  2118. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2119. return 0;
  2120. }
  2121. device_initcall(pmu_device_init);
  2122. #ifdef DEBUG_SLEEP
  2123. static inline void
  2124. polled_handshake(volatile unsigned char __iomem *via)
  2125. {
  2126. via[B] &= ~TREQ; eieio();
  2127. while ((via[B] & TACK) != 0)
  2128. ;
  2129. via[B] |= TREQ; eieio();
  2130. while ((via[B] & TACK) == 0)
  2131. ;
  2132. }
  2133. static inline void
  2134. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2135. {
  2136. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2137. via[SR] = x; eieio();
  2138. polled_handshake(via);
  2139. }
  2140. static inline int
  2141. polled_recv_byte(volatile unsigned char __iomem *via)
  2142. {
  2143. int x;
  2144. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2145. x = via[SR]; eieio();
  2146. polled_handshake(via);
  2147. x = via[SR]; eieio();
  2148. return x;
  2149. }
  2150. int
  2151. pmu_polled_request(struct adb_request *req)
  2152. {
  2153. unsigned long flags;
  2154. int i, l, c;
  2155. volatile unsigned char __iomem *v = via;
  2156. req->complete = 1;
  2157. c = req->data[0];
  2158. l = pmu_data_len[c][0];
  2159. if (l >= 0 && req->nbytes != l + 1)
  2160. return -EINVAL;
  2161. local_irq_save(flags);
  2162. while (pmu_state != idle)
  2163. pmu_poll();
  2164. while ((via[B] & TACK) == 0)
  2165. ;
  2166. polled_send_byte(v, c);
  2167. if (l < 0) {
  2168. l = req->nbytes - 1;
  2169. polled_send_byte(v, l);
  2170. }
  2171. for (i = 1; i <= l; ++i)
  2172. polled_send_byte(v, req->data[i]);
  2173. l = pmu_data_len[c][1];
  2174. if (l < 0)
  2175. l = polled_recv_byte(v);
  2176. for (i = 0; i < l; ++i)
  2177. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2178. if (req->done)
  2179. (*req->done)(req);
  2180. local_irq_restore(flags);
  2181. return 0;
  2182. }
  2183. /* N.B. This doesn't work on the 3400 */
  2184. void pmu_blink(int n)
  2185. {
  2186. struct adb_request req;
  2187. memset(&req, 0, sizeof(req));
  2188. for (; n > 0; --n) {
  2189. req.nbytes = 4;
  2190. req.done = NULL;
  2191. req.data[0] = 0xee;
  2192. req.data[1] = 4;
  2193. req.data[2] = 0;
  2194. req.data[3] = 1;
  2195. req.reply[0] = ADB_RET_OK;
  2196. req.reply_len = 1;
  2197. req.reply_expected = 0;
  2198. pmu_polled_request(&req);
  2199. mdelay(50);
  2200. req.nbytes = 4;
  2201. req.done = NULL;
  2202. req.data[0] = 0xee;
  2203. req.data[1] = 4;
  2204. req.data[2] = 0;
  2205. req.data[3] = 0;
  2206. req.reply[0] = ADB_RET_OK;
  2207. req.reply_len = 1;
  2208. req.reply_expected = 0;
  2209. pmu_polled_request(&req);
  2210. mdelay(50);
  2211. }
  2212. mdelay(50);
  2213. }
  2214. #endif /* DEBUG_SLEEP */
  2215. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2216. int pmu_sys_suspended;
  2217. static int pmu_syscore_suspend(void)
  2218. {
  2219. /* Suspend PMU event interrupts */
  2220. pmu_suspend();
  2221. pmu_sys_suspended = 1;
  2222. #ifdef CONFIG_PMAC_BACKLIGHT
  2223. /* Tell backlight code not to muck around with the chip anymore */
  2224. pmu_backlight_set_sleep(1);
  2225. #endif
  2226. return 0;
  2227. }
  2228. static void pmu_syscore_resume(void)
  2229. {
  2230. struct adb_request req;
  2231. if (!pmu_sys_suspended)
  2232. return;
  2233. /* Tell PMU we are ready */
  2234. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2235. pmu_wait_complete(&req);
  2236. #ifdef CONFIG_PMAC_BACKLIGHT
  2237. /* Tell backlight code it can use the chip again */
  2238. pmu_backlight_set_sleep(0);
  2239. #endif
  2240. /* Resume PMU event interrupts */
  2241. pmu_resume();
  2242. pmu_sys_suspended = 0;
  2243. }
  2244. static struct syscore_ops pmu_syscore_ops = {
  2245. .suspend = pmu_syscore_suspend,
  2246. .resume = pmu_syscore_resume,
  2247. };
  2248. static int pmu_syscore_register(void)
  2249. {
  2250. register_syscore_ops(&pmu_syscore_ops);
  2251. return 0;
  2252. }
  2253. subsys_initcall(pmu_syscore_register);
  2254. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2255. EXPORT_SYMBOL(pmu_request);
  2256. EXPORT_SYMBOL(pmu_queue_request);
  2257. EXPORT_SYMBOL(pmu_poll);
  2258. EXPORT_SYMBOL(pmu_poll_adb);
  2259. EXPORT_SYMBOL(pmu_wait_complete);
  2260. EXPORT_SYMBOL(pmu_suspend);
  2261. EXPORT_SYMBOL(pmu_resume);
  2262. EXPORT_SYMBOL(pmu_unlock);
  2263. #if defined(CONFIG_PPC32)
  2264. EXPORT_SYMBOL(pmu_enable_irled);
  2265. EXPORT_SYMBOL(pmu_battery_count);
  2266. EXPORT_SYMBOL(pmu_batteries);
  2267. EXPORT_SYMBOL(pmu_power_flags);
  2268. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */