smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrupts off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/device.h>
  23. #include <linux/dmapool.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/highmem.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/rtc.h>
  30. #include <linux/completion.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/delay.h>
  33. #include <linux/poll.h>
  34. #include <linux/mutex.h>
  35. #include <linux/of_device.h>
  36. #include <linux/of_irq.h>
  37. #include <linux/of_platform.h>
  38. #include <linux/slab.h>
  39. #include <linux/memblock.h>
  40. #include <asm/byteorder.h>
  41. #include <asm/io.h>
  42. #include <asm/prom.h>
  43. #include <asm/machdep.h>
  44. #include <asm/pmac_feature.h>
  45. #include <asm/smu.h>
  46. #include <asm/sections.h>
  47. #include <asm/uaccess.h>
  48. #define VERSION "0.7"
  49. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  50. #undef DEBUG_SMU
  51. #ifdef DEBUG_SMU
  52. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  53. #else
  54. #define DPRINTK(fmt, args...) do { } while (0)
  55. #endif
  56. /*
  57. * This is the command buffer passed to the SMU hardware
  58. */
  59. #define SMU_MAX_DATA 254
  60. struct smu_cmd_buf {
  61. u8 cmd;
  62. u8 length;
  63. u8 data[SMU_MAX_DATA];
  64. };
  65. struct smu_device {
  66. spinlock_t lock;
  67. struct device_node *of_node;
  68. struct platform_device *of_dev;
  69. int doorbell; /* doorbell gpio */
  70. u32 __iomem *db_buf; /* doorbell buffer */
  71. struct device_node *db_node;
  72. unsigned int db_irq;
  73. int msg;
  74. struct device_node *msg_node;
  75. unsigned int msg_irq;
  76. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  77. u32 cmd_buf_abs; /* command buffer absolute */
  78. struct list_head cmd_list;
  79. struct smu_cmd *cmd_cur; /* pending command */
  80. int broken_nap;
  81. struct list_head cmd_i2c_list;
  82. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  83. struct timer_list i2c_timer;
  84. };
  85. /*
  86. * I don't think there will ever be more than one SMU, so
  87. * for now, just hard code that
  88. */
  89. static DEFINE_MUTEX(smu_mutex);
  90. static struct smu_device *smu;
  91. static DEFINE_MUTEX(smu_part_access);
  92. static int smu_irq_inited;
  93. static unsigned long smu_cmdbuf_abs;
  94. static void smu_i2c_retry(unsigned long data);
  95. /*
  96. * SMU driver low level stuff
  97. */
  98. static void smu_start_cmd(void)
  99. {
  100. unsigned long faddr, fend;
  101. struct smu_cmd *cmd;
  102. if (list_empty(&smu->cmd_list))
  103. return;
  104. /* Fetch first command in queue */
  105. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  106. smu->cmd_cur = cmd;
  107. list_del(&cmd->link);
  108. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  109. cmd->data_len);
  110. DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
  111. /* Fill the SMU command buffer */
  112. smu->cmd_buf->cmd = cmd->cmd;
  113. smu->cmd_buf->length = cmd->data_len;
  114. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  115. /* Flush command and data to RAM */
  116. faddr = (unsigned long)smu->cmd_buf;
  117. fend = faddr + smu->cmd_buf->length + 2;
  118. flush_inval_dcache_range(faddr, fend);
  119. /* We also disable NAP mode for the duration of the command
  120. * on U3 based machines.
  121. * This is slightly racy as it can be written back to 1 by a sysctl
  122. * but that never happens in practice. There seem to be an issue with
  123. * U3 based machines such as the iMac G5 where napping for the
  124. * whole duration of the command prevents the SMU from fetching it
  125. * from memory. This might be related to the strange i2c based
  126. * mechanism the SMU uses to access memory.
  127. */
  128. if (smu->broken_nap)
  129. powersave_nap = 0;
  130. /* This isn't exactly a DMA mapping here, I suspect
  131. * the SMU is actually communicating with us via i2c to the
  132. * northbridge or the CPU to access RAM.
  133. */
  134. writel(smu->cmd_buf_abs, smu->db_buf);
  135. /* Ring the SMU doorbell */
  136. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  137. }
  138. static irqreturn_t smu_db_intr(int irq, void *arg)
  139. {
  140. unsigned long flags;
  141. struct smu_cmd *cmd;
  142. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  143. void *misc = NULL;
  144. u8 gpio;
  145. int rc = 0;
  146. /* SMU completed the command, well, we hope, let's make sure
  147. * of it
  148. */
  149. spin_lock_irqsave(&smu->lock, flags);
  150. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  151. if ((gpio & 7) != 7) {
  152. spin_unlock_irqrestore(&smu->lock, flags);
  153. return IRQ_HANDLED;
  154. }
  155. cmd = smu->cmd_cur;
  156. smu->cmd_cur = NULL;
  157. if (cmd == NULL)
  158. goto bail;
  159. if (rc == 0) {
  160. unsigned long faddr;
  161. int reply_len;
  162. u8 ack;
  163. /* CPU might have brought back the cache line, so we need
  164. * to flush again before peeking at the SMU response. We
  165. * flush the entire buffer for now as we haven't read the
  166. * reply length (it's only 2 cache lines anyway)
  167. */
  168. faddr = (unsigned long)smu->cmd_buf;
  169. flush_inval_dcache_range(faddr, faddr + 256);
  170. /* Now check ack */
  171. ack = (~cmd->cmd) & 0xff;
  172. if (ack != smu->cmd_buf->cmd) {
  173. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  174. ack, smu->cmd_buf->cmd);
  175. rc = -EIO;
  176. }
  177. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  178. DPRINTK("SMU: reply len: %d\n", reply_len);
  179. if (reply_len > cmd->reply_len) {
  180. printk(KERN_WARNING "SMU: reply buffer too small,"
  181. "got %d bytes for a %d bytes buffer\n",
  182. reply_len, cmd->reply_len);
  183. reply_len = cmd->reply_len;
  184. }
  185. cmd->reply_len = reply_len;
  186. if (cmd->reply_buf && reply_len)
  187. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  188. }
  189. /* Now complete the command. Write status last in order as we lost
  190. * ownership of the command structure as soon as it's no longer -1
  191. */
  192. done = cmd->done;
  193. misc = cmd->misc;
  194. mb();
  195. cmd->status = rc;
  196. /* Re-enable NAP mode */
  197. if (smu->broken_nap)
  198. powersave_nap = 1;
  199. bail:
  200. /* Start next command if any */
  201. smu_start_cmd();
  202. spin_unlock_irqrestore(&smu->lock, flags);
  203. /* Call command completion handler if any */
  204. if (done)
  205. done(cmd, misc);
  206. /* It's an edge interrupt, nothing to do */
  207. return IRQ_HANDLED;
  208. }
  209. static irqreturn_t smu_msg_intr(int irq, void *arg)
  210. {
  211. /* I don't quite know what to do with this one, we seem to never
  212. * receive it, so I suspect we have to arm it someway in the SMU
  213. * to start getting events that way.
  214. */
  215. printk(KERN_INFO "SMU: message interrupt !\n");
  216. /* It's an edge interrupt, nothing to do */
  217. return IRQ_HANDLED;
  218. }
  219. /*
  220. * Queued command management.
  221. *
  222. */
  223. int smu_queue_cmd(struct smu_cmd *cmd)
  224. {
  225. unsigned long flags;
  226. if (smu == NULL)
  227. return -ENODEV;
  228. if (cmd->data_len > SMU_MAX_DATA ||
  229. cmd->reply_len > SMU_MAX_DATA)
  230. return -EINVAL;
  231. cmd->status = 1;
  232. spin_lock_irqsave(&smu->lock, flags);
  233. list_add_tail(&cmd->link, &smu->cmd_list);
  234. if (smu->cmd_cur == NULL)
  235. smu_start_cmd();
  236. spin_unlock_irqrestore(&smu->lock, flags);
  237. /* Workaround for early calls when irq isn't available */
  238. if (!smu_irq_inited || !smu->db_irq)
  239. smu_spinwait_cmd(cmd);
  240. return 0;
  241. }
  242. EXPORT_SYMBOL(smu_queue_cmd);
  243. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  244. unsigned int data_len,
  245. void (*done)(struct smu_cmd *cmd, void *misc),
  246. void *misc, ...)
  247. {
  248. struct smu_cmd *cmd = &scmd->cmd;
  249. va_list list;
  250. int i;
  251. if (data_len > sizeof(scmd->buffer))
  252. return -EINVAL;
  253. memset(scmd, 0, sizeof(*scmd));
  254. cmd->cmd = command;
  255. cmd->data_len = data_len;
  256. cmd->data_buf = scmd->buffer;
  257. cmd->reply_len = sizeof(scmd->buffer);
  258. cmd->reply_buf = scmd->buffer;
  259. cmd->done = done;
  260. cmd->misc = misc;
  261. va_start(list, misc);
  262. for (i = 0; i < data_len; ++i)
  263. scmd->buffer[i] = (u8)va_arg(list, int);
  264. va_end(list);
  265. return smu_queue_cmd(cmd);
  266. }
  267. EXPORT_SYMBOL(smu_queue_simple);
  268. void smu_poll(void)
  269. {
  270. u8 gpio;
  271. if (smu == NULL)
  272. return;
  273. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  274. if ((gpio & 7) == 7)
  275. smu_db_intr(smu->db_irq, smu);
  276. }
  277. EXPORT_SYMBOL(smu_poll);
  278. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  279. {
  280. struct completion *comp = misc;
  281. complete(comp);
  282. }
  283. EXPORT_SYMBOL(smu_done_complete);
  284. void smu_spinwait_cmd(struct smu_cmd *cmd)
  285. {
  286. while(cmd->status == 1)
  287. smu_poll();
  288. }
  289. EXPORT_SYMBOL(smu_spinwait_cmd);
  290. /* RTC low level commands */
  291. static inline int bcd2hex (int n)
  292. {
  293. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  294. }
  295. static inline int hex2bcd (int n)
  296. {
  297. return ((n / 10) << 4) + (n % 10);
  298. }
  299. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  300. struct rtc_time *time)
  301. {
  302. cmd_buf->cmd = 0x8e;
  303. cmd_buf->length = 8;
  304. cmd_buf->data[0] = 0x80;
  305. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  306. cmd_buf->data[2] = hex2bcd(time->tm_min);
  307. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  308. cmd_buf->data[4] = time->tm_wday;
  309. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  310. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  311. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  312. }
  313. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  314. {
  315. struct smu_simple_cmd cmd;
  316. int rc;
  317. if (smu == NULL)
  318. return -ENODEV;
  319. memset(time, 0, sizeof(struct rtc_time));
  320. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  321. SMU_CMD_RTC_GET_DATETIME);
  322. if (rc)
  323. return rc;
  324. smu_spinwait_simple(&cmd);
  325. time->tm_sec = bcd2hex(cmd.buffer[0]);
  326. time->tm_min = bcd2hex(cmd.buffer[1]);
  327. time->tm_hour = bcd2hex(cmd.buffer[2]);
  328. time->tm_wday = bcd2hex(cmd.buffer[3]);
  329. time->tm_mday = bcd2hex(cmd.buffer[4]);
  330. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  331. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  332. return 0;
  333. }
  334. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  335. {
  336. struct smu_simple_cmd cmd;
  337. int rc;
  338. if (smu == NULL)
  339. return -ENODEV;
  340. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  341. SMU_CMD_RTC_SET_DATETIME,
  342. hex2bcd(time->tm_sec),
  343. hex2bcd(time->tm_min),
  344. hex2bcd(time->tm_hour),
  345. time->tm_wday,
  346. hex2bcd(time->tm_mday),
  347. hex2bcd(time->tm_mon) + 1,
  348. hex2bcd(time->tm_year - 100));
  349. if (rc)
  350. return rc;
  351. smu_spinwait_simple(&cmd);
  352. return 0;
  353. }
  354. void smu_shutdown(void)
  355. {
  356. struct smu_simple_cmd cmd;
  357. if (smu == NULL)
  358. return;
  359. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  360. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  361. return;
  362. smu_spinwait_simple(&cmd);
  363. for (;;)
  364. ;
  365. }
  366. void smu_restart(void)
  367. {
  368. struct smu_simple_cmd cmd;
  369. if (smu == NULL)
  370. return;
  371. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  372. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  373. return;
  374. smu_spinwait_simple(&cmd);
  375. for (;;)
  376. ;
  377. }
  378. int smu_present(void)
  379. {
  380. return smu != NULL;
  381. }
  382. EXPORT_SYMBOL(smu_present);
  383. int __init smu_init (void)
  384. {
  385. struct device_node *np;
  386. const u32 *data;
  387. int ret = 0;
  388. np = of_find_node_by_type(NULL, "smu");
  389. if (np == NULL)
  390. return -ENODEV;
  391. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  392. /*
  393. * SMU based G5s need some memory below 2Gb. Thankfully this is
  394. * called at a time where memblock is still available.
  395. */
  396. smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL);
  397. if (smu_cmdbuf_abs == 0) {
  398. printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
  399. ret = -EINVAL;
  400. goto fail_np;
  401. }
  402. smu = alloc_bootmem(sizeof(struct smu_device));
  403. spin_lock_init(&smu->lock);
  404. INIT_LIST_HEAD(&smu->cmd_list);
  405. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  406. smu->of_node = np;
  407. smu->db_irq = 0;
  408. smu->msg_irq = 0;
  409. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  410. * 32 bits value safely
  411. */
  412. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  413. smu->cmd_buf = __va(smu_cmdbuf_abs);
  414. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  415. if (smu->db_node == NULL) {
  416. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  417. ret = -ENXIO;
  418. goto fail_bootmem;
  419. }
  420. data = of_get_property(smu->db_node, "reg", NULL);
  421. if (data == NULL) {
  422. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  423. ret = -ENXIO;
  424. goto fail_db_node;
  425. }
  426. /* Current setup has one doorbell GPIO that does both doorbell
  427. * and ack. GPIOs are at 0x50, best would be to find that out
  428. * in the device-tree though.
  429. */
  430. smu->doorbell = *data;
  431. if (smu->doorbell < 0x50)
  432. smu->doorbell += 0x50;
  433. /* Now look for the smu-interrupt GPIO */
  434. do {
  435. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  436. if (smu->msg_node == NULL)
  437. break;
  438. data = of_get_property(smu->msg_node, "reg", NULL);
  439. if (data == NULL) {
  440. of_node_put(smu->msg_node);
  441. smu->msg_node = NULL;
  442. break;
  443. }
  444. smu->msg = *data;
  445. if (smu->msg < 0x50)
  446. smu->msg += 0x50;
  447. } while(0);
  448. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  449. * device-tree entry giving the address. Best would probably to use
  450. * an offset for K2 base though, but let's do it that way for now.
  451. */
  452. smu->db_buf = ioremap(0x8000860c, 0x1000);
  453. if (smu->db_buf == NULL) {
  454. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  455. ret = -ENXIO;
  456. goto fail_msg_node;
  457. }
  458. /* U3 has an issue with NAP mode when issuing SMU commands */
  459. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  460. if (smu->broken_nap)
  461. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  462. sys_ctrler = SYS_CTRLER_SMU;
  463. return 0;
  464. fail_msg_node:
  465. of_node_put(smu->msg_node);
  466. fail_db_node:
  467. of_node_put(smu->db_node);
  468. fail_bootmem:
  469. free_bootmem(__pa(smu), sizeof(struct smu_device));
  470. smu = NULL;
  471. fail_np:
  472. of_node_put(np);
  473. return ret;
  474. }
  475. static int smu_late_init(void)
  476. {
  477. if (!smu)
  478. return 0;
  479. init_timer(&smu->i2c_timer);
  480. smu->i2c_timer.function = smu_i2c_retry;
  481. smu->i2c_timer.data = (unsigned long)smu;
  482. if (smu->db_node) {
  483. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  484. if (!smu->db_irq)
  485. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  486. smu->db_node->full_name);
  487. }
  488. if (smu->msg_node) {
  489. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  490. if (!smu->msg_irq)
  491. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  492. smu->msg_node->full_name);
  493. }
  494. /*
  495. * Try to request the interrupts
  496. */
  497. if (smu->db_irq) {
  498. if (request_irq(smu->db_irq, smu_db_intr,
  499. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  500. printk(KERN_WARNING "SMU: can't "
  501. "request interrupt %d\n",
  502. smu->db_irq);
  503. smu->db_irq = 0;
  504. }
  505. }
  506. if (smu->msg_irq) {
  507. if (request_irq(smu->msg_irq, smu_msg_intr,
  508. IRQF_SHARED, "SMU message", smu) < 0) {
  509. printk(KERN_WARNING "SMU: can't "
  510. "request interrupt %d\n",
  511. smu->msg_irq);
  512. smu->msg_irq = 0;
  513. }
  514. }
  515. smu_irq_inited = 1;
  516. return 0;
  517. }
  518. /* This has to be before arch_initcall as the low i2c stuff relies on the
  519. * above having been done before we reach arch_initcalls
  520. */
  521. core_initcall(smu_late_init);
  522. /*
  523. * sysfs visibility
  524. */
  525. static void smu_expose_childs(struct work_struct *unused)
  526. {
  527. struct device_node *np;
  528. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  529. if (of_device_is_compatible(np, "smu-sensors"))
  530. of_platform_device_create(np, "smu-sensors",
  531. &smu->of_dev->dev);
  532. }
  533. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  534. static int smu_platform_probe(struct platform_device* dev)
  535. {
  536. if (!smu)
  537. return -ENODEV;
  538. smu->of_dev = dev;
  539. /*
  540. * Ok, we are matched, now expose all i2c busses. We have to defer
  541. * that unfortunately or it would deadlock inside the device model
  542. */
  543. schedule_work(&smu_expose_childs_work);
  544. return 0;
  545. }
  546. static const struct of_device_id smu_platform_match[] =
  547. {
  548. {
  549. .type = "smu",
  550. },
  551. {},
  552. };
  553. static struct platform_driver smu_of_platform_driver =
  554. {
  555. .driver = {
  556. .name = "smu",
  557. .of_match_table = smu_platform_match,
  558. },
  559. .probe = smu_platform_probe,
  560. };
  561. static int __init smu_init_sysfs(void)
  562. {
  563. /*
  564. * For now, we don't power manage machines with an SMU chip,
  565. * I'm a bit too far from figuring out how that works with those
  566. * new chipsets, but that will come back and bite us
  567. */
  568. platform_driver_register(&smu_of_platform_driver);
  569. return 0;
  570. }
  571. device_initcall(smu_init_sysfs);
  572. struct platform_device *smu_get_ofdev(void)
  573. {
  574. if (!smu)
  575. return NULL;
  576. return smu->of_dev;
  577. }
  578. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  579. /*
  580. * i2c interface
  581. */
  582. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  583. {
  584. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  585. void *misc = cmd->misc;
  586. unsigned long flags;
  587. /* Check for read case */
  588. if (!fail && cmd->read) {
  589. if (cmd->pdata[0] < 1)
  590. fail = 1;
  591. else
  592. memcpy(cmd->info.data, &cmd->pdata[1],
  593. cmd->info.datalen);
  594. }
  595. DPRINTK("SMU: completing, success: %d\n", !fail);
  596. /* Update status and mark no pending i2c command with lock
  597. * held so nobody comes in while we dequeue an eventual
  598. * pending next i2c command
  599. */
  600. spin_lock_irqsave(&smu->lock, flags);
  601. smu->cmd_i2c_cur = NULL;
  602. wmb();
  603. cmd->status = fail ? -EIO : 0;
  604. /* Is there another i2c command waiting ? */
  605. if (!list_empty(&smu->cmd_i2c_list)) {
  606. struct smu_i2c_cmd *newcmd;
  607. /* Fetch it, new current, remove from list */
  608. newcmd = list_entry(smu->cmd_i2c_list.next,
  609. struct smu_i2c_cmd, link);
  610. smu->cmd_i2c_cur = newcmd;
  611. list_del(&cmd->link);
  612. /* Queue with low level smu */
  613. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  614. if (smu->cmd_cur == NULL)
  615. smu_start_cmd();
  616. }
  617. spin_unlock_irqrestore(&smu->lock, flags);
  618. /* Call command completion handler if any */
  619. if (done)
  620. done(cmd, misc);
  621. }
  622. static void smu_i2c_retry(unsigned long data)
  623. {
  624. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  625. DPRINTK("SMU: i2c failure, requeuing...\n");
  626. /* requeue command simply by resetting reply_len */
  627. cmd->pdata[0] = 0xff;
  628. cmd->scmd.reply_len = sizeof(cmd->pdata);
  629. smu_queue_cmd(&cmd->scmd);
  630. }
  631. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  632. {
  633. struct smu_i2c_cmd *cmd = misc;
  634. int fail = 0;
  635. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  636. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  637. /* Check for possible status */
  638. if (scmd->status < 0)
  639. fail = 1;
  640. else if (cmd->read) {
  641. if (cmd->stage == 0)
  642. fail = cmd->pdata[0] != 0;
  643. else
  644. fail = cmd->pdata[0] >= 0x80;
  645. } else {
  646. fail = cmd->pdata[0] != 0;
  647. }
  648. /* Handle failures by requeuing command, after 5ms interval
  649. */
  650. if (fail && --cmd->retries > 0) {
  651. DPRINTK("SMU: i2c failure, starting timer...\n");
  652. BUG_ON(cmd != smu->cmd_i2c_cur);
  653. if (!smu_irq_inited) {
  654. mdelay(5);
  655. smu_i2c_retry(0);
  656. return;
  657. }
  658. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  659. return;
  660. }
  661. /* If failure or stage 1, command is complete */
  662. if (fail || cmd->stage != 0) {
  663. smu_i2c_complete_command(cmd, fail);
  664. return;
  665. }
  666. DPRINTK("SMU: going to stage 1\n");
  667. /* Ok, initial command complete, now poll status */
  668. scmd->reply_buf = cmd->pdata;
  669. scmd->reply_len = sizeof(cmd->pdata);
  670. scmd->data_buf = cmd->pdata;
  671. scmd->data_len = 1;
  672. cmd->pdata[0] = 0;
  673. cmd->stage = 1;
  674. cmd->retries = 20;
  675. smu_queue_cmd(scmd);
  676. }
  677. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  678. {
  679. unsigned long flags;
  680. if (smu == NULL)
  681. return -ENODEV;
  682. /* Fill most fields of scmd */
  683. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  684. cmd->scmd.done = smu_i2c_low_completion;
  685. cmd->scmd.misc = cmd;
  686. cmd->scmd.reply_buf = cmd->pdata;
  687. cmd->scmd.reply_len = sizeof(cmd->pdata);
  688. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  689. cmd->scmd.status = 1;
  690. cmd->stage = 0;
  691. cmd->pdata[0] = 0xff;
  692. cmd->retries = 20;
  693. cmd->status = 1;
  694. /* Check transfer type, sanitize some "info" fields
  695. * based on transfer type and do more checking
  696. */
  697. cmd->info.caddr = cmd->info.devaddr;
  698. cmd->read = cmd->info.devaddr & 0x01;
  699. switch(cmd->info.type) {
  700. case SMU_I2C_TRANSFER_SIMPLE:
  701. memset(&cmd->info.sublen, 0, 4);
  702. break;
  703. case SMU_I2C_TRANSFER_COMBINED:
  704. cmd->info.devaddr &= 0xfe;
  705. case SMU_I2C_TRANSFER_STDSUB:
  706. if (cmd->info.sublen > 3)
  707. return -EINVAL;
  708. break;
  709. default:
  710. return -EINVAL;
  711. }
  712. /* Finish setting up command based on transfer direction
  713. */
  714. if (cmd->read) {
  715. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  716. return -EINVAL;
  717. memset(cmd->info.data, 0xff, cmd->info.datalen);
  718. cmd->scmd.data_len = 9;
  719. } else {
  720. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  721. return -EINVAL;
  722. cmd->scmd.data_len = 9 + cmd->info.datalen;
  723. }
  724. DPRINTK("SMU: i2c enqueuing command\n");
  725. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  726. cmd->read ? "read" : "write", cmd->info.datalen,
  727. cmd->info.bus, cmd->info.caddr,
  728. cmd->info.subaddr[0], cmd->info.type);
  729. /* Enqueue command in i2c list, and if empty, enqueue also in
  730. * main command list
  731. */
  732. spin_lock_irqsave(&smu->lock, flags);
  733. if (smu->cmd_i2c_cur == NULL) {
  734. smu->cmd_i2c_cur = cmd;
  735. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  736. if (smu->cmd_cur == NULL)
  737. smu_start_cmd();
  738. } else
  739. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  740. spin_unlock_irqrestore(&smu->lock, flags);
  741. return 0;
  742. }
  743. /*
  744. * Handling of "partitions"
  745. */
  746. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  747. {
  748. DECLARE_COMPLETION_ONSTACK(comp);
  749. unsigned int chunk;
  750. struct smu_cmd cmd;
  751. int rc;
  752. u8 params[8];
  753. /* We currently use a chunk size of 0xe. We could check the
  754. * SMU firmware version and use bigger sizes though
  755. */
  756. chunk = 0xe;
  757. while (len) {
  758. unsigned int clen = min(len, chunk);
  759. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  760. cmd.data_len = 7;
  761. cmd.data_buf = params;
  762. cmd.reply_len = chunk;
  763. cmd.reply_buf = dest;
  764. cmd.done = smu_done_complete;
  765. cmd.misc = &comp;
  766. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  767. params[1] = 0x4;
  768. *((u32 *)&params[2]) = addr;
  769. params[6] = clen;
  770. rc = smu_queue_cmd(&cmd);
  771. if (rc)
  772. return rc;
  773. wait_for_completion(&comp);
  774. if (cmd.status != 0)
  775. return rc;
  776. if (cmd.reply_len != clen) {
  777. printk(KERN_DEBUG "SMU: short read in "
  778. "smu_read_datablock, got: %d, want: %d\n",
  779. cmd.reply_len, clen);
  780. return -EIO;
  781. }
  782. len -= clen;
  783. addr += clen;
  784. dest += clen;
  785. }
  786. return 0;
  787. }
  788. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  789. {
  790. DECLARE_COMPLETION_ONSTACK(comp);
  791. struct smu_simple_cmd cmd;
  792. unsigned int addr, len, tlen;
  793. struct smu_sdbp_header *hdr;
  794. struct property *prop;
  795. /* First query the partition info */
  796. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  797. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  798. smu_done_complete, &comp,
  799. SMU_CMD_PARTITION_LATEST, id);
  800. wait_for_completion(&comp);
  801. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  802. cmd.cmd.status, cmd.cmd.reply_len);
  803. /* Partition doesn't exist (or other error) */
  804. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  805. return NULL;
  806. /* Fetch address and length from reply */
  807. addr = *((u16 *)cmd.buffer);
  808. len = cmd.buffer[3] << 2;
  809. /* Calucluate total length to allocate, including the 17 bytes
  810. * for "sdb-partition-XX" that we append at the end of the buffer
  811. */
  812. tlen = sizeof(struct property) + len + 18;
  813. prop = kzalloc(tlen, GFP_KERNEL);
  814. if (prop == NULL)
  815. return NULL;
  816. hdr = (struct smu_sdbp_header *)(prop + 1);
  817. prop->name = ((char *)prop) + tlen - 18;
  818. sprintf(prop->name, "sdb-partition-%02x", id);
  819. prop->length = len;
  820. prop->value = hdr;
  821. prop->next = NULL;
  822. /* Read the datablock */
  823. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  824. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  825. "partition %02x !\n", id);
  826. goto failure;
  827. }
  828. /* Got it, check a few things and create the property */
  829. if (hdr->id != id) {
  830. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  831. "%02x !\n", id, hdr->id);
  832. goto failure;
  833. }
  834. if (of_add_property(smu->of_node, prop)) {
  835. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  836. "property !\n", id);
  837. goto failure;
  838. }
  839. return hdr;
  840. failure:
  841. kfree(prop);
  842. return NULL;
  843. }
  844. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  845. * when interruptible is 1
  846. */
  847. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  848. unsigned int *size, int interruptible)
  849. {
  850. char pname[32];
  851. const struct smu_sdbp_header *part;
  852. if (!smu)
  853. return NULL;
  854. sprintf(pname, "sdb-partition-%02x", id);
  855. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  856. if (interruptible) {
  857. int rc;
  858. rc = mutex_lock_interruptible(&smu_part_access);
  859. if (rc)
  860. return ERR_PTR(rc);
  861. } else
  862. mutex_lock(&smu_part_access);
  863. part = of_get_property(smu->of_node, pname, size);
  864. if (part == NULL) {
  865. DPRINTK("trying to extract from SMU ...\n");
  866. part = smu_create_sdb_partition(id);
  867. if (part != NULL && size)
  868. *size = part->len << 2;
  869. }
  870. mutex_unlock(&smu_part_access);
  871. return part;
  872. }
  873. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  874. {
  875. return __smu_get_sdb_partition(id, size, 0);
  876. }
  877. EXPORT_SYMBOL(smu_get_sdb_partition);
  878. /*
  879. * Userland driver interface
  880. */
  881. static LIST_HEAD(smu_clist);
  882. static DEFINE_SPINLOCK(smu_clist_lock);
  883. enum smu_file_mode {
  884. smu_file_commands,
  885. smu_file_events,
  886. smu_file_closing
  887. };
  888. struct smu_private
  889. {
  890. struct list_head list;
  891. enum smu_file_mode mode;
  892. int busy;
  893. struct smu_cmd cmd;
  894. spinlock_t lock;
  895. wait_queue_head_t wait;
  896. u8 buffer[SMU_MAX_DATA];
  897. };
  898. static int smu_open(struct inode *inode, struct file *file)
  899. {
  900. struct smu_private *pp;
  901. unsigned long flags;
  902. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  903. if (pp == 0)
  904. return -ENOMEM;
  905. spin_lock_init(&pp->lock);
  906. pp->mode = smu_file_commands;
  907. init_waitqueue_head(&pp->wait);
  908. mutex_lock(&smu_mutex);
  909. spin_lock_irqsave(&smu_clist_lock, flags);
  910. list_add(&pp->list, &smu_clist);
  911. spin_unlock_irqrestore(&smu_clist_lock, flags);
  912. file->private_data = pp;
  913. mutex_unlock(&smu_mutex);
  914. return 0;
  915. }
  916. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  917. {
  918. struct smu_private *pp = misc;
  919. wake_up_all(&pp->wait);
  920. }
  921. static ssize_t smu_write(struct file *file, const char __user *buf,
  922. size_t count, loff_t *ppos)
  923. {
  924. struct smu_private *pp = file->private_data;
  925. unsigned long flags;
  926. struct smu_user_cmd_hdr hdr;
  927. int rc = 0;
  928. if (pp->busy)
  929. return -EBUSY;
  930. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  931. return -EFAULT;
  932. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  933. pp->mode = smu_file_events;
  934. return 0;
  935. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  936. const struct smu_sdbp_header *part;
  937. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  938. if (part == NULL)
  939. return -EINVAL;
  940. else if (IS_ERR(part))
  941. return PTR_ERR(part);
  942. return 0;
  943. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  944. return -EINVAL;
  945. else if (pp->mode != smu_file_commands)
  946. return -EBADFD;
  947. else if (hdr.data_len > SMU_MAX_DATA)
  948. return -EINVAL;
  949. spin_lock_irqsave(&pp->lock, flags);
  950. if (pp->busy) {
  951. spin_unlock_irqrestore(&pp->lock, flags);
  952. return -EBUSY;
  953. }
  954. pp->busy = 1;
  955. pp->cmd.status = 1;
  956. spin_unlock_irqrestore(&pp->lock, flags);
  957. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  958. pp->busy = 0;
  959. return -EFAULT;
  960. }
  961. pp->cmd.cmd = hdr.cmd;
  962. pp->cmd.data_len = hdr.data_len;
  963. pp->cmd.reply_len = SMU_MAX_DATA;
  964. pp->cmd.data_buf = pp->buffer;
  965. pp->cmd.reply_buf = pp->buffer;
  966. pp->cmd.done = smu_user_cmd_done;
  967. pp->cmd.misc = pp;
  968. rc = smu_queue_cmd(&pp->cmd);
  969. if (rc < 0)
  970. return rc;
  971. return count;
  972. }
  973. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  974. char __user *buf, size_t count)
  975. {
  976. DECLARE_WAITQUEUE(wait, current);
  977. struct smu_user_reply_hdr hdr;
  978. unsigned long flags;
  979. int size, rc = 0;
  980. if (!pp->busy)
  981. return 0;
  982. if (count < sizeof(struct smu_user_reply_hdr))
  983. return -EOVERFLOW;
  984. spin_lock_irqsave(&pp->lock, flags);
  985. if (pp->cmd.status == 1) {
  986. if (file->f_flags & O_NONBLOCK) {
  987. spin_unlock_irqrestore(&pp->lock, flags);
  988. return -EAGAIN;
  989. }
  990. add_wait_queue(&pp->wait, &wait);
  991. for (;;) {
  992. set_current_state(TASK_INTERRUPTIBLE);
  993. rc = 0;
  994. if (pp->cmd.status != 1)
  995. break;
  996. rc = -ERESTARTSYS;
  997. if (signal_pending(current))
  998. break;
  999. spin_unlock_irqrestore(&pp->lock, flags);
  1000. schedule();
  1001. spin_lock_irqsave(&pp->lock, flags);
  1002. }
  1003. set_current_state(TASK_RUNNING);
  1004. remove_wait_queue(&pp->wait, &wait);
  1005. }
  1006. spin_unlock_irqrestore(&pp->lock, flags);
  1007. if (rc)
  1008. return rc;
  1009. if (pp->cmd.status != 0)
  1010. pp->cmd.reply_len = 0;
  1011. size = sizeof(hdr) + pp->cmd.reply_len;
  1012. if (count < size)
  1013. size = count;
  1014. rc = size;
  1015. hdr.status = pp->cmd.status;
  1016. hdr.reply_len = pp->cmd.reply_len;
  1017. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1018. return -EFAULT;
  1019. size -= sizeof(hdr);
  1020. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1021. return -EFAULT;
  1022. pp->busy = 0;
  1023. return rc;
  1024. }
  1025. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1026. char __user *buf, size_t count)
  1027. {
  1028. /* Not implemented */
  1029. msleep_interruptible(1000);
  1030. return 0;
  1031. }
  1032. static ssize_t smu_read(struct file *file, char __user *buf,
  1033. size_t count, loff_t *ppos)
  1034. {
  1035. struct smu_private *pp = file->private_data;
  1036. if (pp->mode == smu_file_commands)
  1037. return smu_read_command(file, pp, buf, count);
  1038. if (pp->mode == smu_file_events)
  1039. return smu_read_events(file, pp, buf, count);
  1040. return -EBADFD;
  1041. }
  1042. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1043. {
  1044. struct smu_private *pp = file->private_data;
  1045. unsigned int mask = 0;
  1046. unsigned long flags;
  1047. if (pp == 0)
  1048. return 0;
  1049. if (pp->mode == smu_file_commands) {
  1050. poll_wait(file, &pp->wait, wait);
  1051. spin_lock_irqsave(&pp->lock, flags);
  1052. if (pp->busy && pp->cmd.status != 1)
  1053. mask |= POLLIN;
  1054. spin_unlock_irqrestore(&pp->lock, flags);
  1055. }
  1056. if (pp->mode == smu_file_events) {
  1057. /* Not yet implemented */
  1058. }
  1059. return mask;
  1060. }
  1061. static int smu_release(struct inode *inode, struct file *file)
  1062. {
  1063. struct smu_private *pp = file->private_data;
  1064. unsigned long flags;
  1065. unsigned int busy;
  1066. if (pp == 0)
  1067. return 0;
  1068. file->private_data = NULL;
  1069. /* Mark file as closing to avoid races with new request */
  1070. spin_lock_irqsave(&pp->lock, flags);
  1071. pp->mode = smu_file_closing;
  1072. busy = pp->busy;
  1073. /* Wait for any pending request to complete */
  1074. if (busy && pp->cmd.status == 1) {
  1075. DECLARE_WAITQUEUE(wait, current);
  1076. add_wait_queue(&pp->wait, &wait);
  1077. for (;;) {
  1078. set_current_state(TASK_UNINTERRUPTIBLE);
  1079. if (pp->cmd.status != 1)
  1080. break;
  1081. spin_unlock_irqrestore(&pp->lock, flags);
  1082. schedule();
  1083. spin_lock_irqsave(&pp->lock, flags);
  1084. }
  1085. set_current_state(TASK_RUNNING);
  1086. remove_wait_queue(&pp->wait, &wait);
  1087. }
  1088. spin_unlock_irqrestore(&pp->lock, flags);
  1089. spin_lock_irqsave(&smu_clist_lock, flags);
  1090. list_del(&pp->list);
  1091. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1092. kfree(pp);
  1093. return 0;
  1094. }
  1095. static const struct file_operations smu_device_fops = {
  1096. .llseek = no_llseek,
  1097. .read = smu_read,
  1098. .write = smu_write,
  1099. .poll = smu_fpoll,
  1100. .open = smu_open,
  1101. .release = smu_release,
  1102. };
  1103. static struct miscdevice pmu_device = {
  1104. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1105. };
  1106. static int smu_device_init(void)
  1107. {
  1108. if (!smu)
  1109. return -ENODEV;
  1110. if (misc_register(&pmu_device) < 0)
  1111. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1112. return 0;
  1113. }
  1114. device_initcall(smu_device_init);