omap_ssi_core.c 18 KB

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  1. /* OMAP SSI driver.
  2. *
  3. * Copyright (C) 2010 Nokia Corporation. All rights reserved.
  4. * Copyright (C) 2014 Sebastian Reichel <sre@kernel.org>
  5. *
  6. * Contact: Carlos Chinea <carlos.chinea@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. */
  22. #include <linux/compiler.h>
  23. #include <linux/err.h>
  24. #include <linux/ioport.h>
  25. #include <linux/io.h>
  26. #include <linux/clk.h>
  27. #include <linux/device.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/dma-mapping.h>
  30. #include <linux/dmaengine.h>
  31. #include <linux/delay.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/scatterlist.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/debugfs.h>
  37. #include <linux/pinctrl/consumer.h>
  38. #include <linux/pm_runtime.h>
  39. #include <linux/of_platform.h>
  40. #include <linux/hsi/hsi.h>
  41. #include <linux/idr.h>
  42. #include "omap_ssi_regs.h"
  43. #include "omap_ssi.h"
  44. /* For automatically allocated device IDs */
  45. static DEFINE_IDA(platform_omap_ssi_ida);
  46. #ifdef CONFIG_DEBUG_FS
  47. static int ssi_debug_show(struct seq_file *m, void *p __maybe_unused)
  48. {
  49. struct hsi_controller *ssi = m->private;
  50. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  51. void __iomem *sys = omap_ssi->sys;
  52. pm_runtime_get_sync(ssi->device.parent);
  53. seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG));
  54. seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG));
  55. seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG));
  56. pm_runtime_put(ssi->device.parent);
  57. return 0;
  58. }
  59. static int ssi_debug_gdd_show(struct seq_file *m, void *p __maybe_unused)
  60. {
  61. struct hsi_controller *ssi = m->private;
  62. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  63. void __iomem *gdd = omap_ssi->gdd;
  64. void __iomem *sys = omap_ssi->sys;
  65. int lch;
  66. pm_runtime_get_sync(ssi->device.parent);
  67. seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n",
  68. readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG));
  69. seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n",
  70. readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG));
  71. seq_printf(m, "HW_ID\t\t: 0x%08x\n",
  72. readl(gdd + SSI_GDD_HW_ID_REG));
  73. seq_printf(m, "PPORT_ID\t: 0x%08x\n",
  74. readl(gdd + SSI_GDD_PPORT_ID_REG));
  75. seq_printf(m, "MPORT_ID\t: 0x%08x\n",
  76. readl(gdd + SSI_GDD_MPORT_ID_REG));
  77. seq_printf(m, "TEST\t\t: 0x%08x\n",
  78. readl(gdd + SSI_GDD_TEST_REG));
  79. seq_printf(m, "GCR\t\t: 0x%08x\n",
  80. readl(gdd + SSI_GDD_GCR_REG));
  81. for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
  82. seq_printf(m, "\nGDD LCH %d\n=========\n", lch);
  83. seq_printf(m, "CSDP\t\t: 0x%04x\n",
  84. readw(gdd + SSI_GDD_CSDP_REG(lch)));
  85. seq_printf(m, "CCR\t\t: 0x%04x\n",
  86. readw(gdd + SSI_GDD_CCR_REG(lch)));
  87. seq_printf(m, "CICR\t\t: 0x%04x\n",
  88. readw(gdd + SSI_GDD_CICR_REG(lch)));
  89. seq_printf(m, "CSR\t\t: 0x%04x\n",
  90. readw(gdd + SSI_GDD_CSR_REG(lch)));
  91. seq_printf(m, "CSSA\t\t: 0x%08x\n",
  92. readl(gdd + SSI_GDD_CSSA_REG(lch)));
  93. seq_printf(m, "CDSA\t\t: 0x%08x\n",
  94. readl(gdd + SSI_GDD_CDSA_REG(lch)));
  95. seq_printf(m, "CEN\t\t: 0x%04x\n",
  96. readw(gdd + SSI_GDD_CEN_REG(lch)));
  97. seq_printf(m, "CSAC\t\t: 0x%04x\n",
  98. readw(gdd + SSI_GDD_CSAC_REG(lch)));
  99. seq_printf(m, "CDAC\t\t: 0x%04x\n",
  100. readw(gdd + SSI_GDD_CDAC_REG(lch)));
  101. seq_printf(m, "CLNK_CTRL\t: 0x%04x\n",
  102. readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch)));
  103. }
  104. pm_runtime_put(ssi->device.parent);
  105. return 0;
  106. }
  107. static int ssi_regs_open(struct inode *inode, struct file *file)
  108. {
  109. return single_open(file, ssi_debug_show, inode->i_private);
  110. }
  111. static int ssi_gdd_regs_open(struct inode *inode, struct file *file)
  112. {
  113. return single_open(file, ssi_debug_gdd_show, inode->i_private);
  114. }
  115. static const struct file_operations ssi_regs_fops = {
  116. .open = ssi_regs_open,
  117. .read = seq_read,
  118. .llseek = seq_lseek,
  119. .release = single_release,
  120. };
  121. static const struct file_operations ssi_gdd_regs_fops = {
  122. .open = ssi_gdd_regs_open,
  123. .read = seq_read,
  124. .llseek = seq_lseek,
  125. .release = single_release,
  126. };
  127. static int ssi_debug_add_ctrl(struct hsi_controller *ssi)
  128. {
  129. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  130. struct dentry *dir;
  131. /* SSI controller */
  132. omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL);
  133. if (!omap_ssi->dir)
  134. return -ENOMEM;
  135. debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi,
  136. &ssi_regs_fops);
  137. /* SSI GDD (DMA) */
  138. dir = debugfs_create_dir("gdd", omap_ssi->dir);
  139. if (!dir)
  140. goto rback;
  141. debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops);
  142. return 0;
  143. rback:
  144. debugfs_remove_recursive(omap_ssi->dir);
  145. return -ENOMEM;
  146. }
  147. static void ssi_debug_remove_ctrl(struct hsi_controller *ssi)
  148. {
  149. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  150. debugfs_remove_recursive(omap_ssi->dir);
  151. }
  152. #endif /* CONFIG_DEBUG_FS */
  153. /*
  154. * FIXME: Horrible HACK needed until we remove the useless wakeline test
  155. * in the CMT. To be removed !!!!
  156. */
  157. void ssi_waketest(struct hsi_client *cl, unsigned int enable)
  158. {
  159. struct hsi_port *port = hsi_get_port(cl);
  160. struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
  161. struct hsi_controller *ssi = to_hsi_controller(port->device.parent);
  162. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  163. omap_port->wktest = !!enable;
  164. if (omap_port->wktest) {
  165. pm_runtime_get_sync(ssi->device.parent);
  166. writel_relaxed(SSI_WAKE(0),
  167. omap_ssi->sys + SSI_SET_WAKE_REG(port->num));
  168. } else {
  169. writel_relaxed(SSI_WAKE(0),
  170. omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num));
  171. pm_runtime_put(ssi->device.parent);
  172. }
  173. }
  174. EXPORT_SYMBOL_GPL(ssi_waketest);
  175. static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch)
  176. {
  177. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  178. struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg;
  179. struct hsi_port *port = to_hsi_port(msg->cl->device.parent);
  180. struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
  181. unsigned int dir;
  182. u32 csr;
  183. u32 val;
  184. spin_lock(&omap_ssi->lock);
  185. val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
  186. val &= ~SSI_GDD_LCH(lch);
  187. writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
  188. if (msg->ttype == HSI_MSG_READ) {
  189. dir = DMA_FROM_DEVICE;
  190. val = SSI_DATAAVAILABLE(msg->channel);
  191. pm_runtime_put(omap_port->pdev);
  192. } else {
  193. dir = DMA_TO_DEVICE;
  194. val = SSI_DATAACCEPT(msg->channel);
  195. /* Keep clocks reference for write pio event */
  196. }
  197. dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir);
  198. csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch));
  199. omap_ssi->gdd_trn[lch].msg = NULL; /* release GDD lch */
  200. dev_dbg(&port->device, "DMA completed ch %d ttype %d\n",
  201. msg->channel, msg->ttype);
  202. spin_unlock(&omap_ssi->lock);
  203. if (csr & SSI_CSR_TOUR) { /* Timeout error */
  204. msg->status = HSI_STATUS_ERROR;
  205. msg->actual_len = 0;
  206. spin_lock(&omap_port->lock);
  207. list_del(&msg->link); /* Dequeue msg */
  208. spin_unlock(&omap_port->lock);
  209. list_add_tail(&msg->link, &omap_port->errqueue);
  210. schedule_delayed_work(&omap_port->errqueue_work, 0);
  211. return;
  212. }
  213. spin_lock(&omap_port->lock);
  214. val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
  215. writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
  216. spin_unlock(&omap_port->lock);
  217. msg->status = HSI_STATUS_COMPLETED;
  218. msg->actual_len = sg_dma_len(msg->sgt.sgl);
  219. }
  220. static void ssi_gdd_tasklet(unsigned long dev)
  221. {
  222. struct hsi_controller *ssi = (struct hsi_controller *)dev;
  223. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  224. void __iomem *sys = omap_ssi->sys;
  225. unsigned int lch;
  226. u32 status_reg;
  227. pm_runtime_get(ssi->device.parent);
  228. if (!pm_runtime_active(ssi->device.parent)) {
  229. dev_warn(ssi->device.parent, "ssi_gdd_tasklet called without runtime PM!\n");
  230. pm_runtime_put(ssi->device.parent);
  231. return;
  232. }
  233. status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
  234. for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
  235. if (status_reg & SSI_GDD_LCH(lch))
  236. ssi_gdd_complete(ssi, lch);
  237. }
  238. writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG);
  239. status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
  240. pm_runtime_put(ssi->device.parent);
  241. if (status_reg)
  242. tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
  243. else
  244. enable_irq(omap_ssi->gdd_irq);
  245. }
  246. static irqreturn_t ssi_gdd_isr(int irq, void *ssi)
  247. {
  248. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  249. tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
  250. disable_irq_nosync(irq);
  251. return IRQ_HANDLED;
  252. }
  253. static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi)
  254. {
  255. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  256. unsigned long rate = clk_get_rate(omap_ssi->fck);
  257. return rate;
  258. }
  259. static int ssi_clk_event(struct notifier_block *nb, unsigned long event,
  260. void *data)
  261. {
  262. struct omap_ssi_controller *omap_ssi = container_of(nb,
  263. struct omap_ssi_controller, fck_nb);
  264. struct hsi_controller *ssi = to_hsi_controller(omap_ssi->dev);
  265. struct clk_notifier_data *clk_data = data;
  266. struct omap_ssi_port *omap_port;
  267. int i;
  268. switch (event) {
  269. case PRE_RATE_CHANGE:
  270. dev_dbg(&ssi->device, "pre rate change\n");
  271. for (i = 0; i < ssi->num_ports; i++) {
  272. omap_port = omap_ssi->port[i];
  273. if (!omap_port)
  274. continue;
  275. /* Workaround for SWBREAK + CAwake down race in CMT */
  276. disable_irq(omap_port->wake_irq);
  277. /* stop all ssi communication */
  278. pinctrl_pm_select_idle_state(omap_port->pdev);
  279. udelay(1); /* wait for racing frames */
  280. }
  281. break;
  282. case ABORT_RATE_CHANGE:
  283. dev_dbg(&ssi->device, "abort rate change\n");
  284. /* Fall through */
  285. case POST_RATE_CHANGE:
  286. dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n",
  287. clk_data->old_rate, clk_data->new_rate);
  288. omap_ssi->fck_rate = DIV_ROUND_CLOSEST(clk_data->new_rate, 1000); /* KHz */
  289. for (i = 0; i < ssi->num_ports; i++) {
  290. omap_port = omap_ssi->port[i];
  291. if (!omap_port)
  292. continue;
  293. omap_ssi_port_update_fclk(ssi, omap_port);
  294. /* resume ssi communication */
  295. pinctrl_pm_select_default_state(omap_port->pdev);
  296. enable_irq(omap_port->wake_irq);
  297. }
  298. break;
  299. default:
  300. break;
  301. }
  302. return NOTIFY_DONE;
  303. }
  304. static int ssi_get_iomem(struct platform_device *pd,
  305. const char *name, void __iomem **pbase, dma_addr_t *phy)
  306. {
  307. struct resource *mem;
  308. void __iomem *base;
  309. struct hsi_controller *ssi = platform_get_drvdata(pd);
  310. mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name);
  311. base = devm_ioremap_resource(&ssi->device, mem);
  312. if (IS_ERR(base))
  313. return PTR_ERR(base);
  314. *pbase = base;
  315. if (phy)
  316. *phy = mem->start;
  317. return 0;
  318. }
  319. static int ssi_add_controller(struct hsi_controller *ssi,
  320. struct platform_device *pd)
  321. {
  322. struct omap_ssi_controller *omap_ssi;
  323. int err;
  324. omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL);
  325. if (!omap_ssi) {
  326. dev_err(&pd->dev, "not enough memory for omap ssi\n");
  327. return -ENOMEM;
  328. }
  329. err = ida_simple_get(&platform_omap_ssi_ida, 0, 0, GFP_KERNEL);
  330. if (err < 0)
  331. goto out_err;
  332. ssi->id = err;
  333. ssi->owner = THIS_MODULE;
  334. ssi->device.parent = &pd->dev;
  335. dev_set_name(&ssi->device, "ssi%d", ssi->id);
  336. hsi_controller_set_drvdata(ssi, omap_ssi);
  337. omap_ssi->dev = &ssi->device;
  338. err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL);
  339. if (err < 0)
  340. goto out_err;
  341. err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL);
  342. if (err < 0)
  343. goto out_err;
  344. err = platform_get_irq_byname(pd, "gdd_mpu");
  345. if (err < 0) {
  346. dev_err(&pd->dev, "GDD IRQ resource missing\n");
  347. goto out_err;
  348. }
  349. omap_ssi->gdd_irq = err;
  350. tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet,
  351. (unsigned long)ssi);
  352. err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr,
  353. 0, "gdd_mpu", ssi);
  354. if (err < 0) {
  355. dev_err(&ssi->device, "Request GDD IRQ %d failed (%d)",
  356. omap_ssi->gdd_irq, err);
  357. goto out_err;
  358. }
  359. omap_ssi->port = devm_kzalloc(&ssi->device,
  360. sizeof(struct omap_ssi_port *) * ssi->num_ports, GFP_KERNEL);
  361. if (!omap_ssi->port) {
  362. err = -ENOMEM;
  363. goto out_err;
  364. }
  365. omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck");
  366. if (IS_ERR(omap_ssi->fck)) {
  367. dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n",
  368. PTR_ERR(omap_ssi->fck));
  369. err = -ENODEV;
  370. goto out_err;
  371. }
  372. omap_ssi->fck_nb.notifier_call = ssi_clk_event;
  373. omap_ssi->fck_nb.priority = INT_MAX;
  374. clk_notifier_register(omap_ssi->fck, &omap_ssi->fck_nb);
  375. /* TODO: find register, which can be used to detect context loss */
  376. omap_ssi->get_loss = NULL;
  377. omap_ssi->max_speed = UINT_MAX;
  378. spin_lock_init(&omap_ssi->lock);
  379. err = hsi_register_controller(ssi);
  380. if (err < 0)
  381. goto out_err;
  382. return 0;
  383. out_err:
  384. ida_simple_remove(&platform_omap_ssi_ida, ssi->id);
  385. return err;
  386. }
  387. static int ssi_hw_init(struct hsi_controller *ssi)
  388. {
  389. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  390. int err;
  391. err = pm_runtime_get_sync(ssi->device.parent);
  392. if (err < 0) {
  393. dev_err(&ssi->device, "runtime PM failed %d\n", err);
  394. return err;
  395. }
  396. /* Reseting GDD */
  397. writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
  398. /* Get FCK rate in KHz */
  399. omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
  400. dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate);
  401. writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
  402. omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
  403. pm_runtime_put_sync(ssi->device.parent);
  404. return 0;
  405. }
  406. static void ssi_remove_controller(struct hsi_controller *ssi)
  407. {
  408. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  409. int id = ssi->id;
  410. tasklet_kill(&omap_ssi->gdd_tasklet);
  411. hsi_unregister_controller(ssi);
  412. clk_notifier_unregister(omap_ssi->fck, &omap_ssi->fck_nb);
  413. ida_simple_remove(&platform_omap_ssi_ida, id);
  414. }
  415. static inline int ssi_of_get_available_ports_count(const struct device_node *np)
  416. {
  417. struct device_node *child;
  418. int num = 0;
  419. for_each_available_child_of_node(np, child)
  420. if (of_device_is_compatible(child, "ti,omap3-ssi-port"))
  421. num++;
  422. return num;
  423. }
  424. static int ssi_remove_ports(struct device *dev, void *c)
  425. {
  426. struct platform_device *pdev = to_platform_device(dev);
  427. if (!dev->of_node)
  428. return 0;
  429. of_node_clear_flag(dev->of_node, OF_POPULATED);
  430. of_device_unregister(pdev);
  431. return 0;
  432. }
  433. static int ssi_probe(struct platform_device *pd)
  434. {
  435. struct platform_device *childpdev;
  436. struct device_node *np = pd->dev.of_node;
  437. struct device_node *child;
  438. struct hsi_controller *ssi;
  439. int err;
  440. int num_ports;
  441. if (!np) {
  442. dev_err(&pd->dev, "missing device tree data\n");
  443. return -EINVAL;
  444. }
  445. num_ports = ssi_of_get_available_ports_count(np);
  446. ssi = hsi_alloc_controller(num_ports, GFP_KERNEL);
  447. if (!ssi) {
  448. dev_err(&pd->dev, "No memory for controller\n");
  449. return -ENOMEM;
  450. }
  451. platform_set_drvdata(pd, ssi);
  452. err = ssi_add_controller(ssi, pd);
  453. if (err < 0)
  454. goto out1;
  455. pm_runtime_enable(&pd->dev);
  456. err = ssi_hw_init(ssi);
  457. if (err < 0)
  458. goto out2;
  459. #ifdef CONFIG_DEBUG_FS
  460. err = ssi_debug_add_ctrl(ssi);
  461. if (err < 0)
  462. goto out2;
  463. #endif
  464. for_each_available_child_of_node(np, child) {
  465. if (!of_device_is_compatible(child, "ti,omap3-ssi-port"))
  466. continue;
  467. childpdev = of_platform_device_create(child, NULL, &pd->dev);
  468. if (!childpdev) {
  469. err = -ENODEV;
  470. dev_err(&pd->dev, "failed to create ssi controller port\n");
  471. goto out3;
  472. }
  473. }
  474. dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n",
  475. ssi->id, num_ports);
  476. return err;
  477. out3:
  478. device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
  479. out2:
  480. ssi_remove_controller(ssi);
  481. out1:
  482. platform_set_drvdata(pd, NULL);
  483. pm_runtime_disable(&pd->dev);
  484. return err;
  485. }
  486. static int ssi_remove(struct platform_device *pd)
  487. {
  488. struct hsi_controller *ssi = platform_get_drvdata(pd);
  489. /* cleanup of of_platform_populate() call */
  490. device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
  491. #ifdef CONFIG_DEBUG_FS
  492. ssi_debug_remove_ctrl(ssi);
  493. #endif
  494. ssi_remove_controller(ssi);
  495. platform_set_drvdata(pd, NULL);
  496. pm_runtime_disable(&pd->dev);
  497. return 0;
  498. }
  499. #ifdef CONFIG_PM
  500. static int omap_ssi_runtime_suspend(struct device *dev)
  501. {
  502. struct hsi_controller *ssi = dev_get_drvdata(dev);
  503. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  504. dev_dbg(dev, "runtime suspend!\n");
  505. if (omap_ssi->get_loss)
  506. omap_ssi->loss_count =
  507. omap_ssi->get_loss(ssi->device.parent);
  508. return 0;
  509. }
  510. static int omap_ssi_runtime_resume(struct device *dev)
  511. {
  512. struct hsi_controller *ssi = dev_get_drvdata(dev);
  513. struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
  514. dev_dbg(dev, "runtime resume!\n");
  515. if ((omap_ssi->get_loss) && (omap_ssi->loss_count ==
  516. omap_ssi->get_loss(ssi->device.parent)))
  517. return 0;
  518. writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG);
  519. return 0;
  520. }
  521. static const struct dev_pm_ops omap_ssi_pm_ops = {
  522. SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume,
  523. NULL)
  524. };
  525. #define DEV_PM_OPS (&omap_ssi_pm_ops)
  526. #else
  527. #define DEV_PM_OPS NULL
  528. #endif
  529. #ifdef CONFIG_OF
  530. static const struct of_device_id omap_ssi_of_match[] = {
  531. { .compatible = "ti,omap3-ssi", },
  532. {},
  533. };
  534. MODULE_DEVICE_TABLE(of, omap_ssi_of_match);
  535. #else
  536. #define omap_ssi_of_match NULL
  537. #endif
  538. static struct platform_driver ssi_pdriver = {
  539. .probe = ssi_probe,
  540. .remove = ssi_remove,
  541. .driver = {
  542. .name = "omap_ssi",
  543. .pm = DEV_PM_OPS,
  544. .of_match_table = omap_ssi_of_match,
  545. },
  546. };
  547. static int __init ssi_init(void) {
  548. int ret;
  549. ret = platform_driver_register(&ssi_pdriver);
  550. if (ret)
  551. return ret;
  552. return platform_driver_register(&ssi_port_pdriver);
  553. }
  554. module_init(ssi_init);
  555. static void __exit ssi_exit(void) {
  556. platform_driver_unregister(&ssi_port_pdriver);
  557. platform_driver_unregister(&ssi_pdriver);
  558. }
  559. module_exit(ssi_exit);
  560. MODULE_ALIAS("platform:omap_ssi");
  561. MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>");
  562. MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
  563. MODULE_DESCRIPTION("Synchronous Serial Interface Driver");
  564. MODULE_LICENSE("GPL v2");