pci_eisa.c 2.4 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091
  1. /*
  2. * Minimalist driver for a generic PCI-to-EISA bridge.
  3. *
  4. * (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
  5. *
  6. * This code is released under the GPL version 2.
  7. *
  8. * Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
  9. * Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/device.h>
  13. #include <linux/eisa.h>
  14. #include <linux/pci.h>
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. /* There is only *one* pci_eisa device per machine, right ? */
  18. static struct eisa_root_device pci_eisa_root;
  19. static int __init pci_eisa_init(struct pci_dev *pdev)
  20. {
  21. int rc, i;
  22. struct resource *res, *bus_res = NULL;
  23. if ((rc = pci_enable_device (pdev))) {
  24. dev_err(&pdev->dev, "Could not enable device\n");
  25. return rc;
  26. }
  27. /*
  28. * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
  29. * device, so the resources available on EISA are the same as those
  30. * available on the 82375 bus. This works the same as a PCI-PCI
  31. * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
  32. * We assume other PCI-EISA bridges are similar.
  33. *
  34. * eisa_root_register() can only deal with a single io port resource,
  35. * so we use the first valid io port resource.
  36. */
  37. pci_bus_for_each_resource(pdev->bus, res, i)
  38. if (res && (res->flags & IORESOURCE_IO)) {
  39. bus_res = res;
  40. break;
  41. }
  42. if (!bus_res) {
  43. dev_err(&pdev->dev, "No resources available\n");
  44. return -1;
  45. }
  46. pci_eisa_root.dev = &pdev->dev;
  47. pci_eisa_root.res = bus_res;
  48. pci_eisa_root.bus_base_addr = bus_res->start;
  49. pci_eisa_root.slots = EISA_MAX_SLOTS;
  50. pci_eisa_root.dma_mask = pdev->dma_mask;
  51. dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
  52. if (eisa_root_register (&pci_eisa_root)) {
  53. dev_err(&pdev->dev, "Could not register EISA root\n");
  54. return -1;
  55. }
  56. return 0;
  57. }
  58. /*
  59. * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
  60. * Otherwise pnp resource will get enabled early and could prevent eisa
  61. * to be initialized.
  62. * Also need to make sure pci_eisa_init_early() is called after
  63. * x86/pci_subsys_init().
  64. * So need to use subsys_initcall_sync with it.
  65. */
  66. static int __init pci_eisa_init_early(void)
  67. {
  68. struct pci_dev *dev = NULL;
  69. int ret;
  70. for_each_pci_dev(dev)
  71. if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
  72. ret = pci_eisa_init(dev);
  73. if (ret)
  74. return ret;
  75. }
  76. return 0;
  77. }
  78. subsys_initcall_sync(pci_eisa_init_early);